1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK common parts
4 *
5 * Copyright (C) 2021 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
10
11/* comment the #define statement to disable SCIF2 (SER0) on PMOD1 (CN7) */
12#define PMOD1_SER0	1
13
14/ {
15	aliases {
16		serial1 = &scif2;
17		i2c3 = &i2c3;
18	};
19};
20
21&i2c3 {
22	pinctrl-0 = <&i2c3_pins>;
23	pinctrl-names = "default";
24	clock-frequency = <400000>;
25
26	status = "okay";
27
28	wm8978: codec@1a {
29		compatible = "wlf,wm8978";
30		#sound-dai-cells = <0>;
31		reg = <0x1a>;
32	};
33};
34
35/*
36 * To enable SCIF2 (SER0) on PMOD1 (CN7)
37 * SW1 should be at position 2->3 so that SER0_CTS# line is activated
38 * SW2 should be at position 2->3 so that SER0_TX line is activated
39 * SW3 should be at position 2->3 so that SER0_RX line is activated
40 * SW4 should be at position 2->3 so that SER0_RTS# line is activated
41 */
42#if PMOD1_SER0
43&scif2 {
44	pinctrl-0 = <&scif2_pins>;
45	pinctrl-names = "default";
46
47	uart-has-rtscts;
48	status = "okay";
49};
50#endif
51