1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the RZ/G2L SMARC EVK common parts
4 *
5 * Copyright (C) 2021 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
10
11/ {
12	aliases {
13		serial0 = &scif0;
14		i2c0 = &i2c0;
15		i2c1 = &i2c1;
16		i2c3 = &i2c3;
17	};
18
19	chosen {
20		bootargs = "ignore_loglevel";
21		stdout-path = "serial0:115200n8";
22	};
23
24	usb0_vbus_otg: regulator-usb0-vbus-otg {
25		compatible = "regulator-fixed";
26
27		regulator-name = "USB0_VBUS_OTG";
28		regulator-min-microvolt = <5000000>;
29		regulator-max-microvolt = <5000000>;
30	};
31};
32
33&ehci0 {
34	dr_mode = "otg";
35	status = "okay";
36};
37
38&ehci1 {
39	status = "okay";
40};
41
42&extal_clk {
43	clock-frequency = <24000000>;
44};
45
46&hsusb {
47	dr_mode = "otg";
48	status = "okay";
49};
50
51&i2c0 {
52	pinctrl-0 = <&i2c0_pins>;
53	pinctrl-names = "default";
54
55	status = "okay";
56};
57
58&i2c1 {
59	pinctrl-0 = <&i2c1_pins>;
60	pinctrl-names = "default";
61
62	status = "okay";
63};
64
65&i2c3 {
66	pinctrl-0 = <&i2c3_pins>;
67	pinctrl-names = "default";
68
69	status = "okay";
70};
71
72&ohci0 {
73	dr_mode = "otg";
74	status = "okay";
75};
76
77&ohci1 {
78	status = "okay";
79};
80
81&phyrst {
82	status = "okay";
83};
84
85&pinctrl {
86	i2c0_pins: i2c0 {
87		pins = "RIIC0_SDA", "RIIC0_SCL";
88		input-enable;
89	};
90
91	i2c1_pins: i2c1 {
92		pins = "RIIC1_SDA", "RIIC1_SCL";
93		input-enable;
94	};
95
96	i2c3_pins: i2c3 {
97		pinmux = <RZG2L_PORT_PINMUX(18, 0, 3)>, /* SDA */
98			 <RZG2L_PORT_PINMUX(18, 1, 3)>; /* SCL */
99	};
100
101	scif0_pins: scif0 {
102		pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>,	/* TxD */
103			 <RZG2L_PORT_PINMUX(38, 1, 1)>;	/* RxD */
104	};
105
106	usb0_pins: usb0 {
107		pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */
108			 <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */
109			 <RZG2L_PORT_PINMUX(5, 1, 1)>; /* OTG_ID */
110	};
111
112	usb1_pins: usb1 {
113		pinmux = <RZG2L_PORT_PINMUX(42, 0, 1)>, /* VBUS */
114			 <RZG2L_PORT_PINMUX(42, 1, 1)>; /* OVC */
115	};
116};
117
118&scif0 {
119	pinctrl-0 = <&scif0_pins>;
120	pinctrl-names = "default";
121	status = "okay";
122};
123
124&usb2_phy0 {
125	pinctrl-0 = <&usb0_pins>;
126	pinctrl-names = "default";
127
128	vbus-supply = <&usb0_vbus_otg>;
129	status = "okay";
130};
131
132&usb2_phy1 {
133	pinctrl-0 = <&usb1_pins>;
134	pinctrl-names = "default";
135
136	status = "okay";
137};
138