155c68261SLad Prabhakar// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
255c68261SLad Prabhakar/*
355c68261SLad Prabhakar * Device Tree Source for the RZ/G2L SMARC SOM common parts
455c68261SLad Prabhakar *
555c68261SLad Prabhakar * Copyright (C) 2021 Renesas Electronics Corp.
655c68261SLad Prabhakar */
755c68261SLad Prabhakar
8a60a311cSBiju Das#include <dt-bindings/gpio/gpio.h>
903f7d78eSLad Prabhakar#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
1003f7d78eSLad Prabhakar
11a60a311cSBiju Das/* SW1[2] should be at position 2/OFF to enable 64 GB eMMC */
12a60a311cSBiju Das#define EMMC	1
13a60a311cSBiju Das
14a60a311cSBiju Das/*
15a60a311cSBiju Das * To enable uSD card on CN3,
16a60a311cSBiju Das * SW1[2] should be at position 3/ON.
17a60a311cSBiju Das * Disable eMMC by setting "#define EMMC	0" above.
18a60a311cSBiju Das */
19a60a311cSBiju Das#define SDHI	(!EMMC)
20a60a311cSBiju Das
2155c68261SLad Prabhakar/ {
22*361b0dcbSBiju Das	aliases {
23*361b0dcbSBiju Das		ethernet0 = &eth0;
24*361b0dcbSBiju Das		ethernet1 = &eth1;
25*361b0dcbSBiju Das	};
26*361b0dcbSBiju Das
27*361b0dcbSBiju Das	chosen {
28*361b0dcbSBiju Das		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
29*361b0dcbSBiju Das	};
30*361b0dcbSBiju Das
3155c68261SLad Prabhakar	memory@48000000 {
3255c68261SLad Prabhakar		device_type = "memory";
3355c68261SLad Prabhakar		/* first 128MB is reserved for secure area. */
3455c68261SLad Prabhakar		reg = <0x0 0x48000000 0x0 0x78000000>;
3555c68261SLad Prabhakar	};
36a60a311cSBiju Das
37a60a311cSBiju Das	reg_1p8v: regulator0 {
38a60a311cSBiju Das		compatible = "regulator-fixed";
39a60a311cSBiju Das		regulator-name = "fixed-1.8V";
40a60a311cSBiju Das		regulator-min-microvolt = <1800000>;
41a60a311cSBiju Das		regulator-max-microvolt = <1800000>;
42a60a311cSBiju Das		regulator-boot-on;
43a60a311cSBiju Das		regulator-always-on;
44a60a311cSBiju Das	};
45a60a311cSBiju Das
46a60a311cSBiju Das	reg_3p3v: regulator1 {
47a60a311cSBiju Das		compatible = "regulator-fixed";
48a60a311cSBiju Das		regulator-name = "fixed-3.3V";
49a60a311cSBiju Das		regulator-min-microvolt = <3300000>;
50a60a311cSBiju Das		regulator-max-microvolt = <3300000>;
51a60a311cSBiju Das		regulator-boot-on;
52a60a311cSBiju Das		regulator-always-on;
53a60a311cSBiju Das	};
54a60a311cSBiju Das
55a60a311cSBiju Das	vccq_sdhi0: regulator-vccq-sdhi0 {
56a60a311cSBiju Das		compatible = "regulator-gpio";
57a60a311cSBiju Das
58a60a311cSBiju Das		regulator-name = "SDHI0 VccQ";
59a60a311cSBiju Das		regulator-min-microvolt = <1800000>;
60a60a311cSBiju Das		regulator-max-microvolt = <3300000>;
61a60a311cSBiju Das		states = <3300000 1>, <1800000 0>;
62a60a311cSBiju Das		regulator-boot-on;
63a60a311cSBiju Das		gpios = <&pinctrl RZG2L_GPIO(39, 0) GPIO_ACTIVE_HIGH>;
64a60a311cSBiju Das		regulator-always-on;
65a60a311cSBiju Das	};
6655c68261SLad Prabhakar};
6755c68261SLad Prabhakar
6803f7d78eSLad Prabhakar&adc {
6903f7d78eSLad Prabhakar	pinctrl-0 = <&adc_pins>;
7003f7d78eSLad Prabhakar	pinctrl-names = "default";
7103f7d78eSLad Prabhakar	status = "okay";
7203f7d78eSLad Prabhakar
7303f7d78eSLad Prabhakar	/delete-node/ channel@6;
7403f7d78eSLad Prabhakar	/delete-node/ channel@7;
7503f7d78eSLad Prabhakar};
7603f7d78eSLad Prabhakar
77*361b0dcbSBiju Das&eth0 {
78*361b0dcbSBiju Das	pinctrl-0 = <&eth0_pins>;
79*361b0dcbSBiju Das	pinctrl-names = "default";
80*361b0dcbSBiju Das	phy-handle = <&phy0>;
81*361b0dcbSBiju Das	phy-mode = "rgmii-id";
82*361b0dcbSBiju Das	status = "okay";
83*361b0dcbSBiju Das
84*361b0dcbSBiju Das	phy0: ethernet-phy@7 {
85*361b0dcbSBiju Das		compatible = "ethernet-phy-id0022.1640",
86*361b0dcbSBiju Das			     "ethernet-phy-ieee802.3-c22";
87*361b0dcbSBiju Das		reg = <7>;
88*361b0dcbSBiju Das		rxc-skew-psec = <2400>;
89*361b0dcbSBiju Das		txc-skew-psec = <2400>;
90*361b0dcbSBiju Das		rxdv-skew-psec = <0>;
91*361b0dcbSBiju Das		txdv-skew-psec = <0>;
92*361b0dcbSBiju Das		rxd0-skew-psec = <0>;
93*361b0dcbSBiju Das		rxd1-skew-psec = <0>;
94*361b0dcbSBiju Das		rxd2-skew-psec = <0>;
95*361b0dcbSBiju Das		rxd3-skew-psec = <0>;
96*361b0dcbSBiju Das		txd0-skew-psec = <0>;
97*361b0dcbSBiju Das		txd1-skew-psec = <0>;
98*361b0dcbSBiju Das		txd2-skew-psec = <0>;
99*361b0dcbSBiju Das		txd3-skew-psec = <0>;
100*361b0dcbSBiju Das	};
101*361b0dcbSBiju Das};
102*361b0dcbSBiju Das
103*361b0dcbSBiju Das&eth1 {
104*361b0dcbSBiju Das	pinctrl-0 = <&eth1_pins>;
105*361b0dcbSBiju Das	pinctrl-names = "default";
106*361b0dcbSBiju Das	phy-handle = <&phy1>;
107*361b0dcbSBiju Das	phy-mode = "rgmii-id";
108*361b0dcbSBiju Das	status = "okay";
109*361b0dcbSBiju Das
110*361b0dcbSBiju Das	phy1: ethernet-phy@7 {
111*361b0dcbSBiju Das		compatible = "ethernet-phy-id0022.1640",
112*361b0dcbSBiju Das			     "ethernet-phy-ieee802.3-c22";
113*361b0dcbSBiju Das		reg = <7>;
114*361b0dcbSBiju Das		rxc-skew-psec = <2400>;
115*361b0dcbSBiju Das		txc-skew-psec = <2400>;
116*361b0dcbSBiju Das		rxdv-skew-psec = <0>;
117*361b0dcbSBiju Das		txdv-skew-psec = <0>;
118*361b0dcbSBiju Das		rxd0-skew-psec = <0>;
119*361b0dcbSBiju Das		rxd1-skew-psec = <0>;
120*361b0dcbSBiju Das		rxd2-skew-psec = <0>;
121*361b0dcbSBiju Das		rxd3-skew-psec = <0>;
122*361b0dcbSBiju Das		txd0-skew-psec = <0>;
123*361b0dcbSBiju Das		txd1-skew-psec = <0>;
124*361b0dcbSBiju Das		txd2-skew-psec = <0>;
125*361b0dcbSBiju Das		txd3-skew-psec = <0>;
126*361b0dcbSBiju Das	};
127*361b0dcbSBiju Das};
128*361b0dcbSBiju Das
12955c68261SLad Prabhakar&extal_clk {
13055c68261SLad Prabhakar	clock-frequency = <24000000>;
13155c68261SLad Prabhakar};
13203f7d78eSLad Prabhakar
13303f7d78eSLad Prabhakar&pinctrl {
13403f7d78eSLad Prabhakar	adc_pins: adc {
13503f7d78eSLad Prabhakar		pinmux = <RZG2L_PORT_PINMUX(9, 0, 2)>; /* ADC_TRG */
13603f7d78eSLad Prabhakar	};
137a60a311cSBiju Das
138*361b0dcbSBiju Das	eth0_pins: eth0 {
139*361b0dcbSBiju Das		pinmux = <RZG2L_PORT_PINMUX(28, 1, 1)>, /* ET0_LINKSTA */
140*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(27, 1, 1)>, /* ET0_MDC */
141*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(28, 0, 1)>, /* ET0_MDIO */
142*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(20, 0, 1)>, /* ET0_TXC */
143*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(20, 1, 1)>, /* ET0_TX_CTL */
144*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(20, 2, 1)>, /* ET0_TXD0 */
145*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(21, 0, 1)>, /* ET0_TXD1 */
146*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(21, 1, 1)>, /* ET0_TXD2 */
147*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(22, 0, 1)>, /* ET0_TXD3 */
148*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(24, 0, 1)>, /* ET0_RXC */
149*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(24, 1, 1)>, /* ET0_RX_CTL */
150*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(25, 0, 1)>, /* ET0_RXD0 */
151*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(25, 1, 1)>, /* ET0_RXD1 */
152*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(26, 0, 1)>, /* ET0_RXD2 */
153*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(26, 1, 1)>; /* ET0_RXD3 */
154*361b0dcbSBiju Das	};
155*361b0dcbSBiju Das
156*361b0dcbSBiju Das	eth1_pins: eth1 {
157*361b0dcbSBiju Das		pinmux = <RZG2L_PORT_PINMUX(37, 2, 1)>, /* ET1_LINKSTA */
158*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(37, 0, 1)>, /* ET1_MDC */
159*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(37, 1, 1)>, /* ET1_MDIO */
160*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(29, 0, 1)>, /* ET1_TXC */
161*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(29, 1, 1)>, /* ET1_TX_CTL */
162*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(30, 0, 1)>, /* ET1_TXD0 */
163*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(30, 1, 1)>, /* ET1_TXD1 */
164*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(31, 0, 1)>, /* ET1_TXD2 */
165*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(31, 1, 1)>, /* ET1_TXD3 */
166*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(33, 1, 1)>, /* ET1_RXC */
167*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(34, 0, 1)>, /* ET1_RX_CTL */
168*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(34, 1, 1)>, /* ET1_RXD0 */
169*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(35, 0, 1)>, /* ET1_RXD1 */
170*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(35, 1, 1)>, /* ET1_RXD2 */
171*361b0dcbSBiju Das			 <RZG2L_PORT_PINMUX(36, 0, 1)>; /* ET1_RXD3 */
172*361b0dcbSBiju Das	};
173*361b0dcbSBiju Das
174a60a311cSBiju Das	gpio-sd0-pwr-en-hog {
175a60a311cSBiju Das		gpio-hog;
176a60a311cSBiju Das		gpios = <RZG2L_GPIO(4, 1) GPIO_ACTIVE_HIGH>;
177a60a311cSBiju Das		output-high;
178a60a311cSBiju Das		line-name = "gpio_sd0_pwr_en";
17903f7d78eSLad Prabhakar	};
180a60a311cSBiju Das
181a60a311cSBiju Das	/*
182a60a311cSBiju Das	 * SD0 device selection is XOR between GPIO_SD0_DEV_SEL and SW1[2]
183a60a311cSBiju Das	 * The below switch logic can be used to select the device between
184a60a311cSBiju Das	 * eMMC and microSD, after setting GPIO_SD0_DEV_SEL to high in DT.
185a60a311cSBiju Das	 * SW1[2] should be at position 2/OFF to enable 64 GB eMMC
186a60a311cSBiju Das	 * SW1[2] should be at position 3/ON to enable uSD card CN3
187a60a311cSBiju Das	 */
188a60a311cSBiju Das	sd0-dev-sel-hog {
189a60a311cSBiju Das		gpio-hog;
190a60a311cSBiju Das		gpios = <RZG2L_GPIO(41, 1) GPIO_ACTIVE_HIGH>;
191a60a311cSBiju Das		output-high;
192a60a311cSBiju Das		line-name = "sd0_dev_sel";
193a60a311cSBiju Das	};
194a60a311cSBiju Das
195a60a311cSBiju Das	sdhi0_emmc_pins: sd0emmc {
196a60a311cSBiju Das		sd0_emmc_data {
197a60a311cSBiju Das			pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",
198a60a311cSBiju Das			       "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7";
199a60a311cSBiju Das			power-source = <1800>;
200a60a311cSBiju Das		};
201a60a311cSBiju Das
202a60a311cSBiju Das		sd0_emmc_ctrl {
203a60a311cSBiju Das			pins = "SD0_CLK", "SD0_CMD";
204a60a311cSBiju Das			power-source = <1800>;
205a60a311cSBiju Das		};
206a60a311cSBiju Das
207a60a311cSBiju Das		sd0_emmc_rst {
208a60a311cSBiju Das			pins = "SD0_RST#";
209a60a311cSBiju Das			power-source = <1800>;
210a60a311cSBiju Das		};
211a60a311cSBiju Das	};
212a60a311cSBiju Das
213a60a311cSBiju Das	sdhi0_pins: sd0 {
214a60a311cSBiju Das		sd0_data {
215a60a311cSBiju Das			pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3";
216a60a311cSBiju Das			power-source = <3300>;
217a60a311cSBiju Das		};
218a60a311cSBiju Das
219a60a311cSBiju Das		sd0_ctrl {
220a60a311cSBiju Das			pins = "SD0_CLK", "SD0_CMD";
221a60a311cSBiju Das			power-source = <3300>;
222a60a311cSBiju Das		};
223a60a311cSBiju Das
224a60a311cSBiju Das		sd0_mux {
225a60a311cSBiju Das			pinmux = <RZG2L_PORT_PINMUX(47, 0, 2)>; /* SD0_CD */
226a60a311cSBiju Das		};
227a60a311cSBiju Das	};
228a60a311cSBiju Das
229a60a311cSBiju Das	sdhi0_pins_uhs: sd0_uhs {
230a60a311cSBiju Das		sd0_data_uhs {
231a60a311cSBiju Das			pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3";
232a60a311cSBiju Das			power-source = <1800>;
233a60a311cSBiju Das		};
234a60a311cSBiju Das
235a60a311cSBiju Das		sd0_ctrl_uhs {
236a60a311cSBiju Das			pins = "SD0_CLK", "SD0_CMD";
237a60a311cSBiju Das			power-source = <1800>;
238a60a311cSBiju Das		};
239a60a311cSBiju Das
240a60a311cSBiju Das		sd0_mux_uhs {
241a60a311cSBiju Das			pinmux = <RZG2L_PORT_PINMUX(47, 0, 2)>; /* SD0_CD */
242a60a311cSBiju Das		};
243a60a311cSBiju Das	};
244a60a311cSBiju Das};
245a60a311cSBiju Das
246a60a311cSBiju Das#if SDHI
247a60a311cSBiju Das&sdhi0 {
248a60a311cSBiju Das	pinctrl-0 = <&sdhi0_pins>;
249a60a311cSBiju Das	pinctrl-1 = <&sdhi0_pins_uhs>;
250a60a311cSBiju Das	pinctrl-names = "default", "state_uhs";
251a60a311cSBiju Das
252a60a311cSBiju Das	vmmc-supply = <&reg_3p3v>;
253a60a311cSBiju Das	vqmmc-supply = <&vccq_sdhi0>;
254a60a311cSBiju Das	bus-width = <4>;
255a60a311cSBiju Das	sd-uhs-sdr50;
256a60a311cSBiju Das	sd-uhs-sdr104;
257a60a311cSBiju Das	status = "okay";
258a60a311cSBiju Das};
259a60a311cSBiju Das#endif
260a60a311cSBiju Das
261a60a311cSBiju Das#if EMMC
262a60a311cSBiju Das&sdhi0 {
263a60a311cSBiju Das	pinctrl-0 = <&sdhi0_emmc_pins>;
264a60a311cSBiju Das	pinctrl-1 = <&sdhi0_emmc_pins>;
265a60a311cSBiju Das	pinctrl-names = "default", "state_uhs";
266a60a311cSBiju Das
267a60a311cSBiju Das	vmmc-supply = <&reg_3p3v>;
268a60a311cSBiju Das	vqmmc-supply = <&reg_1p8v>;
269a60a311cSBiju Das	bus-width = <8>;
270a60a311cSBiju Das	mmc-hs200-1_8v;
271a60a311cSBiju Das	non-removable;
272a60a311cSBiju Das	fixed-emmc-driver-type = <1>;
273a60a311cSBiju Das	status = "okay";
274a60a311cSBiju Das};
275a60a311cSBiju Das#endif
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