1ce0c63b6SBiju Das// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2ce0c63b6SBiju Das/* 3ce0c63b6SBiju Das * Device Tree Source for the RZ/G2LC SMARC EVK board 4ce0c63b6SBiju Das * 5ce0c63b6SBiju Das * Copyright (C) 2021 Renesas Electronics Corp. 6ce0c63b6SBiju Das */ 7ce0c63b6SBiju Das 8ce0c63b6SBiju Das/dts-v1/; 929df86bbSLad Prabhakar 1029df86bbSLad Prabhakar/* 1129df86bbSLad Prabhakar * DIP-Switch SW1 setting on SoM 1229df86bbSLad Prabhakar * 1 : High; 0: Low 1329df86bbSLad Prabhakar * SW1-2 : SW_SD0_DEV_SEL (1: eMMC; 0: uSD) 1429df86bbSLad Prabhakar * SW1-3 : SW_SCIF_CAN (1: CAN1; 0: SCIF1) 1529df86bbSLad Prabhakar * SW1-4 : SW_RSPI_CAN (1: CAN1; 0: RSPI1) 1629df86bbSLad Prabhakar * SW1-5 : SW_I2S0_I2S1 (1: I2S2 (HDMI audio); 0: I2S0) 1729df86bbSLad Prabhakar * Please change below macros according to SW1 setting 1829df86bbSLad Prabhakar */ 1929df86bbSLad Prabhakar 2029df86bbSLad Prabhakar#define SW_SD0_DEV_SEL 1 2129df86bbSLad Prabhakar 2229df86bbSLad Prabhakar#define SW_SCIF_CAN 0 2329df86bbSLad Prabhakar#if (SW_SCIF_CAN) 2429df86bbSLad Prabhakar/* Due to HW routing, SW_RSPI_CAN is always 0 when SW_SCIF_CAN is set to 1 */ 2529df86bbSLad Prabhakar#define SW_RSPI_CAN 0 2629df86bbSLad Prabhakar#else 2729df86bbSLad Prabhakar/* Please set SW_RSPI_CAN. Default value is 1 */ 2829df86bbSLad Prabhakar#define SW_RSPI_CAN 1 2929df86bbSLad Prabhakar#endif 3029df86bbSLad Prabhakar 3129df86bbSLad Prabhakar#if (SW_SCIF_CAN && SW_RSPI_CAN) 3229df86bbSLad Prabhakar#error "Can not set 1 to both SW_SCIF_CAN and SW_RSPI_CAN due to HW routing" 3329df86bbSLad Prabhakar#endif 3429df86bbSLad Prabhakar 3529df86bbSLad Prabhakar/* comment the #define statement to disable SCIF1 (SER0) on PMOD1 (CN7) */ 3629df86bbSLad Prabhakar#define PMOD1_SER0 1 3729df86bbSLad Prabhakar 38*5d7de61fSBiju Das/* 39*5d7de61fSBiju Das * To enable MTU3a PWM on PMOD0, 40*5d7de61fSBiju Das * - Set DIP-Switch SW1-4 to Off position. 41*5d7de61fSBiju Das * - Set SW_RSPI_CAN macro to 0. 42*5d7de61fSBiju Das * - Set PMOD_MTU3 macro to 1. 43*5d7de61fSBiju Das */ 44*5d7de61fSBiju Das#define PMOD_MTU3 0 45*5d7de61fSBiju Das 46*5d7de61fSBiju Das#if (PMOD_MTU3 && SW_RSPI_CAN) 47*5d7de61fSBiju Das#error "Cannot set as both PMOD_MTU3 and SW_RSPI_CAN are mutually exclusive" 48*5d7de61fSBiju Das#endif 49*5d7de61fSBiju Das 50ce0c63b6SBiju Das#include "r9a07g044c2.dtsi" 5129df86bbSLad Prabhakar#include "rzg2lc-smarc-som.dtsi" 522ed3b5d9SBiju Das#include "rzg2lc-smarc.dtsi" 53ce0c63b6SBiju Das 54ce0c63b6SBiju Das/ { 55ce0c63b6SBiju Das model = "Renesas SMARC EVK based on r9a07g044c2"; 56ce0c63b6SBiju Das compatible = "renesas,smarc-evk", "renesas,r9a07g044c2", "renesas,r9a07g044"; 57ce0c63b6SBiju Das}; 58