1e4d755cfSYoshihiro Shimoda// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2e4d755cfSYoshihiro Shimoda/*
3e4d755cfSYoshihiro Shimoda * Device Tree Source for the White Hawk CPU board
4e4d755cfSYoshihiro Shimoda *
5e4d755cfSYoshihiro Shimoda * Copyright (C) 2022 Renesas Electronics Corp.
6e4d755cfSYoshihiro Shimoda */
7e4d755cfSYoshihiro Shimoda
8e4d755cfSYoshihiro Shimoda#include "r8a779g0.dtsi"
9e4d755cfSYoshihiro Shimoda
1060dc0e87SGeert Uytterhoeven#include <dt-bindings/gpio/gpio.h>
116672f840SGeert Uytterhoeven#include <dt-bindings/input/input.h>
1260dc0e87SGeert Uytterhoeven#include <dt-bindings/leds/common.h>
1360dc0e87SGeert Uytterhoeven
14e4d755cfSYoshihiro Shimoda/ {
15e4d755cfSYoshihiro Shimoda	model = "Renesas White Hawk CPU board";
16e4d755cfSYoshihiro Shimoda	compatible = "renesas,white-hawk-cpu", "renesas,r8a779g0";
17e4d755cfSYoshihiro Shimoda
187bb9e424SGeert Uytterhoeven	aliases {
1996f7071dSGeert Uytterhoeven		ethernet0 = &avb0;
207bb9e424SGeert Uytterhoeven		serial0 = &hscif0;
217bb9e424SGeert Uytterhoeven	};
227bb9e424SGeert Uytterhoeven
237bb9e424SGeert Uytterhoeven	chosen {
24f4b7dffdSKuninori Morimoto		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
257bb9e424SGeert Uytterhoeven		stdout-path = "serial0:921600n8";
267bb9e424SGeert Uytterhoeven	};
277bb9e424SGeert Uytterhoeven
286672f840SGeert Uytterhoeven	keys {
296672f840SGeert Uytterhoeven		compatible = "gpio-keys";
306672f840SGeert Uytterhoeven
316672f840SGeert Uytterhoeven		pinctrl-0 = <&keys_pins>;
326672f840SGeert Uytterhoeven		pinctrl-names = "default";
336672f840SGeert Uytterhoeven
346672f840SGeert Uytterhoeven		key-1 {
356672f840SGeert Uytterhoeven			gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
366672f840SGeert Uytterhoeven			linux,code = <KEY_1>;
376672f840SGeert Uytterhoeven			label = "SW47";
386672f840SGeert Uytterhoeven			wakeup-source;
396672f840SGeert Uytterhoeven			debounce-interval = <20>;
406672f840SGeert Uytterhoeven		};
416672f840SGeert Uytterhoeven
426672f840SGeert Uytterhoeven		key-2 {
436672f840SGeert Uytterhoeven			gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
446672f840SGeert Uytterhoeven			linux,code = <KEY_2>;
456672f840SGeert Uytterhoeven			label = "SW48";
466672f840SGeert Uytterhoeven			wakeup-source;
476672f840SGeert Uytterhoeven			debounce-interval = <20>;
486672f840SGeert Uytterhoeven		};
496672f840SGeert Uytterhoeven
506672f840SGeert Uytterhoeven		key-3 {
516672f840SGeert Uytterhoeven			gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
526672f840SGeert Uytterhoeven			linux,code = <KEY_3>;
536672f840SGeert Uytterhoeven			label = "SW49";
546672f840SGeert Uytterhoeven			wakeup-source;
556672f840SGeert Uytterhoeven			debounce-interval = <20>;
566672f840SGeert Uytterhoeven		};
576672f840SGeert Uytterhoeven	};
586672f840SGeert Uytterhoeven
5960dc0e87SGeert Uytterhoeven	leds {
6060dc0e87SGeert Uytterhoeven		compatible = "gpio-leds";
6160dc0e87SGeert Uytterhoeven
6260dc0e87SGeert Uytterhoeven		led-1 {
6360dc0e87SGeert Uytterhoeven			gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
6460dc0e87SGeert Uytterhoeven			color = <LED_COLOR_ID_GREEN>;
6560dc0e87SGeert Uytterhoeven			function = LED_FUNCTION_INDICATOR;
6660dc0e87SGeert Uytterhoeven			function-enumerator = <1>;
6760dc0e87SGeert Uytterhoeven		};
6860dc0e87SGeert Uytterhoeven
6960dc0e87SGeert Uytterhoeven		led-2 {
7060dc0e87SGeert Uytterhoeven			gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
7160dc0e87SGeert Uytterhoeven			color = <LED_COLOR_ID_GREEN>;
7260dc0e87SGeert Uytterhoeven			function = LED_FUNCTION_INDICATOR;
7360dc0e87SGeert Uytterhoeven			function-enumerator = <2>;
7460dc0e87SGeert Uytterhoeven		};
7560dc0e87SGeert Uytterhoeven
7660dc0e87SGeert Uytterhoeven		led-3 {
7760dc0e87SGeert Uytterhoeven			gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
7860dc0e87SGeert Uytterhoeven			color = <LED_COLOR_ID_GREEN>;
7960dc0e87SGeert Uytterhoeven			function = LED_FUNCTION_INDICATOR;
8060dc0e87SGeert Uytterhoeven			function-enumerator = <3>;
8160dc0e87SGeert Uytterhoeven		};
8260dc0e87SGeert Uytterhoeven	};
8360dc0e87SGeert Uytterhoeven
84e4d755cfSYoshihiro Shimoda	memory@48000000 {
85e4d755cfSYoshihiro Shimoda		device_type = "memory";
86e4d755cfSYoshihiro Shimoda		/* first 128MB is reserved for secure area. */
87e4d755cfSYoshihiro Shimoda		reg = <0x0 0x48000000 0x0 0x78000000>;
88e4d755cfSYoshihiro Shimoda	};
89e4d755cfSYoshihiro Shimoda
90e4d755cfSYoshihiro Shimoda	memory@480000000 {
91e4d755cfSYoshihiro Shimoda		device_type = "memory";
92e4d755cfSYoshihiro Shimoda		reg = <0x4 0x80000000 0x0 0x80000000>;
93e4d755cfSYoshihiro Shimoda	};
94e4d755cfSYoshihiro Shimoda
95e4d755cfSYoshihiro Shimoda	memory@600000000 {
96e4d755cfSYoshihiro Shimoda		device_type = "memory";
97e4d755cfSYoshihiro Shimoda		reg = <0x6 0x00000000 0x1 0x00000000>;
98e4d755cfSYoshihiro Shimoda	};
9934bd9009STakeshi Kihara
100*df9645b9STomi Valkeinen	mini-dp-con {
101*df9645b9STomi Valkeinen		compatible = "dp-connector";
102*df9645b9STomi Valkeinen		label = "CN5";
103*df9645b9STomi Valkeinen		type = "mini";
104*df9645b9STomi Valkeinen
105*df9645b9STomi Valkeinen		port {
106*df9645b9STomi Valkeinen			mini_dp_con_in: endpoint {
107*df9645b9STomi Valkeinen				remote-endpoint = <&sn65dsi86_out>;
108*df9645b9STomi Valkeinen			};
109*df9645b9STomi Valkeinen		};
110*df9645b9STomi Valkeinen	};
111*df9645b9STomi Valkeinen
112*df9645b9STomi Valkeinen	reg_1p2v: regulator-1p2v {
113*df9645b9STomi Valkeinen		compatible = "regulator-fixed";
114*df9645b9STomi Valkeinen		regulator-name = "fixed-1.2V";
115*df9645b9STomi Valkeinen		regulator-min-microvolt = <1200000>;
116*df9645b9STomi Valkeinen		regulator-max-microvolt = <1200000>;
117*df9645b9STomi Valkeinen		regulator-boot-on;
118*df9645b9STomi Valkeinen		regulator-always-on;
119*df9645b9STomi Valkeinen	};
120*df9645b9STomi Valkeinen
12134bd9009STakeshi Kihara	reg_1p8v: regulator-1p8v {
12234bd9009STakeshi Kihara		compatible = "regulator-fixed";
12334bd9009STakeshi Kihara		regulator-name = "fixed-1.8V";
12434bd9009STakeshi Kihara		regulator-min-microvolt = <1800000>;
12534bd9009STakeshi Kihara		regulator-max-microvolt = <1800000>;
12634bd9009STakeshi Kihara		regulator-boot-on;
12734bd9009STakeshi Kihara		regulator-always-on;
12834bd9009STakeshi Kihara	};
12934bd9009STakeshi Kihara
13034bd9009STakeshi Kihara	reg_3p3v: regulator-3p3v {
13134bd9009STakeshi Kihara		compatible = "regulator-fixed";
13234bd9009STakeshi Kihara		regulator-name = "fixed-3.3V";
13334bd9009STakeshi Kihara		regulator-min-microvolt = <3300000>;
13434bd9009STakeshi Kihara		regulator-max-microvolt = <3300000>;
13534bd9009STakeshi Kihara		regulator-boot-on;
13634bd9009STakeshi Kihara		regulator-always-on;
13734bd9009STakeshi Kihara	};
138*df9645b9STomi Valkeinen
139*df9645b9STomi Valkeinen	sn65dsi86_refclk: clk-x6 {
140*df9645b9STomi Valkeinen		compatible = "fixed-clock";
141*df9645b9STomi Valkeinen		#clock-cells = <0>;
142*df9645b9STomi Valkeinen		clock-frequency = <38400000>;
143*df9645b9STomi Valkeinen	};
144e4d755cfSYoshihiro Shimoda};
145e4d755cfSYoshihiro Shimoda
14696f7071dSGeert Uytterhoeven&avb0 {
14796f7071dSGeert Uytterhoeven	pinctrl-0 = <&avb0_pins>;
14896f7071dSGeert Uytterhoeven	pinctrl-names = "default";
14996f7071dSGeert Uytterhoeven	phy-handle = <&phy0>;
15096f7071dSGeert Uytterhoeven	tx-internal-delay-ps = <2000>;
15196f7071dSGeert Uytterhoeven	status = "okay";
15296f7071dSGeert Uytterhoeven
15396f7071dSGeert Uytterhoeven	phy0: ethernet-phy@0 {
15496f7071dSGeert Uytterhoeven		compatible = "ethernet-phy-id0022.1622",
15596f7071dSGeert Uytterhoeven			     "ethernet-phy-ieee802.3-c22";
15696f7071dSGeert Uytterhoeven		rxc-skew-ps = <1500>;
15796f7071dSGeert Uytterhoeven		reg = <0>;
15896f7071dSGeert Uytterhoeven		interrupt-parent = <&gpio7>;
15996f7071dSGeert Uytterhoeven		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
16096f7071dSGeert Uytterhoeven		reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
16196f7071dSGeert Uytterhoeven	};
16296f7071dSGeert Uytterhoeven};
16396f7071dSGeert Uytterhoeven
164*df9645b9STomi Valkeinen&dsi0 {
165*df9645b9STomi Valkeinen	status = "okay";
166*df9645b9STomi Valkeinen
167*df9645b9STomi Valkeinen	ports {
168*df9645b9STomi Valkeinen		port@1 {
169*df9645b9STomi Valkeinen			dsi0_out: endpoint {
170*df9645b9STomi Valkeinen				remote-endpoint = <&sn65dsi86_in>;
171*df9645b9STomi Valkeinen				data-lanes = <1 2 3 4>;
172*df9645b9STomi Valkeinen			};
173*df9645b9STomi Valkeinen		};
174*df9645b9STomi Valkeinen	};
175*df9645b9STomi Valkeinen};
176*df9645b9STomi Valkeinen
177*df9645b9STomi Valkeinen&du {
178*df9645b9STomi Valkeinen	status = "okay";
179*df9645b9STomi Valkeinen};
180*df9645b9STomi Valkeinen
181e4d755cfSYoshihiro Shimoda&extal_clk {
182e4d755cfSYoshihiro Shimoda	clock-frequency = <16666666>;
183e4d755cfSYoshihiro Shimoda};
184e4d755cfSYoshihiro Shimoda
185e4d755cfSYoshihiro Shimoda&extalr_clk {
186e4d755cfSYoshihiro Shimoda	clock-frequency = <32768>;
187e4d755cfSYoshihiro Shimoda};
188e4d755cfSYoshihiro Shimoda
189e4d755cfSYoshihiro Shimoda&hscif0 {
190e4d755cfSYoshihiro Shimoda	status = "okay";
191e4d755cfSYoshihiro Shimoda};
192e4d755cfSYoshihiro Shimoda
19377643815SGeert Uytterhoeven&i2c0 {
19477643815SGeert Uytterhoeven	pinctrl-0 = <&i2c0_pins>;
19577643815SGeert Uytterhoeven	pinctrl-names = "default";
19677643815SGeert Uytterhoeven
19777643815SGeert Uytterhoeven	status = "okay";
19877643815SGeert Uytterhoeven	clock-frequency = <400000>;
19977643815SGeert Uytterhoeven
20092378fd2SGeert Uytterhoeven	io_expander_a: gpio@20 {
20192378fd2SGeert Uytterhoeven		compatible = "onnn,pca9654";
20292378fd2SGeert Uytterhoeven		reg = <0x20>;
20392378fd2SGeert Uytterhoeven		interrupt-parent = <&gpio0>;
20492378fd2SGeert Uytterhoeven		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
20592378fd2SGeert Uytterhoeven		gpio-controller;
20692378fd2SGeert Uytterhoeven		#gpio-cells = <2>;
20792378fd2SGeert Uytterhoeven		interrupt-controller;
20892378fd2SGeert Uytterhoeven		#interrupt-cells = <2>;
20992378fd2SGeert Uytterhoeven	};
21092378fd2SGeert Uytterhoeven
21177643815SGeert Uytterhoeven	eeprom@50 {
21277643815SGeert Uytterhoeven		compatible = "rohm,br24g01", "atmel,24c01";
21377643815SGeert Uytterhoeven		label = "cpu-board";
21477643815SGeert Uytterhoeven		reg = <0x50>;
21577643815SGeert Uytterhoeven		pagesize = <8>;
21677643815SGeert Uytterhoeven	};
21777643815SGeert Uytterhoeven};
21877643815SGeert Uytterhoeven
219*df9645b9STomi Valkeinen&i2c1 {
220*df9645b9STomi Valkeinen	pinctrl-0 = <&i2c1_pins>;
221*df9645b9STomi Valkeinen	pinctrl-names = "default";
222*df9645b9STomi Valkeinen
223*df9645b9STomi Valkeinen	status = "okay";
224*df9645b9STomi Valkeinen	clock-frequency = <400000>;
225*df9645b9STomi Valkeinen
226*df9645b9STomi Valkeinen	bridge@2c {
227*df9645b9STomi Valkeinen		compatible = "ti,sn65dsi86";
228*df9645b9STomi Valkeinen		reg = <0x2c>;
229*df9645b9STomi Valkeinen
230*df9645b9STomi Valkeinen		clocks = <&sn65dsi86_refclk>;
231*df9645b9STomi Valkeinen		clock-names = "refclk";
232*df9645b9STomi Valkeinen
233*df9645b9STomi Valkeinen		interrupt-parent = <&intc_ex>;
234*df9645b9STomi Valkeinen		interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
235*df9645b9STomi Valkeinen
236*df9645b9STomi Valkeinen		enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
237*df9645b9STomi Valkeinen
238*df9645b9STomi Valkeinen		vccio-supply = <&reg_1p8v>;
239*df9645b9STomi Valkeinen		vpll-supply = <&reg_1p8v>;
240*df9645b9STomi Valkeinen		vcca-supply = <&reg_1p2v>;
241*df9645b9STomi Valkeinen		vcc-supply = <&reg_1p2v>;
242*df9645b9STomi Valkeinen
243*df9645b9STomi Valkeinen		ports {
244*df9645b9STomi Valkeinen			#address-cells = <1>;
245*df9645b9STomi Valkeinen			#size-cells = <0>;
246*df9645b9STomi Valkeinen
247*df9645b9STomi Valkeinen			port@0 {
248*df9645b9STomi Valkeinen				reg = <0>;
249*df9645b9STomi Valkeinen				sn65dsi86_in: endpoint {
250*df9645b9STomi Valkeinen					remote-endpoint = <&dsi0_out>;
251*df9645b9STomi Valkeinen				};
252*df9645b9STomi Valkeinen			};
253*df9645b9STomi Valkeinen
254*df9645b9STomi Valkeinen			port@1 {
255*df9645b9STomi Valkeinen				reg = <1>;
256*df9645b9STomi Valkeinen				sn65dsi86_out: endpoint {
257*df9645b9STomi Valkeinen					remote-endpoint = <&mini_dp_con_in>;
258*df9645b9STomi Valkeinen				};
259*df9645b9STomi Valkeinen			};
260*df9645b9STomi Valkeinen		};
261*df9645b9STomi Valkeinen	};
262*df9645b9STomi Valkeinen};
263*df9645b9STomi Valkeinen
26434bd9009STakeshi Kihara&mmc0 {
26534bd9009STakeshi Kihara	pinctrl-0 = <&mmc_pins>;
26634bd9009STakeshi Kihara	pinctrl-1 = <&mmc_pins>;
26734bd9009STakeshi Kihara	pinctrl-names = "default", "state_uhs";
26834bd9009STakeshi Kihara
26934bd9009STakeshi Kihara	vmmc-supply = <&reg_3p3v>;
27034bd9009STakeshi Kihara	vqmmc-supply = <&reg_1p8v>;
27134bd9009STakeshi Kihara	mmc-hs200-1_8v;
27234bd9009STakeshi Kihara	mmc-hs400-1_8v;
27334bd9009STakeshi Kihara	bus-width = <8>;
27434bd9009STakeshi Kihara	no-sd;
27534bd9009STakeshi Kihara	no-sdio;
27634bd9009STakeshi Kihara	non-removable;
27734bd9009STakeshi Kihara	full-pwr-cycle-in-suspend;
27834bd9009STakeshi Kihara	status = "okay";
27934bd9009STakeshi Kihara};
28034bd9009STakeshi Kihara
2817a8d590dSGeert Uytterhoeven&pfc {
2827a8d590dSGeert Uytterhoeven	pinctrl-0 = <&scif_clk_pins>;
2837a8d590dSGeert Uytterhoeven	pinctrl-names = "default";
2847a8d590dSGeert Uytterhoeven
28596f7071dSGeert Uytterhoeven	avb0_pins: avb0 {
28696f7071dSGeert Uytterhoeven		mux {
28796f7071dSGeert Uytterhoeven			groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
28896f7071dSGeert Uytterhoeven				 "avb0_txcrefclk";
28996f7071dSGeert Uytterhoeven			function = "avb0";
29096f7071dSGeert Uytterhoeven		};
29196f7071dSGeert Uytterhoeven
29296f7071dSGeert Uytterhoeven		pins_mdio {
29396f7071dSGeert Uytterhoeven			groups = "avb0_mdio";
29496f7071dSGeert Uytterhoeven			drive-strength = <21>;
29596f7071dSGeert Uytterhoeven		};
29696f7071dSGeert Uytterhoeven
29796f7071dSGeert Uytterhoeven		pins_mii {
29896f7071dSGeert Uytterhoeven			groups = "avb0_rgmii";
29996f7071dSGeert Uytterhoeven			drive-strength = <21>;
30096f7071dSGeert Uytterhoeven		};
30196f7071dSGeert Uytterhoeven
30296f7071dSGeert Uytterhoeven	};
3037a8d590dSGeert Uytterhoeven	hscif0_pins: hscif0 {
3047a8d590dSGeert Uytterhoeven		groups = "hscif0_data";
3057a8d590dSGeert Uytterhoeven		function = "hscif0";
3067a8d590dSGeert Uytterhoeven	};
3077a8d590dSGeert Uytterhoeven
30877643815SGeert Uytterhoeven	i2c0_pins: i2c0 {
30977643815SGeert Uytterhoeven		groups = "i2c0";
31077643815SGeert Uytterhoeven		function = "i2c0";
31177643815SGeert Uytterhoeven	};
31277643815SGeert Uytterhoeven
313*df9645b9STomi Valkeinen	i2c1_pins: i2c1 {
314*df9645b9STomi Valkeinen		groups = "i2c1";
315*df9645b9STomi Valkeinen		function = "i2c1";
316*df9645b9STomi Valkeinen	};
317*df9645b9STomi Valkeinen
3186672f840SGeert Uytterhoeven	keys_pins: keys {
3196672f840SGeert Uytterhoeven		pins = "GP_5_0", "GP_5_1", "GP_5_2";
3206672f840SGeert Uytterhoeven		bias-pull-up;
3216672f840SGeert Uytterhoeven	};
3226672f840SGeert Uytterhoeven
32334bd9009STakeshi Kihara	mmc_pins: mmc {
32434bd9009STakeshi Kihara		groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
32534bd9009STakeshi Kihara		function = "mmc";
32634bd9009STakeshi Kihara		power-source = <1800>;
32734bd9009STakeshi Kihara	};
32834bd9009STakeshi Kihara
3295c1bf1e3SHai Pham	qspi0_pins: qspi0 {
3305c1bf1e3SHai Pham		groups = "qspi0_ctrl", "qspi0_data4";
3315c1bf1e3SHai Pham		function = "qspi0";
3325c1bf1e3SHai Pham	};
3335c1bf1e3SHai Pham
3347a8d590dSGeert Uytterhoeven	scif_clk_pins: scif_clk {
3357a8d590dSGeert Uytterhoeven		groups = "scif_clk";
3367a8d590dSGeert Uytterhoeven		function = "scif_clk";
3377a8d590dSGeert Uytterhoeven	};
3387a8d590dSGeert Uytterhoeven};
3397a8d590dSGeert Uytterhoeven
3405c1bf1e3SHai Pham&rpc {
3415c1bf1e3SHai Pham	pinctrl-0 = <&qspi0_pins>;
3425c1bf1e3SHai Pham	pinctrl-names = "default";
3435c1bf1e3SHai Pham
3445c1bf1e3SHai Pham	status = "okay";
3455c1bf1e3SHai Pham
3465c1bf1e3SHai Pham	flash@0 {
3475c1bf1e3SHai Pham		compatible = "spansion,s25fs512s", "jedec,spi-nor";
3485c1bf1e3SHai Pham		reg = <0>;
3495c1bf1e3SHai Pham		spi-max-frequency = <40000000>;
3505c1bf1e3SHai Pham		spi-rx-bus-width = <4>;
3515c1bf1e3SHai Pham
3525c1bf1e3SHai Pham		partitions {
3535c1bf1e3SHai Pham			compatible = "fixed-partitions";
3545c1bf1e3SHai Pham			#address-cells = <1>;
3555c1bf1e3SHai Pham			#size-cells = <1>;
3565c1bf1e3SHai Pham
3575c1bf1e3SHai Pham			boot@0 {
3585c1bf1e3SHai Pham				reg = <0x0 0x1200000>;
3595c1bf1e3SHai Pham				read-only;
3605c1bf1e3SHai Pham			};
3615c1bf1e3SHai Pham			user@1200000 {
3625c1bf1e3SHai Pham				reg = <0x1200000 0x2e00000>;
3635c1bf1e3SHai Pham			};
3645c1bf1e3SHai Pham		};
3655c1bf1e3SHai Pham	};
3665c1bf1e3SHai Pham};
3675c1bf1e3SHai Pham
368495e36c3SGeert Uytterhoeven&rwdt {
369495e36c3SGeert Uytterhoeven	timeout-sec = <60>;
370495e36c3SGeert Uytterhoeven	status = "okay";
371495e36c3SGeert Uytterhoeven};
372d13f817aSWolfram Sang
373d13f817aSWolfram Sang&scif_clk {
374d13f817aSWolfram Sang	clock-frequency = <24000000>;
375d13f817aSWolfram Sang};
376