163070d7cSYoshihiro Shimoda// SPDX-License-Identifier: GPL-2.0
263070d7cSYoshihiro Shimoda/*
363070d7cSYoshihiro Shimoda * Device Tree Source for the Falcon CPU board
463070d7cSYoshihiro Shimoda *
563070d7cSYoshihiro Shimoda * Copyright (C) 2020 Renesas Electronics Corp.
663070d7cSYoshihiro Shimoda */
763070d7cSYoshihiro Shimoda
8e8ac55a5SWolfram Sang#include <dt-bindings/gpio/gpio.h>
963070d7cSYoshihiro Shimoda#include "r8a779a0.dtsi"
1063070d7cSYoshihiro Shimoda
1163070d7cSYoshihiro Shimoda/ {
1263070d7cSYoshihiro Shimoda	model = "Renesas Falcon CPU board";
1363070d7cSYoshihiro Shimoda	compatible = "renesas,falcon-cpu", "renesas,r8a779a0";
1463070d7cSYoshihiro Shimoda
1563070d7cSYoshihiro Shimoda	memory@48000000 {
1663070d7cSYoshihiro Shimoda		device_type = "memory";
1763070d7cSYoshihiro Shimoda		/* first 128MB is reserved for secure area. */
1863070d7cSYoshihiro Shimoda		reg = <0x0 0x48000000 0x0 0x78000000>;
1963070d7cSYoshihiro Shimoda	};
2063070d7cSYoshihiro Shimoda
2163070d7cSYoshihiro Shimoda	memory@500000000 {
2263070d7cSYoshihiro Shimoda		device_type = "memory";
2363070d7cSYoshihiro Shimoda		reg = <0x5 0x00000000 0x0 0x80000000>;
2463070d7cSYoshihiro Shimoda	};
2563070d7cSYoshihiro Shimoda
2663070d7cSYoshihiro Shimoda	memory@600000000 {
2763070d7cSYoshihiro Shimoda		device_type = "memory";
2863070d7cSYoshihiro Shimoda		reg = <0x6 0x00000000 0x0 0x80000000>;
2963070d7cSYoshihiro Shimoda	};
3063070d7cSYoshihiro Shimoda
3163070d7cSYoshihiro Shimoda	memory@700000000 {
3263070d7cSYoshihiro Shimoda		device_type = "memory";
3363070d7cSYoshihiro Shimoda		reg = <0x7 0x00000000 0x0 0x80000000>;
3463070d7cSYoshihiro Shimoda	};
35*ee33cd69STakeshi Saito
36*ee33cd69STakeshi Saito	reg_1p8v: regulator-1p8v {
37*ee33cd69STakeshi Saito		compatible = "regulator-fixed";
38*ee33cd69STakeshi Saito		regulator-name = "fixed-1.8V";
39*ee33cd69STakeshi Saito		regulator-min-microvolt = <1800000>;
40*ee33cd69STakeshi Saito		regulator-max-microvolt = <1800000>;
41*ee33cd69STakeshi Saito		regulator-boot-on;
42*ee33cd69STakeshi Saito		regulator-always-on;
43*ee33cd69STakeshi Saito	};
44*ee33cd69STakeshi Saito
45*ee33cd69STakeshi Saito	reg_3p3v: regulator-3p3v {
46*ee33cd69STakeshi Saito		compatible = "regulator-fixed";
47*ee33cd69STakeshi Saito		regulator-name = "fixed-3.3V";
48*ee33cd69STakeshi Saito		regulator-min-microvolt = <3300000>;
49*ee33cd69STakeshi Saito		regulator-max-microvolt = <3300000>;
50*ee33cd69STakeshi Saito		regulator-boot-on;
51*ee33cd69STakeshi Saito		regulator-always-on;
52*ee33cd69STakeshi Saito	};
5363070d7cSYoshihiro Shimoda};
5463070d7cSYoshihiro Shimoda
55e8ac55a5SWolfram Sang&avb0 {
56e8ac55a5SWolfram Sang	pinctrl-0 = <&avb0_pins>;
57e8ac55a5SWolfram Sang	pinctrl-names = "default";
58e8ac55a5SWolfram Sang	phy-handle = <&phy0>;
59e8ac55a5SWolfram Sang	tx-internal-delay-ps = <2000>;
60e8ac55a5SWolfram Sang	status = "okay";
61e8ac55a5SWolfram Sang
62e8ac55a5SWolfram Sang	phy0: ethernet-phy@0 {
63e8ac55a5SWolfram Sang		rxc-skew-ps = <1500>;
64e8ac55a5SWolfram Sang		reg = <0>;
65e8ac55a5SWolfram Sang		interrupt-parent = <&gpio4>;
66e8ac55a5SWolfram Sang		interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
67e8ac55a5SWolfram Sang		reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
68e8ac55a5SWolfram Sang	};
69e8ac55a5SWolfram Sang};
70e8ac55a5SWolfram Sang
7163070d7cSYoshihiro Shimoda&extal_clk {
7263070d7cSYoshihiro Shimoda	clock-frequency = <16666666>;
7363070d7cSYoshihiro Shimoda};
7463070d7cSYoshihiro Shimoda
7563070d7cSYoshihiro Shimoda&extalr_clk {
7663070d7cSYoshihiro Shimoda	clock-frequency = <32768>;
7763070d7cSYoshihiro Shimoda};
7863070d7cSYoshihiro Shimoda
790e6fb83eSWolfram Sang&i2c0 {
800e6fb83eSWolfram Sang	pinctrl-0 = <&i2c0_pins>;
810e6fb83eSWolfram Sang	pinctrl-names = "default";
820e6fb83eSWolfram Sang
830e6fb83eSWolfram Sang	status = "okay";
840e6fb83eSWolfram Sang	clock-frequency = <400000>;
850e6fb83eSWolfram Sang};
860e6fb83eSWolfram Sang
870e6fb83eSWolfram Sang&i2c1 {
880e6fb83eSWolfram Sang	pinctrl-0 = <&i2c1_pins>;
890e6fb83eSWolfram Sang	pinctrl-names = "default";
900e6fb83eSWolfram Sang
910e6fb83eSWolfram Sang	status = "okay";
920e6fb83eSWolfram Sang	clock-frequency = <400000>;
930e6fb83eSWolfram Sang};
940e6fb83eSWolfram Sang
950e6fb83eSWolfram Sang&i2c6 {
960e6fb83eSWolfram Sang	pinctrl-0 = <&i2c6_pins>;
970e6fb83eSWolfram Sang	pinctrl-names = "default";
980e6fb83eSWolfram Sang
990e6fb83eSWolfram Sang	status = "okay";
1000e6fb83eSWolfram Sang	clock-frequency = <400000>;
1010e6fb83eSWolfram Sang};
1020e6fb83eSWolfram Sang
103*ee33cd69STakeshi Saito&mmc0 {
104*ee33cd69STakeshi Saito	pinctrl-0 = <&mmc_pins>;
105*ee33cd69STakeshi Saito	pinctrl-1 = <&mmc_pins>;
106*ee33cd69STakeshi Saito	pinctrl-names = "default", "state_uhs";
107*ee33cd69STakeshi Saito
108*ee33cd69STakeshi Saito	vmmc-supply = <&reg_3p3v>;
109*ee33cd69STakeshi Saito	vqmmc-supply = <&reg_1p8v>;
110*ee33cd69STakeshi Saito	mmc-hs200-1_8v;
111*ee33cd69STakeshi Saito	mmc-hs400-1_8v;
112*ee33cd69STakeshi Saito	bus-width = <8>;
113*ee33cd69STakeshi Saito	no-sd;
114*ee33cd69STakeshi Saito	no-sdio;
115*ee33cd69STakeshi Saito	non-removable;
116*ee33cd69STakeshi Saito	full-pwr-cycle-in-suspend;
117*ee33cd69STakeshi Saito	status = "okay";
118*ee33cd69STakeshi Saito};
119*ee33cd69STakeshi Saito
1200e6fb83eSWolfram Sang&pfc {
1219e921faaSWolfram Sang	pinctrl-0 = <&scif_clk_pins>;
1229e921faaSWolfram Sang	pinctrl-names = "default";
1239e921faaSWolfram Sang
124e8ac55a5SWolfram Sang	avb0_pins: avb0 {
125e8ac55a5SWolfram Sang		mux {
126e8ac55a5SWolfram Sang			groups = "avb0_link", "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
127e8ac55a5SWolfram Sang			function = "avb0";
128e8ac55a5SWolfram Sang		};
129e8ac55a5SWolfram Sang
130e8ac55a5SWolfram Sang		pins_mdio {
131e8ac55a5SWolfram Sang			groups = "avb0_mdio";
132e8ac55a5SWolfram Sang			drive-strength = <21>;
133e8ac55a5SWolfram Sang		};
134e8ac55a5SWolfram Sang
135e8ac55a5SWolfram Sang		pins_mii {
136e8ac55a5SWolfram Sang			groups = "avb0_rgmii";
137e8ac55a5SWolfram Sang			drive-strength = <21>;
138e8ac55a5SWolfram Sang		};
139e8ac55a5SWolfram Sang
140e8ac55a5SWolfram Sang	};
141e8ac55a5SWolfram Sang
1420e6fb83eSWolfram Sang	i2c0_pins: i2c0 {
1430e6fb83eSWolfram Sang		groups = "i2c0";
1440e6fb83eSWolfram Sang		function = "i2c0";
1450e6fb83eSWolfram Sang	};
1460e6fb83eSWolfram Sang
1470e6fb83eSWolfram Sang	i2c1_pins: i2c1 {
1480e6fb83eSWolfram Sang		groups = "i2c1";
1490e6fb83eSWolfram Sang		function = "i2c1";
1500e6fb83eSWolfram Sang	};
1510e6fb83eSWolfram Sang
1520e6fb83eSWolfram Sang	i2c6_pins: i2c6 {
1530e6fb83eSWolfram Sang		groups = "i2c6";
1540e6fb83eSWolfram Sang		function = "i2c6";
1550e6fb83eSWolfram Sang	};
1569e921faaSWolfram Sang
157*ee33cd69STakeshi Saito	mmc_pins: mmc {
158*ee33cd69STakeshi Saito		groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
159*ee33cd69STakeshi Saito		function = "mmc";
160*ee33cd69STakeshi Saito		power-source = <1800>;
161*ee33cd69STakeshi Saito	};
162*ee33cd69STakeshi Saito
1639e921faaSWolfram Sang	scif0_pins: scif0 {
1649e921faaSWolfram Sang		groups = "scif0_data", "scif0_ctrl";
1659e921faaSWolfram Sang		function = "scif0";
1669e921faaSWolfram Sang	};
1679e921faaSWolfram Sang
1689e921faaSWolfram Sang	scif_clk_pins: scif_clk {
1699e921faaSWolfram Sang		groups = "scif_clk";
1709e921faaSWolfram Sang		function = "scif_clk";
1719e921faaSWolfram Sang	};
1720e6fb83eSWolfram Sang};
1730e6fb83eSWolfram Sang
17463070d7cSYoshihiro Shimoda&scif0 {
1759e921faaSWolfram Sang	pinctrl-0 = <&scif0_pins>;
1769e921faaSWolfram Sang	pinctrl-names = "default";
1779e921faaSWolfram Sang
1789e921faaSWolfram Sang	uart-has-rtscts;
17963070d7cSYoshihiro Shimoda	status = "okay";
18063070d7cSYoshihiro Shimoda};
1819e921faaSWolfram Sang
1829e921faaSWolfram Sang&scif_clk {
1839e921faaSWolfram Sang	clock-frequency = <24000000>;
1849e921faaSWolfram Sang};
185