1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77990-sysc.h> 11 12/ { 13 compatible = "renesas,r8a77990"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 i2c6 = &i2c6; 25 i2c7 = &i2c7; 26 }; 27 28 /* 29 * The external audio clocks are configured as 0 Hz fixed frequency 30 * clocks by default. 31 * Boards that provide audio clocks should override them. 32 */ 33 audio_clk_a: audio_clk_a { 34 compatible = "fixed-clock"; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 37 }; 38 39 audio_clk_b: audio_clk_b { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <0>; 43 }; 44 45 audio_clk_c: audio_clk_c { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 51 /* External CAN clock - to be overridden by boards that provide it */ 52 can_clk: can { 53 compatible = "fixed-clock"; 54 #clock-cells = <0>; 55 clock-frequency = <0>; 56 }; 57 58 cpus { 59 #address-cells = <1>; 60 #size-cells = <0>; 61 62 a53_0: cpu@0 { 63 compatible = "arm,cortex-a53", "arm,armv8"; 64 reg = <0>; 65 device_type = "cpu"; 66 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 67 next-level-cache = <&L2_CA53>; 68 enable-method = "psci"; 69 }; 70 71 a53_1: cpu@1 { 72 compatible = "arm,cortex-a53", "arm,armv8"; 73 reg = <1>; 74 device_type = "cpu"; 75 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 76 next-level-cache = <&L2_CA53>; 77 enable-method = "psci"; 78 }; 79 80 L2_CA53: cache-controller-0 { 81 compatible = "cache"; 82 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 83 cache-unified; 84 cache-level = <2>; 85 }; 86 }; 87 88 extal_clk: extal { 89 compatible = "fixed-clock"; 90 #clock-cells = <0>; 91 /* This value must be overridden by the board */ 92 clock-frequency = <0>; 93 }; 94 95 /* External PCIe clock - can be overridden by the board */ 96 pcie_bus_clk: pcie_bus { 97 compatible = "fixed-clock"; 98 #clock-cells = <0>; 99 clock-frequency = <0>; 100 }; 101 102 pmu_a53 { 103 compatible = "arm,cortex-a53-pmu"; 104 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 105 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 106 interrupt-affinity = <&a53_0>, <&a53_1>; 107 }; 108 109 psci { 110 compatible = "arm,psci-1.0", "arm,psci-0.2"; 111 method = "smc"; 112 }; 113 114 /* External SCIF clock - to be overridden by boards that provide it */ 115 scif_clk: scif { 116 compatible = "fixed-clock"; 117 #clock-cells = <0>; 118 clock-frequency = <0>; 119 }; 120 121 soc: soc { 122 compatible = "simple-bus"; 123 interrupt-parent = <&gic>; 124 #address-cells = <2>; 125 #size-cells = <2>; 126 ranges; 127 128 rwdt: watchdog@e6020000 { 129 compatible = "renesas,r8a77990-wdt", 130 "renesas,rcar-gen3-wdt"; 131 reg = <0 0xe6020000 0 0x0c>; 132 clocks = <&cpg CPG_MOD 402>; 133 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 134 resets = <&cpg 402>; 135 status = "disabled"; 136 }; 137 138 gpio0: gpio@e6050000 { 139 compatible = "renesas,gpio-r8a77990", 140 "renesas,rcar-gen3-gpio"; 141 reg = <0 0xe6050000 0 0x50>; 142 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 143 #gpio-cells = <2>; 144 gpio-controller; 145 gpio-ranges = <&pfc 0 0 18>; 146 #interrupt-cells = <2>; 147 interrupt-controller; 148 clocks = <&cpg CPG_MOD 912>; 149 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 150 resets = <&cpg 912>; 151 }; 152 153 gpio1: gpio@e6051000 { 154 compatible = "renesas,gpio-r8a77990", 155 "renesas,rcar-gen3-gpio"; 156 reg = <0 0xe6051000 0 0x50>; 157 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 158 #gpio-cells = <2>; 159 gpio-controller; 160 gpio-ranges = <&pfc 0 32 23>; 161 #interrupt-cells = <2>; 162 interrupt-controller; 163 clocks = <&cpg CPG_MOD 911>; 164 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 165 resets = <&cpg 911>; 166 }; 167 168 gpio2: gpio@e6052000 { 169 compatible = "renesas,gpio-r8a77990", 170 "renesas,rcar-gen3-gpio"; 171 reg = <0 0xe6052000 0 0x50>; 172 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 173 #gpio-cells = <2>; 174 gpio-controller; 175 gpio-ranges = <&pfc 0 64 26>; 176 #interrupt-cells = <2>; 177 interrupt-controller; 178 clocks = <&cpg CPG_MOD 910>; 179 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 180 resets = <&cpg 910>; 181 }; 182 183 gpio3: gpio@e6053000 { 184 compatible = "renesas,gpio-r8a77990", 185 "renesas,rcar-gen3-gpio"; 186 reg = <0 0xe6053000 0 0x50>; 187 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 188 #gpio-cells = <2>; 189 gpio-controller; 190 gpio-ranges = <&pfc 0 96 16>; 191 #interrupt-cells = <2>; 192 interrupt-controller; 193 clocks = <&cpg CPG_MOD 909>; 194 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 195 resets = <&cpg 909>; 196 }; 197 198 gpio4: gpio@e6054000 { 199 compatible = "renesas,gpio-r8a77990", 200 "renesas,rcar-gen3-gpio"; 201 reg = <0 0xe6054000 0 0x50>; 202 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 203 #gpio-cells = <2>; 204 gpio-controller; 205 gpio-ranges = <&pfc 0 128 11>; 206 #interrupt-cells = <2>; 207 interrupt-controller; 208 clocks = <&cpg CPG_MOD 908>; 209 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 210 resets = <&cpg 908>; 211 }; 212 213 gpio5: gpio@e6055000 { 214 compatible = "renesas,gpio-r8a77990", 215 "renesas,rcar-gen3-gpio"; 216 reg = <0 0xe6055000 0 0x50>; 217 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 218 #gpio-cells = <2>; 219 gpio-controller; 220 gpio-ranges = <&pfc 0 160 20>; 221 #interrupt-cells = <2>; 222 interrupt-controller; 223 clocks = <&cpg CPG_MOD 907>; 224 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 225 resets = <&cpg 907>; 226 }; 227 228 gpio6: gpio@e6055400 { 229 compatible = "renesas,gpio-r8a77990", 230 "renesas,rcar-gen3-gpio"; 231 reg = <0 0xe6055400 0 0x50>; 232 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 233 #gpio-cells = <2>; 234 gpio-controller; 235 gpio-ranges = <&pfc 0 192 18>; 236 #interrupt-cells = <2>; 237 interrupt-controller; 238 clocks = <&cpg CPG_MOD 906>; 239 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 240 resets = <&cpg 906>; 241 }; 242 243 i2c0: i2c@e6500000 { 244 #address-cells = <1>; 245 #size-cells = <0>; 246 compatible = "renesas,i2c-r8a77990", 247 "renesas,rcar-gen3-i2c"; 248 reg = <0 0xe6500000 0 0x40>; 249 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 250 clocks = <&cpg CPG_MOD 931>; 251 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 252 resets = <&cpg 931>; 253 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 254 <&dmac2 0x91>, <&dmac2 0x90>; 255 dma-names = "tx", "rx", "tx", "rx"; 256 i2c-scl-internal-delay-ns = <110>; 257 status = "disabled"; 258 }; 259 260 i2c1: i2c@e6508000 { 261 #address-cells = <1>; 262 #size-cells = <0>; 263 compatible = "renesas,i2c-r8a77990", 264 "renesas,rcar-gen3-i2c"; 265 reg = <0 0xe6508000 0 0x40>; 266 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 267 clocks = <&cpg CPG_MOD 930>; 268 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 269 resets = <&cpg 930>; 270 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 271 <&dmac2 0x93>, <&dmac2 0x92>; 272 dma-names = "tx", "rx", "tx", "rx"; 273 i2c-scl-internal-delay-ns = <6>; 274 status = "disabled"; 275 }; 276 277 i2c2: i2c@e6510000 { 278 #address-cells = <1>; 279 #size-cells = <0>; 280 compatible = "renesas,i2c-r8a77990", 281 "renesas,rcar-gen3-i2c"; 282 reg = <0 0xe6510000 0 0x40>; 283 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 284 clocks = <&cpg CPG_MOD 929>; 285 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 286 resets = <&cpg 929>; 287 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 288 <&dmac2 0x95>, <&dmac2 0x94>; 289 dma-names = "tx", "rx", "tx", "rx"; 290 i2c-scl-internal-delay-ns = <6>; 291 status = "disabled"; 292 }; 293 294 i2c3: i2c@e66d0000 { 295 #address-cells = <1>; 296 #size-cells = <0>; 297 compatible = "renesas,i2c-r8a77990", 298 "renesas,rcar-gen3-i2c"; 299 reg = <0 0xe66d0000 0 0x40>; 300 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 301 clocks = <&cpg CPG_MOD 928>; 302 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 303 resets = <&cpg 928>; 304 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 305 dma-names = "tx", "rx"; 306 i2c-scl-internal-delay-ns = <110>; 307 status = "disabled"; 308 }; 309 310 i2c4: i2c@e66d8000 { 311 #address-cells = <1>; 312 #size-cells = <0>; 313 compatible = "renesas,i2c-r8a77990", 314 "renesas,rcar-gen3-i2c"; 315 reg = <0 0xe66d8000 0 0x40>; 316 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 317 clocks = <&cpg CPG_MOD 927>; 318 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 319 resets = <&cpg 927>; 320 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 321 dma-names = "tx", "rx"; 322 i2c-scl-internal-delay-ns = <6>; 323 status = "disabled"; 324 }; 325 326 i2c5: i2c@e66e0000 { 327 #address-cells = <1>; 328 #size-cells = <0>; 329 compatible = "renesas,i2c-r8a77990", 330 "renesas,rcar-gen3-i2c"; 331 reg = <0 0xe66e0000 0 0x40>; 332 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 333 clocks = <&cpg CPG_MOD 919>; 334 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 335 resets = <&cpg 919>; 336 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 337 dma-names = "tx", "rx"; 338 i2c-scl-internal-delay-ns = <6>; 339 status = "disabled"; 340 }; 341 342 i2c6: i2c@e66e8000 { 343 #address-cells = <1>; 344 #size-cells = <0>; 345 compatible = "renesas,i2c-r8a77990", 346 "renesas,rcar-gen3-i2c"; 347 reg = <0 0xe66e8000 0 0x40>; 348 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 349 clocks = <&cpg CPG_MOD 918>; 350 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 351 resets = <&cpg 918>; 352 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 353 dma-names = "tx", "rx"; 354 i2c-scl-internal-delay-ns = <6>; 355 status = "disabled"; 356 }; 357 358 i2c7: i2c@e6690000 { 359 #address-cells = <1>; 360 #size-cells = <0>; 361 compatible = "renesas,i2c-r8a77990", 362 "renesas,rcar-gen3-i2c"; 363 reg = <0 0xe6690000 0 0x40>; 364 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 365 clocks = <&cpg CPG_MOD 1003>; 366 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 367 resets = <&cpg 1003>; 368 i2c-scl-internal-delay-ns = <6>; 369 status = "disabled"; 370 }; 371 372 pfc: pin-controller@e6060000 { 373 compatible = "renesas,pfc-r8a77990"; 374 reg = <0 0xe6060000 0 0x508>; 375 }; 376 377 i2c_dvfs: i2c@e60b0000 { 378 #address-cells = <1>; 379 #size-cells = <0>; 380 compatible = "renesas,iic-r8a77990"; 381 reg = <0 0xe60b0000 0 0x15>; 382 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 383 clocks = <&cpg CPG_MOD 926>; 384 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 385 resets = <&cpg 926>; 386 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 387 dma-names = "tx", "rx"; 388 status = "disabled"; 389 }; 390 391 cpg: clock-controller@e6150000 { 392 compatible = "renesas,r8a77990-cpg-mssr"; 393 reg = <0 0xe6150000 0 0x1000>; 394 clocks = <&extal_clk>; 395 clock-names = "extal"; 396 #clock-cells = <2>; 397 #power-domain-cells = <0>; 398 #reset-cells = <1>; 399 }; 400 401 rst: reset-controller@e6160000 { 402 compatible = "renesas,r8a77990-rst"; 403 reg = <0 0xe6160000 0 0x0200>; 404 }; 405 406 sysc: system-controller@e6180000 { 407 compatible = "renesas,r8a77990-sysc"; 408 reg = <0 0xe6180000 0 0x0400>; 409 #power-domain-cells = <1>; 410 }; 411 412 intc_ex: interrupt-controller@e61c0000 { 413 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; 414 #interrupt-cells = <2>; 415 interrupt-controller; 416 reg = <0 0xe61c0000 0 0x200>; 417 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 418 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 419 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 420 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 421 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 422 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 423 clocks = <&cpg CPG_MOD 407>; 424 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 425 resets = <&cpg 407>; 426 }; 427 428 hscif0: serial@e6540000 { 429 compatible = "renesas,hscif-r8a77990", 430 "renesas,rcar-gen3-hscif", 431 "renesas,hscif"; 432 reg = <0 0xe6540000 0 0x60>; 433 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 434 clocks = <&cpg CPG_MOD 520>, 435 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 436 <&scif_clk>; 437 clock-names = "fck", "brg_int", "scif_clk"; 438 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 439 <&dmac2 0x31>, <&dmac2 0x30>; 440 dma-names = "tx", "rx", "tx", "rx"; 441 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 442 resets = <&cpg 520>; 443 status = "disabled"; 444 }; 445 446 hscif1: serial@e6550000 { 447 compatible = "renesas,hscif-r8a77990", 448 "renesas,rcar-gen3-hscif", 449 "renesas,hscif"; 450 reg = <0 0xe6550000 0 0x60>; 451 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 452 clocks = <&cpg CPG_MOD 519>, 453 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 454 <&scif_clk>; 455 clock-names = "fck", "brg_int", "scif_clk"; 456 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 457 <&dmac2 0x33>, <&dmac2 0x32>; 458 dma-names = "tx", "rx", "tx", "rx"; 459 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 460 resets = <&cpg 519>; 461 status = "disabled"; 462 }; 463 464 hscif2: serial@e6560000 { 465 compatible = "renesas,hscif-r8a77990", 466 "renesas,rcar-gen3-hscif", 467 "renesas,hscif"; 468 reg = <0 0xe6560000 0 0x60>; 469 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 470 clocks = <&cpg CPG_MOD 518>, 471 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 472 <&scif_clk>; 473 clock-names = "fck", "brg_int", "scif_clk"; 474 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 475 <&dmac2 0x35>, <&dmac2 0x34>; 476 dma-names = "tx", "rx", "tx", "rx"; 477 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 478 resets = <&cpg 518>; 479 status = "disabled"; 480 }; 481 482 hscif3: serial@e66a0000 { 483 compatible = "renesas,hscif-r8a77990", 484 "renesas,rcar-gen3-hscif", 485 "renesas,hscif"; 486 reg = <0 0xe66a0000 0 0x60>; 487 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 488 clocks = <&cpg CPG_MOD 517>, 489 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 490 <&scif_clk>; 491 clock-names = "fck", "brg_int", "scif_clk"; 492 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 493 dma-names = "tx", "rx"; 494 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 495 resets = <&cpg 517>; 496 status = "disabled"; 497 }; 498 499 hscif4: serial@e66b0000 { 500 compatible = "renesas,hscif-r8a77990", 501 "renesas,rcar-gen3-hscif", 502 "renesas,hscif"; 503 reg = <0 0xe66b0000 0 0x60>; 504 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 505 clocks = <&cpg CPG_MOD 516>, 506 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 507 <&scif_clk>; 508 clock-names = "fck", "brg_int", "scif_clk"; 509 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 510 dma-names = "tx", "rx"; 511 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 512 resets = <&cpg 516>; 513 status = "disabled"; 514 }; 515 516 hsusb: usb@e6590000 { 517 compatible = "renesas,usbhs-r8a77990", 518 "renesas,rcar-gen3-usbhs"; 519 reg = <0 0xe6590000 0 0x200>; 520 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 521 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 522 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 523 <&usb_dmac1 0>, <&usb_dmac1 1>; 524 dma-names = "ch0", "ch1", "ch2", "ch3"; 525 renesas,buswait = <11>; 526 phys = <&usb2_phy0>; 527 phy-names = "usb"; 528 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 529 resets = <&cpg 704>, <&cpg 703>; 530 status = "disabled"; 531 }; 532 533 usb_dmac0: dma-controller@e65a0000 { 534 compatible = "renesas,r8a77990-usb-dmac", 535 "renesas,usb-dmac"; 536 reg = <0 0xe65a0000 0 0x100>; 537 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 538 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 539 interrupt-names = "ch0", "ch1"; 540 clocks = <&cpg CPG_MOD 330>; 541 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 542 resets = <&cpg 330>; 543 #dma-cells = <1>; 544 dma-channels = <2>; 545 }; 546 547 usb_dmac1: dma-controller@e65b0000 { 548 compatible = "renesas,r8a77990-usb-dmac", 549 "renesas,usb-dmac"; 550 reg = <0 0xe65b0000 0 0x100>; 551 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 552 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 553 interrupt-names = "ch0", "ch1"; 554 clocks = <&cpg CPG_MOD 331>; 555 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 556 resets = <&cpg 331>; 557 #dma-cells = <1>; 558 dma-channels = <2>; 559 }; 560 561 dmac0: dma-controller@e6700000 { 562 compatible = "renesas,dmac-r8a77990", 563 "renesas,rcar-dmac"; 564 reg = <0 0xe6700000 0 0x10000>; 565 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 566 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 567 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 568 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 569 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 570 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 571 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 572 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 573 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 574 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 575 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 576 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 577 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 578 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 579 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 580 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 581 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 582 interrupt-names = "error", 583 "ch0", "ch1", "ch2", "ch3", 584 "ch4", "ch5", "ch6", "ch7", 585 "ch8", "ch9", "ch10", "ch11", 586 "ch12", "ch13", "ch14", "ch15"; 587 clocks = <&cpg CPG_MOD 219>; 588 clock-names = "fck"; 589 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 590 resets = <&cpg 219>; 591 #dma-cells = <1>; 592 dma-channels = <16>; 593 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 594 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 595 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 596 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 597 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 598 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 599 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 600 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 601 }; 602 603 dmac1: dma-controller@e7300000 { 604 compatible = "renesas,dmac-r8a77990", 605 "renesas,rcar-dmac"; 606 reg = <0 0xe7300000 0 0x10000>; 607 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 608 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 609 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 610 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 611 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 612 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 613 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 614 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 615 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 616 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 617 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 618 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 619 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 620 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 621 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 622 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 623 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 624 interrupt-names = "error", 625 "ch0", "ch1", "ch2", "ch3", 626 "ch4", "ch5", "ch6", "ch7", 627 "ch8", "ch9", "ch10", "ch11", 628 "ch12", "ch13", "ch14", "ch15"; 629 clocks = <&cpg CPG_MOD 218>; 630 clock-names = "fck"; 631 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 632 resets = <&cpg 218>; 633 #dma-cells = <1>; 634 dma-channels = <16>; 635 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 636 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 637 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 638 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 639 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 640 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 641 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 642 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 643 }; 644 645 dmac2: dma-controller@e7310000 { 646 compatible = "renesas,dmac-r8a77990", 647 "renesas,rcar-dmac"; 648 reg = <0 0xe7310000 0 0x10000>; 649 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 650 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 651 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 652 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 653 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 654 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 655 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 656 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 657 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 658 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 659 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 660 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 661 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 662 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 663 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 664 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 665 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 666 interrupt-names = "error", 667 "ch0", "ch1", "ch2", "ch3", 668 "ch4", "ch5", "ch6", "ch7", 669 "ch8", "ch9", "ch10", "ch11", 670 "ch12", "ch13", "ch14", "ch15"; 671 clocks = <&cpg CPG_MOD 217>; 672 clock-names = "fck"; 673 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 674 resets = <&cpg 217>; 675 #dma-cells = <1>; 676 dma-channels = <16>; 677 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 678 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 679 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 680 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 681 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 682 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 683 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 684 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 685 }; 686 687 ipmmu_ds0: mmu@e6740000 { 688 compatible = "renesas,ipmmu-r8a77990"; 689 reg = <0 0xe6740000 0 0x1000>; 690 renesas,ipmmu-main = <&ipmmu_mm 0>; 691 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 692 #iommu-cells = <1>; 693 }; 694 695 ipmmu_ds1: mmu@e7740000 { 696 compatible = "renesas,ipmmu-r8a77990"; 697 reg = <0 0xe7740000 0 0x1000>; 698 renesas,ipmmu-main = <&ipmmu_mm 1>; 699 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 700 #iommu-cells = <1>; 701 }; 702 703 ipmmu_hc: mmu@e6570000 { 704 compatible = "renesas,ipmmu-r8a77990"; 705 reg = <0 0xe6570000 0 0x1000>; 706 renesas,ipmmu-main = <&ipmmu_mm 2>; 707 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 708 #iommu-cells = <1>; 709 }; 710 711 ipmmu_mm: mmu@e67b0000 { 712 compatible = "renesas,ipmmu-r8a77990"; 713 reg = <0 0xe67b0000 0 0x1000>; 714 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 715 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 716 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 717 #iommu-cells = <1>; 718 }; 719 720 ipmmu_mp: mmu@ec670000 { 721 compatible = "renesas,ipmmu-r8a77990"; 722 reg = <0 0xec670000 0 0x1000>; 723 renesas,ipmmu-main = <&ipmmu_mm 4>; 724 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 725 #iommu-cells = <1>; 726 }; 727 728 ipmmu_pv0: mmu@fd800000 { 729 compatible = "renesas,ipmmu-r8a77990"; 730 reg = <0 0xfd800000 0 0x1000>; 731 renesas,ipmmu-main = <&ipmmu_mm 6>; 732 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 733 #iommu-cells = <1>; 734 }; 735 736 ipmmu_rt: mmu@ffc80000 { 737 compatible = "renesas,ipmmu-r8a77990"; 738 reg = <0 0xffc80000 0 0x1000>; 739 renesas,ipmmu-main = <&ipmmu_mm 10>; 740 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 741 #iommu-cells = <1>; 742 }; 743 744 ipmmu_vc0: mmu@fe6b0000 { 745 compatible = "renesas,ipmmu-r8a77990"; 746 reg = <0 0xfe6b0000 0 0x1000>; 747 renesas,ipmmu-main = <&ipmmu_mm 12>; 748 power-domains = <&sysc R8A77990_PD_A3VC>; 749 #iommu-cells = <1>; 750 }; 751 752 ipmmu_vi0: mmu@febd0000 { 753 compatible = "renesas,ipmmu-r8a77990"; 754 reg = <0 0xfebd0000 0 0x1000>; 755 renesas,ipmmu-main = <&ipmmu_mm 14>; 756 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 757 #iommu-cells = <1>; 758 }; 759 760 ipmmu_vp0: mmu@fe990000 { 761 compatible = "renesas,ipmmu-r8a77990"; 762 reg = <0 0xfe990000 0 0x1000>; 763 renesas,ipmmu-main = <&ipmmu_mm 16>; 764 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 765 #iommu-cells = <1>; 766 }; 767 768 avb: ethernet@e6800000 { 769 compatible = "renesas,etheravb-r8a77990", 770 "renesas,etheravb-rcar-gen3"; 771 reg = <0 0xe6800000 0 0x800>; 772 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 773 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 779 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 782 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 783 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 784 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 785 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 788 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 789 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 790 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 791 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 792 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 793 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 794 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 795 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 796 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 797 interrupt-names = "ch0", "ch1", "ch2", "ch3", 798 "ch4", "ch5", "ch6", "ch7", 799 "ch8", "ch9", "ch10", "ch11", 800 "ch12", "ch13", "ch14", "ch15", 801 "ch16", "ch17", "ch18", "ch19", 802 "ch20", "ch21", "ch22", "ch23", 803 "ch24"; 804 clocks = <&cpg CPG_MOD 812>; 805 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 806 resets = <&cpg 812>; 807 phy-mode = "rgmii"; 808 iommus = <&ipmmu_ds0 16>; 809 #address-cells = <1>; 810 #size-cells = <0>; 811 status = "disabled"; 812 }; 813 814 can0: can@e6c30000 { 815 compatible = "renesas,can-r8a77990", 816 "renesas,rcar-gen3-can"; 817 reg = <0 0xe6c30000 0 0x1000>; 818 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 819 clocks = <&cpg CPG_MOD 916>, 820 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 821 <&can_clk>; 822 clock-names = "clkp1", "clkp2", "can_clk"; 823 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 824 assigned-clock-rates = <40000000>; 825 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 826 resets = <&cpg 916>; 827 status = "disabled"; 828 }; 829 830 can1: can@e6c38000 { 831 compatible = "renesas,can-r8a77990", 832 "renesas,rcar-gen3-can"; 833 reg = <0 0xe6c38000 0 0x1000>; 834 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 835 clocks = <&cpg CPG_MOD 915>, 836 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 837 <&can_clk>; 838 clock-names = "clkp1", "clkp2", "can_clk"; 839 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 840 assigned-clock-rates = <40000000>; 841 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 842 resets = <&cpg 915>; 843 status = "disabled"; 844 }; 845 846 canfd: can@e66c0000 { 847 compatible = "renesas,r8a77990-canfd", 848 "renesas,rcar-gen3-canfd"; 849 reg = <0 0xe66c0000 0 0x8000>; 850 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 851 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 852 clocks = <&cpg CPG_MOD 914>, 853 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 854 <&can_clk>; 855 clock-names = "fck", "canfd", "can_clk"; 856 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 857 assigned-clock-rates = <40000000>; 858 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 859 resets = <&cpg 914>; 860 status = "disabled"; 861 862 channel0 { 863 status = "disabled"; 864 }; 865 866 channel1 { 867 status = "disabled"; 868 }; 869 }; 870 871 pwm0: pwm@e6e30000 { 872 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 873 reg = <0 0xe6e30000 0 0x8>; 874 clocks = <&cpg CPG_MOD 523>; 875 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 876 resets = <&cpg 523>; 877 #pwm-cells = <2>; 878 status = "disabled"; 879 }; 880 881 pwm1: pwm@e6e31000 { 882 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 883 reg = <0 0xe6e31000 0 0x8>; 884 clocks = <&cpg CPG_MOD 523>; 885 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 886 resets = <&cpg 523>; 887 #pwm-cells = <2>; 888 status = "disabled"; 889 }; 890 891 pwm2: pwm@e6e32000 { 892 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 893 reg = <0 0xe6e32000 0 0x8>; 894 clocks = <&cpg CPG_MOD 523>; 895 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 896 resets = <&cpg 523>; 897 #pwm-cells = <2>; 898 status = "disabled"; 899 }; 900 901 pwm3: pwm@e6e33000 { 902 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 903 reg = <0 0xe6e33000 0 0x8>; 904 clocks = <&cpg CPG_MOD 523>; 905 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 906 resets = <&cpg 523>; 907 #pwm-cells = <2>; 908 status = "disabled"; 909 }; 910 911 pwm4: pwm@e6e34000 { 912 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 913 reg = <0 0xe6e34000 0 0x8>; 914 clocks = <&cpg CPG_MOD 523>; 915 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 916 resets = <&cpg 523>; 917 #pwm-cells = <2>; 918 status = "disabled"; 919 }; 920 921 pwm5: pwm@e6e35000 { 922 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 923 reg = <0 0xe6e35000 0 0x8>; 924 clocks = <&cpg CPG_MOD 523>; 925 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 926 resets = <&cpg 523>; 927 #pwm-cells = <2>; 928 status = "disabled"; 929 }; 930 931 pwm6: pwm@e6e36000 { 932 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 933 reg = <0 0xe6e36000 0 0x8>; 934 clocks = <&cpg CPG_MOD 523>; 935 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 936 resets = <&cpg 523>; 937 #pwm-cells = <2>; 938 status = "disabled"; 939 }; 940 941 scif0: serial@e6e60000 { 942 compatible = "renesas,scif-r8a77990", 943 "renesas,rcar-gen3-scif", "renesas,scif"; 944 reg = <0 0xe6e60000 0 64>; 945 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 946 clocks = <&cpg CPG_MOD 207>, 947 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 948 <&scif_clk>; 949 clock-names = "fck", "brg_int", "scif_clk"; 950 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 951 <&dmac2 0x51>, <&dmac2 0x50>; 952 dma-names = "tx", "rx", "tx", "rx"; 953 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 954 resets = <&cpg 207>; 955 status = "disabled"; 956 }; 957 958 scif1: serial@e6e68000 { 959 compatible = "renesas,scif-r8a77990", 960 "renesas,rcar-gen3-scif", "renesas,scif"; 961 reg = <0 0xe6e68000 0 64>; 962 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 963 clocks = <&cpg CPG_MOD 206>, 964 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 965 <&scif_clk>; 966 clock-names = "fck", "brg_int", "scif_clk"; 967 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 968 <&dmac2 0x53>, <&dmac2 0x52>; 969 dma-names = "tx", "rx", "tx", "rx"; 970 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 971 resets = <&cpg 206>; 972 status = "disabled"; 973 }; 974 975 scif2: serial@e6e88000 { 976 compatible = "renesas,scif-r8a77990", 977 "renesas,rcar-gen3-scif", "renesas,scif"; 978 reg = <0 0xe6e88000 0 64>; 979 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 980 clocks = <&cpg CPG_MOD 310>, 981 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 982 <&scif_clk>; 983 clock-names = "fck", "brg_int", "scif_clk"; 984 985 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 986 resets = <&cpg 310>; 987 status = "disabled"; 988 }; 989 990 scif3: serial@e6c50000 { 991 compatible = "renesas,scif-r8a77990", 992 "renesas,rcar-gen3-scif", "renesas,scif"; 993 reg = <0 0xe6c50000 0 64>; 994 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 995 clocks = <&cpg CPG_MOD 204>, 996 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 997 <&scif_clk>; 998 clock-names = "fck", "brg_int", "scif_clk"; 999 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1000 dma-names = "tx", "rx"; 1001 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1002 resets = <&cpg 204>; 1003 status = "disabled"; 1004 }; 1005 1006 scif4: serial@e6c40000 { 1007 compatible = "renesas,scif-r8a77990", 1008 "renesas,rcar-gen3-scif", "renesas,scif"; 1009 reg = <0 0xe6c40000 0 64>; 1010 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1011 clocks = <&cpg CPG_MOD 203>, 1012 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1013 <&scif_clk>; 1014 clock-names = "fck", "brg_int", "scif_clk"; 1015 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1016 dma-names = "tx", "rx"; 1017 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1018 resets = <&cpg 203>; 1019 status = "disabled"; 1020 }; 1021 1022 scif5: serial@e6f30000 { 1023 compatible = "renesas,scif-r8a77990", 1024 "renesas,rcar-gen3-scif", "renesas,scif"; 1025 reg = <0 0xe6f30000 0 64>; 1026 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1027 clocks = <&cpg CPG_MOD 202>, 1028 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1029 <&scif_clk>; 1030 clock-names = "fck", "brg_int", "scif_clk"; 1031 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1032 <&dmac2 0x5b>, <&dmac2 0x5a>; 1033 dma-names = "tx", "rx", "tx", "rx"; 1034 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1035 resets = <&cpg 202>; 1036 status = "disabled"; 1037 }; 1038 1039 msiof0: spi@e6e90000 { 1040 compatible = "renesas,msiof-r8a77990", 1041 "renesas,rcar-gen3-msiof"; 1042 reg = <0 0xe6e90000 0 0x0064>; 1043 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1044 clocks = <&cpg CPG_MOD 211>; 1045 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1046 <&dmac2 0x41>, <&dmac2 0x40>; 1047 dma-names = "tx", "rx", "tx", "rx"; 1048 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1049 resets = <&cpg 211>; 1050 #address-cells = <1>; 1051 #size-cells = <0>; 1052 status = "disabled"; 1053 }; 1054 1055 msiof1: spi@e6ea0000 { 1056 compatible = "renesas,msiof-r8a77990", 1057 "renesas,rcar-gen3-msiof"; 1058 reg = <0 0xe6ea0000 0 0x0064>; 1059 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1060 clocks = <&cpg CPG_MOD 210>; 1061 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1062 <&dmac2 0x43>, <&dmac2 0x42>; 1063 dma-names = "tx", "rx", "tx", "rx"; 1064 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1065 resets = <&cpg 210>; 1066 #address-cells = <1>; 1067 #size-cells = <0>; 1068 status = "disabled"; 1069 }; 1070 1071 msiof2: spi@e6c00000 { 1072 compatible = "renesas,msiof-r8a77990", 1073 "renesas,rcar-gen3-msiof"; 1074 reg = <0 0xe6c00000 0 0x0064>; 1075 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1076 clocks = <&cpg CPG_MOD 209>; 1077 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1078 dma-names = "tx", "rx"; 1079 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1080 resets = <&cpg 209>; 1081 #address-cells = <1>; 1082 #size-cells = <0>; 1083 status = "disabled"; 1084 }; 1085 1086 msiof3: spi@e6c10000 { 1087 compatible = "renesas,msiof-r8a77990", 1088 "renesas,rcar-gen3-msiof"; 1089 reg = <0 0xe6c10000 0 0x0064>; 1090 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1091 clocks = <&cpg CPG_MOD 208>; 1092 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1093 dma-names = "tx", "rx"; 1094 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1095 resets = <&cpg 208>; 1096 #address-cells = <1>; 1097 #size-cells = <0>; 1098 status = "disabled"; 1099 }; 1100 1101 vin4: video@e6ef4000 { 1102 compatible = "renesas,vin-r8a77990"; 1103 reg = <0 0xe6ef4000 0 0x1000>; 1104 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1105 clocks = <&cpg CPG_MOD 807>; 1106 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1107 resets = <&cpg 807>; 1108 renesas,id = <4>; 1109 status = "disabled"; 1110 1111 ports { 1112 #address-cells = <1>; 1113 #size-cells = <0>; 1114 1115 port@1 { 1116 #address-cells = <1>; 1117 #size-cells = <0>; 1118 1119 reg = <1>; 1120 1121 vin4csi40: endpoint@2 { 1122 reg = <2>; 1123 remote-endpoint= <&csi40vin4>; 1124 }; 1125 }; 1126 }; 1127 }; 1128 1129 vin5: video@e6ef5000 { 1130 compatible = "renesas,vin-r8a77990"; 1131 reg = <0 0xe6ef5000 0 0x1000>; 1132 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1133 clocks = <&cpg CPG_MOD 806>; 1134 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1135 resets = <&cpg 806>; 1136 renesas,id = <5>; 1137 status = "disabled"; 1138 1139 ports { 1140 #address-cells = <1>; 1141 #size-cells = <0>; 1142 1143 port@1 { 1144 #address-cells = <1>; 1145 #size-cells = <0>; 1146 1147 reg = <1>; 1148 1149 vin5csi40: endpoint@2 { 1150 reg = <2>; 1151 remote-endpoint= <&csi40vin5>; 1152 }; 1153 }; 1154 }; 1155 }; 1156 1157 rcar_sound: sound@ec500000 { 1158 /* 1159 * #sound-dai-cells is required 1160 * 1161 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1162 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1163 */ 1164 /* 1165 * #clock-cells is required for audio_clkout0/1/2/3 1166 * 1167 * clkout : #clock-cells = <0>; <&rcar_sound>; 1168 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1169 */ 1170 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; 1171 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1172 <0 0xec5a0000 0 0x100>, /* ADG */ 1173 <0 0xec540000 0 0x1000>, /* SSIU */ 1174 <0 0xec541000 0 0x280>, /* SSI */ 1175 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1176 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1177 1178 clocks = <&cpg CPG_MOD 1005>, 1179 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1180 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1181 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1182 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1183 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1184 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1185 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1186 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1187 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1188 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1189 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1190 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1191 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1192 <&audio_clk_a>, <&audio_clk_b>, 1193 <&audio_clk_c>, 1194 <&cpg CPG_CORE R8A77990_CLK_ZA2>; 1195 clock-names = "ssi-all", 1196 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1197 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1198 "ssi.1", "ssi.0", 1199 "src.9", "src.8", "src.7", "src.6", 1200 "src.5", "src.4", "src.3", "src.2", 1201 "src.1", "src.0", 1202 "mix.1", "mix.0", 1203 "ctu.1", "ctu.0", 1204 "dvc.0", "dvc.1", 1205 "clk_a", "clk_b", "clk_c", "clk_i"; 1206 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1207 resets = <&cpg 1005>, 1208 <&cpg 1006>, <&cpg 1007>, 1209 <&cpg 1008>, <&cpg 1009>, 1210 <&cpg 1010>, <&cpg 1011>, 1211 <&cpg 1012>, <&cpg 1013>, 1212 <&cpg 1014>, <&cpg 1015>; 1213 reset-names = "ssi-all", 1214 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1215 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1216 "ssi.1", "ssi.0"; 1217 status = "disabled"; 1218 1219 rcar_sound,dvc { 1220 dvc0: dvc-0 { 1221 dmas = <&audma0 0xbc>; 1222 dma-names = "tx"; 1223 }; 1224 dvc1: dvc-1 { 1225 dmas = <&audma0 0xbe>; 1226 dma-names = "tx"; 1227 }; 1228 }; 1229 1230 rcar_sound,mix { 1231 mix0: mix-0 { }; 1232 mix1: mix-1 { }; 1233 }; 1234 1235 rcar_sound,ctu { 1236 ctu00: ctu-0 { }; 1237 ctu01: ctu-1 { }; 1238 ctu02: ctu-2 { }; 1239 ctu03: ctu-3 { }; 1240 ctu10: ctu-4 { }; 1241 ctu11: ctu-5 { }; 1242 ctu12: ctu-6 { }; 1243 ctu13: ctu-7 { }; 1244 }; 1245 1246 rcar_sound,src { 1247 src0: src-0 { 1248 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1249 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1250 dma-names = "rx", "tx"; 1251 }; 1252 src1: src-1 { 1253 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1254 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1255 dma-names = "rx", "tx"; 1256 }; 1257 src2: src-2 { 1258 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1259 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1260 dma-names = "rx", "tx"; 1261 }; 1262 src3: src-3 { 1263 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1264 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1265 dma-names = "rx", "tx"; 1266 }; 1267 src4: src-4 { 1268 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1269 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1270 dma-names = "rx", "tx"; 1271 }; 1272 src5: src-5 { 1273 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1274 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1275 dma-names = "rx", "tx"; 1276 }; 1277 src6: src-6 { 1278 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1279 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1280 dma-names = "rx", "tx"; 1281 }; 1282 src7: src-7 { 1283 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1284 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1285 dma-names = "rx", "tx"; 1286 }; 1287 src8: src-8 { 1288 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1289 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1290 dma-names = "rx", "tx"; 1291 }; 1292 src9: src-9 { 1293 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1294 dmas = <&audma0 0x97>, <&audma0 0xba>; 1295 dma-names = "rx", "tx"; 1296 }; 1297 }; 1298 1299 rcar_sound,ssi { 1300 ssi0: ssi-0 { 1301 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1302 dmas = <&audma0 0x01>, <&audma0 0x02>, 1303 <&audma0 0x15>, <&audma0 0x16>; 1304 dma-names = "rx", "tx", "rxu", "txu"; 1305 }; 1306 ssi1: ssi-1 { 1307 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1308 dmas = <&audma0 0x03>, <&audma0 0x04>, 1309 <&audma0 0x49>, <&audma0 0x4a>; 1310 dma-names = "rx", "tx", "rxu", "txu"; 1311 }; 1312 ssi2: ssi-2 { 1313 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1314 dmas = <&audma0 0x05>, <&audma0 0x06>, 1315 <&audma0 0x63>, <&audma0 0x64>; 1316 dma-names = "rx", "tx", "rxu", "txu"; 1317 }; 1318 ssi3: ssi-3 { 1319 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1320 dmas = <&audma0 0x07>, <&audma0 0x08>, 1321 <&audma0 0x6f>, <&audma0 0x70>; 1322 dma-names = "rx", "tx", "rxu", "txu"; 1323 }; 1324 ssi4: ssi-4 { 1325 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1326 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1327 <&audma0 0x71>, <&audma0 0x72>; 1328 dma-names = "rx", "tx", "rxu", "txu"; 1329 }; 1330 ssi5: ssi-5 { 1331 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1332 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1333 <&audma0 0x73>, <&audma0 0x74>; 1334 dma-names = "rx", "tx", "rxu", "txu"; 1335 }; 1336 ssi6: ssi-6 { 1337 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1338 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1339 <&audma0 0x75>, <&audma0 0x76>; 1340 dma-names = "rx", "tx", "rxu", "txu"; 1341 }; 1342 ssi7: ssi-7 { 1343 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1344 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1345 <&audma0 0x79>, <&audma0 0x7a>; 1346 dma-names = "rx", "tx", "rxu", "txu"; 1347 }; 1348 ssi8: ssi-8 { 1349 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1350 dmas = <&audma0 0x11>, <&audma0 0x12>, 1351 <&audma0 0x7b>, <&audma0 0x7c>; 1352 dma-names = "rx", "tx", "rxu", "txu"; 1353 }; 1354 ssi9: ssi-9 { 1355 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1356 dmas = <&audma0 0x13>, <&audma0 0x14>, 1357 <&audma0 0x7d>, <&audma0 0x7e>; 1358 dma-names = "rx", "tx", "rxu", "txu"; 1359 }; 1360 }; 1361 }; 1362 1363 audma0: dma-controller@ec700000 { 1364 compatible = "renesas,dmac-r8a77990", 1365 "renesas,rcar-dmac"; 1366 reg = <0 0xec700000 0 0x10000>; 1367 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1368 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1369 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1370 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1371 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1372 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1373 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1374 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1375 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1376 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1377 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1378 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1379 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1380 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 1381 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1382 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1383 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1384 interrupt-names = "error", 1385 "ch0", "ch1", "ch2", "ch3", 1386 "ch4", "ch5", "ch6", "ch7", 1387 "ch8", "ch9", "ch10", "ch11", 1388 "ch12", "ch13", "ch14", "ch15"; 1389 clocks = <&cpg CPG_MOD 502>; 1390 clock-names = "fck"; 1391 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1392 resets = <&cpg 502>; 1393 #dma-cells = <1>; 1394 dma-channels = <16>; 1395 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1396 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1397 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1398 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1399 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1400 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1401 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1402 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1403 }; 1404 1405 xhci0: usb@ee000000 { 1406 compatible = "renesas,xhci-r8a77990", 1407 "renesas,rcar-gen3-xhci"; 1408 reg = <0 0xee000000 0 0xc00>; 1409 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1410 clocks = <&cpg CPG_MOD 328>; 1411 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1412 resets = <&cpg 328>; 1413 status = "disabled"; 1414 }; 1415 1416 usb3_peri0: usb@ee020000 { 1417 compatible = "renesas,r8a77990-usb3-peri", 1418 "renesas,rcar-gen3-usb3-peri"; 1419 reg = <0 0xee020000 0 0x400>; 1420 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1421 clocks = <&cpg CPG_MOD 328>; 1422 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1423 resets = <&cpg 328>; 1424 status = "disabled"; 1425 }; 1426 1427 ohci0: usb@ee080000 { 1428 compatible = "generic-ohci"; 1429 reg = <0 0xee080000 0 0x100>; 1430 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1431 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1432 phys = <&usb2_phy0>; 1433 phy-names = "usb"; 1434 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1435 resets = <&cpg 703>, <&cpg 704>; 1436 status = "disabled"; 1437 }; 1438 1439 ehci0: usb@ee080100 { 1440 compatible = "generic-ehci"; 1441 reg = <0 0xee080100 0 0x100>; 1442 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1443 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1444 phys = <&usb2_phy0>; 1445 phy-names = "usb"; 1446 companion = <&ohci0>; 1447 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1448 resets = <&cpg 703>, <&cpg 704>; 1449 status = "disabled"; 1450 }; 1451 1452 usb2_phy0: usb-phy@ee080200 { 1453 compatible = "renesas,usb2-phy-r8a77990", 1454 "renesas,rcar-gen3-usb2-phy"; 1455 reg = <0 0xee080200 0 0x700>; 1456 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1457 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1458 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1459 resets = <&cpg 703>, <&cpg 704>; 1460 #phy-cells = <0>; 1461 status = "disabled"; 1462 }; 1463 1464 sdhi0: sd@ee100000 { 1465 compatible = "renesas,sdhi-r8a77990", 1466 "renesas,rcar-gen3-sdhi"; 1467 reg = <0 0xee100000 0 0x2000>; 1468 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1469 clocks = <&cpg CPG_MOD 314>; 1470 max-frequency = <200000000>; 1471 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1472 resets = <&cpg 314>; 1473 status = "disabled"; 1474 }; 1475 1476 sdhi1: sd@ee120000 { 1477 compatible = "renesas,sdhi-r8a77990", 1478 "renesas,rcar-gen3-sdhi"; 1479 reg = <0 0xee120000 0 0x2000>; 1480 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1481 clocks = <&cpg CPG_MOD 313>; 1482 max-frequency = <200000000>; 1483 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1484 resets = <&cpg 313>; 1485 status = "disabled"; 1486 }; 1487 1488 sdhi3: sd@ee160000 { 1489 compatible = "renesas,sdhi-r8a77990", 1490 "renesas,rcar-gen3-sdhi"; 1491 reg = <0 0xee160000 0 0x2000>; 1492 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1493 clocks = <&cpg CPG_MOD 311>; 1494 max-frequency = <200000000>; 1495 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1496 resets = <&cpg 311>; 1497 status = "disabled"; 1498 }; 1499 1500 gic: interrupt-controller@f1010000 { 1501 compatible = "arm,gic-400"; 1502 #interrupt-cells = <3>; 1503 #address-cells = <0>; 1504 interrupt-controller; 1505 reg = <0x0 0xf1010000 0 0x1000>, 1506 <0x0 0xf1020000 0 0x20000>, 1507 <0x0 0xf1040000 0 0x20000>, 1508 <0x0 0xf1060000 0 0x20000>; 1509 interrupts = <GIC_PPI 9 1510 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1511 clocks = <&cpg CPG_MOD 408>; 1512 clock-names = "clk"; 1513 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1514 resets = <&cpg 408>; 1515 }; 1516 1517 vspb0: vsp@fe960000 { 1518 compatible = "renesas,vsp2"; 1519 reg = <0 0xfe960000 0 0x8000>; 1520 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1521 clocks = <&cpg CPG_MOD 626>; 1522 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1523 resets = <&cpg 626>; 1524 renesas,fcp = <&fcpvb0>; 1525 }; 1526 1527 fcpvb0: fcp@fe96f000 { 1528 compatible = "renesas,fcpv"; 1529 reg = <0 0xfe96f000 0 0x200>; 1530 clocks = <&cpg CPG_MOD 607>; 1531 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1532 resets = <&cpg 607>; 1533 iommus = <&ipmmu_vp0 5>; 1534 }; 1535 1536 vspi0: vsp@fe9a0000 { 1537 compatible = "renesas,vsp2"; 1538 reg = <0 0xfe9a0000 0 0x8000>; 1539 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1540 clocks = <&cpg CPG_MOD 631>; 1541 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1542 resets = <&cpg 631>; 1543 renesas,fcp = <&fcpvi0>; 1544 }; 1545 1546 fcpvi0: fcp@fe9af000 { 1547 compatible = "renesas,fcpv"; 1548 reg = <0 0xfe9af000 0 0x200>; 1549 clocks = <&cpg CPG_MOD 611>; 1550 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1551 resets = <&cpg 611>; 1552 iommus = <&ipmmu_vp0 8>; 1553 }; 1554 1555 vspd0: vsp@fea20000 { 1556 compatible = "renesas,vsp2"; 1557 reg = <0 0xfea20000 0 0x7000>; 1558 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1559 clocks = <&cpg CPG_MOD 623>; 1560 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1561 resets = <&cpg 623>; 1562 renesas,fcp = <&fcpvd0>; 1563 }; 1564 1565 fcpvd0: fcp@fea27000 { 1566 compatible = "renesas,fcpv"; 1567 reg = <0 0xfea27000 0 0x200>; 1568 clocks = <&cpg CPG_MOD 603>; 1569 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1570 resets = <&cpg 603>; 1571 iommus = <&ipmmu_vi0 8>; 1572 }; 1573 1574 vspd1: vsp@fea28000 { 1575 compatible = "renesas,vsp2"; 1576 reg = <0 0xfea28000 0 0x7000>; 1577 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1578 clocks = <&cpg CPG_MOD 622>; 1579 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1580 resets = <&cpg 622>; 1581 renesas,fcp = <&fcpvd1>; 1582 }; 1583 1584 fcpvd1: fcp@fea2f000 { 1585 compatible = "renesas,fcpv"; 1586 reg = <0 0xfea2f000 0 0x200>; 1587 clocks = <&cpg CPG_MOD 602>; 1588 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1589 resets = <&cpg 602>; 1590 iommus = <&ipmmu_vi0 9>; 1591 }; 1592 1593 csi40: csi2@feaa0000 { 1594 compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; 1595 reg = <0 0xfeaa0000 0 0x10000>; 1596 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1597 clocks = <&cpg CPG_MOD 716>; 1598 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1599 resets = <&cpg 716>; 1600 status = "disabled"; 1601 1602 ports { 1603 #address-cells = <1>; 1604 #size-cells = <0>; 1605 1606 port@1 { 1607 #address-cells = <1>; 1608 #size-cells = <0>; 1609 1610 reg = <1>; 1611 1612 csi40vin4: endpoint@0 { 1613 reg = <0>; 1614 remote-endpoint = <&vin4csi40>; 1615 }; 1616 csi40vin5: endpoint@1 { 1617 reg = <1>; 1618 remote-endpoint = <&vin5csi40>; 1619 }; 1620 }; 1621 }; 1622 }; 1623 1624 du: display@feb00000 { 1625 compatible = "renesas,du-r8a77990"; 1626 reg = <0 0xfeb00000 0 0x80000>; 1627 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1628 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1629 clocks = <&cpg CPG_MOD 724>, 1630 <&cpg CPG_MOD 723>; 1631 clock-names = "du.0", "du.1"; 1632 vsps = <&vspd0 0 &vspd1 0>; 1633 status = "disabled"; 1634 1635 ports { 1636 #address-cells = <1>; 1637 #size-cells = <0>; 1638 1639 port@0 { 1640 reg = <0>; 1641 du_out_rgb: endpoint { 1642 }; 1643 }; 1644 1645 port@1 { 1646 reg = <1>; 1647 du_out_lvds0: endpoint { 1648 remote-endpoint = <&lvds0_in>; 1649 }; 1650 }; 1651 1652 port@2 { 1653 reg = <2>; 1654 du_out_lvds1: endpoint { 1655 remote-endpoint = <&lvds1_in>; 1656 }; 1657 }; 1658 }; 1659 }; 1660 1661 lvds0: lvds-encoder@feb90000 { 1662 compatible = "renesas,r8a77990-lvds"; 1663 reg = <0 0xfeb90000 0 0x20>; 1664 clocks = <&cpg CPG_MOD 727>; 1665 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1666 resets = <&cpg 727>; 1667 status = "disabled"; 1668 1669 ports { 1670 #address-cells = <1>; 1671 #size-cells = <0>; 1672 1673 port@0 { 1674 reg = <0>; 1675 lvds0_in: endpoint { 1676 remote-endpoint = <&du_out_lvds0>; 1677 }; 1678 }; 1679 1680 port@1 { 1681 reg = <1>; 1682 lvds0_out: endpoint { 1683 }; 1684 }; 1685 }; 1686 }; 1687 1688 lvds1: lvds-encoder@feb90100 { 1689 compatible = "renesas,r8a77990-lvds"; 1690 reg = <0 0xfeb90100 0 0x20>; 1691 clocks = <&cpg CPG_MOD 727>; 1692 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1693 resets = <&cpg 726>; 1694 status = "disabled"; 1695 1696 ports { 1697 #address-cells = <1>; 1698 #size-cells = <0>; 1699 1700 port@0 { 1701 reg = <0>; 1702 lvds1_in: endpoint { 1703 remote-endpoint = <&du_out_lvds1>; 1704 }; 1705 }; 1706 1707 port@1 { 1708 reg = <1>; 1709 lvds1_out: endpoint { 1710 }; 1711 }; 1712 }; 1713 }; 1714 1715 pciec0: pcie@fe000000 { 1716 compatible = "renesas,pcie-r8a77990", 1717 "renesas,pcie-rcar-gen3"; 1718 reg = <0 0xfe000000 0 0x80000>; 1719 #address-cells = <3>; 1720 #size-cells = <2>; 1721 bus-range = <0x00 0xff>; 1722 device_type = "pci"; 1723 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 1724 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 1725 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 1726 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1727 /* Map all possible DDR as inbound ranges */ 1728 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; 1729 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1730 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1731 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1732 #interrupt-cells = <1>; 1733 interrupt-map-mask = <0 0 0 0>; 1734 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1735 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1736 clock-names = "pcie", "pcie_bus"; 1737 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1738 resets = <&cpg 319>; 1739 status = "disabled"; 1740 }; 1741 1742 prr: chipid@fff00044 { 1743 compatible = "renesas,prr"; 1744 reg = <0 0xfff00044 0 4>; 1745 }; 1746 }; 1747 1748 timer { 1749 compatible = "arm,armv8-timer"; 1750 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1751 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1752 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1753 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1754 }; 1755}; 1756