1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77990-sysc.h> 11 12/ { 13 compatible = "renesas,r8a77990"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 i2c6 = &i2c6; 25 i2c7 = &i2c7; 26 }; 27 28 cpus { 29 #address-cells = <1>; 30 #size-cells = <0>; 31 32 a53_0: cpu@0 { 33 compatible = "arm,cortex-a53", "arm,armv8"; 34 reg = <0>; 35 device_type = "cpu"; 36 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 37 next-level-cache = <&L2_CA53>; 38 enable-method = "psci"; 39 }; 40 41 a53_1: cpu@1 { 42 compatible = "arm,cortex-a53", "arm,armv8"; 43 reg = <1>; 44 device_type = "cpu"; 45 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 46 next-level-cache = <&L2_CA53>; 47 enable-method = "psci"; 48 }; 49 50 L2_CA53: cache-controller-0 { 51 compatible = "cache"; 52 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 53 cache-unified; 54 cache-level = <2>; 55 }; 56 }; 57 58 extal_clk: extal { 59 compatible = "fixed-clock"; 60 #clock-cells = <0>; 61 /* This value must be overridden by the board */ 62 clock-frequency = <0>; 63 }; 64 65 pmu_a53 { 66 compatible = "arm,cortex-a53-pmu"; 67 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 68 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 69 interrupt-affinity = <&a53_0>, <&a53_1>; 70 }; 71 72 psci { 73 compatible = "arm,psci-1.0", "arm,psci-0.2"; 74 method = "smc"; 75 }; 76 77 /* External SCIF clock - to be overridden by boards that provide it */ 78 scif_clk: scif { 79 compatible = "fixed-clock"; 80 #clock-cells = <0>; 81 clock-frequency = <0>; 82 }; 83 84 soc: soc { 85 compatible = "simple-bus"; 86 interrupt-parent = <&gic>; 87 #address-cells = <2>; 88 #size-cells = <2>; 89 ranges; 90 91 rwdt: watchdog@e6020000 { 92 compatible = "renesas,r8a77990-wdt", 93 "renesas,rcar-gen3-wdt"; 94 reg = <0 0xe6020000 0 0x0c>; 95 clocks = <&cpg CPG_MOD 402>; 96 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 97 resets = <&cpg 402>; 98 status = "disabled"; 99 }; 100 101 gpio0: gpio@e6050000 { 102 compatible = "renesas,gpio-r8a77990", 103 "renesas,rcar-gen3-gpio"; 104 reg = <0 0xe6050000 0 0x50>; 105 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 106 #gpio-cells = <2>; 107 gpio-controller; 108 gpio-ranges = <&pfc 0 0 18>; 109 #interrupt-cells = <2>; 110 interrupt-controller; 111 clocks = <&cpg CPG_MOD 912>; 112 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 113 resets = <&cpg 912>; 114 }; 115 116 gpio1: gpio@e6051000 { 117 compatible = "renesas,gpio-r8a77990", 118 "renesas,rcar-gen3-gpio"; 119 reg = <0 0xe6051000 0 0x50>; 120 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 121 #gpio-cells = <2>; 122 gpio-controller; 123 gpio-ranges = <&pfc 0 32 23>; 124 #interrupt-cells = <2>; 125 interrupt-controller; 126 clocks = <&cpg CPG_MOD 911>; 127 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 128 resets = <&cpg 911>; 129 }; 130 131 gpio2: gpio@e6052000 { 132 compatible = "renesas,gpio-r8a77990", 133 "renesas,rcar-gen3-gpio"; 134 reg = <0 0xe6052000 0 0x50>; 135 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 136 #gpio-cells = <2>; 137 gpio-controller; 138 gpio-ranges = <&pfc 0 64 26>; 139 #interrupt-cells = <2>; 140 interrupt-controller; 141 clocks = <&cpg CPG_MOD 910>; 142 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 143 resets = <&cpg 910>; 144 }; 145 146 gpio3: gpio@e6053000 { 147 compatible = "renesas,gpio-r8a77990", 148 "renesas,rcar-gen3-gpio"; 149 reg = <0 0xe6053000 0 0x50>; 150 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 151 #gpio-cells = <2>; 152 gpio-controller; 153 gpio-ranges = <&pfc 0 96 16>; 154 #interrupt-cells = <2>; 155 interrupt-controller; 156 clocks = <&cpg CPG_MOD 909>; 157 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 158 resets = <&cpg 909>; 159 }; 160 161 gpio4: gpio@e6054000 { 162 compatible = "renesas,gpio-r8a77990", 163 "renesas,rcar-gen3-gpio"; 164 reg = <0 0xe6054000 0 0x50>; 165 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 166 #gpio-cells = <2>; 167 gpio-controller; 168 gpio-ranges = <&pfc 0 128 11>; 169 #interrupt-cells = <2>; 170 interrupt-controller; 171 clocks = <&cpg CPG_MOD 908>; 172 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 173 resets = <&cpg 908>; 174 }; 175 176 gpio5: gpio@e6055000 { 177 compatible = "renesas,gpio-r8a77990", 178 "renesas,rcar-gen3-gpio"; 179 reg = <0 0xe6055000 0 0x50>; 180 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 181 #gpio-cells = <2>; 182 gpio-controller; 183 gpio-ranges = <&pfc 0 160 20>; 184 #interrupt-cells = <2>; 185 interrupt-controller; 186 clocks = <&cpg CPG_MOD 907>; 187 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 188 resets = <&cpg 907>; 189 }; 190 191 gpio6: gpio@e6055400 { 192 compatible = "renesas,gpio-r8a77990", 193 "renesas,rcar-gen3-gpio"; 194 reg = <0 0xe6055400 0 0x50>; 195 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 196 #gpio-cells = <2>; 197 gpio-controller; 198 gpio-ranges = <&pfc 0 192 18>; 199 #interrupt-cells = <2>; 200 interrupt-controller; 201 clocks = <&cpg CPG_MOD 906>; 202 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 203 resets = <&cpg 906>; 204 }; 205 206 i2c0: i2c@e6500000 { 207 #address-cells = <1>; 208 #size-cells = <0>; 209 compatible = "renesas,i2c-r8a77990", 210 "renesas,rcar-gen3-i2c"; 211 reg = <0 0xe6500000 0 0x40>; 212 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 213 clocks = <&cpg CPG_MOD 931>; 214 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 215 resets = <&cpg 931>; 216 i2c-scl-internal-delay-ns = <110>; 217 status = "disabled"; 218 }; 219 220 i2c1: i2c@e6508000 { 221 #address-cells = <1>; 222 #size-cells = <0>; 223 compatible = "renesas,i2c-r8a77990", 224 "renesas,rcar-gen3-i2c"; 225 reg = <0 0xe6508000 0 0x40>; 226 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 227 clocks = <&cpg CPG_MOD 930>; 228 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 229 resets = <&cpg 930>; 230 i2c-scl-internal-delay-ns = <6>; 231 status = "disabled"; 232 }; 233 234 i2c2: i2c@e6510000 { 235 #address-cells = <1>; 236 #size-cells = <0>; 237 compatible = "renesas,i2c-r8a77990", 238 "renesas,rcar-gen3-i2c"; 239 reg = <0 0xe6510000 0 0x40>; 240 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 241 clocks = <&cpg CPG_MOD 929>; 242 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 243 resets = <&cpg 929>; 244 i2c-scl-internal-delay-ns = <6>; 245 status = "disabled"; 246 }; 247 248 i2c3: i2c@e66d0000 { 249 #address-cells = <1>; 250 #size-cells = <0>; 251 compatible = "renesas,i2c-r8a77990", 252 "renesas,rcar-gen3-i2c"; 253 reg = <0 0xe66d0000 0 0x40>; 254 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 255 clocks = <&cpg CPG_MOD 928>; 256 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 257 resets = <&cpg 928>; 258 i2c-scl-internal-delay-ns = <110>; 259 status = "disabled"; 260 }; 261 262 i2c4: i2c@e66d8000 { 263 #address-cells = <1>; 264 #size-cells = <0>; 265 compatible = "renesas,i2c-r8a77990", 266 "renesas,rcar-gen3-i2c"; 267 reg = <0 0xe66d8000 0 0x40>; 268 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 269 clocks = <&cpg CPG_MOD 927>; 270 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 271 resets = <&cpg 927>; 272 i2c-scl-internal-delay-ns = <6>; 273 status = "disabled"; 274 }; 275 276 i2c5: i2c@e66e0000 { 277 #address-cells = <1>; 278 #size-cells = <0>; 279 compatible = "renesas,i2c-r8a77990", 280 "renesas,rcar-gen3-i2c"; 281 reg = <0 0xe66e0000 0 0x40>; 282 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 283 clocks = <&cpg CPG_MOD 919>; 284 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 285 resets = <&cpg 919>; 286 i2c-scl-internal-delay-ns = <6>; 287 status = "disabled"; 288 }; 289 290 i2c6: i2c@e66e8000 { 291 #address-cells = <1>; 292 #size-cells = <0>; 293 compatible = "renesas,i2c-r8a77990", 294 "renesas,rcar-gen3-i2c"; 295 reg = <0 0xe66e8000 0 0x40>; 296 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 297 clocks = <&cpg CPG_MOD 918>; 298 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 299 resets = <&cpg 918>; 300 i2c-scl-internal-delay-ns = <6>; 301 status = "disabled"; 302 }; 303 304 i2c7: i2c@e6690000 { 305 #address-cells = <1>; 306 #size-cells = <0>; 307 compatible = "renesas,i2c-r8a77990", 308 "renesas,rcar-gen3-i2c"; 309 reg = <0 0xe6690000 0 0x40>; 310 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 311 clocks = <&cpg CPG_MOD 1003>; 312 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 313 resets = <&cpg 1003>; 314 i2c-scl-internal-delay-ns = <6>; 315 status = "disabled"; 316 }; 317 318 pfc: pin-controller@e6060000 { 319 compatible = "renesas,pfc-r8a77990"; 320 reg = <0 0xe6060000 0 0x508>; 321 }; 322 323 cpg: clock-controller@e6150000 { 324 compatible = "renesas,r8a77990-cpg-mssr"; 325 reg = <0 0xe6150000 0 0x1000>; 326 clocks = <&extal_clk>; 327 clock-names = "extal"; 328 #clock-cells = <2>; 329 #power-domain-cells = <0>; 330 #reset-cells = <1>; 331 }; 332 333 rst: reset-controller@e6160000 { 334 compatible = "renesas,r8a77990-rst"; 335 reg = <0 0xe6160000 0 0x0200>; 336 }; 337 338 sysc: system-controller@e6180000 { 339 compatible = "renesas,r8a77990-sysc"; 340 reg = <0 0xe6180000 0 0x0400>; 341 #power-domain-cells = <1>; 342 }; 343 344 intc_ex: interrupt-controller@e61c0000 { 345 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; 346 #interrupt-cells = <2>; 347 interrupt-controller; 348 reg = <0 0xe61c0000 0 0x200>; 349 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 350 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 351 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 352 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 353 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 354 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 355 clocks = <&cpg CPG_MOD 407>; 356 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 357 resets = <&cpg 407>; 358 }; 359 360 hsusb: usb@e6590000 { 361 compatible = "renesas,usbhs-r8a77990", 362 "renesas,rcar-gen3-usbhs"; 363 reg = <0 0xe6590000 0 0x200>; 364 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 365 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 366 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 367 <&usb_dmac1 0>, <&usb_dmac1 1>; 368 dma-names = "ch0", "ch1", "ch2", "ch3"; 369 renesas,buswait = <11>; 370 phys = <&usb2_phy0>; 371 phy-names = "usb"; 372 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 373 resets = <&cpg 704>, <&cpg 703>; 374 status = "disabled"; 375 }; 376 377 usb_dmac0: dma-controller@e65a0000 { 378 compatible = "renesas,r8a77990-usb-dmac", 379 "renesas,usb-dmac"; 380 reg = <0 0xe65a0000 0 0x100>; 381 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 382 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 383 interrupt-names = "ch0", "ch1"; 384 clocks = <&cpg CPG_MOD 330>; 385 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 386 resets = <&cpg 330>; 387 #dma-cells = <1>; 388 dma-channels = <2>; 389 }; 390 391 usb_dmac1: dma-controller@e65b0000 { 392 compatible = "renesas,r8a77990-usb-dmac", 393 "renesas,usb-dmac"; 394 reg = <0 0xe65b0000 0 0x100>; 395 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 396 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 397 interrupt-names = "ch0", "ch1"; 398 clocks = <&cpg CPG_MOD 331>; 399 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 400 resets = <&cpg 331>; 401 #dma-cells = <1>; 402 dma-channels = <2>; 403 }; 404 405 dmac0: dma-controller@e6700000 { 406 compatible = "renesas,dmac-r8a77990", 407 "renesas,rcar-dmac"; 408 reg = <0 0xe6700000 0 0x10000>; 409 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 410 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 411 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 412 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 413 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 414 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 415 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 416 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 417 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 418 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 419 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 420 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 421 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 422 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 423 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 424 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 425 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 426 interrupt-names = "error", 427 "ch0", "ch1", "ch2", "ch3", 428 "ch4", "ch5", "ch6", "ch7", 429 "ch8", "ch9", "ch10", "ch11", 430 "ch12", "ch13", "ch14", "ch15"; 431 clocks = <&cpg CPG_MOD 219>; 432 clock-names = "fck"; 433 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 434 resets = <&cpg 219>; 435 #dma-cells = <1>; 436 dma-channels = <16>; 437 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 438 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 439 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 440 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 441 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 442 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 443 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 444 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 445 }; 446 447 dmac1: dma-controller@e7300000 { 448 compatible = "renesas,dmac-r8a77990", 449 "renesas,rcar-dmac"; 450 reg = <0 0xe7300000 0 0x10000>; 451 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 452 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 453 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 454 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 455 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 456 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 457 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 458 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 459 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 460 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 461 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 462 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 463 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 464 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 465 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 466 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 467 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 468 interrupt-names = "error", 469 "ch0", "ch1", "ch2", "ch3", 470 "ch4", "ch5", "ch6", "ch7", 471 "ch8", "ch9", "ch10", "ch11", 472 "ch12", "ch13", "ch14", "ch15"; 473 clocks = <&cpg CPG_MOD 218>; 474 clock-names = "fck"; 475 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 476 resets = <&cpg 218>; 477 #dma-cells = <1>; 478 dma-channels = <16>; 479 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 480 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 481 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 482 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 483 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 484 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 485 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 486 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 487 }; 488 489 dmac2: dma-controller@e7310000 { 490 compatible = "renesas,dmac-r8a77990", 491 "renesas,rcar-dmac"; 492 reg = <0 0xe7310000 0 0x10000>; 493 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 494 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 495 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 496 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 497 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 498 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 499 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 500 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 501 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 502 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 503 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 504 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 505 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 506 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 507 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 508 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 509 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 510 interrupt-names = "error", 511 "ch0", "ch1", "ch2", "ch3", 512 "ch4", "ch5", "ch6", "ch7", 513 "ch8", "ch9", "ch10", "ch11", 514 "ch12", "ch13", "ch14", "ch15"; 515 clocks = <&cpg CPG_MOD 217>; 516 clock-names = "fck"; 517 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 518 resets = <&cpg 217>; 519 #dma-cells = <1>; 520 dma-channels = <16>; 521 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 522 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 523 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 524 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 525 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 526 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 527 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 528 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 529 }; 530 531 ipmmu_ds0: mmu@e6740000 { 532 compatible = "renesas,ipmmu-r8a77990"; 533 reg = <0 0xe6740000 0 0x1000>; 534 renesas,ipmmu-main = <&ipmmu_mm 0>; 535 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 536 #iommu-cells = <1>; 537 }; 538 539 ipmmu_ds1: mmu@e7740000 { 540 compatible = "renesas,ipmmu-r8a77990"; 541 reg = <0 0xe7740000 0 0x1000>; 542 renesas,ipmmu-main = <&ipmmu_mm 1>; 543 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 544 #iommu-cells = <1>; 545 }; 546 547 ipmmu_hc: mmu@e6570000 { 548 compatible = "renesas,ipmmu-r8a77990"; 549 reg = <0 0xe6570000 0 0x1000>; 550 renesas,ipmmu-main = <&ipmmu_mm 2>; 551 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 552 #iommu-cells = <1>; 553 }; 554 555 ipmmu_mm: mmu@e67b0000 { 556 compatible = "renesas,ipmmu-r8a77990"; 557 reg = <0 0xe67b0000 0 0x1000>; 558 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 559 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 560 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 561 #iommu-cells = <1>; 562 }; 563 564 ipmmu_mp: mmu@ec670000 { 565 compatible = "renesas,ipmmu-r8a77990"; 566 reg = <0 0xec670000 0 0x1000>; 567 renesas,ipmmu-main = <&ipmmu_mm 4>; 568 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 569 #iommu-cells = <1>; 570 }; 571 572 ipmmu_pv0: mmu@fd800000 { 573 compatible = "renesas,ipmmu-r8a77990"; 574 reg = <0 0xfd800000 0 0x1000>; 575 renesas,ipmmu-main = <&ipmmu_mm 6>; 576 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 577 #iommu-cells = <1>; 578 }; 579 580 ipmmu_rt: mmu@ffc80000 { 581 compatible = "renesas,ipmmu-r8a77990"; 582 reg = <0 0xffc80000 0 0x1000>; 583 renesas,ipmmu-main = <&ipmmu_mm 10>; 584 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 585 #iommu-cells = <1>; 586 }; 587 588 ipmmu_vc0: mmu@fe6b0000 { 589 compatible = "renesas,ipmmu-r8a77990"; 590 reg = <0 0xfe6b0000 0 0x1000>; 591 renesas,ipmmu-main = <&ipmmu_mm 12>; 592 power-domains = <&sysc R8A77990_PD_A3VC>; 593 #iommu-cells = <1>; 594 }; 595 596 ipmmu_vi0: mmu@febd0000 { 597 compatible = "renesas,ipmmu-r8a77990"; 598 reg = <0 0xfebd0000 0 0x1000>; 599 renesas,ipmmu-main = <&ipmmu_mm 14>; 600 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 601 #iommu-cells = <1>; 602 }; 603 604 ipmmu_vp0: mmu@fe990000 { 605 compatible = "renesas,ipmmu-r8a77990"; 606 reg = <0 0xfe990000 0 0x1000>; 607 renesas,ipmmu-main = <&ipmmu_mm 16>; 608 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 609 #iommu-cells = <1>; 610 }; 611 612 avb: ethernet@e6800000 { 613 compatible = "renesas,etheravb-r8a77990", 614 "renesas,etheravb-rcar-gen3"; 615 reg = <0 0xe6800000 0 0x800>; 616 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 617 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 618 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 619 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 620 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 621 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 622 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 623 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 624 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 625 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 626 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 627 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 628 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 629 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 630 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 631 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 632 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 633 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 634 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 635 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 636 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 637 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 638 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 639 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 640 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 641 interrupt-names = "ch0", "ch1", "ch2", "ch3", 642 "ch4", "ch5", "ch6", "ch7", 643 "ch8", "ch9", "ch10", "ch11", 644 "ch12", "ch13", "ch14", "ch15", 645 "ch16", "ch17", "ch18", "ch19", 646 "ch20", "ch21", "ch22", "ch23", 647 "ch24"; 648 clocks = <&cpg CPG_MOD 812>; 649 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 650 resets = <&cpg 812>; 651 phy-mode = "rgmii"; 652 iommus = <&ipmmu_ds0 16>; 653 #address-cells = <1>; 654 #size-cells = <0>; 655 status = "disabled"; 656 }; 657 658 pwm0: pwm@e6e30000 { 659 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 660 reg = <0 0xe6e30000 0 0x8>; 661 clocks = <&cpg CPG_MOD 523>; 662 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 663 resets = <&cpg 523>; 664 #pwm-cells = <2>; 665 status = "disabled"; 666 }; 667 668 pwm1: pwm@e6e31000 { 669 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 670 reg = <0 0xe6e31000 0 0x8>; 671 clocks = <&cpg CPG_MOD 523>; 672 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 673 resets = <&cpg 523>; 674 #pwm-cells = <2>; 675 status = "disabled"; 676 }; 677 678 pwm2: pwm@e6e32000 { 679 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 680 reg = <0 0xe6e32000 0 0x8>; 681 clocks = <&cpg CPG_MOD 523>; 682 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 683 resets = <&cpg 523>; 684 #pwm-cells = <2>; 685 status = "disabled"; 686 }; 687 688 pwm3: pwm@e6e33000 { 689 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 690 reg = <0 0xe6e33000 0 0x8>; 691 clocks = <&cpg CPG_MOD 523>; 692 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 693 resets = <&cpg 523>; 694 #pwm-cells = <2>; 695 status = "disabled"; 696 }; 697 698 pwm4: pwm@e6e34000 { 699 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 700 reg = <0 0xe6e34000 0 0x8>; 701 clocks = <&cpg CPG_MOD 523>; 702 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 703 resets = <&cpg 523>; 704 #pwm-cells = <2>; 705 status = "disabled"; 706 }; 707 708 pwm5: pwm@e6e35000 { 709 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 710 reg = <0 0xe6e35000 0 0x8>; 711 clocks = <&cpg CPG_MOD 523>; 712 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 713 resets = <&cpg 523>; 714 #pwm-cells = <2>; 715 status = "disabled"; 716 }; 717 718 pwm6: pwm@e6e36000 { 719 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 720 reg = <0 0xe6e36000 0 0x8>; 721 clocks = <&cpg CPG_MOD 523>; 722 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 723 resets = <&cpg 523>; 724 #pwm-cells = <2>; 725 status = "disabled"; 726 }; 727 728 scif0: serial@e6e60000 { 729 compatible = "renesas,scif-r8a77990", 730 "renesas,rcar-gen3-scif", "renesas,scif"; 731 reg = <0 0xe6e60000 0 64>; 732 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 733 clocks = <&cpg CPG_MOD 207>, 734 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 735 <&scif_clk>; 736 clock-names = "fck", "brg_int", "scif_clk"; 737 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 738 <&dmac2 0x51>, <&dmac2 0x50>; 739 dma-names = "tx", "rx", "tx", "rx"; 740 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 741 resets = <&cpg 207>; 742 status = "disabled"; 743 }; 744 745 scif1: serial@e6e68000 { 746 compatible = "renesas,scif-r8a77990", 747 "renesas,rcar-gen3-scif", "renesas,scif"; 748 reg = <0 0xe6e68000 0 64>; 749 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 750 clocks = <&cpg CPG_MOD 206>, 751 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 752 <&scif_clk>; 753 clock-names = "fck", "brg_int", "scif_clk"; 754 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 755 <&dmac2 0x53>, <&dmac2 0x52>; 756 dma-names = "tx", "rx", "tx", "rx"; 757 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 758 resets = <&cpg 206>; 759 status = "disabled"; 760 }; 761 762 scif2: serial@e6e88000 { 763 compatible = "renesas,scif-r8a77990", 764 "renesas,rcar-gen3-scif", "renesas,scif"; 765 reg = <0 0xe6e88000 0 64>; 766 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 767 clocks = <&cpg CPG_MOD 310>, 768 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 769 <&scif_clk>; 770 clock-names = "fck", "brg_int", "scif_clk"; 771 772 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 773 resets = <&cpg 310>; 774 status = "disabled"; 775 }; 776 777 scif3: serial@e6c50000 { 778 compatible = "renesas,scif-r8a77990", 779 "renesas,rcar-gen3-scif", "renesas,scif"; 780 reg = <0 0xe6c50000 0 64>; 781 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 782 clocks = <&cpg CPG_MOD 204>, 783 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 784 <&scif_clk>; 785 clock-names = "fck", "brg_int", "scif_clk"; 786 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 787 dma-names = "tx", "rx"; 788 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 789 resets = <&cpg 204>; 790 status = "disabled"; 791 }; 792 793 scif4: serial@e6c40000 { 794 compatible = "renesas,scif-r8a77990", 795 "renesas,rcar-gen3-scif", "renesas,scif"; 796 reg = <0 0xe6c40000 0 64>; 797 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 798 clocks = <&cpg CPG_MOD 203>, 799 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 800 <&scif_clk>; 801 clock-names = "fck", "brg_int", "scif_clk"; 802 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 803 dma-names = "tx", "rx"; 804 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 805 resets = <&cpg 203>; 806 status = "disabled"; 807 }; 808 809 scif5: serial@e6f30000 { 810 compatible = "renesas,scif-r8a77990", 811 "renesas,rcar-gen3-scif", "renesas,scif"; 812 reg = <0 0xe6f30000 0 64>; 813 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 814 clocks = <&cpg CPG_MOD 202>, 815 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 816 <&scif_clk>; 817 clock-names = "fck", "brg_int", "scif_clk"; 818 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 819 <&dmac2 0x5b>, <&dmac2 0x5a>; 820 dma-names = "tx", "rx", "tx", "rx"; 821 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 822 resets = <&cpg 202>; 823 status = "disabled"; 824 }; 825 826 msiof0: spi@e6e90000 { 827 compatible = "renesas,msiof-r8a77990", 828 "renesas,rcar-gen3-msiof"; 829 reg = <0 0xe6e90000 0 0x0064>; 830 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 831 clocks = <&cpg CPG_MOD 211>; 832 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 833 <&dmac2 0x41>, <&dmac2 0x40>; 834 dma-names = "tx", "rx", "tx", "rx"; 835 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 836 resets = <&cpg 211>; 837 #address-cells = <1>; 838 #size-cells = <0>; 839 status = "disabled"; 840 }; 841 842 msiof1: spi@e6ea0000 { 843 compatible = "renesas,msiof-r8a77990", 844 "renesas,rcar-gen3-msiof"; 845 reg = <0 0xe6ea0000 0 0x0064>; 846 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 847 clocks = <&cpg CPG_MOD 210>; 848 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 849 <&dmac2 0x43>, <&dmac2 0x42>; 850 dma-names = "tx", "rx", "tx", "rx"; 851 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 852 resets = <&cpg 210>; 853 #address-cells = <1>; 854 #size-cells = <0>; 855 status = "disabled"; 856 }; 857 858 msiof2: spi@e6c00000 { 859 compatible = "renesas,msiof-r8a77990", 860 "renesas,rcar-gen3-msiof"; 861 reg = <0 0xe6c00000 0 0x0064>; 862 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 863 clocks = <&cpg CPG_MOD 209>; 864 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 865 dma-names = "tx", "rx"; 866 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 867 resets = <&cpg 209>; 868 #address-cells = <1>; 869 #size-cells = <0>; 870 status = "disabled"; 871 }; 872 873 msiof3: spi@e6c10000 { 874 compatible = "renesas,msiof-r8a77990", 875 "renesas,rcar-gen3-msiof"; 876 reg = <0 0xe6c10000 0 0x0064>; 877 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 878 clocks = <&cpg CPG_MOD 208>; 879 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 880 dma-names = "tx", "rx"; 881 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 882 resets = <&cpg 208>; 883 #address-cells = <1>; 884 #size-cells = <0>; 885 status = "disabled"; 886 }; 887 888 vin4: video@e6ef4000 { 889 compatible = "renesas,vin-r8a77990"; 890 reg = <0 0xe6ef4000 0 0x1000>; 891 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 892 clocks = <&cpg CPG_MOD 807>; 893 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 894 resets = <&cpg 807>; 895 renesas,id = <4>; 896 status = "disabled"; 897 898 ports { 899 #address-cells = <1>; 900 #size-cells = <0>; 901 902 port@1 { 903 reg = <1>; 904 905 vin4csi40: endpoint { 906 remote-endpoint= <&csi40vin4>; 907 }; 908 }; 909 }; 910 }; 911 912 vin5: video@e6ef5000 { 913 compatible = "renesas,vin-r8a77990"; 914 reg = <0 0xe6ef5000 0 0x1000>; 915 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 916 clocks = <&cpg CPG_MOD 806>; 917 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 918 resets = <&cpg 806>; 919 renesas,id = <5>; 920 status = "disabled"; 921 922 ports { 923 #address-cells = <1>; 924 #size-cells = <0>; 925 926 port@1 { 927 reg = <1>; 928 929 vin5csi40: endpoint { 930 remote-endpoint= <&csi40vin5>; 931 }; 932 }; 933 }; 934 }; 935 936 xhci0: usb@ee000000 { 937 compatible = "renesas,xhci-r8a77990", 938 "renesas,rcar-gen3-xhci"; 939 reg = <0 0xee000000 0 0xc00>; 940 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 941 clocks = <&cpg CPG_MOD 328>; 942 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 943 resets = <&cpg 328>; 944 status = "disabled"; 945 }; 946 947 usb3_peri0: usb@ee020000 { 948 compatible = "renesas,r8a77990-usb3-peri", 949 "renesas,rcar-gen3-usb3-peri"; 950 reg = <0 0xee020000 0 0x400>; 951 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 952 clocks = <&cpg CPG_MOD 328>; 953 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 954 resets = <&cpg 328>; 955 status = "disabled"; 956 }; 957 958 ohci0: usb@ee080000 { 959 compatible = "generic-ohci"; 960 reg = <0 0xee080000 0 0x100>; 961 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 962 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 963 phys = <&usb2_phy0>; 964 phy-names = "usb"; 965 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 966 resets = <&cpg 703>, <&cpg 704>; 967 status = "disabled"; 968 }; 969 970 ehci0: usb@ee080100 { 971 compatible = "generic-ehci"; 972 reg = <0 0xee080100 0 0x100>; 973 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 974 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 975 phys = <&usb2_phy0>; 976 phy-names = "usb"; 977 companion = <&ohci0>; 978 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 979 resets = <&cpg 703>, <&cpg 704>; 980 status = "disabled"; 981 }; 982 983 usb2_phy0: usb-phy@ee080200 { 984 compatible = "renesas,usb2-phy-r8a77990", 985 "renesas,rcar-gen3-usb2-phy"; 986 reg = <0 0xee080200 0 0x700>; 987 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 988 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 989 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 990 resets = <&cpg 703>, <&cpg 704>; 991 #phy-cells = <0>; 992 status = "disabled"; 993 }; 994 995 gic: interrupt-controller@f1010000 { 996 compatible = "arm,gic-400"; 997 #interrupt-cells = <3>; 998 #address-cells = <0>; 999 interrupt-controller; 1000 reg = <0x0 0xf1010000 0 0x1000>, 1001 <0x0 0xf1020000 0 0x20000>, 1002 <0x0 0xf1040000 0 0x20000>, 1003 <0x0 0xf1060000 0 0x20000>; 1004 interrupts = <GIC_PPI 9 1005 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1006 clocks = <&cpg CPG_MOD 408>; 1007 clock-names = "clk"; 1008 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1009 resets = <&cpg 408>; 1010 }; 1011 1012 vspb0: vsp@fe960000 { 1013 compatible = "renesas,vsp2"; 1014 reg = <0 0xfe960000 0 0x8000>; 1015 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1016 clocks = <&cpg CPG_MOD 626>; 1017 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1018 resets = <&cpg 626>; 1019 renesas,fcp = <&fcpvb0>; 1020 }; 1021 1022 fcpvb0: fcp@fe96f000 { 1023 compatible = "renesas,fcpv"; 1024 reg = <0 0xfe96f000 0 0x200>; 1025 clocks = <&cpg CPG_MOD 607>; 1026 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1027 resets = <&cpg 607>; 1028 iommus = <&ipmmu_vp0 5>; 1029 }; 1030 1031 vspi0: vsp@fe9a0000 { 1032 compatible = "renesas,vsp2"; 1033 reg = <0 0xfe9a0000 0 0x8000>; 1034 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1035 clocks = <&cpg CPG_MOD 631>; 1036 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1037 resets = <&cpg 631>; 1038 renesas,fcp = <&fcpvi0>; 1039 }; 1040 1041 fcpvi0: fcp@fe9af000 { 1042 compatible = "renesas,fcpv"; 1043 reg = <0 0xfe9af000 0 0x200>; 1044 clocks = <&cpg CPG_MOD 611>; 1045 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1046 resets = <&cpg 611>; 1047 iommus = <&ipmmu_vp0 8>; 1048 }; 1049 1050 vspd0: vsp@fea20000 { 1051 compatible = "renesas,vsp2"; 1052 reg = <0 0xfea20000 0 0x7000>; 1053 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1054 clocks = <&cpg CPG_MOD 623>; 1055 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1056 resets = <&cpg 623>; 1057 renesas,fcp = <&fcpvd0>; 1058 }; 1059 1060 fcpvd0: fcp@fea27000 { 1061 compatible = "renesas,fcpv"; 1062 reg = <0 0xfea27000 0 0x200>; 1063 clocks = <&cpg CPG_MOD 603>; 1064 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1065 resets = <&cpg 603>; 1066 iommus = <&ipmmu_vi0 8>; 1067 }; 1068 1069 vspd1: vsp@fea28000 { 1070 compatible = "renesas,vsp2"; 1071 reg = <0 0xfea28000 0 0x7000>; 1072 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1073 clocks = <&cpg CPG_MOD 622>; 1074 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1075 resets = <&cpg 622>; 1076 renesas,fcp = <&fcpvd1>; 1077 }; 1078 1079 fcpvd1: fcp@fea2f000 { 1080 compatible = "renesas,fcpv"; 1081 reg = <0 0xfea2f000 0 0x200>; 1082 clocks = <&cpg CPG_MOD 602>; 1083 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1084 resets = <&cpg 602>; 1085 iommus = <&ipmmu_vi0 9>; 1086 }; 1087 1088 csi40: csi2@feaa0000 { 1089 compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; 1090 reg = <0 0xfeaa0000 0 0x10000>; 1091 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1092 clocks = <&cpg CPG_MOD 716>; 1093 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1094 resets = <&cpg 716>; 1095 status = "disabled"; 1096 1097 ports { 1098 #address-cells = <1>; 1099 #size-cells = <0>; 1100 1101 port@1 { 1102 #address-cells = <1>; 1103 #size-cells = <0>; 1104 1105 reg = <1>; 1106 1107 csi40vin4: endpoint@0 { 1108 reg = <0>; 1109 remote-endpoint = <&vin4csi40>; 1110 }; 1111 csi40vin5: endpoint@1 { 1112 reg = <1>; 1113 remote-endpoint = <&vin5csi40>; 1114 }; 1115 }; 1116 }; 1117 }; 1118 1119 du: display@feb00000 { 1120 compatible = "renesas,du-r8a77990"; 1121 reg = <0 0xfeb00000 0 0x80000>; 1122 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1123 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1124 clocks = <&cpg CPG_MOD 724>, 1125 <&cpg CPG_MOD 723>; 1126 clock-names = "du.0", "du.1"; 1127 vsps = <&vspd0 0 &vspd1 0>; 1128 status = "disabled"; 1129 1130 ports { 1131 #address-cells = <1>; 1132 #size-cells = <0>; 1133 1134 port@0 { 1135 reg = <0>; 1136 du_out_rgb: endpoint { 1137 }; 1138 }; 1139 1140 port@1 { 1141 reg = <1>; 1142 du_out_lvds0: endpoint { 1143 remote-endpoint = <&lvds0_in>; 1144 }; 1145 }; 1146 1147 port@2 { 1148 reg = <2>; 1149 du_out_lvds1: endpoint { 1150 remote-endpoint = <&lvds1_in>; 1151 }; 1152 }; 1153 }; 1154 }; 1155 1156 lvds0: lvds-encoder@feb90000 { 1157 compatible = "renesas,r8a77990-lvds"; 1158 reg = <0 0xfeb90000 0 0x20>; 1159 clocks = <&cpg CPG_MOD 727>; 1160 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1161 resets = <&cpg 727>; 1162 status = "disabled"; 1163 1164 ports { 1165 #address-cells = <1>; 1166 #size-cells = <0>; 1167 1168 port@0 { 1169 reg = <0>; 1170 lvds0_in: endpoint { 1171 remote-endpoint = <&du_out_lvds0>; 1172 }; 1173 }; 1174 1175 port@1 { 1176 reg = <1>; 1177 lvds0_out: endpoint { 1178 }; 1179 }; 1180 }; 1181 }; 1182 1183 lvds1: lvds-encoder@feb90100 { 1184 compatible = "renesas,r8a77990-lvds"; 1185 reg = <0 0xfeb90100 0 0x20>; 1186 clocks = <&cpg CPG_MOD 727>; 1187 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1188 resets = <&cpg 726>; 1189 status = "disabled"; 1190 1191 ports { 1192 #address-cells = <1>; 1193 #size-cells = <0>; 1194 1195 port@0 { 1196 reg = <0>; 1197 lvds1_in: endpoint { 1198 remote-endpoint = <&du_out_lvds1>; 1199 }; 1200 }; 1201 1202 port@1 { 1203 reg = <1>; 1204 lvds1_out: endpoint { 1205 }; 1206 }; 1207 }; 1208 }; 1209 1210 prr: chipid@fff00044 { 1211 compatible = "renesas,prr"; 1212 reg = <0 0xfff00044 0 4>; 1213 }; 1214 }; 1215 1216 timer { 1217 compatible = "arm,armv8-timer"; 1218 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1219 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1220 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1221 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1222 }; 1223}; 1224