1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77990-sysc.h> 11 12/ { 13 compatible = "renesas,r8a77990"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 i2c6 = &i2c6; 25 i2c7 = &i2c7; 26 }; 27 28 /* 29 * The external audio clocks are configured as 0 Hz fixed frequency 30 * clocks by default. 31 * Boards that provide audio clocks should override them. 32 */ 33 audio_clk_a: audio_clk_a { 34 compatible = "fixed-clock"; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 37 }; 38 39 audio_clk_b: audio_clk_b { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <0>; 43 }; 44 45 audio_clk_c: audio_clk_c { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 51 cpus { 52 #address-cells = <1>; 53 #size-cells = <0>; 54 55 a53_0: cpu@0 { 56 compatible = "arm,cortex-a53", "arm,armv8"; 57 reg = <0>; 58 device_type = "cpu"; 59 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 60 next-level-cache = <&L2_CA53>; 61 enable-method = "psci"; 62 }; 63 64 a53_1: cpu@1 { 65 compatible = "arm,cortex-a53", "arm,armv8"; 66 reg = <1>; 67 device_type = "cpu"; 68 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 69 next-level-cache = <&L2_CA53>; 70 enable-method = "psci"; 71 }; 72 73 L2_CA53: cache-controller-0 { 74 compatible = "cache"; 75 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 76 cache-unified; 77 cache-level = <2>; 78 }; 79 }; 80 81 extal_clk: extal { 82 compatible = "fixed-clock"; 83 #clock-cells = <0>; 84 /* This value must be overridden by the board */ 85 clock-frequency = <0>; 86 }; 87 88 pmu_a53 { 89 compatible = "arm,cortex-a53-pmu"; 90 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 91 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 92 interrupt-affinity = <&a53_0>, <&a53_1>; 93 }; 94 95 psci { 96 compatible = "arm,psci-1.0", "arm,psci-0.2"; 97 method = "smc"; 98 }; 99 100 /* External SCIF clock - to be overridden by boards that provide it */ 101 scif_clk: scif { 102 compatible = "fixed-clock"; 103 #clock-cells = <0>; 104 clock-frequency = <0>; 105 }; 106 107 soc: soc { 108 compatible = "simple-bus"; 109 interrupt-parent = <&gic>; 110 #address-cells = <2>; 111 #size-cells = <2>; 112 ranges; 113 114 rwdt: watchdog@e6020000 { 115 compatible = "renesas,r8a77990-wdt", 116 "renesas,rcar-gen3-wdt"; 117 reg = <0 0xe6020000 0 0x0c>; 118 clocks = <&cpg CPG_MOD 402>; 119 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 120 resets = <&cpg 402>; 121 status = "disabled"; 122 }; 123 124 gpio0: gpio@e6050000 { 125 compatible = "renesas,gpio-r8a77990", 126 "renesas,rcar-gen3-gpio"; 127 reg = <0 0xe6050000 0 0x50>; 128 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 129 #gpio-cells = <2>; 130 gpio-controller; 131 gpio-ranges = <&pfc 0 0 18>; 132 #interrupt-cells = <2>; 133 interrupt-controller; 134 clocks = <&cpg CPG_MOD 912>; 135 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 136 resets = <&cpg 912>; 137 }; 138 139 gpio1: gpio@e6051000 { 140 compatible = "renesas,gpio-r8a77990", 141 "renesas,rcar-gen3-gpio"; 142 reg = <0 0xe6051000 0 0x50>; 143 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 144 #gpio-cells = <2>; 145 gpio-controller; 146 gpio-ranges = <&pfc 0 32 23>; 147 #interrupt-cells = <2>; 148 interrupt-controller; 149 clocks = <&cpg CPG_MOD 911>; 150 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 151 resets = <&cpg 911>; 152 }; 153 154 gpio2: gpio@e6052000 { 155 compatible = "renesas,gpio-r8a77990", 156 "renesas,rcar-gen3-gpio"; 157 reg = <0 0xe6052000 0 0x50>; 158 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 159 #gpio-cells = <2>; 160 gpio-controller; 161 gpio-ranges = <&pfc 0 64 26>; 162 #interrupt-cells = <2>; 163 interrupt-controller; 164 clocks = <&cpg CPG_MOD 910>; 165 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 166 resets = <&cpg 910>; 167 }; 168 169 gpio3: gpio@e6053000 { 170 compatible = "renesas,gpio-r8a77990", 171 "renesas,rcar-gen3-gpio"; 172 reg = <0 0xe6053000 0 0x50>; 173 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 174 #gpio-cells = <2>; 175 gpio-controller; 176 gpio-ranges = <&pfc 0 96 16>; 177 #interrupt-cells = <2>; 178 interrupt-controller; 179 clocks = <&cpg CPG_MOD 909>; 180 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 181 resets = <&cpg 909>; 182 }; 183 184 gpio4: gpio@e6054000 { 185 compatible = "renesas,gpio-r8a77990", 186 "renesas,rcar-gen3-gpio"; 187 reg = <0 0xe6054000 0 0x50>; 188 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 189 #gpio-cells = <2>; 190 gpio-controller; 191 gpio-ranges = <&pfc 0 128 11>; 192 #interrupt-cells = <2>; 193 interrupt-controller; 194 clocks = <&cpg CPG_MOD 908>; 195 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 196 resets = <&cpg 908>; 197 }; 198 199 gpio5: gpio@e6055000 { 200 compatible = "renesas,gpio-r8a77990", 201 "renesas,rcar-gen3-gpio"; 202 reg = <0 0xe6055000 0 0x50>; 203 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 204 #gpio-cells = <2>; 205 gpio-controller; 206 gpio-ranges = <&pfc 0 160 20>; 207 #interrupt-cells = <2>; 208 interrupt-controller; 209 clocks = <&cpg CPG_MOD 907>; 210 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 211 resets = <&cpg 907>; 212 }; 213 214 gpio6: gpio@e6055400 { 215 compatible = "renesas,gpio-r8a77990", 216 "renesas,rcar-gen3-gpio"; 217 reg = <0 0xe6055400 0 0x50>; 218 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 219 #gpio-cells = <2>; 220 gpio-controller; 221 gpio-ranges = <&pfc 0 192 18>; 222 #interrupt-cells = <2>; 223 interrupt-controller; 224 clocks = <&cpg CPG_MOD 906>; 225 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 226 resets = <&cpg 906>; 227 }; 228 229 i2c0: i2c@e6500000 { 230 #address-cells = <1>; 231 #size-cells = <0>; 232 compatible = "renesas,i2c-r8a77990", 233 "renesas,rcar-gen3-i2c"; 234 reg = <0 0xe6500000 0 0x40>; 235 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 236 clocks = <&cpg CPG_MOD 931>; 237 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 238 resets = <&cpg 931>; 239 i2c-scl-internal-delay-ns = <110>; 240 status = "disabled"; 241 }; 242 243 i2c1: i2c@e6508000 { 244 #address-cells = <1>; 245 #size-cells = <0>; 246 compatible = "renesas,i2c-r8a77990", 247 "renesas,rcar-gen3-i2c"; 248 reg = <0 0xe6508000 0 0x40>; 249 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 250 clocks = <&cpg CPG_MOD 930>; 251 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 252 resets = <&cpg 930>; 253 i2c-scl-internal-delay-ns = <6>; 254 status = "disabled"; 255 }; 256 257 i2c2: i2c@e6510000 { 258 #address-cells = <1>; 259 #size-cells = <0>; 260 compatible = "renesas,i2c-r8a77990", 261 "renesas,rcar-gen3-i2c"; 262 reg = <0 0xe6510000 0 0x40>; 263 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 264 clocks = <&cpg CPG_MOD 929>; 265 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 266 resets = <&cpg 929>; 267 i2c-scl-internal-delay-ns = <6>; 268 status = "disabled"; 269 }; 270 271 i2c3: i2c@e66d0000 { 272 #address-cells = <1>; 273 #size-cells = <0>; 274 compatible = "renesas,i2c-r8a77990", 275 "renesas,rcar-gen3-i2c"; 276 reg = <0 0xe66d0000 0 0x40>; 277 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 278 clocks = <&cpg CPG_MOD 928>; 279 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 280 resets = <&cpg 928>; 281 i2c-scl-internal-delay-ns = <110>; 282 status = "disabled"; 283 }; 284 285 i2c4: i2c@e66d8000 { 286 #address-cells = <1>; 287 #size-cells = <0>; 288 compatible = "renesas,i2c-r8a77990", 289 "renesas,rcar-gen3-i2c"; 290 reg = <0 0xe66d8000 0 0x40>; 291 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 292 clocks = <&cpg CPG_MOD 927>; 293 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 294 resets = <&cpg 927>; 295 i2c-scl-internal-delay-ns = <6>; 296 status = "disabled"; 297 }; 298 299 i2c5: i2c@e66e0000 { 300 #address-cells = <1>; 301 #size-cells = <0>; 302 compatible = "renesas,i2c-r8a77990", 303 "renesas,rcar-gen3-i2c"; 304 reg = <0 0xe66e0000 0 0x40>; 305 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 306 clocks = <&cpg CPG_MOD 919>; 307 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 308 resets = <&cpg 919>; 309 i2c-scl-internal-delay-ns = <6>; 310 status = "disabled"; 311 }; 312 313 i2c6: i2c@e66e8000 { 314 #address-cells = <1>; 315 #size-cells = <0>; 316 compatible = "renesas,i2c-r8a77990", 317 "renesas,rcar-gen3-i2c"; 318 reg = <0 0xe66e8000 0 0x40>; 319 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 320 clocks = <&cpg CPG_MOD 918>; 321 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 322 resets = <&cpg 918>; 323 i2c-scl-internal-delay-ns = <6>; 324 status = "disabled"; 325 }; 326 327 i2c7: i2c@e6690000 { 328 #address-cells = <1>; 329 #size-cells = <0>; 330 compatible = "renesas,i2c-r8a77990", 331 "renesas,rcar-gen3-i2c"; 332 reg = <0 0xe6690000 0 0x40>; 333 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 334 clocks = <&cpg CPG_MOD 1003>; 335 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 336 resets = <&cpg 1003>; 337 i2c-scl-internal-delay-ns = <6>; 338 status = "disabled"; 339 }; 340 341 pfc: pin-controller@e6060000 { 342 compatible = "renesas,pfc-r8a77990"; 343 reg = <0 0xe6060000 0 0x508>; 344 }; 345 346 cpg: clock-controller@e6150000 { 347 compatible = "renesas,r8a77990-cpg-mssr"; 348 reg = <0 0xe6150000 0 0x1000>; 349 clocks = <&extal_clk>; 350 clock-names = "extal"; 351 #clock-cells = <2>; 352 #power-domain-cells = <0>; 353 #reset-cells = <1>; 354 }; 355 356 rst: reset-controller@e6160000 { 357 compatible = "renesas,r8a77990-rst"; 358 reg = <0 0xe6160000 0 0x0200>; 359 }; 360 361 sysc: system-controller@e6180000 { 362 compatible = "renesas,r8a77990-sysc"; 363 reg = <0 0xe6180000 0 0x0400>; 364 #power-domain-cells = <1>; 365 }; 366 367 intc_ex: interrupt-controller@e61c0000 { 368 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; 369 #interrupt-cells = <2>; 370 interrupt-controller; 371 reg = <0 0xe61c0000 0 0x200>; 372 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 373 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 374 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 375 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 376 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 377 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 378 clocks = <&cpg CPG_MOD 407>; 379 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 380 resets = <&cpg 407>; 381 }; 382 383 hsusb: usb@e6590000 { 384 compatible = "renesas,usbhs-r8a77990", 385 "renesas,rcar-gen3-usbhs"; 386 reg = <0 0xe6590000 0 0x200>; 387 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 388 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 389 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 390 <&usb_dmac1 0>, <&usb_dmac1 1>; 391 dma-names = "ch0", "ch1", "ch2", "ch3"; 392 renesas,buswait = <11>; 393 phys = <&usb2_phy0>; 394 phy-names = "usb"; 395 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 396 resets = <&cpg 704>, <&cpg 703>; 397 status = "disabled"; 398 }; 399 400 usb_dmac0: dma-controller@e65a0000 { 401 compatible = "renesas,r8a77990-usb-dmac", 402 "renesas,usb-dmac"; 403 reg = <0 0xe65a0000 0 0x100>; 404 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 405 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 406 interrupt-names = "ch0", "ch1"; 407 clocks = <&cpg CPG_MOD 330>; 408 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 409 resets = <&cpg 330>; 410 #dma-cells = <1>; 411 dma-channels = <2>; 412 }; 413 414 usb_dmac1: dma-controller@e65b0000 { 415 compatible = "renesas,r8a77990-usb-dmac", 416 "renesas,usb-dmac"; 417 reg = <0 0xe65b0000 0 0x100>; 418 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 419 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 420 interrupt-names = "ch0", "ch1"; 421 clocks = <&cpg CPG_MOD 331>; 422 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 423 resets = <&cpg 331>; 424 #dma-cells = <1>; 425 dma-channels = <2>; 426 }; 427 428 dmac0: dma-controller@e6700000 { 429 compatible = "renesas,dmac-r8a77990", 430 "renesas,rcar-dmac"; 431 reg = <0 0xe6700000 0 0x10000>; 432 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 433 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 434 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 435 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 436 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 437 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 438 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 439 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 440 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 441 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 442 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 443 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 444 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 445 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 446 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 447 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 448 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 449 interrupt-names = "error", 450 "ch0", "ch1", "ch2", "ch3", 451 "ch4", "ch5", "ch6", "ch7", 452 "ch8", "ch9", "ch10", "ch11", 453 "ch12", "ch13", "ch14", "ch15"; 454 clocks = <&cpg CPG_MOD 219>; 455 clock-names = "fck"; 456 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 457 resets = <&cpg 219>; 458 #dma-cells = <1>; 459 dma-channels = <16>; 460 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 461 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 462 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 463 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 464 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 465 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 466 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 467 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 468 }; 469 470 dmac1: dma-controller@e7300000 { 471 compatible = "renesas,dmac-r8a77990", 472 "renesas,rcar-dmac"; 473 reg = <0 0xe7300000 0 0x10000>; 474 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 475 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 476 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 477 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 478 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 479 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 480 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 481 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 482 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 483 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 484 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 485 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 486 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 487 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 488 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 489 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 490 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 491 interrupt-names = "error", 492 "ch0", "ch1", "ch2", "ch3", 493 "ch4", "ch5", "ch6", "ch7", 494 "ch8", "ch9", "ch10", "ch11", 495 "ch12", "ch13", "ch14", "ch15"; 496 clocks = <&cpg CPG_MOD 218>; 497 clock-names = "fck"; 498 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 499 resets = <&cpg 218>; 500 #dma-cells = <1>; 501 dma-channels = <16>; 502 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 503 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 504 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 505 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 506 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 507 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 508 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 509 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 510 }; 511 512 dmac2: dma-controller@e7310000 { 513 compatible = "renesas,dmac-r8a77990", 514 "renesas,rcar-dmac"; 515 reg = <0 0xe7310000 0 0x10000>; 516 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 517 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 518 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 519 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 520 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 521 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 522 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 523 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 524 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 525 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 526 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 527 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 528 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 529 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 530 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 531 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 532 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 533 interrupt-names = "error", 534 "ch0", "ch1", "ch2", "ch3", 535 "ch4", "ch5", "ch6", "ch7", 536 "ch8", "ch9", "ch10", "ch11", 537 "ch12", "ch13", "ch14", "ch15"; 538 clocks = <&cpg CPG_MOD 217>; 539 clock-names = "fck"; 540 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 541 resets = <&cpg 217>; 542 #dma-cells = <1>; 543 dma-channels = <16>; 544 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 545 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 546 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 547 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 548 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 549 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 550 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 551 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 552 }; 553 554 ipmmu_ds0: mmu@e6740000 { 555 compatible = "renesas,ipmmu-r8a77990"; 556 reg = <0 0xe6740000 0 0x1000>; 557 renesas,ipmmu-main = <&ipmmu_mm 0>; 558 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 559 #iommu-cells = <1>; 560 }; 561 562 ipmmu_ds1: mmu@e7740000 { 563 compatible = "renesas,ipmmu-r8a77990"; 564 reg = <0 0xe7740000 0 0x1000>; 565 renesas,ipmmu-main = <&ipmmu_mm 1>; 566 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 567 #iommu-cells = <1>; 568 }; 569 570 ipmmu_hc: mmu@e6570000 { 571 compatible = "renesas,ipmmu-r8a77990"; 572 reg = <0 0xe6570000 0 0x1000>; 573 renesas,ipmmu-main = <&ipmmu_mm 2>; 574 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 575 #iommu-cells = <1>; 576 }; 577 578 ipmmu_mm: mmu@e67b0000 { 579 compatible = "renesas,ipmmu-r8a77990"; 580 reg = <0 0xe67b0000 0 0x1000>; 581 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 582 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 583 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 584 #iommu-cells = <1>; 585 }; 586 587 ipmmu_mp: mmu@ec670000 { 588 compatible = "renesas,ipmmu-r8a77990"; 589 reg = <0 0xec670000 0 0x1000>; 590 renesas,ipmmu-main = <&ipmmu_mm 4>; 591 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 592 #iommu-cells = <1>; 593 }; 594 595 ipmmu_pv0: mmu@fd800000 { 596 compatible = "renesas,ipmmu-r8a77990"; 597 reg = <0 0xfd800000 0 0x1000>; 598 renesas,ipmmu-main = <&ipmmu_mm 6>; 599 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 600 #iommu-cells = <1>; 601 }; 602 603 ipmmu_rt: mmu@ffc80000 { 604 compatible = "renesas,ipmmu-r8a77990"; 605 reg = <0 0xffc80000 0 0x1000>; 606 renesas,ipmmu-main = <&ipmmu_mm 10>; 607 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 608 #iommu-cells = <1>; 609 }; 610 611 ipmmu_vc0: mmu@fe6b0000 { 612 compatible = "renesas,ipmmu-r8a77990"; 613 reg = <0 0xfe6b0000 0 0x1000>; 614 renesas,ipmmu-main = <&ipmmu_mm 12>; 615 power-domains = <&sysc R8A77990_PD_A3VC>; 616 #iommu-cells = <1>; 617 }; 618 619 ipmmu_vi0: mmu@febd0000 { 620 compatible = "renesas,ipmmu-r8a77990"; 621 reg = <0 0xfebd0000 0 0x1000>; 622 renesas,ipmmu-main = <&ipmmu_mm 14>; 623 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 624 #iommu-cells = <1>; 625 }; 626 627 ipmmu_vp0: mmu@fe990000 { 628 compatible = "renesas,ipmmu-r8a77990"; 629 reg = <0 0xfe990000 0 0x1000>; 630 renesas,ipmmu-main = <&ipmmu_mm 16>; 631 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 632 #iommu-cells = <1>; 633 }; 634 635 avb: ethernet@e6800000 { 636 compatible = "renesas,etheravb-r8a77990", 637 "renesas,etheravb-rcar-gen3"; 638 reg = <0 0xe6800000 0 0x800>; 639 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 640 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 641 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 642 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 643 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 644 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 645 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 646 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 647 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 648 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 649 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 650 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 651 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 652 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 653 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 654 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 655 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 656 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 657 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 658 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 659 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 660 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 661 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 662 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 663 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 664 interrupt-names = "ch0", "ch1", "ch2", "ch3", 665 "ch4", "ch5", "ch6", "ch7", 666 "ch8", "ch9", "ch10", "ch11", 667 "ch12", "ch13", "ch14", "ch15", 668 "ch16", "ch17", "ch18", "ch19", 669 "ch20", "ch21", "ch22", "ch23", 670 "ch24"; 671 clocks = <&cpg CPG_MOD 812>; 672 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 673 resets = <&cpg 812>; 674 phy-mode = "rgmii"; 675 iommus = <&ipmmu_ds0 16>; 676 #address-cells = <1>; 677 #size-cells = <0>; 678 status = "disabled"; 679 }; 680 681 pwm0: pwm@e6e30000 { 682 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 683 reg = <0 0xe6e30000 0 0x8>; 684 clocks = <&cpg CPG_MOD 523>; 685 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 686 resets = <&cpg 523>; 687 #pwm-cells = <2>; 688 status = "disabled"; 689 }; 690 691 pwm1: pwm@e6e31000 { 692 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 693 reg = <0 0xe6e31000 0 0x8>; 694 clocks = <&cpg CPG_MOD 523>; 695 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 696 resets = <&cpg 523>; 697 #pwm-cells = <2>; 698 status = "disabled"; 699 }; 700 701 pwm2: pwm@e6e32000 { 702 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 703 reg = <0 0xe6e32000 0 0x8>; 704 clocks = <&cpg CPG_MOD 523>; 705 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 706 resets = <&cpg 523>; 707 #pwm-cells = <2>; 708 status = "disabled"; 709 }; 710 711 pwm3: pwm@e6e33000 { 712 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 713 reg = <0 0xe6e33000 0 0x8>; 714 clocks = <&cpg CPG_MOD 523>; 715 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 716 resets = <&cpg 523>; 717 #pwm-cells = <2>; 718 status = "disabled"; 719 }; 720 721 pwm4: pwm@e6e34000 { 722 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 723 reg = <0 0xe6e34000 0 0x8>; 724 clocks = <&cpg CPG_MOD 523>; 725 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 726 resets = <&cpg 523>; 727 #pwm-cells = <2>; 728 status = "disabled"; 729 }; 730 731 pwm5: pwm@e6e35000 { 732 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 733 reg = <0 0xe6e35000 0 0x8>; 734 clocks = <&cpg CPG_MOD 523>; 735 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 736 resets = <&cpg 523>; 737 #pwm-cells = <2>; 738 status = "disabled"; 739 }; 740 741 pwm6: pwm@e6e36000 { 742 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 743 reg = <0 0xe6e36000 0 0x8>; 744 clocks = <&cpg CPG_MOD 523>; 745 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 746 resets = <&cpg 523>; 747 #pwm-cells = <2>; 748 status = "disabled"; 749 }; 750 751 scif0: serial@e6e60000 { 752 compatible = "renesas,scif-r8a77990", 753 "renesas,rcar-gen3-scif", "renesas,scif"; 754 reg = <0 0xe6e60000 0 64>; 755 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 756 clocks = <&cpg CPG_MOD 207>, 757 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 758 <&scif_clk>; 759 clock-names = "fck", "brg_int", "scif_clk"; 760 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 761 <&dmac2 0x51>, <&dmac2 0x50>; 762 dma-names = "tx", "rx", "tx", "rx"; 763 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 764 resets = <&cpg 207>; 765 status = "disabled"; 766 }; 767 768 scif1: serial@e6e68000 { 769 compatible = "renesas,scif-r8a77990", 770 "renesas,rcar-gen3-scif", "renesas,scif"; 771 reg = <0 0xe6e68000 0 64>; 772 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 773 clocks = <&cpg CPG_MOD 206>, 774 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 775 <&scif_clk>; 776 clock-names = "fck", "brg_int", "scif_clk"; 777 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 778 <&dmac2 0x53>, <&dmac2 0x52>; 779 dma-names = "tx", "rx", "tx", "rx"; 780 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 781 resets = <&cpg 206>; 782 status = "disabled"; 783 }; 784 785 scif2: serial@e6e88000 { 786 compatible = "renesas,scif-r8a77990", 787 "renesas,rcar-gen3-scif", "renesas,scif"; 788 reg = <0 0xe6e88000 0 64>; 789 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 790 clocks = <&cpg CPG_MOD 310>, 791 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 792 <&scif_clk>; 793 clock-names = "fck", "brg_int", "scif_clk"; 794 795 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 796 resets = <&cpg 310>; 797 status = "disabled"; 798 }; 799 800 scif3: serial@e6c50000 { 801 compatible = "renesas,scif-r8a77990", 802 "renesas,rcar-gen3-scif", "renesas,scif"; 803 reg = <0 0xe6c50000 0 64>; 804 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 805 clocks = <&cpg CPG_MOD 204>, 806 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 807 <&scif_clk>; 808 clock-names = "fck", "brg_int", "scif_clk"; 809 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 810 dma-names = "tx", "rx"; 811 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 812 resets = <&cpg 204>; 813 status = "disabled"; 814 }; 815 816 scif4: serial@e6c40000 { 817 compatible = "renesas,scif-r8a77990", 818 "renesas,rcar-gen3-scif", "renesas,scif"; 819 reg = <0 0xe6c40000 0 64>; 820 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 821 clocks = <&cpg CPG_MOD 203>, 822 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 823 <&scif_clk>; 824 clock-names = "fck", "brg_int", "scif_clk"; 825 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 826 dma-names = "tx", "rx"; 827 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 828 resets = <&cpg 203>; 829 status = "disabled"; 830 }; 831 832 scif5: serial@e6f30000 { 833 compatible = "renesas,scif-r8a77990", 834 "renesas,rcar-gen3-scif", "renesas,scif"; 835 reg = <0 0xe6f30000 0 64>; 836 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 837 clocks = <&cpg CPG_MOD 202>, 838 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 839 <&scif_clk>; 840 clock-names = "fck", "brg_int", "scif_clk"; 841 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 842 <&dmac2 0x5b>, <&dmac2 0x5a>; 843 dma-names = "tx", "rx", "tx", "rx"; 844 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 845 resets = <&cpg 202>; 846 status = "disabled"; 847 }; 848 849 msiof0: spi@e6e90000 { 850 compatible = "renesas,msiof-r8a77990", 851 "renesas,rcar-gen3-msiof"; 852 reg = <0 0xe6e90000 0 0x0064>; 853 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 854 clocks = <&cpg CPG_MOD 211>; 855 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 856 <&dmac2 0x41>, <&dmac2 0x40>; 857 dma-names = "tx", "rx", "tx", "rx"; 858 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 859 resets = <&cpg 211>; 860 #address-cells = <1>; 861 #size-cells = <0>; 862 status = "disabled"; 863 }; 864 865 msiof1: spi@e6ea0000 { 866 compatible = "renesas,msiof-r8a77990", 867 "renesas,rcar-gen3-msiof"; 868 reg = <0 0xe6ea0000 0 0x0064>; 869 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 870 clocks = <&cpg CPG_MOD 210>; 871 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 872 <&dmac2 0x43>, <&dmac2 0x42>; 873 dma-names = "tx", "rx", "tx", "rx"; 874 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 875 resets = <&cpg 210>; 876 #address-cells = <1>; 877 #size-cells = <0>; 878 status = "disabled"; 879 }; 880 881 msiof2: spi@e6c00000 { 882 compatible = "renesas,msiof-r8a77990", 883 "renesas,rcar-gen3-msiof"; 884 reg = <0 0xe6c00000 0 0x0064>; 885 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 886 clocks = <&cpg CPG_MOD 209>; 887 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 888 dma-names = "tx", "rx"; 889 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 890 resets = <&cpg 209>; 891 #address-cells = <1>; 892 #size-cells = <0>; 893 status = "disabled"; 894 }; 895 896 msiof3: spi@e6c10000 { 897 compatible = "renesas,msiof-r8a77990", 898 "renesas,rcar-gen3-msiof"; 899 reg = <0 0xe6c10000 0 0x0064>; 900 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 901 clocks = <&cpg CPG_MOD 208>; 902 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 903 dma-names = "tx", "rx"; 904 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 905 resets = <&cpg 208>; 906 #address-cells = <1>; 907 #size-cells = <0>; 908 status = "disabled"; 909 }; 910 911 vin4: video@e6ef4000 { 912 compatible = "renesas,vin-r8a77990"; 913 reg = <0 0xe6ef4000 0 0x1000>; 914 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 915 clocks = <&cpg CPG_MOD 807>; 916 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 917 resets = <&cpg 807>; 918 renesas,id = <4>; 919 status = "disabled"; 920 921 ports { 922 #address-cells = <1>; 923 #size-cells = <0>; 924 925 port@1 { 926 reg = <1>; 927 928 vin4csi40: endpoint { 929 remote-endpoint= <&csi40vin4>; 930 }; 931 }; 932 }; 933 }; 934 935 vin5: video@e6ef5000 { 936 compatible = "renesas,vin-r8a77990"; 937 reg = <0 0xe6ef5000 0 0x1000>; 938 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 939 clocks = <&cpg CPG_MOD 806>; 940 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 941 resets = <&cpg 806>; 942 renesas,id = <5>; 943 status = "disabled"; 944 945 ports { 946 #address-cells = <1>; 947 #size-cells = <0>; 948 949 port@1 { 950 reg = <1>; 951 952 vin5csi40: endpoint { 953 remote-endpoint= <&csi40vin5>; 954 }; 955 }; 956 }; 957 }; 958 959 rcar_sound: sound@ec500000 { 960 /* 961 * #sound-dai-cells is required 962 * 963 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 964 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 965 */ 966 /* 967 * #clock-cells is required for audio_clkout0/1/2/3 968 * 969 * clkout : #clock-cells = <0>; <&rcar_sound>; 970 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 971 */ 972 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; 973 reg = <0 0xec500000 0 0x1000>, /* SCU */ 974 <0 0xec5a0000 0 0x100>, /* ADG */ 975 <0 0xec540000 0 0x1000>, /* SSIU */ 976 <0 0xec541000 0 0x280>, /* SSI */ 977 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 978 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 979 980 clocks = <&cpg CPG_MOD 1005>, 981 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 982 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 983 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 984 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 985 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 986 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 987 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 988 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 989 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 990 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 991 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 992 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 993 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 994 <&audio_clk_a>, <&audio_clk_b>, 995 <&audio_clk_c>, 996 <&cpg CPG_CORE R8A77990_CLK_ZA2>; 997 clock-names = "ssi-all", 998 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 999 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1000 "ssi.1", "ssi.0", 1001 "src.9", "src.8", "src.7", "src.6", 1002 "src.5", "src.4", "src.3", "src.2", 1003 "src.1", "src.0", 1004 "mix.1", "mix.0", 1005 "ctu.1", "ctu.0", 1006 "dvc.0", "dvc.1", 1007 "clk_a", "clk_b", "clk_c", "clk_i"; 1008 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1009 resets = <&cpg 1005>, 1010 <&cpg 1006>, <&cpg 1007>, 1011 <&cpg 1008>, <&cpg 1009>, 1012 <&cpg 1010>, <&cpg 1011>, 1013 <&cpg 1012>, <&cpg 1013>, 1014 <&cpg 1014>, <&cpg 1015>; 1015 reset-names = "ssi-all", 1016 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1017 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1018 "ssi.1", "ssi.0"; 1019 status = "disabled"; 1020 1021 rcar_sound,dvc { 1022 dvc0: dvc-0 { 1023 dmas = <&audma0 0xbc>; 1024 dma-names = "tx"; 1025 }; 1026 dvc1: dvc-1 { 1027 dmas = <&audma0 0xbe>; 1028 dma-names = "tx"; 1029 }; 1030 }; 1031 1032 rcar_sound,mix { 1033 mix0: mix-0 { }; 1034 mix1: mix-1 { }; 1035 }; 1036 1037 rcar_sound,ctu { 1038 ctu00: ctu-0 { }; 1039 ctu01: ctu-1 { }; 1040 ctu02: ctu-2 { }; 1041 ctu03: ctu-3 { }; 1042 ctu10: ctu-4 { }; 1043 ctu11: ctu-5 { }; 1044 ctu12: ctu-6 { }; 1045 ctu13: ctu-7 { }; 1046 }; 1047 1048 rcar_sound,src { 1049 src0: src-0 { 1050 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1051 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1052 dma-names = "rx", "tx"; 1053 }; 1054 src1: src-1 { 1055 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1056 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1057 dma-names = "rx", "tx"; 1058 }; 1059 src2: src-2 { 1060 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1061 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1062 dma-names = "rx", "tx"; 1063 }; 1064 src3: src-3 { 1065 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1066 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1067 dma-names = "rx", "tx"; 1068 }; 1069 src4: src-4 { 1070 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1071 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1072 dma-names = "rx", "tx"; 1073 }; 1074 src5: src-5 { 1075 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1076 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1077 dma-names = "rx", "tx"; 1078 }; 1079 src6: src-6 { 1080 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1081 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1082 dma-names = "rx", "tx"; 1083 }; 1084 src7: src-7 { 1085 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1086 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1087 dma-names = "rx", "tx"; 1088 }; 1089 src8: src-8 { 1090 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1091 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1092 dma-names = "rx", "tx"; 1093 }; 1094 src9: src-9 { 1095 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1096 dmas = <&audma0 0x97>, <&audma0 0xba>; 1097 dma-names = "rx", "tx"; 1098 }; 1099 }; 1100 1101 rcar_sound,ssi { 1102 ssi0: ssi-0 { 1103 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1104 dmas = <&audma0 0x01>, <&audma0 0x02>, 1105 <&audma0 0x15>, <&audma0 0x16>; 1106 dma-names = "rx", "tx", "rxu", "txu"; 1107 }; 1108 ssi1: ssi-1 { 1109 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1110 dmas = <&audma0 0x03>, <&audma0 0x04>, 1111 <&audma0 0x49>, <&audma0 0x4a>; 1112 dma-names = "rx", "tx", "rxu", "txu"; 1113 }; 1114 ssi2: ssi-2 { 1115 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1116 dmas = <&audma0 0x05>, <&audma0 0x06>, 1117 <&audma0 0x63>, <&audma0 0x64>; 1118 dma-names = "rx", "tx", "rxu", "txu"; 1119 }; 1120 ssi3: ssi-3 { 1121 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1122 dmas = <&audma0 0x07>, <&audma0 0x08>, 1123 <&audma0 0x6f>, <&audma0 0x70>; 1124 dma-names = "rx", "tx", "rxu", "txu"; 1125 }; 1126 ssi4: ssi-4 { 1127 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1128 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1129 <&audma0 0x71>, <&audma0 0x72>; 1130 dma-names = "rx", "tx", "rxu", "txu"; 1131 }; 1132 ssi5: ssi-5 { 1133 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1134 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1135 <&audma0 0x73>, <&audma0 0x74>; 1136 dma-names = "rx", "tx", "rxu", "txu"; 1137 }; 1138 ssi6: ssi-6 { 1139 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1140 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1141 <&audma0 0x75>, <&audma0 0x76>; 1142 dma-names = "rx", "tx", "rxu", "txu"; 1143 }; 1144 ssi7: ssi-7 { 1145 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1146 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1147 <&audma0 0x79>, <&audma0 0x7a>; 1148 dma-names = "rx", "tx", "rxu", "txu"; 1149 }; 1150 ssi8: ssi-8 { 1151 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1152 dmas = <&audma0 0x11>, <&audma0 0x12>, 1153 <&audma0 0x7b>, <&audma0 0x7c>; 1154 dma-names = "rx", "tx", "rxu", "txu"; 1155 }; 1156 ssi9: ssi-9 { 1157 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1158 dmas = <&audma0 0x13>, <&audma0 0x14>, 1159 <&audma0 0x7d>, <&audma0 0x7e>; 1160 dma-names = "rx", "tx", "rxu", "txu"; 1161 }; 1162 }; 1163 }; 1164 1165 audma0: dma-controller@ec700000 { 1166 compatible = "renesas,dmac-r8a77990", 1167 "renesas,rcar-dmac"; 1168 reg = <0 0xec700000 0 0x10000>; 1169 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1170 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1171 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1172 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1173 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1174 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1175 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1176 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1177 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1178 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1179 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1180 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1181 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1182 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 1183 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1184 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1185 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1186 interrupt-names = "error", 1187 "ch0", "ch1", "ch2", "ch3", 1188 "ch4", "ch5", "ch6", "ch7", 1189 "ch8", "ch9", "ch10", "ch11", 1190 "ch12", "ch13", "ch14", "ch15"; 1191 clocks = <&cpg CPG_MOD 502>; 1192 clock-names = "fck"; 1193 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1194 resets = <&cpg 502>; 1195 #dma-cells = <1>; 1196 dma-channels = <16>; 1197 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1198 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1199 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1200 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1201 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1202 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1203 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1204 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1205 }; 1206 1207 xhci0: usb@ee000000 { 1208 compatible = "renesas,xhci-r8a77990", 1209 "renesas,rcar-gen3-xhci"; 1210 reg = <0 0xee000000 0 0xc00>; 1211 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1212 clocks = <&cpg CPG_MOD 328>; 1213 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1214 resets = <&cpg 328>; 1215 status = "disabled"; 1216 }; 1217 1218 usb3_peri0: usb@ee020000 { 1219 compatible = "renesas,r8a77990-usb3-peri", 1220 "renesas,rcar-gen3-usb3-peri"; 1221 reg = <0 0xee020000 0 0x400>; 1222 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1223 clocks = <&cpg CPG_MOD 328>; 1224 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1225 resets = <&cpg 328>; 1226 status = "disabled"; 1227 }; 1228 1229 ohci0: usb@ee080000 { 1230 compatible = "generic-ohci"; 1231 reg = <0 0xee080000 0 0x100>; 1232 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1233 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1234 phys = <&usb2_phy0>; 1235 phy-names = "usb"; 1236 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1237 resets = <&cpg 703>, <&cpg 704>; 1238 status = "disabled"; 1239 }; 1240 1241 ehci0: usb@ee080100 { 1242 compatible = "generic-ehci"; 1243 reg = <0 0xee080100 0 0x100>; 1244 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1245 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1246 phys = <&usb2_phy0>; 1247 phy-names = "usb"; 1248 companion = <&ohci0>; 1249 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1250 resets = <&cpg 703>, <&cpg 704>; 1251 status = "disabled"; 1252 }; 1253 1254 usb2_phy0: usb-phy@ee080200 { 1255 compatible = "renesas,usb2-phy-r8a77990", 1256 "renesas,rcar-gen3-usb2-phy"; 1257 reg = <0 0xee080200 0 0x700>; 1258 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1259 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1260 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1261 resets = <&cpg 703>, <&cpg 704>; 1262 #phy-cells = <0>; 1263 status = "disabled"; 1264 }; 1265 1266 gic: interrupt-controller@f1010000 { 1267 compatible = "arm,gic-400"; 1268 #interrupt-cells = <3>; 1269 #address-cells = <0>; 1270 interrupt-controller; 1271 reg = <0x0 0xf1010000 0 0x1000>, 1272 <0x0 0xf1020000 0 0x20000>, 1273 <0x0 0xf1040000 0 0x20000>, 1274 <0x0 0xf1060000 0 0x20000>; 1275 interrupts = <GIC_PPI 9 1276 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1277 clocks = <&cpg CPG_MOD 408>; 1278 clock-names = "clk"; 1279 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1280 resets = <&cpg 408>; 1281 }; 1282 1283 vspb0: vsp@fe960000 { 1284 compatible = "renesas,vsp2"; 1285 reg = <0 0xfe960000 0 0x8000>; 1286 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1287 clocks = <&cpg CPG_MOD 626>; 1288 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1289 resets = <&cpg 626>; 1290 renesas,fcp = <&fcpvb0>; 1291 }; 1292 1293 fcpvb0: fcp@fe96f000 { 1294 compatible = "renesas,fcpv"; 1295 reg = <0 0xfe96f000 0 0x200>; 1296 clocks = <&cpg CPG_MOD 607>; 1297 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1298 resets = <&cpg 607>; 1299 iommus = <&ipmmu_vp0 5>; 1300 }; 1301 1302 vspi0: vsp@fe9a0000 { 1303 compatible = "renesas,vsp2"; 1304 reg = <0 0xfe9a0000 0 0x8000>; 1305 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1306 clocks = <&cpg CPG_MOD 631>; 1307 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1308 resets = <&cpg 631>; 1309 renesas,fcp = <&fcpvi0>; 1310 }; 1311 1312 fcpvi0: fcp@fe9af000 { 1313 compatible = "renesas,fcpv"; 1314 reg = <0 0xfe9af000 0 0x200>; 1315 clocks = <&cpg CPG_MOD 611>; 1316 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1317 resets = <&cpg 611>; 1318 iommus = <&ipmmu_vp0 8>; 1319 }; 1320 1321 vspd0: vsp@fea20000 { 1322 compatible = "renesas,vsp2"; 1323 reg = <0 0xfea20000 0 0x7000>; 1324 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1325 clocks = <&cpg CPG_MOD 623>; 1326 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1327 resets = <&cpg 623>; 1328 renesas,fcp = <&fcpvd0>; 1329 }; 1330 1331 fcpvd0: fcp@fea27000 { 1332 compatible = "renesas,fcpv"; 1333 reg = <0 0xfea27000 0 0x200>; 1334 clocks = <&cpg CPG_MOD 603>; 1335 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1336 resets = <&cpg 603>; 1337 iommus = <&ipmmu_vi0 8>; 1338 }; 1339 1340 vspd1: vsp@fea28000 { 1341 compatible = "renesas,vsp2"; 1342 reg = <0 0xfea28000 0 0x7000>; 1343 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1344 clocks = <&cpg CPG_MOD 622>; 1345 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1346 resets = <&cpg 622>; 1347 renesas,fcp = <&fcpvd1>; 1348 }; 1349 1350 fcpvd1: fcp@fea2f000 { 1351 compatible = "renesas,fcpv"; 1352 reg = <0 0xfea2f000 0 0x200>; 1353 clocks = <&cpg CPG_MOD 602>; 1354 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1355 resets = <&cpg 602>; 1356 iommus = <&ipmmu_vi0 9>; 1357 }; 1358 1359 csi40: csi2@feaa0000 { 1360 compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; 1361 reg = <0 0xfeaa0000 0 0x10000>; 1362 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1363 clocks = <&cpg CPG_MOD 716>; 1364 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1365 resets = <&cpg 716>; 1366 status = "disabled"; 1367 1368 ports { 1369 #address-cells = <1>; 1370 #size-cells = <0>; 1371 1372 port@1 { 1373 #address-cells = <1>; 1374 #size-cells = <0>; 1375 1376 reg = <1>; 1377 1378 csi40vin4: endpoint@0 { 1379 reg = <0>; 1380 remote-endpoint = <&vin4csi40>; 1381 }; 1382 csi40vin5: endpoint@1 { 1383 reg = <1>; 1384 remote-endpoint = <&vin5csi40>; 1385 }; 1386 }; 1387 }; 1388 }; 1389 1390 du: display@feb00000 { 1391 compatible = "renesas,du-r8a77990"; 1392 reg = <0 0xfeb00000 0 0x80000>; 1393 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1394 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1395 clocks = <&cpg CPG_MOD 724>, 1396 <&cpg CPG_MOD 723>; 1397 clock-names = "du.0", "du.1"; 1398 vsps = <&vspd0 0 &vspd1 0>; 1399 status = "disabled"; 1400 1401 ports { 1402 #address-cells = <1>; 1403 #size-cells = <0>; 1404 1405 port@0 { 1406 reg = <0>; 1407 du_out_rgb: endpoint { 1408 }; 1409 }; 1410 1411 port@1 { 1412 reg = <1>; 1413 du_out_lvds0: endpoint { 1414 remote-endpoint = <&lvds0_in>; 1415 }; 1416 }; 1417 1418 port@2 { 1419 reg = <2>; 1420 du_out_lvds1: endpoint { 1421 remote-endpoint = <&lvds1_in>; 1422 }; 1423 }; 1424 }; 1425 }; 1426 1427 lvds0: lvds-encoder@feb90000 { 1428 compatible = "renesas,r8a77990-lvds"; 1429 reg = <0 0xfeb90000 0 0x20>; 1430 clocks = <&cpg CPG_MOD 727>; 1431 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1432 resets = <&cpg 727>; 1433 status = "disabled"; 1434 1435 ports { 1436 #address-cells = <1>; 1437 #size-cells = <0>; 1438 1439 port@0 { 1440 reg = <0>; 1441 lvds0_in: endpoint { 1442 remote-endpoint = <&du_out_lvds0>; 1443 }; 1444 }; 1445 1446 port@1 { 1447 reg = <1>; 1448 lvds0_out: endpoint { 1449 }; 1450 }; 1451 }; 1452 }; 1453 1454 lvds1: lvds-encoder@feb90100 { 1455 compatible = "renesas,r8a77990-lvds"; 1456 reg = <0 0xfeb90100 0 0x20>; 1457 clocks = <&cpg CPG_MOD 727>; 1458 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1459 resets = <&cpg 726>; 1460 status = "disabled"; 1461 1462 ports { 1463 #address-cells = <1>; 1464 #size-cells = <0>; 1465 1466 port@0 { 1467 reg = <0>; 1468 lvds1_in: endpoint { 1469 remote-endpoint = <&du_out_lvds1>; 1470 }; 1471 }; 1472 1473 port@1 { 1474 reg = <1>; 1475 lvds1_out: endpoint { 1476 }; 1477 }; 1478 }; 1479 }; 1480 1481 prr: chipid@fff00044 { 1482 compatible = "renesas,prr"; 1483 reg = <0 0xfff00044 0 4>; 1484 }; 1485 }; 1486 1487 timer { 1488 compatible = "arm,armv8-timer"; 1489 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1490 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1491 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1492 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1493 }; 1494}; 1495