1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the V3M Starter Kit board
4 *
5 * Copyright (C) 2017 Renesas Electronics Corp.
6 * Copyright (C) 2017 Cogent Embedded, Inc.
7 */
8
9/dts-v1/;
10#include "r8a77970.dtsi"
11
12/ {
13	model = "Renesas V3M Starter Kit board";
14	compatible = "renesas,v3msk", "renesas,r8a77970";
15
16	aliases {
17		serial0 = &scif0;
18	};
19
20	chosen {
21		stdout-path = "serial0:115200n8";
22	};
23
24	hdmi-out {
25		compatible = "hdmi-connector";
26		type = "a";
27
28		port {
29			hdmi_con: endpoint {
30				remote-endpoint = <&adv7511_out>;
31			};
32		};
33	};
34
35	lvds-decoder {
36		compatible = "thine,thc63lvd1024";
37		vcc-supply = <&vcc_d3_3v>;
38
39		ports {
40			#address-cells = <1>;
41			#size-cells = <0>;
42
43			port@0 {
44				reg = <0>;
45				thc63lvd1024_in: endpoint {
46					remote-endpoint = <&lvds0_out>;
47				};
48			};
49
50			port@2 {
51				reg = <2>;
52				thc63lvd1024_out: endpoint {
53					remote-endpoint = <&adv7511_in>;
54				};
55			};
56		};
57	};
58
59	memory@48000000 {
60		device_type = "memory";
61		/* first 128MB is reserved for secure area. */
62		reg = <0x0 0x48000000 0x0 0x78000000>;
63	};
64
65	osc5_clk: osc5-clock {
66		compatible = "fixed-clock";
67		#clock-cells = <0>;
68		clock-frequency = <148500000>;
69	};
70
71	vcc_d1_8v: regulator-0 {
72		compatible = "regulator-fixed";
73		regulator-name = "VCC_D1.8V";
74		regulator-min-microvolt = <1800000>;
75		regulator-max-microvolt = <1800000>;
76		regulator-boot-on;
77		regulator-always-on;
78	};
79
80	vcc_d3_3v: regulator-1 {
81		compatible = "regulator-fixed";
82		regulator-name = "VCC_D3.3V";
83		regulator-min-microvolt = <3300000>;
84		regulator-max-microvolt = <3300000>;
85		regulator-boot-on;
86		regulator-always-on;
87	};
88
89	vcc_vddq_vin0: regulator-2 {
90		compatible = "regulator-fixed";
91		regulator-name = "VCC_VDDQ_VIN0";
92		regulator-min-microvolt = <3300000>;
93		regulator-max-microvolt = <3300000>;
94		regulator-boot-on;
95		regulator-always-on;
96	};
97};
98
99&avb {
100	pinctrl-0 = <&avb_pins>;
101	pinctrl-names = "default";
102
103	renesas,no-ether-link;
104	phy-handle = <&phy0>;
105	rx-internal-delay-ps = <1800>;
106	tx-internal-delay-ps = <2000>;
107	status = "okay";
108
109	phy0: ethernet-phy@0 {
110		compatible = "ethernet-phy-id0022.1622",
111			     "ethernet-phy-ieee802.3-c22";
112		rxc-skew-ps = <1500>;
113		reg = <0>;
114		interrupt-parent = <&gpio1>;
115		interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
116	};
117};
118
119&du {
120	clocks = <&cpg CPG_MOD 724>,
121		 <&osc5_clk>;
122	clock-names = "du.0", "dclkin.0";
123	status = "okay";
124};
125
126&extal_clk {
127	clock-frequency = <16666666>;
128};
129
130&extalr_clk {
131	clock-frequency = <32768>;
132};
133
134&i2c0 {
135	pinctrl-0 = <&i2c0_pins>;
136	pinctrl-names = "default";
137
138	status = "okay";
139	clock-frequency = <400000>;
140
141	hdmi@39{
142		compatible = "adi,adv7511w";
143		#sound-dai-cells = <0>;
144		reg = <0x39>;
145		interrupt-parent = <&gpio1>;
146		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
147		avdd-supply = <&vcc_d1_8v>;
148		dvdd-supply = <&vcc_d1_8v>;
149		pvdd-supply = <&vcc_d1_8v>;
150		bgvdd-supply = <&vcc_d1_8v>;
151		dvdd-3v-supply = <&vcc_d3_3v>;
152
153		adi,input-depth = <8>;
154		adi,input-colorspace = "rgb";
155		adi,input-clock = "1x";
156
157		ports {
158			#address-cells = <1>;
159			#size-cells = <0>;
160
161			port@0 {
162				reg = <0>;
163				adv7511_in: endpoint {
164					remote-endpoint = <&thc63lvd1024_out>;
165				};
166			};
167
168			port@1 {
169				reg = <1>;
170				adv7511_out: endpoint {
171					remote-endpoint = <&hdmi_con>;
172				};
173			};
174		};
175	};
176};
177
178&lvds0 {
179	status = "okay";
180
181	ports {
182		port@1 {
183			lvds0_out: endpoint {
184				remote-endpoint = <&thc63lvd1024_in>;
185			};
186		};
187	};
188};
189
190&mmc0 {
191	pinctrl-0 = <&mmc_pins>;
192	pinctrl-names = "default";
193
194	vmmc-supply = <&vcc_d3_3v>;
195	vqmmc-supply = <&vcc_vddq_vin0>;
196	bus-width = <8>;
197	non-removable;
198	status = "okay";
199};
200
201&pfc {
202	avb_pins: avb0 {
203		groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
204		function = "avb0";
205	};
206
207	i2c0_pins: i2c0 {
208		groups = "i2c0";
209		function = "i2c0";
210	};
211
212	mmc_pins: mmc_3_3v {
213		groups = "mmc_data8", "mmc_ctrl";
214		function = "mmc";
215		power-source = <3300>;
216	};
217
218	qspi0_pins: qspi0 {
219		groups = "qspi0_ctrl", "qspi0_data4";
220		function = "qspi0";
221	};
222
223	scif0_pins: scif0 {
224		groups = "scif0_data";
225		function = "scif0";
226	};
227};
228
229&rpc {
230	pinctrl-0 = <&qspi0_pins>;
231	pinctrl-names = "default";
232
233	status = "okay";
234
235	flash@0 {
236		compatible = "spansion,s25fs512s", "jedec,spi-nor";
237		reg = <0>;
238		spi-max-frequency = <50000000>;
239		spi-rx-bus-width = <4>;
240
241		partitions {
242			compatible = "fixed-partitions";
243			#address-cells = <1>;
244			#size-cells = <1>;
245
246			bootparam@0 {
247				reg = <0x00000000 0x040000>;
248				read-only;
249			};
250			cr7@40000 {
251				reg = <0x00040000 0x080000>;
252				read-only;
253			};
254			cert_header_sa3@c0000 {
255				reg = <0x000c0000 0x080000>;
256				read-only;
257			};
258			bl2@140000 {
259				reg = <0x00140000 0x040000>;
260				read-only;
261			};
262			cert_header_sa6@180000 {
263				reg = <0x00180000 0x040000>;
264				read-only;
265			};
266			bl31@1c0000 {
267				reg = <0x001c0000 0x460000>;
268				read-only;
269			};
270			uboot@640000 {
271				reg = <0x00640000 0x0c0000>;
272				read-only;
273			};
274			uboot-env@700000 {
275				reg = <0x00700000 0x040000>;
276				read-only;
277			};
278			dtb@740000 {
279				reg = <0x00740000 0x080000>;
280			};
281			kernel@7c0000 {
282				reg = <0x007c0000 0x1400000>;
283			};
284			user@1bc0000 {
285				reg = <0x01bc0000 0x2440000>;
286			};
287		};
288	};
289};
290
291&scif0 {
292	pinctrl-0 = <&scif0_pins>;
293	pinctrl-names = "default";
294
295	status = "okay";
296};
297