1919d31abSGeert Uytterhoeven// SPDX-License-Identifier: GPL-2.0 2919d31abSGeert Uytterhoeven/* 3*cfd7bf66SGeert Uytterhoeven * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board with R-Car M3-W 4919d31abSGeert Uytterhoeven * 5919d31abSGeert Uytterhoeven * Copyright (C) 2016 Renesas Electronics Corp. 6919d31abSGeert Uytterhoeven * Copyright (C) 2016 Cogent Embedded, Inc. 7919d31abSGeert Uytterhoeven */ 8919d31abSGeert Uytterhoeven 9919d31abSGeert Uytterhoeven/dts-v1/; 10919d31abSGeert Uytterhoeven#include "r8a77960.dtsi" 11919d31abSGeert Uytterhoeven#include "ulcb.dtsi" 12919d31abSGeert Uytterhoeven 13919d31abSGeert Uytterhoeven/ { 14919d31abSGeert Uytterhoeven model = "Renesas M3ULCB board based on r8a77960"; 15919d31abSGeert Uytterhoeven compatible = "renesas,m3ulcb", "renesas,r8a7796"; 16919d31abSGeert Uytterhoeven 17919d31abSGeert Uytterhoeven memory@48000000 { 18919d31abSGeert Uytterhoeven device_type = "memory"; 19919d31abSGeert Uytterhoeven /* first 128MB is reserved for secure area. */ 20919d31abSGeert Uytterhoeven reg = <0x0 0x48000000 0x0 0x38000000>; 21919d31abSGeert Uytterhoeven }; 22919d31abSGeert Uytterhoeven 23919d31abSGeert Uytterhoeven memory@600000000 { 24919d31abSGeert Uytterhoeven device_type = "memory"; 25919d31abSGeert Uytterhoeven reg = <0x6 0x00000000 0x0 0x40000000>; 26919d31abSGeert Uytterhoeven }; 27919d31abSGeert Uytterhoeven}; 28919d31abSGeert Uytterhoeven 29919d31abSGeert Uytterhoeven&du { 30919d31abSGeert Uytterhoeven clocks = <&cpg CPG_MOD 724>, 31919d31abSGeert Uytterhoeven <&cpg CPG_MOD 723>, 32919d31abSGeert Uytterhoeven <&cpg CPG_MOD 722>, 33919d31abSGeert Uytterhoeven <&versaclock5 1>, 34919d31abSGeert Uytterhoeven <&versaclock5 3>, 35919d31abSGeert Uytterhoeven <&versaclock5 2>; 36919d31abSGeert Uytterhoeven clock-names = "du.0", "du.1", "du.2", 37919d31abSGeert Uytterhoeven "dclkin.0", "dclkin.1", "dclkin.2"; 38919d31abSGeert Uytterhoeven}; 39