1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the RZ/G2E (R8A774C0) SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a774c0-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a774c0-sysc.h> 11 12/ { 13 compatible = "renesas,r8a774c0"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 /* 18 * The external audio clocks are configured as 0 Hz fixed frequency 19 * clocks by default. 20 * Boards that provide audio clocks should override them. 21 */ 22 audio_clk_a: audio_clk_a { 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; 25 clock-frequency = <0>; 26 }; 27 28 audio_clk_b: audio_clk_b { 29 compatible = "fixed-clock"; 30 #clock-cells = <0>; 31 clock-frequency = <0>; 32 }; 33 34 audio_clk_c: audio_clk_c { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <0>; 38 }; 39 40 /* External CAN clock - to be overridden by boards that provide it */ 41 can_clk: can { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 cluster1_opp: opp_table10 { 48 compatible = "operating-points-v2"; 49 opp-shared; 50 opp-800000000 { 51 opp-hz = /bits/ 64 <800000000>; 52 opp-microvolt = <820000>; 53 clock-latency-ns = <300000>; 54 }; 55 opp-1000000000 { 56 opp-hz = /bits/ 64 <1000000000>; 57 opp-microvolt = <820000>; 58 clock-latency-ns = <300000>; 59 }; 60 opp-1200000000 { 61 opp-hz = /bits/ 64 <1200000000>; 62 opp-microvolt = <820000>; 63 clock-latency-ns = <300000>; 64 opp-suspend; 65 }; 66 }; 67 68 cpus { 69 #address-cells = <1>; 70 #size-cells = <0>; 71 72 a53_0: cpu@0 { 73 compatible = "arm,cortex-a53", "arm,armv8"; 74 reg = <0>; 75 device_type = "cpu"; 76 power-domains = <&sysc R8A774C0_PD_CA53_CPU0>; 77 next-level-cache = <&L2_CA53>; 78 enable-method = "psci"; 79 clocks =<&cpg CPG_CORE R8A774C0_CLK_Z2>; 80 operating-points-v2 = <&cluster1_opp>; 81 }; 82 83 a53_1: cpu@1 { 84 compatible = "arm,cortex-a53", "arm,armv8"; 85 reg = <1>; 86 device_type = "cpu"; 87 power-domains = <&sysc R8A774C0_PD_CA53_CPU1>; 88 next-level-cache = <&L2_CA53>; 89 enable-method = "psci"; 90 clocks =<&cpg CPG_CORE R8A774C0_CLK_Z2>; 91 operating-points-v2 = <&cluster1_opp>; 92 }; 93 94 L2_CA53: cache-controller-0 { 95 compatible = "cache"; 96 power-domains = <&sysc R8A774C0_PD_CA53_SCU>; 97 cache-unified; 98 cache-level = <2>; 99 }; 100 }; 101 102 extal_clk: extal { 103 compatible = "fixed-clock"; 104 #clock-cells = <0>; 105 /* This value must be overridden by the board */ 106 clock-frequency = <0>; 107 }; 108 109 /* External PCIe clock - can be overridden by the board */ 110 pcie_bus_clk: pcie_bus { 111 compatible = "fixed-clock"; 112 #clock-cells = <0>; 113 clock-frequency = <0>; 114 }; 115 116 pmu_a53 { 117 compatible = "arm,cortex-a53-pmu"; 118 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 119 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 120 interrupt-affinity = <&a53_0>, <&a53_1>; 121 }; 122 123 psci { 124 compatible = "arm,psci-1.0", "arm,psci-0.2"; 125 method = "smc"; 126 }; 127 128 /* External SCIF clock - to be overridden by boards that provide it */ 129 scif_clk: scif { 130 compatible = "fixed-clock"; 131 #clock-cells = <0>; 132 clock-frequency = <0>; 133 }; 134 135 soc: soc { 136 compatible = "simple-bus"; 137 interrupt-parent = <&gic>; 138 #address-cells = <2>; 139 #size-cells = <2>; 140 ranges; 141 142 rwdt: watchdog@e6020000 { 143 compatible = "renesas,r8a774c0-wdt", 144 "renesas,rcar-gen3-wdt"; 145 reg = <0 0xe6020000 0 0x0c>; 146 clocks = <&cpg CPG_MOD 402>; 147 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 148 resets = <&cpg 402>; 149 status = "disabled"; 150 }; 151 152 gpio0: gpio@e6050000 { 153 compatible = "renesas,gpio-r8a774c0", 154 "renesas,rcar-gen3-gpio"; 155 reg = <0 0xe6050000 0 0x50>; 156 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 157 #gpio-cells = <2>; 158 gpio-controller; 159 gpio-ranges = <&pfc 0 0 18>; 160 #interrupt-cells = <2>; 161 interrupt-controller; 162 clocks = <&cpg CPG_MOD 912>; 163 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 164 resets = <&cpg 912>; 165 }; 166 167 gpio1: gpio@e6051000 { 168 compatible = "renesas,gpio-r8a774c0", 169 "renesas,rcar-gen3-gpio"; 170 reg = <0 0xe6051000 0 0x50>; 171 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 172 #gpio-cells = <2>; 173 gpio-controller; 174 gpio-ranges = <&pfc 0 32 23>; 175 #interrupt-cells = <2>; 176 interrupt-controller; 177 clocks = <&cpg CPG_MOD 911>; 178 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 179 resets = <&cpg 911>; 180 }; 181 182 gpio2: gpio@e6052000 { 183 compatible = "renesas,gpio-r8a774c0", 184 "renesas,rcar-gen3-gpio"; 185 reg = <0 0xe6052000 0 0x50>; 186 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 187 #gpio-cells = <2>; 188 gpio-controller; 189 gpio-ranges = <&pfc 0 64 26>; 190 #interrupt-cells = <2>; 191 interrupt-controller; 192 clocks = <&cpg CPG_MOD 910>; 193 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 194 resets = <&cpg 910>; 195 }; 196 197 gpio3: gpio@e6053000 { 198 compatible = "renesas,gpio-r8a774c0", 199 "renesas,rcar-gen3-gpio"; 200 reg = <0 0xe6053000 0 0x50>; 201 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 202 #gpio-cells = <2>; 203 gpio-controller; 204 gpio-ranges = <&pfc 0 96 16>; 205 #interrupt-cells = <2>; 206 interrupt-controller; 207 clocks = <&cpg CPG_MOD 909>; 208 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 209 resets = <&cpg 909>; 210 }; 211 212 gpio4: gpio@e6054000 { 213 compatible = "renesas,gpio-r8a774c0", 214 "renesas,rcar-gen3-gpio"; 215 reg = <0 0xe6054000 0 0x50>; 216 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 217 #gpio-cells = <2>; 218 gpio-controller; 219 gpio-ranges = <&pfc 0 128 11>; 220 #interrupt-cells = <2>; 221 interrupt-controller; 222 clocks = <&cpg CPG_MOD 908>; 223 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 224 resets = <&cpg 908>; 225 }; 226 227 gpio5: gpio@e6055000 { 228 compatible = "renesas,gpio-r8a774c0", 229 "renesas,rcar-gen3-gpio"; 230 reg = <0 0xe6055000 0 0x50>; 231 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 232 #gpio-cells = <2>; 233 gpio-controller; 234 gpio-ranges = <&pfc 0 160 20>; 235 #interrupt-cells = <2>; 236 interrupt-controller; 237 clocks = <&cpg CPG_MOD 907>; 238 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 239 resets = <&cpg 907>; 240 }; 241 242 gpio6: gpio@e6055400 { 243 compatible = "renesas,gpio-r8a774c0", 244 "renesas,rcar-gen3-gpio"; 245 reg = <0 0xe6055400 0 0x50>; 246 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 247 #gpio-cells = <2>; 248 gpio-controller; 249 gpio-ranges = <&pfc 0 192 18>; 250 #interrupt-cells = <2>; 251 interrupt-controller; 252 clocks = <&cpg CPG_MOD 906>; 253 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 254 resets = <&cpg 906>; 255 }; 256 257 pfc: pin-controller@e6060000 { 258 compatible = "renesas,pfc-r8a774c0"; 259 reg = <0 0xe6060000 0 0x508>; 260 }; 261 262 cmt0: timer@e60f0000 { 263 compatible = "renesas,r8a774c0-cmt0", 264 "renesas,rcar-gen3-cmt0"; 265 reg = <0 0xe60f0000 0 0x1004>; 266 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 267 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 268 clocks = <&cpg CPG_MOD 303>; 269 clock-names = "fck"; 270 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 271 resets = <&cpg 303>; 272 status = "disabled"; 273 }; 274 275 cmt1: timer@e6130000 { 276 compatible = "renesas,r8a774c0-cmt1", 277 "renesas,rcar-gen3-cmt1"; 278 reg = <0 0xe6130000 0 0x1004>; 279 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 280 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 281 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 282 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 283 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 284 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 285 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 286 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 287 clocks = <&cpg CPG_MOD 302>; 288 clock-names = "fck"; 289 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 290 resets = <&cpg 302>; 291 status = "disabled"; 292 }; 293 294 cmt2: timer@e6140000 { 295 compatible = "renesas,r8a774c0-cmt1", 296 "renesas,rcar-gen3-cmt1"; 297 reg = <0 0xe6140000 0 0x1004>; 298 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 299 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 300 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 301 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 302 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 303 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 304 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 305 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 306 clocks = <&cpg CPG_MOD 301>; 307 clock-names = "fck"; 308 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 309 resets = <&cpg 301>; 310 status = "disabled"; 311 }; 312 313 cmt3: timer@e6148000 { 314 compatible = "renesas,r8a774c0-cmt1", 315 "renesas,rcar-gen3-cmt1"; 316 reg = <0 0xe6148000 0 0x1004>; 317 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 318 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 319 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 320 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 321 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 322 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 323 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 324 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 325 clocks = <&cpg CPG_MOD 300>; 326 clock-names = "fck"; 327 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 328 resets = <&cpg 300>; 329 status = "disabled"; 330 }; 331 332 cpg: clock-controller@e6150000 { 333 compatible = "renesas,r8a774c0-cpg-mssr"; 334 reg = <0 0xe6150000 0 0x1000>; 335 clocks = <&extal_clk>; 336 clock-names = "extal"; 337 #clock-cells = <2>; 338 #power-domain-cells = <0>; 339 #reset-cells = <1>; 340 }; 341 342 rst: reset-controller@e6160000 { 343 compatible = "renesas,r8a774c0-rst"; 344 reg = <0 0xe6160000 0 0x0200>; 345 }; 346 347 sysc: system-controller@e6180000 { 348 compatible = "renesas,r8a774c0-sysc"; 349 reg = <0 0xe6180000 0 0x0400>; 350 #power-domain-cells = <1>; 351 }; 352 353 thermal: thermal@e6190000 { 354 compatible = "renesas,thermal-r8a774c0"; 355 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; 356 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 357 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 358 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 359 clocks = <&cpg CPG_MOD 522>; 360 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 361 resets = <&cpg 522>; 362 #thermal-sensor-cells = <0>; 363 }; 364 365 intc_ex: interrupt-controller@e61c0000 { 366 compatible = "renesas,intc-ex-r8a774c0", "renesas,irqc"; 367 #interrupt-cells = <2>; 368 interrupt-controller; 369 reg = <0 0xe61c0000 0 0x200>; 370 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 371 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 372 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 373 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 374 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 375 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 376 clocks = <&cpg CPG_MOD 407>; 377 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 378 resets = <&cpg 407>; 379 }; 380 381 i2c0: i2c@e6500000 { 382 #address-cells = <1>; 383 #size-cells = <0>; 384 compatible = "renesas,i2c-r8a774c0", 385 "renesas,rcar-gen3-i2c"; 386 reg = <0 0xe6500000 0 0x40>; 387 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 388 clocks = <&cpg CPG_MOD 931>; 389 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 390 resets = <&cpg 931>; 391 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 392 <&dmac2 0x91>, <&dmac2 0x90>; 393 dma-names = "tx", "rx", "tx", "rx"; 394 i2c-scl-internal-delay-ns = <110>; 395 status = "disabled"; 396 }; 397 398 i2c1: i2c@e6508000 { 399 #address-cells = <1>; 400 #size-cells = <0>; 401 compatible = "renesas,i2c-r8a774c0", 402 "renesas,rcar-gen3-i2c"; 403 reg = <0 0xe6508000 0 0x40>; 404 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 405 clocks = <&cpg CPG_MOD 930>; 406 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 407 resets = <&cpg 930>; 408 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 409 <&dmac2 0x93>, <&dmac2 0x92>; 410 dma-names = "tx", "rx", "tx", "rx"; 411 i2c-scl-internal-delay-ns = <6>; 412 status = "disabled"; 413 }; 414 415 i2c2: i2c@e6510000 { 416 #address-cells = <1>; 417 #size-cells = <0>; 418 compatible = "renesas,i2c-r8a774c0", 419 "renesas,rcar-gen3-i2c"; 420 reg = <0 0xe6510000 0 0x40>; 421 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 422 clocks = <&cpg CPG_MOD 929>; 423 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 424 resets = <&cpg 929>; 425 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 426 <&dmac2 0x95>, <&dmac2 0x94>; 427 dma-names = "tx", "rx", "tx", "rx"; 428 i2c-scl-internal-delay-ns = <6>; 429 status = "disabled"; 430 }; 431 432 i2c3: i2c@e66d0000 { 433 #address-cells = <1>; 434 #size-cells = <0>; 435 compatible = "renesas,i2c-r8a774c0", 436 "renesas,rcar-gen3-i2c"; 437 reg = <0 0xe66d0000 0 0x40>; 438 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 439 clocks = <&cpg CPG_MOD 928>; 440 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 441 resets = <&cpg 928>; 442 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 443 dma-names = "tx", "rx"; 444 i2c-scl-internal-delay-ns = <110>; 445 status = "disabled"; 446 }; 447 448 i2c4: i2c@e66d8000 { 449 #address-cells = <1>; 450 #size-cells = <0>; 451 compatible = "renesas,i2c-r8a774c0", 452 "renesas,rcar-gen3-i2c"; 453 reg = <0 0xe66d8000 0 0x40>; 454 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 455 clocks = <&cpg CPG_MOD 927>; 456 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 457 resets = <&cpg 927>; 458 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 459 dma-names = "tx", "rx"; 460 i2c-scl-internal-delay-ns = <6>; 461 status = "disabled"; 462 }; 463 464 i2c5: i2c@e66e0000 { 465 #address-cells = <1>; 466 #size-cells = <0>; 467 compatible = "renesas,i2c-r8a774c0", 468 "renesas,rcar-gen3-i2c"; 469 reg = <0 0xe66e0000 0 0x40>; 470 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 471 clocks = <&cpg CPG_MOD 919>; 472 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 473 resets = <&cpg 919>; 474 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 475 dma-names = "tx", "rx"; 476 i2c-scl-internal-delay-ns = <6>; 477 status = "disabled"; 478 }; 479 480 i2c6: i2c@e66e8000 { 481 #address-cells = <1>; 482 #size-cells = <0>; 483 compatible = "renesas,i2c-r8a774c0", 484 "renesas,rcar-gen3-i2c"; 485 reg = <0 0xe66e8000 0 0x40>; 486 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 487 clocks = <&cpg CPG_MOD 918>; 488 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 489 resets = <&cpg 918>; 490 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 491 dma-names = "tx", "rx"; 492 i2c-scl-internal-delay-ns = <6>; 493 status = "disabled"; 494 }; 495 496 i2c7: i2c@e6690000 { 497 #address-cells = <1>; 498 #size-cells = <0>; 499 compatible = "renesas,i2c-r8a774c0", 500 "renesas,rcar-gen3-i2c"; 501 reg = <0 0xe6690000 0 0x40>; 502 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 503 clocks = <&cpg CPG_MOD 1003>; 504 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 505 resets = <&cpg 1003>; 506 i2c-scl-internal-delay-ns = <6>; 507 status = "disabled"; 508 }; 509 510 i2c_dvfs: i2c@e60b0000 { 511 #address-cells = <1>; 512 #size-cells = <0>; 513 compatible = "renesas,iic-r8a774c0"; 514 reg = <0 0xe60b0000 0 0x15>; 515 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 516 clocks = <&cpg CPG_MOD 926>; 517 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 518 resets = <&cpg 926>; 519 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 520 dma-names = "tx", "rx"; 521 status = "disabled"; 522 }; 523 524 hscif0: serial@e6540000 { 525 compatible = "renesas,hscif-r8a774c0", 526 "renesas,rcar-gen3-hscif", 527 "renesas,hscif"; 528 reg = <0 0xe6540000 0 0x60>; 529 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 530 clocks = <&cpg CPG_MOD 520>, 531 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 532 <&scif_clk>; 533 clock-names = "fck", "brg_int", "scif_clk"; 534 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 535 <&dmac2 0x31>, <&dmac2 0x30>; 536 dma-names = "tx", "rx", "tx", "rx"; 537 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 538 resets = <&cpg 520>; 539 status = "disabled"; 540 }; 541 542 hscif1: serial@e6550000 { 543 compatible = "renesas,hscif-r8a774c0", 544 "renesas,rcar-gen3-hscif", 545 "renesas,hscif"; 546 reg = <0 0xe6550000 0 0x60>; 547 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 548 clocks = <&cpg CPG_MOD 519>, 549 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 550 <&scif_clk>; 551 clock-names = "fck", "brg_int", "scif_clk"; 552 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 553 <&dmac2 0x33>, <&dmac2 0x32>; 554 dma-names = "tx", "rx", "tx", "rx"; 555 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 556 resets = <&cpg 519>; 557 status = "disabled"; 558 }; 559 560 hscif2: serial@e6560000 { 561 compatible = "renesas,hscif-r8a774c0", 562 "renesas,rcar-gen3-hscif", 563 "renesas,hscif"; 564 reg = <0 0xe6560000 0 0x60>; 565 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 566 clocks = <&cpg CPG_MOD 518>, 567 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 568 <&scif_clk>; 569 clock-names = "fck", "brg_int", "scif_clk"; 570 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 571 <&dmac2 0x35>, <&dmac2 0x34>; 572 dma-names = "tx", "rx", "tx", "rx"; 573 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 574 resets = <&cpg 518>; 575 status = "disabled"; 576 }; 577 578 hscif3: serial@e66a0000 { 579 compatible = "renesas,hscif-r8a774c0", 580 "renesas,rcar-gen3-hscif", 581 "renesas,hscif"; 582 reg = <0 0xe66a0000 0 0x60>; 583 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 584 clocks = <&cpg CPG_MOD 517>, 585 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 586 <&scif_clk>; 587 clock-names = "fck", "brg_int", "scif_clk"; 588 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 589 dma-names = "tx", "rx"; 590 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 591 resets = <&cpg 517>; 592 status = "disabled"; 593 }; 594 595 hscif4: serial@e66b0000 { 596 compatible = "renesas,hscif-r8a774c0", 597 "renesas,rcar-gen3-hscif", 598 "renesas,hscif"; 599 reg = <0 0xe66b0000 0 0x60>; 600 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 601 clocks = <&cpg CPG_MOD 516>, 602 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 603 <&scif_clk>; 604 clock-names = "fck", "brg_int", "scif_clk"; 605 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 606 dma-names = "tx", "rx"; 607 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 608 resets = <&cpg 516>; 609 status = "disabled"; 610 }; 611 612 hsusb: usb@e6590000 { 613 compatible = "renesas,usbhs-r8a774c0", 614 "renesas,rcar-gen3-usbhs"; 615 reg = <0 0xe6590000 0 0x200>; 616 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 617 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 618 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 619 <&usb_dmac1 0>, <&usb_dmac1 1>; 620 dma-names = "ch0", "ch1", "ch2", "ch3"; 621 renesas,buswait = <11>; 622 phys = <&usb2_phy0>; 623 phy-names = "usb"; 624 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 625 resets = <&cpg 704>, <&cpg 703>; 626 status = "disabled"; 627 }; 628 629 usb_dmac0: dma-controller@e65a0000 { 630 compatible = "renesas,r8a774c0-usb-dmac", 631 "renesas,usb-dmac"; 632 reg = <0 0xe65a0000 0 0x100>; 633 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 634 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 635 interrupt-names = "ch0", "ch1"; 636 clocks = <&cpg CPG_MOD 330>; 637 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 638 resets = <&cpg 330>; 639 #dma-cells = <1>; 640 dma-channels = <2>; 641 }; 642 643 usb_dmac1: dma-controller@e65b0000 { 644 compatible = "renesas,r8a774c0-usb-dmac", 645 "renesas,usb-dmac"; 646 reg = <0 0xe65b0000 0 0x100>; 647 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 648 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 649 interrupt-names = "ch0", "ch1"; 650 clocks = <&cpg CPG_MOD 331>; 651 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 652 resets = <&cpg 331>; 653 #dma-cells = <1>; 654 dma-channels = <2>; 655 }; 656 657 dmac0: dma-controller@e6700000 { 658 compatible = "renesas,dmac-r8a774c0", 659 "renesas,rcar-dmac"; 660 reg = <0 0xe6700000 0 0x10000>; 661 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 662 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 663 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 664 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 665 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 666 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 667 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 668 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 669 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 670 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 671 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 672 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 673 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 674 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 675 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 676 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 677 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 678 interrupt-names = "error", 679 "ch0", "ch1", "ch2", "ch3", 680 "ch4", "ch5", "ch6", "ch7", 681 "ch8", "ch9", "ch10", "ch11", 682 "ch12", "ch13", "ch14", "ch15"; 683 clocks = <&cpg CPG_MOD 219>; 684 clock-names = "fck"; 685 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 686 resets = <&cpg 219>; 687 #dma-cells = <1>; 688 dma-channels = <16>; 689 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 690 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 691 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 692 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 693 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 694 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 695 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 696 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 697 }; 698 699 dmac1: dma-controller@e7300000 { 700 compatible = "renesas,dmac-r8a774c0", 701 "renesas,rcar-dmac"; 702 reg = <0 0xe7300000 0 0x10000>; 703 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 704 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 705 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 706 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 707 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 708 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 709 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 710 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 711 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 712 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 713 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 714 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 715 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 716 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 717 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 718 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 719 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 720 interrupt-names = "error", 721 "ch0", "ch1", "ch2", "ch3", 722 "ch4", "ch5", "ch6", "ch7", 723 "ch8", "ch9", "ch10", "ch11", 724 "ch12", "ch13", "ch14", "ch15"; 725 clocks = <&cpg CPG_MOD 218>; 726 clock-names = "fck"; 727 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 728 resets = <&cpg 218>; 729 #dma-cells = <1>; 730 dma-channels = <16>; 731 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 732 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 733 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 734 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 735 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 736 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 737 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 738 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 739 }; 740 741 dmac2: dma-controller@e7310000 { 742 compatible = "renesas,dmac-r8a774c0", 743 "renesas,rcar-dmac"; 744 reg = <0 0xe7310000 0 0x10000>; 745 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 746 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 747 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 748 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 749 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 750 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 751 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 752 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 753 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 754 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 755 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 756 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 757 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 758 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 759 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 760 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 761 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 762 interrupt-names = "error", 763 "ch0", "ch1", "ch2", "ch3", 764 "ch4", "ch5", "ch6", "ch7", 765 "ch8", "ch9", "ch10", "ch11", 766 "ch12", "ch13", "ch14", "ch15"; 767 clocks = <&cpg CPG_MOD 217>; 768 clock-names = "fck"; 769 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 770 resets = <&cpg 217>; 771 #dma-cells = <1>; 772 dma-channels = <16>; 773 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 774 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 775 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 776 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 777 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 778 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 779 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 780 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 781 }; 782 783 ipmmu_ds0: mmu@e6740000 { 784 compatible = "renesas,ipmmu-r8a774c0"; 785 reg = <0 0xe6740000 0 0x1000>; 786 renesas,ipmmu-main = <&ipmmu_mm 0>; 787 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 788 #iommu-cells = <1>; 789 }; 790 791 ipmmu_ds1: mmu@e7740000 { 792 compatible = "renesas,ipmmu-r8a774c0"; 793 reg = <0 0xe7740000 0 0x1000>; 794 renesas,ipmmu-main = <&ipmmu_mm 1>; 795 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 796 #iommu-cells = <1>; 797 }; 798 799 ipmmu_hc: mmu@e6570000 { 800 compatible = "renesas,ipmmu-r8a774c0"; 801 reg = <0 0xe6570000 0 0x1000>; 802 renesas,ipmmu-main = <&ipmmu_mm 2>; 803 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 804 #iommu-cells = <1>; 805 }; 806 807 ipmmu_mm: mmu@e67b0000 { 808 compatible = "renesas,ipmmu-r8a774c0"; 809 reg = <0 0xe67b0000 0 0x1000>; 810 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 811 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 812 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 813 #iommu-cells = <1>; 814 }; 815 816 ipmmu_mp: mmu@ec670000 { 817 compatible = "renesas,ipmmu-r8a774c0"; 818 reg = <0 0xec670000 0 0x1000>; 819 renesas,ipmmu-main = <&ipmmu_mm 4>; 820 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 821 #iommu-cells = <1>; 822 }; 823 824 ipmmu_pv0: mmu@fd800000 { 825 compatible = "renesas,ipmmu-r8a774c0"; 826 reg = <0 0xfd800000 0 0x1000>; 827 renesas,ipmmu-main = <&ipmmu_mm 6>; 828 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 829 #iommu-cells = <1>; 830 }; 831 832 ipmmu_vc0: mmu@fe6b0000 { 833 compatible = "renesas,ipmmu-r8a774c0"; 834 reg = <0 0xfe6b0000 0 0x1000>; 835 renesas,ipmmu-main = <&ipmmu_mm 12>; 836 power-domains = <&sysc R8A774C0_PD_A3VC>; 837 #iommu-cells = <1>; 838 }; 839 840 ipmmu_vi0: mmu@febd0000 { 841 compatible = "renesas,ipmmu-r8a774c0"; 842 reg = <0 0xfebd0000 0 0x1000>; 843 renesas,ipmmu-main = <&ipmmu_mm 14>; 844 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 845 #iommu-cells = <1>; 846 }; 847 848 ipmmu_vp0: mmu@fe990000 { 849 compatible = "renesas,ipmmu-r8a774c0"; 850 reg = <0 0xfe990000 0 0x1000>; 851 renesas,ipmmu-main = <&ipmmu_mm 16>; 852 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 853 #iommu-cells = <1>; 854 }; 855 856 avb: ethernet@e6800000 { 857 compatible = "renesas,etheravb-r8a774c0", 858 "renesas,etheravb-rcar-gen3"; 859 reg = <0 0xe6800000 0 0x800>; 860 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 874 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 875 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 876 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 877 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 878 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 879 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 880 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 881 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 882 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 883 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 884 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 885 interrupt-names = "ch0", "ch1", "ch2", "ch3", 886 "ch4", "ch5", "ch6", "ch7", 887 "ch8", "ch9", "ch10", "ch11", 888 "ch12", "ch13", "ch14", "ch15", 889 "ch16", "ch17", "ch18", "ch19", 890 "ch20", "ch21", "ch22", "ch23", 891 "ch24"; 892 clocks = <&cpg CPG_MOD 812>; 893 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 894 resets = <&cpg 812>; 895 phy-mode = "rgmii"; 896 iommus = <&ipmmu_ds0 16>; 897 #address-cells = <1>; 898 #size-cells = <0>; 899 status = "disabled"; 900 }; 901 902 can0: can@e6c30000 { 903 compatible = "renesas,can-r8a774c0", 904 "renesas,rcar-gen3-can"; 905 reg = <0 0xe6c30000 0 0x1000>; 906 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 907 clocks = <&cpg CPG_MOD 916>, <&can_clk>; 908 clock-names = "clkp1", "can_clk"; 909 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 910 resets = <&cpg 916>; 911 status = "disabled"; 912 }; 913 914 can1: can@e6c38000 { 915 compatible = "renesas,can-r8a774c0", 916 "renesas,rcar-gen3-can"; 917 reg = <0 0xe6c38000 0 0x1000>; 918 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 919 clocks = <&cpg CPG_MOD 915>, <&can_clk>; 920 clock-names = "clkp1", "can_clk"; 921 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 922 resets = <&cpg 915>; 923 status = "disabled"; 924 }; 925 926 pwm0: pwm@e6e30000 { 927 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 928 reg = <0 0xe6e30000 0 0x8>; 929 clocks = <&cpg CPG_MOD 523>; 930 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 931 resets = <&cpg 523>; 932 #pwm-cells = <2>; 933 status = "disabled"; 934 }; 935 936 pwm1: pwm@e6e31000 { 937 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 938 reg = <0 0xe6e31000 0 0x8>; 939 clocks = <&cpg CPG_MOD 523>; 940 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 941 resets = <&cpg 523>; 942 #pwm-cells = <2>; 943 status = "disabled"; 944 }; 945 946 pwm2: pwm@e6e32000 { 947 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 948 reg = <0 0xe6e32000 0 0x8>; 949 clocks = <&cpg CPG_MOD 523>; 950 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 951 resets = <&cpg 523>; 952 #pwm-cells = <2>; 953 status = "disabled"; 954 }; 955 956 pwm3: pwm@e6e33000 { 957 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 958 reg = <0 0xe6e33000 0 0x8>; 959 clocks = <&cpg CPG_MOD 523>; 960 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 961 resets = <&cpg 523>; 962 #pwm-cells = <2>; 963 status = "disabled"; 964 }; 965 966 pwm4: pwm@e6e34000 { 967 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 968 reg = <0 0xe6e34000 0 0x8>; 969 clocks = <&cpg CPG_MOD 523>; 970 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 971 resets = <&cpg 523>; 972 #pwm-cells = <2>; 973 status = "disabled"; 974 }; 975 976 pwm5: pwm@e6e35000 { 977 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 978 reg = <0 0xe6e35000 0 0x8>; 979 clocks = <&cpg CPG_MOD 523>; 980 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 981 resets = <&cpg 523>; 982 #pwm-cells = <2>; 983 status = "disabled"; 984 }; 985 986 pwm6: pwm@e6e36000 { 987 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 988 reg = <0 0xe6e36000 0 0x8>; 989 clocks = <&cpg CPG_MOD 523>; 990 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 991 resets = <&cpg 523>; 992 #pwm-cells = <2>; 993 status = "disabled"; 994 }; 995 996 scif0: serial@e6e60000 { 997 compatible = "renesas,scif-r8a774c0", 998 "renesas,rcar-gen3-scif", "renesas,scif"; 999 reg = <0 0xe6e60000 0 64>; 1000 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1001 clocks = <&cpg CPG_MOD 207>, 1002 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1003 <&scif_clk>; 1004 clock-names = "fck", "brg_int", "scif_clk"; 1005 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1006 <&dmac2 0x51>, <&dmac2 0x50>; 1007 dma-names = "tx", "rx", "tx", "rx"; 1008 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1009 resets = <&cpg 207>; 1010 status = "disabled"; 1011 }; 1012 1013 scif1: serial@e6e68000 { 1014 compatible = "renesas,scif-r8a774c0", 1015 "renesas,rcar-gen3-scif", "renesas,scif"; 1016 reg = <0 0xe6e68000 0 64>; 1017 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1018 clocks = <&cpg CPG_MOD 206>, 1019 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1020 <&scif_clk>; 1021 clock-names = "fck", "brg_int", "scif_clk"; 1022 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1023 <&dmac2 0x53>, <&dmac2 0x52>; 1024 dma-names = "tx", "rx", "tx", "rx"; 1025 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1026 resets = <&cpg 206>; 1027 status = "disabled"; 1028 }; 1029 1030 scif2: serial@e6e88000 { 1031 compatible = "renesas,scif-r8a774c0", 1032 "renesas,rcar-gen3-scif", "renesas,scif"; 1033 reg = <0 0xe6e88000 0 64>; 1034 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1035 clocks = <&cpg CPG_MOD 310>, 1036 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1037 <&scif_clk>; 1038 clock-names = "fck", "brg_int", "scif_clk"; 1039 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1040 <&dmac2 0x13>, <&dmac2 0x12>; 1041 dma-names = "tx", "rx", "tx", "rx"; 1042 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1043 resets = <&cpg 310>; 1044 status = "disabled"; 1045 }; 1046 1047 scif3: serial@e6c50000 { 1048 compatible = "renesas,scif-r8a774c0", 1049 "renesas,rcar-gen3-scif", "renesas,scif"; 1050 reg = <0 0xe6c50000 0 64>; 1051 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1052 clocks = <&cpg CPG_MOD 204>, 1053 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1054 <&scif_clk>; 1055 clock-names = "fck", "brg_int", "scif_clk"; 1056 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1057 dma-names = "tx", "rx"; 1058 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1059 resets = <&cpg 204>; 1060 status = "disabled"; 1061 }; 1062 1063 scif4: serial@e6c40000 { 1064 compatible = "renesas,scif-r8a774c0", 1065 "renesas,rcar-gen3-scif", "renesas,scif"; 1066 reg = <0 0xe6c40000 0 64>; 1067 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1068 clocks = <&cpg CPG_MOD 203>, 1069 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1070 <&scif_clk>; 1071 clock-names = "fck", "brg_int", "scif_clk"; 1072 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1073 dma-names = "tx", "rx"; 1074 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1075 resets = <&cpg 203>; 1076 status = "disabled"; 1077 }; 1078 1079 scif5: serial@e6f30000 { 1080 compatible = "renesas,scif-r8a774c0", 1081 "renesas,rcar-gen3-scif", "renesas,scif"; 1082 reg = <0 0xe6f30000 0 64>; 1083 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1084 clocks = <&cpg CPG_MOD 202>, 1085 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1086 <&scif_clk>; 1087 clock-names = "fck", "brg_int", "scif_clk"; 1088 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1089 <&dmac2 0x5b>, <&dmac2 0x5a>; 1090 dma-names = "tx", "rx", "tx", "rx"; 1091 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1092 resets = <&cpg 202>; 1093 status = "disabled"; 1094 }; 1095 1096 msiof0: spi@e6e90000 { 1097 compatible = "renesas,msiof-r8a774c0", 1098 "renesas,rcar-gen3-msiof"; 1099 reg = <0 0xe6e90000 0 0x0064>; 1100 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1101 clocks = <&cpg CPG_MOD 211>; 1102 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1103 <&dmac2 0x41>, <&dmac2 0x40>; 1104 dma-names = "tx", "rx", "tx", "rx"; 1105 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1106 resets = <&cpg 211>; 1107 #address-cells = <1>; 1108 #size-cells = <0>; 1109 status = "disabled"; 1110 }; 1111 1112 msiof1: spi@e6ea0000 { 1113 compatible = "renesas,msiof-r8a774c0", 1114 "renesas,rcar-gen3-msiof"; 1115 reg = <0 0xe6ea0000 0 0x0064>; 1116 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1117 clocks = <&cpg CPG_MOD 210>; 1118 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1119 <&dmac2 0x43>, <&dmac2 0x42>; 1120 dma-names = "tx", "rx", "tx", "rx"; 1121 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1122 resets = <&cpg 210>; 1123 #address-cells = <1>; 1124 #size-cells = <0>; 1125 status = "disabled"; 1126 }; 1127 1128 msiof2: spi@e6c00000 { 1129 compatible = "renesas,msiof-r8a774c0", 1130 "renesas,rcar-gen3-msiof"; 1131 reg = <0 0xe6c00000 0 0x0064>; 1132 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1133 clocks = <&cpg CPG_MOD 209>; 1134 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1135 dma-names = "tx", "rx"; 1136 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1137 resets = <&cpg 209>; 1138 #address-cells = <1>; 1139 #size-cells = <0>; 1140 status = "disabled"; 1141 }; 1142 1143 msiof3: spi@e6c10000 { 1144 compatible = "renesas,msiof-r8a774c0", 1145 "renesas,rcar-gen3-msiof"; 1146 reg = <0 0xe6c10000 0 0x0064>; 1147 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1148 clocks = <&cpg CPG_MOD 208>; 1149 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1150 dma-names = "tx", "rx"; 1151 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1152 resets = <&cpg 208>; 1153 #address-cells = <1>; 1154 #size-cells = <0>; 1155 status = "disabled"; 1156 }; 1157 1158 vin4: video@e6ef4000 { 1159 compatible = "renesas,vin-r8a774c0"; 1160 reg = <0 0xe6ef4000 0 0x1000>; 1161 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1162 clocks = <&cpg CPG_MOD 807>; 1163 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1164 resets = <&cpg 807>; 1165 renesas,id = <4>; 1166 status = "disabled"; 1167 1168 ports { 1169 #address-cells = <1>; 1170 #size-cells = <0>; 1171 1172 port@1 { 1173 #address-cells = <1>; 1174 #size-cells = <0>; 1175 1176 reg = <1>; 1177 1178 vin4csi40: endpoint@2 { 1179 reg = <2>; 1180 remote-endpoint= <&csi40vin4>; 1181 }; 1182 }; 1183 }; 1184 }; 1185 1186 vin5: video@e6ef5000 { 1187 compatible = "renesas,vin-r8a774c0"; 1188 reg = <0 0xe6ef5000 0 0x1000>; 1189 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1190 clocks = <&cpg CPG_MOD 806>; 1191 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1192 resets = <&cpg 806>; 1193 renesas,id = <5>; 1194 status = "disabled"; 1195 1196 ports { 1197 #address-cells = <1>; 1198 #size-cells = <0>; 1199 1200 port@1 { 1201 #address-cells = <1>; 1202 #size-cells = <0>; 1203 1204 reg = <1>; 1205 1206 vin5csi40: endpoint@2 { 1207 reg = <2>; 1208 remote-endpoint= <&csi40vin5>; 1209 }; 1210 }; 1211 }; 1212 }; 1213 1214 rcar_sound: sound@ec500000 { 1215 /* 1216 * #sound-dai-cells is required 1217 * 1218 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1219 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1220 */ 1221 /* 1222 * #clock-cells is required for audio_clkout0/1/2/3 1223 * 1224 * clkout : #clock-cells = <0>; <&rcar_sound>; 1225 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1226 */ 1227 compatible = "renesas,rcar_sound-r8a774c0", 1228 "renesas,rcar_sound-gen3"; 1229 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1230 <0 0xec5a0000 0 0x100>, /* ADG */ 1231 <0 0xec540000 0 0x1000>, /* SSIU */ 1232 <0 0xec541000 0 0x280>, /* SSI */ 1233 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1234 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1235 1236 clocks = <&cpg CPG_MOD 1005>, 1237 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1238 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1239 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1240 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1241 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1242 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1243 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1244 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1245 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1246 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1247 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1248 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1249 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1250 <&audio_clk_a>, <&audio_clk_b>, 1251 <&audio_clk_c>, 1252 <&cpg CPG_CORE R8A774C0_CLK_ZA2>; 1253 clock-names = "ssi-all", 1254 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1255 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1256 "ssi.1", "ssi.0", 1257 "src.9", "src.8", "src.7", "src.6", 1258 "src.5", "src.4", "src.3", "src.2", 1259 "src.1", "src.0", 1260 "mix.1", "mix.0", 1261 "ctu.1", "ctu.0", 1262 "dvc.0", "dvc.1", 1263 "clk_a", "clk_b", "clk_c", "clk_i"; 1264 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1265 resets = <&cpg 1005>, 1266 <&cpg 1006>, <&cpg 1007>, 1267 <&cpg 1008>, <&cpg 1009>, 1268 <&cpg 1010>, <&cpg 1011>, 1269 <&cpg 1012>, <&cpg 1013>, 1270 <&cpg 1014>, <&cpg 1015>; 1271 reset-names = "ssi-all", 1272 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1273 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1274 "ssi.1", "ssi.0"; 1275 status = "disabled"; 1276 1277 rcar_sound,dvc { 1278 dvc0: dvc-0 { 1279 dmas = <&audma0 0xbc>; 1280 dma-names = "tx"; 1281 }; 1282 dvc1: dvc-1 { 1283 dmas = <&audma0 0xbe>; 1284 dma-names = "tx"; 1285 }; 1286 }; 1287 1288 rcar_sound,mix { 1289 mix0: mix-0 { }; 1290 mix1: mix-1 { }; 1291 }; 1292 1293 rcar_sound,ctu { 1294 ctu00: ctu-0 { }; 1295 ctu01: ctu-1 { }; 1296 ctu02: ctu-2 { }; 1297 ctu03: ctu-3 { }; 1298 ctu10: ctu-4 { }; 1299 ctu11: ctu-5 { }; 1300 ctu12: ctu-6 { }; 1301 ctu13: ctu-7 { }; 1302 }; 1303 1304 rcar_sound,src { 1305 src0: src-0 { 1306 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1307 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1308 dma-names = "rx", "tx"; 1309 }; 1310 src1: src-1 { 1311 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1312 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1313 dma-names = "rx", "tx"; 1314 }; 1315 src2: src-2 { 1316 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1317 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1318 dma-names = "rx", "tx"; 1319 }; 1320 src3: src-3 { 1321 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1322 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1323 dma-names = "rx", "tx"; 1324 }; 1325 src4: src-4 { 1326 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1327 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1328 dma-names = "rx", "tx"; 1329 }; 1330 src5: src-5 { 1331 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1332 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1333 dma-names = "rx", "tx"; 1334 }; 1335 src6: src-6 { 1336 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1337 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1338 dma-names = "rx", "tx"; 1339 }; 1340 src7: src-7 { 1341 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1342 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1343 dma-names = "rx", "tx"; 1344 }; 1345 src8: src-8 { 1346 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1347 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1348 dma-names = "rx", "tx"; 1349 }; 1350 src9: src-9 { 1351 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1352 dmas = <&audma0 0x97>, <&audma0 0xba>; 1353 dma-names = "rx", "tx"; 1354 }; 1355 }; 1356 1357 rcar_sound,ssi { 1358 ssi0: ssi-0 { 1359 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1360 dmas = <&audma0 0x01>, <&audma0 0x02>, 1361 <&audma0 0x15>, <&audma0 0x16>; 1362 dma-names = "rx", "tx", "rxu", "txu"; 1363 }; 1364 ssi1: ssi-1 { 1365 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1366 dmas = <&audma0 0x03>, <&audma0 0x04>, 1367 <&audma0 0x49>, <&audma0 0x4a>; 1368 dma-names = "rx", "tx", "rxu", "txu"; 1369 }; 1370 ssi2: ssi-2 { 1371 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1372 dmas = <&audma0 0x05>, <&audma0 0x06>, 1373 <&audma0 0x63>, <&audma0 0x64>; 1374 dma-names = "rx", "tx", "rxu", "txu"; 1375 }; 1376 ssi3: ssi-3 { 1377 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1378 dmas = <&audma0 0x07>, <&audma0 0x08>, 1379 <&audma0 0x6f>, <&audma0 0x70>; 1380 dma-names = "rx", "tx", "rxu", "txu"; 1381 }; 1382 ssi4: ssi-4 { 1383 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1384 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1385 <&audma0 0x71>, <&audma0 0x72>; 1386 dma-names = "rx", "tx", "rxu", "txu"; 1387 }; 1388 ssi5: ssi-5 { 1389 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1390 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1391 <&audma0 0x73>, <&audma0 0x74>; 1392 dma-names = "rx", "tx", "rxu", "txu"; 1393 }; 1394 ssi6: ssi-6 { 1395 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1396 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1397 <&audma0 0x75>, <&audma0 0x76>; 1398 dma-names = "rx", "tx", "rxu", "txu"; 1399 }; 1400 ssi7: ssi-7 { 1401 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1402 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1403 <&audma0 0x79>, <&audma0 0x7a>; 1404 dma-names = "rx", "tx", "rxu", "txu"; 1405 }; 1406 ssi8: ssi-8 { 1407 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1408 dmas = <&audma0 0x11>, <&audma0 0x12>, 1409 <&audma0 0x7b>, <&audma0 0x7c>; 1410 dma-names = "rx", "tx", "rxu", "txu"; 1411 }; 1412 ssi9: ssi-9 { 1413 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1414 dmas = <&audma0 0x13>, <&audma0 0x14>, 1415 <&audma0 0x7d>, <&audma0 0x7e>; 1416 dma-names = "rx", "tx", "rxu", "txu"; 1417 }; 1418 }; 1419 }; 1420 1421 audma0: dma-controller@ec700000 { 1422 compatible = "renesas,dmac-r8a774c0", 1423 "renesas,rcar-dmac"; 1424 reg = <0 0xec700000 0 0x10000>; 1425 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1426 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1427 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1428 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1429 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1430 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1431 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1432 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1433 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1434 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1435 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1436 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1437 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1438 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 1439 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1440 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1441 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1442 interrupt-names = "error", 1443 "ch0", "ch1", "ch2", "ch3", 1444 "ch4", "ch5", "ch6", "ch7", 1445 "ch8", "ch9", "ch10", "ch11", 1446 "ch12", "ch13", "ch14", "ch15"; 1447 clocks = <&cpg CPG_MOD 502>; 1448 clock-names = "fck"; 1449 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1450 resets = <&cpg 502>; 1451 #dma-cells = <1>; 1452 dma-channels = <16>; 1453 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1454 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1455 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1456 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1457 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1458 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1459 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1460 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1461 }; 1462 1463 xhci0: usb@ee000000 { 1464 compatible = "renesas,xhci-r8a774c0", 1465 "renesas,rcar-gen3-xhci"; 1466 reg = <0 0xee000000 0 0xc00>; 1467 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1468 clocks = <&cpg CPG_MOD 328>; 1469 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1470 resets = <&cpg 328>; 1471 status = "disabled"; 1472 }; 1473 1474 usb3_peri0: usb@ee020000 { 1475 compatible = "renesas,r8a774c0-usb3-peri", 1476 "renesas,rcar-gen3-usb3-peri"; 1477 reg = <0 0xee020000 0 0x400>; 1478 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1479 clocks = <&cpg CPG_MOD 328>; 1480 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1481 resets = <&cpg 328>; 1482 status = "disabled"; 1483 }; 1484 1485 ohci0: usb@ee080000 { 1486 compatible = "generic-ohci"; 1487 reg = <0 0xee080000 0 0x100>; 1488 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1489 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1490 phys = <&usb2_phy0>; 1491 phy-names = "usb"; 1492 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1493 resets = <&cpg 703>, <&cpg 704>; 1494 status = "disabled"; 1495 }; 1496 1497 ehci0: usb@ee080100 { 1498 compatible = "generic-ehci"; 1499 reg = <0 0xee080100 0 0x100>; 1500 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1501 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1502 phys = <&usb2_phy0>; 1503 phy-names = "usb"; 1504 companion = <&ohci0>; 1505 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1506 resets = <&cpg 703>, <&cpg 704>; 1507 status = "disabled"; 1508 }; 1509 1510 usb2_phy0: usb-phy@ee080200 { 1511 compatible = "renesas,usb2-phy-r8a774c0", 1512 "renesas,rcar-gen3-usb2-phy"; 1513 reg = <0 0xee080200 0 0x700>; 1514 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1515 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1516 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1517 resets = <&cpg 703>, <&cpg 704>; 1518 #phy-cells = <0>; 1519 status = "disabled"; 1520 }; 1521 1522 sdhi0: sd@ee100000 { 1523 compatible = "renesas,sdhi-r8a774c0", 1524 "renesas,rcar-gen3-sdhi"; 1525 reg = <0 0xee100000 0 0x2000>; 1526 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1527 clocks = <&cpg CPG_MOD 314>; 1528 max-frequency = <200000000>; 1529 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1530 resets = <&cpg 314>; 1531 status = "disabled"; 1532 }; 1533 1534 sdhi1: sd@ee120000 { 1535 compatible = "renesas,sdhi-r8a774c0", 1536 "renesas,rcar-gen3-sdhi"; 1537 reg = <0 0xee120000 0 0x2000>; 1538 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1539 clocks = <&cpg CPG_MOD 313>; 1540 max-frequency = <200000000>; 1541 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1542 resets = <&cpg 313>; 1543 status = "disabled"; 1544 }; 1545 1546 sdhi3: sd@ee160000 { 1547 compatible = "renesas,sdhi-r8a774c0", 1548 "renesas,rcar-gen3-sdhi"; 1549 reg = <0 0xee160000 0 0x2000>; 1550 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1551 clocks = <&cpg CPG_MOD 311>; 1552 max-frequency = <200000000>; 1553 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1554 resets = <&cpg 311>; 1555 status = "disabled"; 1556 }; 1557 1558 gic: interrupt-controller@f1010000 { 1559 compatible = "arm,gic-400"; 1560 #interrupt-cells = <3>; 1561 #address-cells = <0>; 1562 interrupt-controller; 1563 reg = <0x0 0xf1010000 0 0x1000>, 1564 <0x0 0xf1020000 0 0x20000>, 1565 <0x0 0xf1040000 0 0x20000>, 1566 <0x0 0xf1060000 0 0x20000>; 1567 interrupts = <GIC_PPI 9 1568 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1569 clocks = <&cpg CPG_MOD 408>; 1570 clock-names = "clk"; 1571 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1572 resets = <&cpg 408>; 1573 }; 1574 1575 pciec0: pcie@fe000000 { 1576 compatible = "renesas,pcie-r8a774c0", 1577 "renesas,pcie-rcar-gen3"; 1578 reg = <0 0xfe000000 0 0x80000>; 1579 #address-cells = <3>; 1580 #size-cells = <2>; 1581 bus-range = <0x00 0xff>; 1582 device_type = "pci"; 1583 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 1584 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 1585 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 1586 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1587 /* Map all possible DDR as inbound ranges */ 1588 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; 1589 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1590 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1591 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1592 #interrupt-cells = <1>; 1593 interrupt-map-mask = <0 0 0 0>; 1594 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1595 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1596 clock-names = "pcie", "pcie_bus"; 1597 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1598 resets = <&cpg 319>; 1599 status = "disabled"; 1600 }; 1601 1602 vspb0: vsp@fe960000 { 1603 compatible = "renesas,vsp2"; 1604 reg = <0 0xfe960000 0 0x8000>; 1605 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1606 clocks = <&cpg CPG_MOD 626>; 1607 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1608 resets = <&cpg 626>; 1609 renesas,fcp = <&fcpvb0>; 1610 }; 1611 1612 fcpvb0: fcp@fe96f000 { 1613 compatible = "renesas,fcpv"; 1614 reg = <0 0xfe96f000 0 0x200>; 1615 clocks = <&cpg CPG_MOD 607>; 1616 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1617 resets = <&cpg 607>; 1618 iommus = <&ipmmu_vp0 5>; 1619 }; 1620 1621 vspi0: vsp@fe9a0000 { 1622 compatible = "renesas,vsp2"; 1623 reg = <0 0xfe9a0000 0 0x8000>; 1624 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1625 clocks = <&cpg CPG_MOD 631>; 1626 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1627 resets = <&cpg 631>; 1628 renesas,fcp = <&fcpvi0>; 1629 }; 1630 1631 fcpvi0: fcp@fe9af000 { 1632 compatible = "renesas,fcpv"; 1633 reg = <0 0xfe9af000 0 0x200>; 1634 clocks = <&cpg CPG_MOD 611>; 1635 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1636 resets = <&cpg 611>; 1637 iommus = <&ipmmu_vp0 8>; 1638 }; 1639 1640 vspd0: vsp@fea20000 { 1641 compatible = "renesas,vsp2"; 1642 reg = <0 0xfea20000 0 0x7000>; 1643 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1644 clocks = <&cpg CPG_MOD 623>; 1645 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1646 resets = <&cpg 623>; 1647 renesas,fcp = <&fcpvd0>; 1648 }; 1649 1650 fcpvd0: fcp@fea27000 { 1651 compatible = "renesas,fcpv"; 1652 reg = <0 0xfea27000 0 0x200>; 1653 clocks = <&cpg CPG_MOD 603>; 1654 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1655 resets = <&cpg 603>; 1656 iommus = <&ipmmu_vi0 8>; 1657 }; 1658 1659 vspd1: vsp@fea28000 { 1660 compatible = "renesas,vsp2"; 1661 reg = <0 0xfea28000 0 0x7000>; 1662 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1663 clocks = <&cpg CPG_MOD 622>; 1664 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1665 resets = <&cpg 622>; 1666 renesas,fcp = <&fcpvd1>; 1667 }; 1668 1669 fcpvd1: fcp@fea2f000 { 1670 compatible = "renesas,fcpv"; 1671 reg = <0 0xfea2f000 0 0x200>; 1672 clocks = <&cpg CPG_MOD 602>; 1673 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1674 resets = <&cpg 602>; 1675 iommus = <&ipmmu_vi0 9>; 1676 }; 1677 1678 csi40: csi2@feaa0000 { 1679 compatible = "renesas,r8a774c0-csi2", 1680 "renesas,rcar-gen3-csi2"; 1681 reg = <0 0xfeaa0000 0 0x10000>; 1682 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1683 clocks = <&cpg CPG_MOD 716>; 1684 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1685 resets = <&cpg 716>; 1686 status = "disabled"; 1687 1688 ports { 1689 #address-cells = <1>; 1690 #size-cells = <0>; 1691 1692 port@1 { 1693 #address-cells = <1>; 1694 #size-cells = <0>; 1695 1696 reg = <1>; 1697 1698 csi40vin4: endpoint@0 { 1699 reg = <0>; 1700 remote-endpoint = <&vin4csi40>; 1701 }; 1702 csi40vin5: endpoint@1 { 1703 reg = <1>; 1704 remote-endpoint = <&vin5csi40>; 1705 }; 1706 }; 1707 }; 1708 }; 1709 1710 du: display@feb00000 { 1711 compatible = "renesas,du-r8a774c0"; 1712 reg = <0 0xfeb00000 0 0x80000>; 1713 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1714 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1715 clocks = <&cpg CPG_MOD 724>, 1716 <&cpg CPG_MOD 723>; 1717 clock-names = "du.0", "du.1"; 1718 vsps = <&vspd0 0 &vspd1 0>; 1719 status = "disabled"; 1720 1721 ports { 1722 #address-cells = <1>; 1723 #size-cells = <0>; 1724 1725 port@0 { 1726 reg = <0>; 1727 du_out_rgb: endpoint { 1728 }; 1729 }; 1730 1731 port@1 { 1732 reg = <1>; 1733 du_out_lvds0: endpoint { 1734 remote-endpoint = <&lvds0_in>; 1735 }; 1736 }; 1737 1738 port@2 { 1739 reg = <2>; 1740 du_out_lvds1: endpoint { 1741 remote-endpoint = <&lvds1_in>; 1742 }; 1743 }; 1744 }; 1745 }; 1746 1747 lvds0: lvds-encoder@feb90000 { 1748 compatible = "renesas,r8a774c0-lvds"; 1749 reg = <0 0xfeb90000 0 0x20>; 1750 clocks = <&cpg CPG_MOD 727>; 1751 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1752 resets = <&cpg 727>; 1753 status = "disabled"; 1754 1755 ports { 1756 #address-cells = <1>; 1757 #size-cells = <0>; 1758 1759 port@0 { 1760 reg = <0>; 1761 lvds0_in: endpoint { 1762 remote-endpoint = <&du_out_lvds0>; 1763 }; 1764 }; 1765 1766 port@1 { 1767 reg = <1>; 1768 lvds0_out: endpoint { 1769 }; 1770 }; 1771 }; 1772 }; 1773 1774 lvds1: lvds-encoder@feb90100 { 1775 compatible = "renesas,r8a774c0-lvds"; 1776 reg = <0 0xfeb90100 0 0x20>; 1777 clocks = <&cpg CPG_MOD 727>; 1778 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1779 resets = <&cpg 726>; 1780 status = "disabled"; 1781 1782 ports { 1783 #address-cells = <1>; 1784 #size-cells = <0>; 1785 1786 port@0 { 1787 reg = <0>; 1788 lvds1_in: endpoint { 1789 remote-endpoint = <&du_out_lvds1>; 1790 }; 1791 }; 1792 1793 port@1 { 1794 reg = <1>; 1795 lvds1_out: endpoint { 1796 }; 1797 }; 1798 }; 1799 }; 1800 1801 prr: chipid@fff00044 { 1802 compatible = "renesas,prr"; 1803 reg = <0 0xfff00044 0 4>; 1804 }; 1805 }; 1806 1807 thermal-zones { 1808 cpu-thermal { 1809 polling-delay-passive = <250>; 1810 polling-delay = <1000>; 1811 thermal-sensors = <&thermal>; 1812 1813 trips { 1814 cpu-crit { 1815 temperature = <120000>; 1816 hysteresis = <2000>; 1817 type = "critical"; 1818 }; 1819 }; 1820 1821 cooling-maps { 1822 }; 1823 }; 1824 }; 1825 1826 timer { 1827 compatible = "arm,armv8-timer"; 1828 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1829 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1830 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1831 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1832 }; 1833 1834 /* External USB clocks - can be overridden by the board */ 1835 usb3s0_clk: usb3s0 { 1836 compatible = "fixed-clock"; 1837 #clock-cells = <0>; 1838 clock-frequency = <0>; 1839 }; 1840 1841 usb_extal_clk: usb_extal { 1842 compatible = "fixed-clock"; 1843 #clock-cells = <0>; 1844 clock-frequency = <0>; 1845 }; 1846}; 1847