1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the RZ/G2E (R8A774C0) SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a774c0-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a774c0-sysc.h> 11 12/ { 13 compatible = "renesas,r8a774c0"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 /* 18 * The external audio clocks are configured as 0 Hz fixed frequency 19 * clocks by default. 20 * Boards that provide audio clocks should override them. 21 */ 22 audio_clk_a: audio_clk_a { 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; 25 clock-frequency = <0>; 26 }; 27 28 audio_clk_b: audio_clk_b { 29 compatible = "fixed-clock"; 30 #clock-cells = <0>; 31 clock-frequency = <0>; 32 }; 33 34 audio_clk_c: audio_clk_c { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <0>; 38 }; 39 40 /* External CAN clock - to be overridden by boards that provide it */ 41 can_clk: can { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 cluster1_opp: opp_table10 { 48 compatible = "operating-points-v2"; 49 opp-shared; 50 opp-800000000 { 51 opp-hz = /bits/ 64 <800000000>; 52 opp-microvolt = <820000>; 53 clock-latency-ns = <300000>; 54 }; 55 opp-1000000000 { 56 opp-hz = /bits/ 64 <1000000000>; 57 opp-microvolt = <820000>; 58 clock-latency-ns = <300000>; 59 }; 60 opp-1200000000 { 61 opp-hz = /bits/ 64 <1200000000>; 62 opp-microvolt = <820000>; 63 clock-latency-ns = <300000>; 64 opp-suspend; 65 }; 66 }; 67 68 cpus { 69 #address-cells = <1>; 70 #size-cells = <0>; 71 72 a53_0: cpu@0 { 73 compatible = "arm,cortex-a53", "arm,armv8"; 74 reg = <0>; 75 device_type = "cpu"; 76 power-domains = <&sysc R8A774C0_PD_CA53_CPU0>; 77 next-level-cache = <&L2_CA53>; 78 enable-method = "psci"; 79 clocks =<&cpg CPG_CORE R8A774C0_CLK_Z2>; 80 operating-points-v2 = <&cluster1_opp>; 81 }; 82 83 a53_1: cpu@1 { 84 compatible = "arm,cortex-a53", "arm,armv8"; 85 reg = <1>; 86 device_type = "cpu"; 87 power-domains = <&sysc R8A774C0_PD_CA53_CPU1>; 88 next-level-cache = <&L2_CA53>; 89 enable-method = "psci"; 90 clocks =<&cpg CPG_CORE R8A774C0_CLK_Z2>; 91 operating-points-v2 = <&cluster1_opp>; 92 }; 93 94 L2_CA53: cache-controller-0 { 95 compatible = "cache"; 96 power-domains = <&sysc R8A774C0_PD_CA53_SCU>; 97 cache-unified; 98 cache-level = <2>; 99 }; 100 }; 101 102 extal_clk: extal { 103 compatible = "fixed-clock"; 104 #clock-cells = <0>; 105 /* This value must be overridden by the board */ 106 clock-frequency = <0>; 107 }; 108 109 /* External PCIe clock - can be overridden by the board */ 110 pcie_bus_clk: pcie_bus { 111 compatible = "fixed-clock"; 112 #clock-cells = <0>; 113 clock-frequency = <0>; 114 }; 115 116 pmu_a53 { 117 compatible = "arm,cortex-a53-pmu"; 118 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 119 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 120 interrupt-affinity = <&a53_0>, <&a53_1>; 121 }; 122 123 psci { 124 compatible = "arm,psci-1.0", "arm,psci-0.2"; 125 method = "smc"; 126 }; 127 128 /* External SCIF clock - to be overridden by boards that provide it */ 129 scif_clk: scif { 130 compatible = "fixed-clock"; 131 #clock-cells = <0>; 132 clock-frequency = <0>; 133 }; 134 135 soc: soc { 136 compatible = "simple-bus"; 137 interrupt-parent = <&gic>; 138 #address-cells = <2>; 139 #size-cells = <2>; 140 ranges; 141 142 rwdt: watchdog@e6020000 { 143 compatible = "renesas,r8a774c0-wdt", 144 "renesas,rcar-gen3-wdt"; 145 reg = <0 0xe6020000 0 0x0c>; 146 clocks = <&cpg CPG_MOD 402>; 147 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 148 resets = <&cpg 402>; 149 status = "disabled"; 150 }; 151 152 gpio0: gpio@e6050000 { 153 compatible = "renesas,gpio-r8a774c0", 154 "renesas,rcar-gen3-gpio"; 155 reg = <0 0xe6050000 0 0x50>; 156 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 157 #gpio-cells = <2>; 158 gpio-controller; 159 gpio-ranges = <&pfc 0 0 18>; 160 #interrupt-cells = <2>; 161 interrupt-controller; 162 clocks = <&cpg CPG_MOD 912>; 163 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 164 resets = <&cpg 912>; 165 }; 166 167 gpio1: gpio@e6051000 { 168 compatible = "renesas,gpio-r8a774c0", 169 "renesas,rcar-gen3-gpio"; 170 reg = <0 0xe6051000 0 0x50>; 171 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 172 #gpio-cells = <2>; 173 gpio-controller; 174 gpio-ranges = <&pfc 0 32 23>; 175 #interrupt-cells = <2>; 176 interrupt-controller; 177 clocks = <&cpg CPG_MOD 911>; 178 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 179 resets = <&cpg 911>; 180 }; 181 182 gpio2: gpio@e6052000 { 183 compatible = "renesas,gpio-r8a774c0", 184 "renesas,rcar-gen3-gpio"; 185 reg = <0 0xe6052000 0 0x50>; 186 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 187 #gpio-cells = <2>; 188 gpio-controller; 189 gpio-ranges = <&pfc 0 64 26>; 190 #interrupt-cells = <2>; 191 interrupt-controller; 192 clocks = <&cpg CPG_MOD 910>; 193 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 194 resets = <&cpg 910>; 195 }; 196 197 gpio3: gpio@e6053000 { 198 compatible = "renesas,gpio-r8a774c0", 199 "renesas,rcar-gen3-gpio"; 200 reg = <0 0xe6053000 0 0x50>; 201 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 202 #gpio-cells = <2>; 203 gpio-controller; 204 gpio-ranges = <&pfc 0 96 16>; 205 #interrupt-cells = <2>; 206 interrupt-controller; 207 clocks = <&cpg CPG_MOD 909>; 208 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 209 resets = <&cpg 909>; 210 }; 211 212 gpio4: gpio@e6054000 { 213 compatible = "renesas,gpio-r8a774c0", 214 "renesas,rcar-gen3-gpio"; 215 reg = <0 0xe6054000 0 0x50>; 216 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 217 #gpio-cells = <2>; 218 gpio-controller; 219 gpio-ranges = <&pfc 0 128 11>; 220 #interrupt-cells = <2>; 221 interrupt-controller; 222 clocks = <&cpg CPG_MOD 908>; 223 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 224 resets = <&cpg 908>; 225 }; 226 227 gpio5: gpio@e6055000 { 228 compatible = "renesas,gpio-r8a774c0", 229 "renesas,rcar-gen3-gpio"; 230 reg = <0 0xe6055000 0 0x50>; 231 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 232 #gpio-cells = <2>; 233 gpio-controller; 234 gpio-ranges = <&pfc 0 160 20>; 235 #interrupt-cells = <2>; 236 interrupt-controller; 237 clocks = <&cpg CPG_MOD 907>; 238 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 239 resets = <&cpg 907>; 240 }; 241 242 gpio6: gpio@e6055400 { 243 compatible = "renesas,gpio-r8a774c0", 244 "renesas,rcar-gen3-gpio"; 245 reg = <0 0xe6055400 0 0x50>; 246 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 247 #gpio-cells = <2>; 248 gpio-controller; 249 gpio-ranges = <&pfc 0 192 18>; 250 #interrupt-cells = <2>; 251 interrupt-controller; 252 clocks = <&cpg CPG_MOD 906>; 253 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 254 resets = <&cpg 906>; 255 }; 256 257 pfc: pin-controller@e6060000 { 258 compatible = "renesas,pfc-r8a774c0"; 259 reg = <0 0xe6060000 0 0x508>; 260 }; 261 262 cpg: clock-controller@e6150000 { 263 compatible = "renesas,r8a774c0-cpg-mssr"; 264 reg = <0 0xe6150000 0 0x1000>; 265 clocks = <&extal_clk>; 266 clock-names = "extal"; 267 #clock-cells = <2>; 268 #power-domain-cells = <0>; 269 #reset-cells = <1>; 270 }; 271 272 rst: reset-controller@e6160000 { 273 compatible = "renesas,r8a774c0-rst"; 274 reg = <0 0xe6160000 0 0x0200>; 275 }; 276 277 sysc: system-controller@e6180000 { 278 compatible = "renesas,r8a774c0-sysc"; 279 reg = <0 0xe6180000 0 0x0400>; 280 #power-domain-cells = <1>; 281 }; 282 283 thermal: thermal@e6190000 { 284 compatible = "renesas,thermal-r8a774c0"; 285 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; 286 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 287 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 288 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 289 clocks = <&cpg CPG_MOD 522>; 290 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 291 resets = <&cpg 522>; 292 #thermal-sensor-cells = <0>; 293 }; 294 295 intc_ex: interrupt-controller@e61c0000 { 296 compatible = "renesas,intc-ex-r8a774c0", "renesas,irqc"; 297 #interrupt-cells = <2>; 298 interrupt-controller; 299 reg = <0 0xe61c0000 0 0x200>; 300 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 301 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 302 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 303 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 304 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 305 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 306 clocks = <&cpg CPG_MOD 407>; 307 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 308 resets = <&cpg 407>; 309 }; 310 311 i2c0: i2c@e6500000 { 312 #address-cells = <1>; 313 #size-cells = <0>; 314 compatible = "renesas,i2c-r8a774c0", 315 "renesas,rcar-gen3-i2c"; 316 reg = <0 0xe6500000 0 0x40>; 317 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 318 clocks = <&cpg CPG_MOD 931>; 319 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 320 resets = <&cpg 931>; 321 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 322 <&dmac2 0x91>, <&dmac2 0x90>; 323 dma-names = "tx", "rx", "tx", "rx"; 324 i2c-scl-internal-delay-ns = <110>; 325 status = "disabled"; 326 }; 327 328 i2c1: i2c@e6508000 { 329 #address-cells = <1>; 330 #size-cells = <0>; 331 compatible = "renesas,i2c-r8a774c0", 332 "renesas,rcar-gen3-i2c"; 333 reg = <0 0xe6508000 0 0x40>; 334 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 335 clocks = <&cpg CPG_MOD 930>; 336 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 337 resets = <&cpg 930>; 338 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 339 <&dmac2 0x93>, <&dmac2 0x92>; 340 dma-names = "tx", "rx", "tx", "rx"; 341 i2c-scl-internal-delay-ns = <6>; 342 status = "disabled"; 343 }; 344 345 i2c2: i2c@e6510000 { 346 #address-cells = <1>; 347 #size-cells = <0>; 348 compatible = "renesas,i2c-r8a774c0", 349 "renesas,rcar-gen3-i2c"; 350 reg = <0 0xe6510000 0 0x40>; 351 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 352 clocks = <&cpg CPG_MOD 929>; 353 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 354 resets = <&cpg 929>; 355 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 356 <&dmac2 0x95>, <&dmac2 0x94>; 357 dma-names = "tx", "rx", "tx", "rx"; 358 i2c-scl-internal-delay-ns = <6>; 359 status = "disabled"; 360 }; 361 362 i2c3: i2c@e66d0000 { 363 #address-cells = <1>; 364 #size-cells = <0>; 365 compatible = "renesas,i2c-r8a774c0", 366 "renesas,rcar-gen3-i2c"; 367 reg = <0 0xe66d0000 0 0x40>; 368 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 369 clocks = <&cpg CPG_MOD 928>; 370 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 371 resets = <&cpg 928>; 372 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 373 dma-names = "tx", "rx"; 374 i2c-scl-internal-delay-ns = <110>; 375 status = "disabled"; 376 }; 377 378 i2c4: i2c@e66d8000 { 379 #address-cells = <1>; 380 #size-cells = <0>; 381 compatible = "renesas,i2c-r8a774c0", 382 "renesas,rcar-gen3-i2c"; 383 reg = <0 0xe66d8000 0 0x40>; 384 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 385 clocks = <&cpg CPG_MOD 927>; 386 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 387 resets = <&cpg 927>; 388 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 389 dma-names = "tx", "rx"; 390 i2c-scl-internal-delay-ns = <6>; 391 status = "disabled"; 392 }; 393 394 i2c5: i2c@e66e0000 { 395 #address-cells = <1>; 396 #size-cells = <0>; 397 compatible = "renesas,i2c-r8a774c0", 398 "renesas,rcar-gen3-i2c"; 399 reg = <0 0xe66e0000 0 0x40>; 400 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 401 clocks = <&cpg CPG_MOD 919>; 402 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 403 resets = <&cpg 919>; 404 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 405 dma-names = "tx", "rx"; 406 i2c-scl-internal-delay-ns = <6>; 407 status = "disabled"; 408 }; 409 410 i2c6: i2c@e66e8000 { 411 #address-cells = <1>; 412 #size-cells = <0>; 413 compatible = "renesas,i2c-r8a774c0", 414 "renesas,rcar-gen3-i2c"; 415 reg = <0 0xe66e8000 0 0x40>; 416 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 417 clocks = <&cpg CPG_MOD 918>; 418 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 419 resets = <&cpg 918>; 420 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 421 dma-names = "tx", "rx"; 422 i2c-scl-internal-delay-ns = <6>; 423 status = "disabled"; 424 }; 425 426 i2c7: i2c@e6690000 { 427 #address-cells = <1>; 428 #size-cells = <0>; 429 compatible = "renesas,i2c-r8a774c0", 430 "renesas,rcar-gen3-i2c"; 431 reg = <0 0xe6690000 0 0x40>; 432 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 433 clocks = <&cpg CPG_MOD 1003>; 434 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 435 resets = <&cpg 1003>; 436 i2c-scl-internal-delay-ns = <6>; 437 status = "disabled"; 438 }; 439 440 i2c_dvfs: i2c@e60b0000 { 441 #address-cells = <1>; 442 #size-cells = <0>; 443 compatible = "renesas,iic-r8a774c0"; 444 reg = <0 0xe60b0000 0 0x15>; 445 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 446 clocks = <&cpg CPG_MOD 926>; 447 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 448 resets = <&cpg 926>; 449 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 450 dma-names = "tx", "rx"; 451 status = "disabled"; 452 }; 453 454 hscif0: serial@e6540000 { 455 compatible = "renesas,hscif-r8a774c0", 456 "renesas,rcar-gen3-hscif", 457 "renesas,hscif"; 458 reg = <0 0xe6540000 0 0x60>; 459 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 460 clocks = <&cpg CPG_MOD 520>, 461 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 462 <&scif_clk>; 463 clock-names = "fck", "brg_int", "scif_clk"; 464 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 465 <&dmac2 0x31>, <&dmac2 0x30>; 466 dma-names = "tx", "rx", "tx", "rx"; 467 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 468 resets = <&cpg 520>; 469 status = "disabled"; 470 }; 471 472 hscif1: serial@e6550000 { 473 compatible = "renesas,hscif-r8a774c0", 474 "renesas,rcar-gen3-hscif", 475 "renesas,hscif"; 476 reg = <0 0xe6550000 0 0x60>; 477 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 478 clocks = <&cpg CPG_MOD 519>, 479 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 480 <&scif_clk>; 481 clock-names = "fck", "brg_int", "scif_clk"; 482 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 483 <&dmac2 0x33>, <&dmac2 0x32>; 484 dma-names = "tx", "rx", "tx", "rx"; 485 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 486 resets = <&cpg 519>; 487 status = "disabled"; 488 }; 489 490 hscif2: serial@e6560000 { 491 compatible = "renesas,hscif-r8a774c0", 492 "renesas,rcar-gen3-hscif", 493 "renesas,hscif"; 494 reg = <0 0xe6560000 0 0x60>; 495 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 496 clocks = <&cpg CPG_MOD 518>, 497 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 498 <&scif_clk>; 499 clock-names = "fck", "brg_int", "scif_clk"; 500 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 501 <&dmac2 0x35>, <&dmac2 0x34>; 502 dma-names = "tx", "rx", "tx", "rx"; 503 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 504 resets = <&cpg 518>; 505 status = "disabled"; 506 }; 507 508 hscif3: serial@e66a0000 { 509 compatible = "renesas,hscif-r8a774c0", 510 "renesas,rcar-gen3-hscif", 511 "renesas,hscif"; 512 reg = <0 0xe66a0000 0 0x60>; 513 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 514 clocks = <&cpg CPG_MOD 517>, 515 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 516 <&scif_clk>; 517 clock-names = "fck", "brg_int", "scif_clk"; 518 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 519 dma-names = "tx", "rx"; 520 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 521 resets = <&cpg 517>; 522 status = "disabled"; 523 }; 524 525 hscif4: serial@e66b0000 { 526 compatible = "renesas,hscif-r8a774c0", 527 "renesas,rcar-gen3-hscif", 528 "renesas,hscif"; 529 reg = <0 0xe66b0000 0 0x60>; 530 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 531 clocks = <&cpg CPG_MOD 516>, 532 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 533 <&scif_clk>; 534 clock-names = "fck", "brg_int", "scif_clk"; 535 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 536 dma-names = "tx", "rx"; 537 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 538 resets = <&cpg 516>; 539 status = "disabled"; 540 }; 541 542 hsusb: usb@e6590000 { 543 compatible = "renesas,usbhs-r8a774c0", 544 "renesas,rcar-gen3-usbhs"; 545 reg = <0 0xe6590000 0 0x200>; 546 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 547 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 548 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 549 <&usb_dmac1 0>, <&usb_dmac1 1>; 550 dma-names = "ch0", "ch1", "ch2", "ch3"; 551 renesas,buswait = <11>; 552 phys = <&usb2_phy0>; 553 phy-names = "usb"; 554 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 555 resets = <&cpg 704>, <&cpg 703>; 556 status = "disabled"; 557 }; 558 559 usb_dmac0: dma-controller@e65a0000 { 560 compatible = "renesas,r8a774c0-usb-dmac", 561 "renesas,usb-dmac"; 562 reg = <0 0xe65a0000 0 0x100>; 563 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 564 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 565 interrupt-names = "ch0", "ch1"; 566 clocks = <&cpg CPG_MOD 330>; 567 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 568 resets = <&cpg 330>; 569 #dma-cells = <1>; 570 dma-channels = <2>; 571 }; 572 573 usb_dmac1: dma-controller@e65b0000 { 574 compatible = "renesas,r8a774c0-usb-dmac", 575 "renesas,usb-dmac"; 576 reg = <0 0xe65b0000 0 0x100>; 577 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 578 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 579 interrupt-names = "ch0", "ch1"; 580 clocks = <&cpg CPG_MOD 331>; 581 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 582 resets = <&cpg 331>; 583 #dma-cells = <1>; 584 dma-channels = <2>; 585 }; 586 587 dmac0: dma-controller@e6700000 { 588 compatible = "renesas,dmac-r8a774c0", 589 "renesas,rcar-dmac"; 590 reg = <0 0xe6700000 0 0x10000>; 591 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 592 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 593 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 594 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 595 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 596 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 597 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 598 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 599 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 600 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 601 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 602 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 603 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 604 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 605 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 606 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 607 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 608 interrupt-names = "error", 609 "ch0", "ch1", "ch2", "ch3", 610 "ch4", "ch5", "ch6", "ch7", 611 "ch8", "ch9", "ch10", "ch11", 612 "ch12", "ch13", "ch14", "ch15"; 613 clocks = <&cpg CPG_MOD 219>; 614 clock-names = "fck"; 615 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 616 resets = <&cpg 219>; 617 #dma-cells = <1>; 618 dma-channels = <16>; 619 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 620 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 621 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 622 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 623 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 624 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 625 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 626 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 627 }; 628 629 dmac1: dma-controller@e7300000 { 630 compatible = "renesas,dmac-r8a774c0", 631 "renesas,rcar-dmac"; 632 reg = <0 0xe7300000 0 0x10000>; 633 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 634 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 635 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 636 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 637 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 638 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 639 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 640 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 641 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 642 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 643 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 644 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 645 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 646 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 647 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 648 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 649 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 650 interrupt-names = "error", 651 "ch0", "ch1", "ch2", "ch3", 652 "ch4", "ch5", "ch6", "ch7", 653 "ch8", "ch9", "ch10", "ch11", 654 "ch12", "ch13", "ch14", "ch15"; 655 clocks = <&cpg CPG_MOD 218>; 656 clock-names = "fck"; 657 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 658 resets = <&cpg 218>; 659 #dma-cells = <1>; 660 dma-channels = <16>; 661 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 662 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 663 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 664 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 665 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 666 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 667 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 668 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 669 }; 670 671 dmac2: dma-controller@e7310000 { 672 compatible = "renesas,dmac-r8a774c0", 673 "renesas,rcar-dmac"; 674 reg = <0 0xe7310000 0 0x10000>; 675 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 676 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 677 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 678 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 679 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 680 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 681 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 682 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 683 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 684 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 685 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 686 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 687 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 688 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 689 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 690 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 691 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 692 interrupt-names = "error", 693 "ch0", "ch1", "ch2", "ch3", 694 "ch4", "ch5", "ch6", "ch7", 695 "ch8", "ch9", "ch10", "ch11", 696 "ch12", "ch13", "ch14", "ch15"; 697 clocks = <&cpg CPG_MOD 217>; 698 clock-names = "fck"; 699 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 700 resets = <&cpg 217>; 701 #dma-cells = <1>; 702 dma-channels = <16>; 703 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 704 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 705 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 706 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 707 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 708 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 709 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 710 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 711 }; 712 713 ipmmu_ds0: mmu@e6740000 { 714 compatible = "renesas,ipmmu-r8a774c0"; 715 reg = <0 0xe6740000 0 0x1000>; 716 renesas,ipmmu-main = <&ipmmu_mm 0>; 717 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 718 #iommu-cells = <1>; 719 }; 720 721 ipmmu_ds1: mmu@e7740000 { 722 compatible = "renesas,ipmmu-r8a774c0"; 723 reg = <0 0xe7740000 0 0x1000>; 724 renesas,ipmmu-main = <&ipmmu_mm 1>; 725 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 726 #iommu-cells = <1>; 727 }; 728 729 ipmmu_hc: mmu@e6570000 { 730 compatible = "renesas,ipmmu-r8a774c0"; 731 reg = <0 0xe6570000 0 0x1000>; 732 renesas,ipmmu-main = <&ipmmu_mm 2>; 733 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 734 #iommu-cells = <1>; 735 }; 736 737 ipmmu_mm: mmu@e67b0000 { 738 compatible = "renesas,ipmmu-r8a774c0"; 739 reg = <0 0xe67b0000 0 0x1000>; 740 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 741 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 742 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 743 #iommu-cells = <1>; 744 }; 745 746 ipmmu_mp: mmu@ec670000 { 747 compatible = "renesas,ipmmu-r8a774c0"; 748 reg = <0 0xec670000 0 0x1000>; 749 renesas,ipmmu-main = <&ipmmu_mm 4>; 750 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 751 #iommu-cells = <1>; 752 }; 753 754 ipmmu_pv0: mmu@fd800000 { 755 compatible = "renesas,ipmmu-r8a774c0"; 756 reg = <0 0xfd800000 0 0x1000>; 757 renesas,ipmmu-main = <&ipmmu_mm 6>; 758 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 759 #iommu-cells = <1>; 760 }; 761 762 ipmmu_vc0: mmu@fe6b0000 { 763 compatible = "renesas,ipmmu-r8a774c0"; 764 reg = <0 0xfe6b0000 0 0x1000>; 765 renesas,ipmmu-main = <&ipmmu_mm 12>; 766 power-domains = <&sysc R8A774C0_PD_A3VC>; 767 #iommu-cells = <1>; 768 }; 769 770 ipmmu_vi0: mmu@febd0000 { 771 compatible = "renesas,ipmmu-r8a774c0"; 772 reg = <0 0xfebd0000 0 0x1000>; 773 renesas,ipmmu-main = <&ipmmu_mm 14>; 774 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 775 #iommu-cells = <1>; 776 }; 777 778 ipmmu_vp0: mmu@fe990000 { 779 compatible = "renesas,ipmmu-r8a774c0"; 780 reg = <0 0xfe990000 0 0x1000>; 781 renesas,ipmmu-main = <&ipmmu_mm 16>; 782 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 783 #iommu-cells = <1>; 784 }; 785 786 avb: ethernet@e6800000 { 787 compatible = "renesas,etheravb-r8a774c0", 788 "renesas,etheravb-rcar-gen3"; 789 reg = <0 0xe6800000 0 0x800>; 790 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 791 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 792 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 793 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 794 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 795 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 796 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 797 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 798 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 799 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 800 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 801 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 802 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 803 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 804 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 805 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 806 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 807 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 808 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 809 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 810 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 811 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 812 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 813 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 814 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 815 interrupt-names = "ch0", "ch1", "ch2", "ch3", 816 "ch4", "ch5", "ch6", "ch7", 817 "ch8", "ch9", "ch10", "ch11", 818 "ch12", "ch13", "ch14", "ch15", 819 "ch16", "ch17", "ch18", "ch19", 820 "ch20", "ch21", "ch22", "ch23", 821 "ch24"; 822 clocks = <&cpg CPG_MOD 812>; 823 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 824 resets = <&cpg 812>; 825 phy-mode = "rgmii"; 826 iommus = <&ipmmu_ds0 16>; 827 #address-cells = <1>; 828 #size-cells = <0>; 829 status = "disabled"; 830 }; 831 832 can0: can@e6c30000 { 833 compatible = "renesas,can-r8a774c0", 834 "renesas,rcar-gen3-can"; 835 reg = <0 0xe6c30000 0 0x1000>; 836 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 837 clocks = <&cpg CPG_MOD 916>, <&can_clk>; 838 clock-names = "clkp1", "can_clk"; 839 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 840 resets = <&cpg 916>; 841 status = "disabled"; 842 }; 843 844 can1: can@e6c38000 { 845 compatible = "renesas,can-r8a774c0", 846 "renesas,rcar-gen3-can"; 847 reg = <0 0xe6c38000 0 0x1000>; 848 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 849 clocks = <&cpg CPG_MOD 915>, <&can_clk>; 850 clock-names = "clkp1", "can_clk"; 851 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 852 resets = <&cpg 915>; 853 status = "disabled"; 854 }; 855 856 pwm0: pwm@e6e30000 { 857 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 858 reg = <0 0xe6e30000 0 0x8>; 859 clocks = <&cpg CPG_MOD 523>; 860 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 861 resets = <&cpg 523>; 862 #pwm-cells = <2>; 863 status = "disabled"; 864 }; 865 866 pwm1: pwm@e6e31000 { 867 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 868 reg = <0 0xe6e31000 0 0x8>; 869 clocks = <&cpg CPG_MOD 523>; 870 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 871 resets = <&cpg 523>; 872 #pwm-cells = <2>; 873 status = "disabled"; 874 }; 875 876 pwm2: pwm@e6e32000 { 877 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 878 reg = <0 0xe6e32000 0 0x8>; 879 clocks = <&cpg CPG_MOD 523>; 880 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 881 resets = <&cpg 523>; 882 #pwm-cells = <2>; 883 status = "disabled"; 884 }; 885 886 pwm3: pwm@e6e33000 { 887 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 888 reg = <0 0xe6e33000 0 0x8>; 889 clocks = <&cpg CPG_MOD 523>; 890 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 891 resets = <&cpg 523>; 892 #pwm-cells = <2>; 893 status = "disabled"; 894 }; 895 896 pwm4: pwm@e6e34000 { 897 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 898 reg = <0 0xe6e34000 0 0x8>; 899 clocks = <&cpg CPG_MOD 523>; 900 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 901 resets = <&cpg 523>; 902 #pwm-cells = <2>; 903 status = "disabled"; 904 }; 905 906 pwm5: pwm@e6e35000 { 907 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 908 reg = <0 0xe6e35000 0 0x8>; 909 clocks = <&cpg CPG_MOD 523>; 910 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 911 resets = <&cpg 523>; 912 #pwm-cells = <2>; 913 status = "disabled"; 914 }; 915 916 pwm6: pwm@e6e36000 { 917 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 918 reg = <0 0xe6e36000 0 0x8>; 919 clocks = <&cpg CPG_MOD 523>; 920 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 921 resets = <&cpg 523>; 922 #pwm-cells = <2>; 923 status = "disabled"; 924 }; 925 926 scif0: serial@e6e60000 { 927 compatible = "renesas,scif-r8a774c0", 928 "renesas,rcar-gen3-scif", "renesas,scif"; 929 reg = <0 0xe6e60000 0 64>; 930 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 931 clocks = <&cpg CPG_MOD 207>, 932 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 933 <&scif_clk>; 934 clock-names = "fck", "brg_int", "scif_clk"; 935 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 936 <&dmac2 0x51>, <&dmac2 0x50>; 937 dma-names = "tx", "rx", "tx", "rx"; 938 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 939 resets = <&cpg 207>; 940 status = "disabled"; 941 }; 942 943 scif1: serial@e6e68000 { 944 compatible = "renesas,scif-r8a774c0", 945 "renesas,rcar-gen3-scif", "renesas,scif"; 946 reg = <0 0xe6e68000 0 64>; 947 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 948 clocks = <&cpg CPG_MOD 206>, 949 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 950 <&scif_clk>; 951 clock-names = "fck", "brg_int", "scif_clk"; 952 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 953 <&dmac2 0x53>, <&dmac2 0x52>; 954 dma-names = "tx", "rx", "tx", "rx"; 955 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 956 resets = <&cpg 206>; 957 status = "disabled"; 958 }; 959 960 scif2: serial@e6e88000 { 961 compatible = "renesas,scif-r8a774c0", 962 "renesas,rcar-gen3-scif", "renesas,scif"; 963 reg = <0 0xe6e88000 0 64>; 964 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 965 clocks = <&cpg CPG_MOD 310>, 966 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 967 <&scif_clk>; 968 clock-names = "fck", "brg_int", "scif_clk"; 969 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 970 <&dmac2 0x13>, <&dmac2 0x12>; 971 dma-names = "tx", "rx", "tx", "rx"; 972 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 973 resets = <&cpg 310>; 974 status = "disabled"; 975 }; 976 977 scif3: serial@e6c50000 { 978 compatible = "renesas,scif-r8a774c0", 979 "renesas,rcar-gen3-scif", "renesas,scif"; 980 reg = <0 0xe6c50000 0 64>; 981 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 982 clocks = <&cpg CPG_MOD 204>, 983 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 984 <&scif_clk>; 985 clock-names = "fck", "brg_int", "scif_clk"; 986 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 987 dma-names = "tx", "rx"; 988 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 989 resets = <&cpg 204>; 990 status = "disabled"; 991 }; 992 993 scif4: serial@e6c40000 { 994 compatible = "renesas,scif-r8a774c0", 995 "renesas,rcar-gen3-scif", "renesas,scif"; 996 reg = <0 0xe6c40000 0 64>; 997 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 998 clocks = <&cpg CPG_MOD 203>, 999 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1000 <&scif_clk>; 1001 clock-names = "fck", "brg_int", "scif_clk"; 1002 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1003 dma-names = "tx", "rx"; 1004 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1005 resets = <&cpg 203>; 1006 status = "disabled"; 1007 }; 1008 1009 scif5: serial@e6f30000 { 1010 compatible = "renesas,scif-r8a774c0", 1011 "renesas,rcar-gen3-scif", "renesas,scif"; 1012 reg = <0 0xe6f30000 0 64>; 1013 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1014 clocks = <&cpg CPG_MOD 202>, 1015 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1016 <&scif_clk>; 1017 clock-names = "fck", "brg_int", "scif_clk"; 1018 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1019 <&dmac2 0x5b>, <&dmac2 0x5a>; 1020 dma-names = "tx", "rx", "tx", "rx"; 1021 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1022 resets = <&cpg 202>; 1023 status = "disabled"; 1024 }; 1025 1026 msiof0: spi@e6e90000 { 1027 compatible = "renesas,msiof-r8a774c0", 1028 "renesas,rcar-gen3-msiof"; 1029 reg = <0 0xe6e90000 0 0x0064>; 1030 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1031 clocks = <&cpg CPG_MOD 211>; 1032 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1033 <&dmac2 0x41>, <&dmac2 0x40>; 1034 dma-names = "tx", "rx", "tx", "rx"; 1035 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1036 resets = <&cpg 211>; 1037 #address-cells = <1>; 1038 #size-cells = <0>; 1039 status = "disabled"; 1040 }; 1041 1042 msiof1: spi@e6ea0000 { 1043 compatible = "renesas,msiof-r8a774c0", 1044 "renesas,rcar-gen3-msiof"; 1045 reg = <0 0xe6ea0000 0 0x0064>; 1046 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1047 clocks = <&cpg CPG_MOD 210>; 1048 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1049 <&dmac2 0x43>, <&dmac2 0x42>; 1050 dma-names = "tx", "rx", "tx", "rx"; 1051 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1052 resets = <&cpg 210>; 1053 #address-cells = <1>; 1054 #size-cells = <0>; 1055 status = "disabled"; 1056 }; 1057 1058 msiof2: spi@e6c00000 { 1059 compatible = "renesas,msiof-r8a774c0", 1060 "renesas,rcar-gen3-msiof"; 1061 reg = <0 0xe6c00000 0 0x0064>; 1062 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1063 clocks = <&cpg CPG_MOD 209>; 1064 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1065 dma-names = "tx", "rx"; 1066 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1067 resets = <&cpg 209>; 1068 #address-cells = <1>; 1069 #size-cells = <0>; 1070 status = "disabled"; 1071 }; 1072 1073 msiof3: spi@e6c10000 { 1074 compatible = "renesas,msiof-r8a774c0", 1075 "renesas,rcar-gen3-msiof"; 1076 reg = <0 0xe6c10000 0 0x0064>; 1077 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1078 clocks = <&cpg CPG_MOD 208>; 1079 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1080 dma-names = "tx", "rx"; 1081 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1082 resets = <&cpg 208>; 1083 #address-cells = <1>; 1084 #size-cells = <0>; 1085 status = "disabled"; 1086 }; 1087 1088 vin4: video@e6ef4000 { 1089 compatible = "renesas,vin-r8a774c0"; 1090 reg = <0 0xe6ef4000 0 0x1000>; 1091 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1092 clocks = <&cpg CPG_MOD 807>; 1093 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1094 resets = <&cpg 807>; 1095 renesas,id = <4>; 1096 status = "disabled"; 1097 1098 ports { 1099 #address-cells = <1>; 1100 #size-cells = <0>; 1101 1102 port@1 { 1103 #address-cells = <1>; 1104 #size-cells = <0>; 1105 1106 reg = <1>; 1107 1108 vin4csi40: endpoint@2 { 1109 reg = <2>; 1110 remote-endpoint= <&csi40vin4>; 1111 }; 1112 }; 1113 }; 1114 }; 1115 1116 vin5: video@e6ef5000 { 1117 compatible = "renesas,vin-r8a774c0"; 1118 reg = <0 0xe6ef5000 0 0x1000>; 1119 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1120 clocks = <&cpg CPG_MOD 806>; 1121 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1122 resets = <&cpg 806>; 1123 renesas,id = <5>; 1124 status = "disabled"; 1125 1126 ports { 1127 #address-cells = <1>; 1128 #size-cells = <0>; 1129 1130 port@1 { 1131 #address-cells = <1>; 1132 #size-cells = <0>; 1133 1134 reg = <1>; 1135 1136 vin5csi40: endpoint@2 { 1137 reg = <2>; 1138 remote-endpoint= <&csi40vin5>; 1139 }; 1140 }; 1141 }; 1142 }; 1143 1144 rcar_sound: sound@ec500000 { 1145 /* 1146 * #sound-dai-cells is required 1147 * 1148 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1149 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1150 */ 1151 /* 1152 * #clock-cells is required for audio_clkout0/1/2/3 1153 * 1154 * clkout : #clock-cells = <0>; <&rcar_sound>; 1155 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1156 */ 1157 compatible = "renesas,rcar_sound-r8a774c0", 1158 "renesas,rcar_sound-gen3"; 1159 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1160 <0 0xec5a0000 0 0x100>, /* ADG */ 1161 <0 0xec540000 0 0x1000>, /* SSIU */ 1162 <0 0xec541000 0 0x280>, /* SSI */ 1163 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1164 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1165 1166 clocks = <&cpg CPG_MOD 1005>, 1167 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1168 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1169 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1170 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1171 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1172 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1173 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1174 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1175 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1176 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1177 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1178 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1179 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1180 <&audio_clk_a>, <&audio_clk_b>, 1181 <&audio_clk_c>, 1182 <&cpg CPG_CORE R8A774C0_CLK_ZA2>; 1183 clock-names = "ssi-all", 1184 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1185 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1186 "ssi.1", "ssi.0", 1187 "src.9", "src.8", "src.7", "src.6", 1188 "src.5", "src.4", "src.3", "src.2", 1189 "src.1", "src.0", 1190 "mix.1", "mix.0", 1191 "ctu.1", "ctu.0", 1192 "dvc.0", "dvc.1", 1193 "clk_a", "clk_b", "clk_c", "clk_i"; 1194 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1195 resets = <&cpg 1005>, 1196 <&cpg 1006>, <&cpg 1007>, 1197 <&cpg 1008>, <&cpg 1009>, 1198 <&cpg 1010>, <&cpg 1011>, 1199 <&cpg 1012>, <&cpg 1013>, 1200 <&cpg 1014>, <&cpg 1015>; 1201 reset-names = "ssi-all", 1202 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1203 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1204 "ssi.1", "ssi.0"; 1205 status = "disabled"; 1206 1207 rcar_sound,dvc { 1208 dvc0: dvc-0 { 1209 dmas = <&audma0 0xbc>; 1210 dma-names = "tx"; 1211 }; 1212 dvc1: dvc-1 { 1213 dmas = <&audma0 0xbe>; 1214 dma-names = "tx"; 1215 }; 1216 }; 1217 1218 rcar_sound,mix { 1219 mix0: mix-0 { }; 1220 mix1: mix-1 { }; 1221 }; 1222 1223 rcar_sound,ctu { 1224 ctu00: ctu-0 { }; 1225 ctu01: ctu-1 { }; 1226 ctu02: ctu-2 { }; 1227 ctu03: ctu-3 { }; 1228 ctu10: ctu-4 { }; 1229 ctu11: ctu-5 { }; 1230 ctu12: ctu-6 { }; 1231 ctu13: ctu-7 { }; 1232 }; 1233 1234 rcar_sound,src { 1235 src0: src-0 { 1236 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1237 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1238 dma-names = "rx", "tx"; 1239 }; 1240 src1: src-1 { 1241 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1242 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1243 dma-names = "rx", "tx"; 1244 }; 1245 src2: src-2 { 1246 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1247 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1248 dma-names = "rx", "tx"; 1249 }; 1250 src3: src-3 { 1251 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1252 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1253 dma-names = "rx", "tx"; 1254 }; 1255 src4: src-4 { 1256 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1257 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1258 dma-names = "rx", "tx"; 1259 }; 1260 src5: src-5 { 1261 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1262 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1263 dma-names = "rx", "tx"; 1264 }; 1265 src6: src-6 { 1266 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1267 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1268 dma-names = "rx", "tx"; 1269 }; 1270 src7: src-7 { 1271 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1272 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1273 dma-names = "rx", "tx"; 1274 }; 1275 src8: src-8 { 1276 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1277 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1278 dma-names = "rx", "tx"; 1279 }; 1280 src9: src-9 { 1281 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1282 dmas = <&audma0 0x97>, <&audma0 0xba>; 1283 dma-names = "rx", "tx"; 1284 }; 1285 }; 1286 1287 rcar_sound,ssi { 1288 ssi0: ssi-0 { 1289 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1290 dmas = <&audma0 0x01>, <&audma0 0x02>, 1291 <&audma0 0x15>, <&audma0 0x16>; 1292 dma-names = "rx", "tx", "rxu", "txu"; 1293 }; 1294 ssi1: ssi-1 { 1295 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1296 dmas = <&audma0 0x03>, <&audma0 0x04>, 1297 <&audma0 0x49>, <&audma0 0x4a>; 1298 dma-names = "rx", "tx", "rxu", "txu"; 1299 }; 1300 ssi2: ssi-2 { 1301 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1302 dmas = <&audma0 0x05>, <&audma0 0x06>, 1303 <&audma0 0x63>, <&audma0 0x64>; 1304 dma-names = "rx", "tx", "rxu", "txu"; 1305 }; 1306 ssi3: ssi-3 { 1307 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1308 dmas = <&audma0 0x07>, <&audma0 0x08>, 1309 <&audma0 0x6f>, <&audma0 0x70>; 1310 dma-names = "rx", "tx", "rxu", "txu"; 1311 }; 1312 ssi4: ssi-4 { 1313 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1314 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1315 <&audma0 0x71>, <&audma0 0x72>; 1316 dma-names = "rx", "tx", "rxu", "txu"; 1317 }; 1318 ssi5: ssi-5 { 1319 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1320 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1321 <&audma0 0x73>, <&audma0 0x74>; 1322 dma-names = "rx", "tx", "rxu", "txu"; 1323 }; 1324 ssi6: ssi-6 { 1325 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1326 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1327 <&audma0 0x75>, <&audma0 0x76>; 1328 dma-names = "rx", "tx", "rxu", "txu"; 1329 }; 1330 ssi7: ssi-7 { 1331 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1332 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1333 <&audma0 0x79>, <&audma0 0x7a>; 1334 dma-names = "rx", "tx", "rxu", "txu"; 1335 }; 1336 ssi8: ssi-8 { 1337 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1338 dmas = <&audma0 0x11>, <&audma0 0x12>, 1339 <&audma0 0x7b>, <&audma0 0x7c>; 1340 dma-names = "rx", "tx", "rxu", "txu"; 1341 }; 1342 ssi9: ssi-9 { 1343 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1344 dmas = <&audma0 0x13>, <&audma0 0x14>, 1345 <&audma0 0x7d>, <&audma0 0x7e>; 1346 dma-names = "rx", "tx", "rxu", "txu"; 1347 }; 1348 }; 1349 }; 1350 1351 audma0: dma-controller@ec700000 { 1352 compatible = "renesas,dmac-r8a774c0", 1353 "renesas,rcar-dmac"; 1354 reg = <0 0xec700000 0 0x10000>; 1355 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1356 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1357 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1358 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1359 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1360 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1361 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1362 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1363 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1364 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1365 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1366 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1367 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1368 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 1369 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1370 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1371 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1372 interrupt-names = "error", 1373 "ch0", "ch1", "ch2", "ch3", 1374 "ch4", "ch5", "ch6", "ch7", 1375 "ch8", "ch9", "ch10", "ch11", 1376 "ch12", "ch13", "ch14", "ch15"; 1377 clocks = <&cpg CPG_MOD 502>; 1378 clock-names = "fck"; 1379 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1380 resets = <&cpg 502>; 1381 #dma-cells = <1>; 1382 dma-channels = <16>; 1383 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1384 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1385 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1386 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1387 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1388 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1389 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1390 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1391 }; 1392 1393 xhci0: usb@ee000000 { 1394 compatible = "renesas,xhci-r8a774c0", 1395 "renesas,rcar-gen3-xhci"; 1396 reg = <0 0xee000000 0 0xc00>; 1397 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1398 clocks = <&cpg CPG_MOD 328>; 1399 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1400 resets = <&cpg 328>; 1401 status = "disabled"; 1402 }; 1403 1404 usb3_peri0: usb@ee020000 { 1405 compatible = "renesas,r8a774c0-usb3-peri", 1406 "renesas,rcar-gen3-usb3-peri"; 1407 reg = <0 0xee020000 0 0x400>; 1408 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1409 clocks = <&cpg CPG_MOD 328>; 1410 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1411 resets = <&cpg 328>; 1412 status = "disabled"; 1413 }; 1414 1415 ohci0: usb@ee080000 { 1416 compatible = "generic-ohci"; 1417 reg = <0 0xee080000 0 0x100>; 1418 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1419 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1420 phys = <&usb2_phy0>; 1421 phy-names = "usb"; 1422 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1423 resets = <&cpg 703>, <&cpg 704>; 1424 status = "disabled"; 1425 }; 1426 1427 ehci0: usb@ee080100 { 1428 compatible = "generic-ehci"; 1429 reg = <0 0xee080100 0 0x100>; 1430 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1431 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1432 phys = <&usb2_phy0>; 1433 phy-names = "usb"; 1434 companion = <&ohci0>; 1435 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1436 resets = <&cpg 703>, <&cpg 704>; 1437 status = "disabled"; 1438 }; 1439 1440 usb2_phy0: usb-phy@ee080200 { 1441 compatible = "renesas,usb2-phy-r8a774c0", 1442 "renesas,rcar-gen3-usb2-phy"; 1443 reg = <0 0xee080200 0 0x700>; 1444 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1445 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1446 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1447 resets = <&cpg 703>, <&cpg 704>; 1448 #phy-cells = <0>; 1449 status = "disabled"; 1450 }; 1451 1452 sdhi0: sd@ee100000 { 1453 compatible = "renesas,sdhi-r8a774c0", 1454 "renesas,rcar-gen3-sdhi"; 1455 reg = <0 0xee100000 0 0x2000>; 1456 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1457 clocks = <&cpg CPG_MOD 314>; 1458 max-frequency = <200000000>; 1459 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1460 resets = <&cpg 314>; 1461 status = "disabled"; 1462 }; 1463 1464 sdhi1: sd@ee120000 { 1465 compatible = "renesas,sdhi-r8a774c0", 1466 "renesas,rcar-gen3-sdhi"; 1467 reg = <0 0xee120000 0 0x2000>; 1468 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1469 clocks = <&cpg CPG_MOD 313>; 1470 max-frequency = <200000000>; 1471 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1472 resets = <&cpg 313>; 1473 status = "disabled"; 1474 }; 1475 1476 sdhi3: sd@ee160000 { 1477 compatible = "renesas,sdhi-r8a774c0", 1478 "renesas,rcar-gen3-sdhi"; 1479 reg = <0 0xee160000 0 0x2000>; 1480 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1481 clocks = <&cpg CPG_MOD 311>; 1482 max-frequency = <200000000>; 1483 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1484 resets = <&cpg 311>; 1485 status = "disabled"; 1486 }; 1487 1488 gic: interrupt-controller@f1010000 { 1489 compatible = "arm,gic-400"; 1490 #interrupt-cells = <3>; 1491 #address-cells = <0>; 1492 interrupt-controller; 1493 reg = <0x0 0xf1010000 0 0x1000>, 1494 <0x0 0xf1020000 0 0x20000>, 1495 <0x0 0xf1040000 0 0x20000>, 1496 <0x0 0xf1060000 0 0x20000>; 1497 interrupts = <GIC_PPI 9 1498 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1499 clocks = <&cpg CPG_MOD 408>; 1500 clock-names = "clk"; 1501 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1502 resets = <&cpg 408>; 1503 }; 1504 1505 pciec0: pcie@fe000000 { 1506 compatible = "renesas,pcie-r8a774c0", 1507 "renesas,pcie-rcar-gen3"; 1508 reg = <0 0xfe000000 0 0x80000>; 1509 #address-cells = <3>; 1510 #size-cells = <2>; 1511 bus-range = <0x00 0xff>; 1512 device_type = "pci"; 1513 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 1514 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 1515 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 1516 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1517 /* Map all possible DDR as inbound ranges */ 1518 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; 1519 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1520 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1521 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1522 #interrupt-cells = <1>; 1523 interrupt-map-mask = <0 0 0 0>; 1524 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1525 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1526 clock-names = "pcie", "pcie_bus"; 1527 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1528 resets = <&cpg 319>; 1529 status = "disabled"; 1530 }; 1531 1532 vspb0: vsp@fe960000 { 1533 compatible = "renesas,vsp2"; 1534 reg = <0 0xfe960000 0 0x8000>; 1535 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1536 clocks = <&cpg CPG_MOD 626>; 1537 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1538 resets = <&cpg 626>; 1539 renesas,fcp = <&fcpvb0>; 1540 }; 1541 1542 fcpvb0: fcp@fe96f000 { 1543 compatible = "renesas,fcpv"; 1544 reg = <0 0xfe96f000 0 0x200>; 1545 clocks = <&cpg CPG_MOD 607>; 1546 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1547 resets = <&cpg 607>; 1548 iommus = <&ipmmu_vp0 5>; 1549 }; 1550 1551 vspi0: vsp@fe9a0000 { 1552 compatible = "renesas,vsp2"; 1553 reg = <0 0xfe9a0000 0 0x8000>; 1554 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1555 clocks = <&cpg CPG_MOD 631>; 1556 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1557 resets = <&cpg 631>; 1558 renesas,fcp = <&fcpvi0>; 1559 }; 1560 1561 fcpvi0: fcp@fe9af000 { 1562 compatible = "renesas,fcpv"; 1563 reg = <0 0xfe9af000 0 0x200>; 1564 clocks = <&cpg CPG_MOD 611>; 1565 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1566 resets = <&cpg 611>; 1567 iommus = <&ipmmu_vp0 8>; 1568 }; 1569 1570 vspd0: vsp@fea20000 { 1571 compatible = "renesas,vsp2"; 1572 reg = <0 0xfea20000 0 0x7000>; 1573 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1574 clocks = <&cpg CPG_MOD 623>; 1575 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1576 resets = <&cpg 623>; 1577 renesas,fcp = <&fcpvd0>; 1578 }; 1579 1580 fcpvd0: fcp@fea27000 { 1581 compatible = "renesas,fcpv"; 1582 reg = <0 0xfea27000 0 0x200>; 1583 clocks = <&cpg CPG_MOD 603>; 1584 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1585 resets = <&cpg 603>; 1586 iommus = <&ipmmu_vi0 8>; 1587 }; 1588 1589 vspd1: vsp@fea28000 { 1590 compatible = "renesas,vsp2"; 1591 reg = <0 0xfea28000 0 0x7000>; 1592 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1593 clocks = <&cpg CPG_MOD 622>; 1594 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1595 resets = <&cpg 622>; 1596 renesas,fcp = <&fcpvd1>; 1597 }; 1598 1599 fcpvd1: fcp@fea2f000 { 1600 compatible = "renesas,fcpv"; 1601 reg = <0 0xfea2f000 0 0x200>; 1602 clocks = <&cpg CPG_MOD 602>; 1603 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1604 resets = <&cpg 602>; 1605 iommus = <&ipmmu_vi0 9>; 1606 }; 1607 1608 csi40: csi2@feaa0000 { 1609 compatible = "renesas,r8a774c0-csi2", 1610 "renesas,rcar-gen3-csi2"; 1611 reg = <0 0xfeaa0000 0 0x10000>; 1612 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1613 clocks = <&cpg CPG_MOD 716>; 1614 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1615 resets = <&cpg 716>; 1616 status = "disabled"; 1617 1618 ports { 1619 #address-cells = <1>; 1620 #size-cells = <0>; 1621 1622 port@1 { 1623 #address-cells = <1>; 1624 #size-cells = <0>; 1625 1626 reg = <1>; 1627 1628 csi40vin4: endpoint@0 { 1629 reg = <0>; 1630 remote-endpoint = <&vin4csi40>; 1631 }; 1632 csi40vin5: endpoint@1 { 1633 reg = <1>; 1634 remote-endpoint = <&vin5csi40>; 1635 }; 1636 }; 1637 }; 1638 }; 1639 1640 du: display@feb00000 { 1641 compatible = "renesas,du-r8a774c0"; 1642 reg = <0 0xfeb00000 0 0x80000>; 1643 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1644 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1645 clocks = <&cpg CPG_MOD 724>, 1646 <&cpg CPG_MOD 723>; 1647 clock-names = "du.0", "du.1"; 1648 vsps = <&vspd0 0 &vspd1 0>; 1649 status = "disabled"; 1650 1651 ports { 1652 #address-cells = <1>; 1653 #size-cells = <0>; 1654 1655 port@0 { 1656 reg = <0>; 1657 du_out_rgb: endpoint { 1658 }; 1659 }; 1660 1661 port@1 { 1662 reg = <1>; 1663 du_out_lvds0: endpoint { 1664 remote-endpoint = <&lvds0_in>; 1665 }; 1666 }; 1667 1668 port@2 { 1669 reg = <2>; 1670 du_out_lvds1: endpoint { 1671 remote-endpoint = <&lvds1_in>; 1672 }; 1673 }; 1674 }; 1675 }; 1676 1677 lvds0: lvds-encoder@feb90000 { 1678 compatible = "renesas,r8a774c0-lvds"; 1679 reg = <0 0xfeb90000 0 0x20>; 1680 clocks = <&cpg CPG_MOD 727>; 1681 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1682 resets = <&cpg 727>; 1683 status = "disabled"; 1684 1685 ports { 1686 #address-cells = <1>; 1687 #size-cells = <0>; 1688 1689 port@0 { 1690 reg = <0>; 1691 lvds0_in: endpoint { 1692 remote-endpoint = <&du_out_lvds0>; 1693 }; 1694 }; 1695 1696 port@1 { 1697 reg = <1>; 1698 lvds0_out: endpoint { 1699 }; 1700 }; 1701 }; 1702 }; 1703 1704 lvds1: lvds-encoder@feb90100 { 1705 compatible = "renesas,r8a774c0-lvds"; 1706 reg = <0 0xfeb90100 0 0x20>; 1707 clocks = <&cpg CPG_MOD 727>; 1708 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1709 resets = <&cpg 726>; 1710 status = "disabled"; 1711 1712 ports { 1713 #address-cells = <1>; 1714 #size-cells = <0>; 1715 1716 port@0 { 1717 reg = <0>; 1718 lvds1_in: endpoint { 1719 remote-endpoint = <&du_out_lvds1>; 1720 }; 1721 }; 1722 1723 port@1 { 1724 reg = <1>; 1725 lvds1_out: endpoint { 1726 }; 1727 }; 1728 }; 1729 }; 1730 1731 prr: chipid@fff00044 { 1732 compatible = "renesas,prr"; 1733 reg = <0 0xfff00044 0 4>; 1734 }; 1735 }; 1736 1737 thermal-zones { 1738 cpu-thermal { 1739 polling-delay-passive = <250>; 1740 polling-delay = <1000>; 1741 thermal-sensors = <&thermal>; 1742 1743 trips { 1744 cpu-crit { 1745 temperature = <120000>; 1746 hysteresis = <2000>; 1747 type = "critical"; 1748 }; 1749 }; 1750 1751 cooling-maps { 1752 }; 1753 }; 1754 }; 1755 1756 timer { 1757 compatible = "arm,armv8-timer"; 1758 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1759 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1760 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1761 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1762 }; 1763 1764 /* External USB clocks - can be overridden by the board */ 1765 usb3s0_clk: usb3s0 { 1766 compatible = "fixed-clock"; 1767 #clock-cells = <0>; 1768 clock-frequency = <0>; 1769 }; 1770 1771 usb_extal_clk: usb_extal { 1772 compatible = "fixed-clock"; 1773 #clock-cells = <0>; 1774 clock-frequency = <0>; 1775 }; 1776}; 1777