179e7739fSRob Clark// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
279e7739fSRob Clark/*
379e7739fSRob Clark * Google Cheza device tree source (common between revisions)
479e7739fSRob Clark *
579e7739fSRob Clark * Copyright 2018 Google LLC.
679e7739fSRob Clark */
779e7739fSRob Clark
879e7739fSRob Clark#include <dt-bindings/gpio/gpio.h>
979e7739fSRob Clark#include <dt-bindings/input/input.h>
1079e7739fSRob Clark#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
1179e7739fSRob Clark#include "sdm845.dtsi"
1279e7739fSRob Clark
1379e7739fSRob Clark/* PMICs depend on spmi_bus label and so must come after SoC */
1479e7739fSRob Clark#include "pm8005.dtsi"
1579e7739fSRob Clark#include "pm8998.dtsi"
1679e7739fSRob Clark
1779e7739fSRob Clark/ {
1879e7739fSRob Clark	aliases {
1979e7739fSRob Clark		bluetooth0 = &bluetooth;
2079e7739fSRob Clark		hsuart0 = &uart6;
2179e7739fSRob Clark		serial0 = &uart9;
2279e7739fSRob Clark		wifi0 = &wifi;
2379e7739fSRob Clark	};
2479e7739fSRob Clark
2579e7739fSRob Clark	chosen {
2679e7739fSRob Clark		stdout-path = "serial0:115200n8";
2779e7739fSRob Clark	};
2879e7739fSRob Clark
2979e7739fSRob Clark	backlight: backlight {
3079e7739fSRob Clark		compatible = "pwm-backlight";
3179e7739fSRob Clark		pwms = <&cros_ec_pwm 0>;
3279e7739fSRob Clark		enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
3379e7739fSRob Clark		power-supply = <&ppvar_sys>;
3479e7739fSRob Clark		pinctrl-names = "default";
3579e7739fSRob Clark		pinctrl-0 = <&ap_edp_bklten>;
3679e7739fSRob Clark	};
3779e7739fSRob Clark
3879e7739fSRob Clark	/* FIXED REGULATORS - parents above children */
3979e7739fSRob Clark
4079e7739fSRob Clark	/* This is the top level supply and variable voltage */
4179e7739fSRob Clark	ppvar_sys: ppvar-sys-regulator {
4279e7739fSRob Clark		compatible = "regulator-fixed";
4379e7739fSRob Clark		regulator-name = "ppvar_sys";
4479e7739fSRob Clark		regulator-always-on;
4579e7739fSRob Clark		regulator-boot-on;
4679e7739fSRob Clark	};
4779e7739fSRob Clark
4879e7739fSRob Clark	/* This divides ppvar_sys by 2, so voltage is variable */
4979e7739fSRob Clark	src_vph_pwr: src-vph-pwr-regulator {
5079e7739fSRob Clark		compatible = "regulator-fixed";
5179e7739fSRob Clark		regulator-name = "src_vph_pwr";
5279e7739fSRob Clark
5379e7739fSRob Clark		/* EC turns on with switchcap_on_l; always on for AP */
5479e7739fSRob Clark		regulator-always-on;
5579e7739fSRob Clark		regulator-boot-on;
5679e7739fSRob Clark
5779e7739fSRob Clark		vin-supply = <&ppvar_sys>;
5879e7739fSRob Clark	};
5979e7739fSRob Clark
6079e7739fSRob Clark	pp5000_a: pp5000-a-regulator {
6179e7739fSRob Clark		compatible = "regulator-fixed";
6279e7739fSRob Clark		regulator-name = "pp5000_a";
6379e7739fSRob Clark
6479e7739fSRob Clark		/* EC turns on with en_pp5000_a; always on for AP */
6579e7739fSRob Clark		regulator-always-on;
6679e7739fSRob Clark		regulator-boot-on;
6779e7739fSRob Clark		regulator-min-microvolt = <5000000>;
6879e7739fSRob Clark		regulator-max-microvolt = <5000000>;
6979e7739fSRob Clark
7079e7739fSRob Clark		vin-supply = <&ppvar_sys>;
7179e7739fSRob Clark	};
7279e7739fSRob Clark
7379e7739fSRob Clark	src_vreg_bob: src-vreg-bob-regulator {
7479e7739fSRob Clark		compatible = "regulator-fixed";
7579e7739fSRob Clark		regulator-name = "src_vreg_bob";
7679e7739fSRob Clark
7779e7739fSRob Clark		/* EC turns on with vbob_en; always on for AP */
7879e7739fSRob Clark		regulator-always-on;
7979e7739fSRob Clark		regulator-boot-on;
8079e7739fSRob Clark		regulator-min-microvolt = <3600000>;
8179e7739fSRob Clark		regulator-max-microvolt = <3600000>;
8279e7739fSRob Clark
8379e7739fSRob Clark		vin-supply = <&ppvar_sys>;
8479e7739fSRob Clark	};
8579e7739fSRob Clark
8679e7739fSRob Clark	pp3300_dx_edp: pp3300-dx-edp-regulator {
8779e7739fSRob Clark		compatible = "regulator-fixed";
8879e7739fSRob Clark		regulator-name = "pp3300_dx_edp";
8979e7739fSRob Clark
9079e7739fSRob Clark		regulator-min-microvolt = <3300000>;
9179e7739fSRob Clark		regulator-max-microvolt = <3300000>;
9279e7739fSRob Clark
9379e7739fSRob Clark		gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>;
9479e7739fSRob Clark		enable-active-high;
9579e7739fSRob Clark		pinctrl-names = "default";
9679e7739fSRob Clark		pinctrl-0 = <&en_pp3300_dx_edp>;
9779e7739fSRob Clark	};
9879e7739fSRob Clark
9979e7739fSRob Clark	/*
10079e7739fSRob Clark	 * Apparently RPMh does not provide support for PM8998 S4 because it
10179e7739fSRob Clark	 * is always-on; model it as a fixed regulator.
10279e7739fSRob Clark	 */
10379e7739fSRob Clark	src_pp1800_s4a: pm8998-smps4 {
10479e7739fSRob Clark		compatible = "regulator-fixed";
10579e7739fSRob Clark		regulator-name = "src_pp1800_s4a";
10679e7739fSRob Clark
10779e7739fSRob Clark		regulator-min-microvolt = <1800000>;
10879e7739fSRob Clark		regulator-max-microvolt = <1800000>;
10979e7739fSRob Clark
11079e7739fSRob Clark		regulator-always-on;
11179e7739fSRob Clark		regulator-boot-on;
11279e7739fSRob Clark
11379e7739fSRob Clark		vin-supply = <&src_vph_pwr>;
11479e7739fSRob Clark	};
11579e7739fSRob Clark
11679e7739fSRob Clark	/* BOARD-SPECIFIC TOP LEVEL NODES */
11779e7739fSRob Clark
11879e7739fSRob Clark	gpio-keys {
11979e7739fSRob Clark		compatible = "gpio-keys";
12079e7739fSRob Clark		pinctrl-names = "default";
12179e7739fSRob Clark		pinctrl-0 = <&pen_eject_odl>;
12279e7739fSRob Clark
12379e7739fSRob Clark		pen-insert {
12479e7739fSRob Clark			label = "Pen Insert";
12579e7739fSRob Clark			/* Insert = low, eject = high */
12679e7739fSRob Clark			gpios = <&tlmm 119 GPIO_ACTIVE_LOW>;
12779e7739fSRob Clark			linux,code = <SW_PEN_INSERTED>;
12879e7739fSRob Clark			linux,input-type = <EV_SW>;
12979e7739fSRob Clark			wakeup-source;
13079e7739fSRob Clark		};
13179e7739fSRob Clark	};
13279e7739fSRob Clark
13379e7739fSRob Clark	panel: panel {
13479e7739fSRob Clark		compatible ="innolux,p120zdg-bf1";
13579e7739fSRob Clark		power-supply = <&pp3300_dx_edp>;
13679e7739fSRob Clark		backlight = <&backlight>;
13779e7739fSRob Clark		no-hpd;
13879e7739fSRob Clark
13979e7739fSRob Clark		ports {
14079e7739fSRob Clark			panel_in: port {
14179e7739fSRob Clark				panel_in_edp: endpoint {
14279e7739fSRob Clark					remote-endpoint = <&sn65dsi86_out>;
14379e7739fSRob Clark				};
14479e7739fSRob Clark			};
14579e7739fSRob Clark		};
14679e7739fSRob Clark	};
14779e7739fSRob Clark};
14879e7739fSRob Clark
14979e7739fSRob Clark/*
15079e7739fSRob Clark * Reserved memory changes
15179e7739fSRob Clark *
15279e7739fSRob Clark * Putting this all together (out of order with the rest of the file) to keep
15379e7739fSRob Clark * all modifications to the memory map (from sdm845.dtsi) in one place.
15479e7739fSRob Clark */
15579e7739fSRob Clark
15679e7739fSRob Clark/*
15779e7739fSRob Clark * Our mpss_region is 8MB bigger than the default one and that conflicts
15879e7739fSRob Clark * with venus_mem and cdsp_mem.
15979e7739fSRob Clark *
16079e7739fSRob Clark * For venus_mem we'll delete and re-create at a different address.
16179e7739fSRob Clark *
16279e7739fSRob Clark * cdsp_mem isn't used on cheza right now so we won't bother re-creating it; but
16379e7739fSRob Clark * that also means we need to delete cdsp_pas.
16479e7739fSRob Clark */
16579e7739fSRob Clark/delete-node/ &venus_mem;
16679e7739fSRob Clark/delete-node/ &cdsp_mem;
16779e7739fSRob Clark/delete-node/ &cdsp_pas;
16843b0a4b4SRob Clark/delete-node/ &gpu_mem;
16979e7739fSRob Clark
17079e7739fSRob Clark/* Increase the size from 120 MB to 128 MB */
17179e7739fSRob Clark&mpss_region {
17279e7739fSRob Clark	reg = <0 0x8e000000 0 0x8000000>;
17379e7739fSRob Clark};
17479e7739fSRob Clark
17579e7739fSRob Clark/* Increase the size from 2MB to 8MB */
17679e7739fSRob Clark&rmtfs_mem {
17779e7739fSRob Clark	reg = <0 0x88f00000 0 0x800000>;
17879e7739fSRob Clark};
17979e7739fSRob Clark
18079e7739fSRob Clark/ {
18179e7739fSRob Clark	reserved-memory {
18279e7739fSRob Clark		venus_mem: memory@96000000 {
18379e7739fSRob Clark			reg = <0 0x96000000 0 0x500000>;
18479e7739fSRob Clark			no-map;
18579e7739fSRob Clark		};
18679e7739fSRob Clark	};
18779e7739fSRob Clark};
18879e7739fSRob Clark
18979e7739fSRob Clark&qspi {
19079e7739fSRob Clark	status = "okay";
19179e7739fSRob Clark	pinctrl-names = "default";
19279e7739fSRob Clark	pinctrl-0 = <&qspi_clk &qspi_cs0 &qspi_data01>;
19379e7739fSRob Clark
19479e7739fSRob Clark	flash@0 {
19579e7739fSRob Clark		compatible = "jedec,spi-nor";
19679e7739fSRob Clark		reg = <0>;
19779e7739fSRob Clark
19879e7739fSRob Clark		/*
19979e7739fSRob Clark		 * In theory chip supports up to 104 MHz and controller up
20079e7739fSRob Clark		 * to 80 MHz, but above 25 MHz wasn't reliable so we'll use
20179e7739fSRob Clark		 * that for now.  b:117440651
20279e7739fSRob Clark		 */
20379e7739fSRob Clark		spi-max-frequency = <25000000>;
20479e7739fSRob Clark		spi-tx-bus-width = <2>;
20579e7739fSRob Clark		spi-rx-bus-width = <2>;
20679e7739fSRob Clark	};
20779e7739fSRob Clark};
20879e7739fSRob Clark
20979e7739fSRob Clark
21079e7739fSRob Clark&apps_rsc {
21179e7739fSRob Clark	pm8998-rpmh-regulators {
21279e7739fSRob Clark		compatible = "qcom,pm8998-rpmh-regulators";
21379e7739fSRob Clark		qcom,pmic-id = "a";
21479e7739fSRob Clark
21579e7739fSRob Clark		vdd-s1-supply = <&src_vph_pwr>;
21679e7739fSRob Clark		vdd-s2-supply = <&src_vph_pwr>;
21779e7739fSRob Clark		vdd-s3-supply = <&src_vph_pwr>;
21879e7739fSRob Clark		vdd-s4-supply = <&src_vph_pwr>;
21979e7739fSRob Clark		vdd-s5-supply = <&src_vph_pwr>;
22079e7739fSRob Clark		vdd-s6-supply = <&src_vph_pwr>;
22179e7739fSRob Clark		vdd-s7-supply = <&src_vph_pwr>;
22279e7739fSRob Clark		vdd-s8-supply = <&src_vph_pwr>;
22379e7739fSRob Clark		vdd-s9-supply = <&src_vph_pwr>;
22479e7739fSRob Clark		vdd-s10-supply = <&src_vph_pwr>;
22579e7739fSRob Clark		vdd-s11-supply = <&src_vph_pwr>;
22679e7739fSRob Clark		vdd-s12-supply = <&src_vph_pwr>;
22779e7739fSRob Clark		vdd-s13-supply = <&src_vph_pwr>;
22879e7739fSRob Clark		vdd-l1-l27-supply = <&src_pp1025_s7a>;
22979e7739fSRob Clark		vdd-l2-l8-l17-supply = <&src_pp1350_s3a>;
23079e7739fSRob Clark		vdd-l3-l11-supply = <&src_pp1025_s7a>;
23179e7739fSRob Clark		vdd-l4-l5-supply = <&src_pp1025_s7a>;
23279e7739fSRob Clark		vdd-l6-supply = <&src_vph_pwr>;
23379e7739fSRob Clark		vdd-l7-l12-l14-l15-supply = <&src_pp2040_s5a>;
23479e7739fSRob Clark		vdd-l9-supply = <&src_pp2040_s5a>;
23579e7739fSRob Clark		vdd-l10-l23-l25-supply = <&src_vreg_bob>;
23679e7739fSRob Clark		vdd-l13-l19-l21-supply = <&src_vreg_bob>;
23779e7739fSRob Clark		vdd-l16-l28-supply = <&src_vreg_bob>;
23879e7739fSRob Clark		vdd-l18-l22-supply = <&src_vreg_bob>;
23979e7739fSRob Clark		vdd-l20-l24-supply = <&src_vreg_bob>;
24079e7739fSRob Clark		vdd-l26-supply = <&src_pp1350_s3a>;
24179e7739fSRob Clark		vin-lvs-1-2-supply = <&src_pp1800_s4a>;
24279e7739fSRob Clark
24379e7739fSRob Clark		src_pp1125_s2a: smps2 {
24479e7739fSRob Clark			regulator-min-microvolt = <1100000>;
24579e7739fSRob Clark			regulator-max-microvolt = <1100000>;
24679e7739fSRob Clark		};
24779e7739fSRob Clark
24879e7739fSRob Clark		src_pp1350_s3a: smps3 {
24979e7739fSRob Clark			regulator-min-microvolt = <1352000>;
25079e7739fSRob Clark			regulator-max-microvolt = <1352000>;
25179e7739fSRob Clark		};
25279e7739fSRob Clark
25379e7739fSRob Clark		src_pp2040_s5a: smps5 {
25479e7739fSRob Clark			regulator-min-microvolt = <1904000>;
25579e7739fSRob Clark			regulator-max-microvolt = <2040000>;
25679e7739fSRob Clark		};
25779e7739fSRob Clark
25879e7739fSRob Clark		src_pp1025_s7a: smps7 {
25979e7739fSRob Clark			regulator-min-microvolt = <900000>;
26079e7739fSRob Clark			regulator-max-microvolt = <1028000>;
26179e7739fSRob Clark		};
26279e7739fSRob Clark
26379e7739fSRob Clark		vdd_qusb_hs0:
26479e7739fSRob Clark		vdda_hp_pcie_core:
26579e7739fSRob Clark		vdda_mipi_csi0_0p9:
26679e7739fSRob Clark		vdda_mipi_csi1_0p9:
26779e7739fSRob Clark		vdda_mipi_csi2_0p9:
26879e7739fSRob Clark		vdda_mipi_dsi0_pll:
26979e7739fSRob Clark		vdda_mipi_dsi1_pll:
27079e7739fSRob Clark		vdda_qlink_lv:
27179e7739fSRob Clark		vdda_qlink_lv_ck:
27279e7739fSRob Clark		vdda_qrefs_0p875:
27379e7739fSRob Clark		vdda_pcie_core:
27479e7739fSRob Clark		vdda_pll_cc_ebi01:
27579e7739fSRob Clark		vdda_pll_cc_ebi23:
27679e7739fSRob Clark		vdda_sp_sensor:
27779e7739fSRob Clark		vdda_ufs1_core:
27879e7739fSRob Clark		vdda_ufs2_core:
27979e7739fSRob Clark		vdda_usb1_ss_core:
28079e7739fSRob Clark		vdda_usb2_ss_core:
28179e7739fSRob Clark		src_pp875_l1a: ldo1 {
28279e7739fSRob Clark			regulator-min-microvolt = <880000>;
28379e7739fSRob Clark			regulator-max-microvolt = <880000>;
28479e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
28579e7739fSRob Clark		};
28679e7739fSRob Clark
28779e7739fSRob Clark		vddpx_10:
28879e7739fSRob Clark		src_pp1200_l2a: ldo2 {
28979e7739fSRob Clark			regulator-min-microvolt = <1200000>;
29079e7739fSRob Clark			regulator-max-microvolt = <1200000>;
29179e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
29279e7739fSRob Clark
29379e7739fSRob Clark			/* TODO: why??? */
29479e7739fSRob Clark			regulator-always-on;
29579e7739fSRob Clark		};
29679e7739fSRob Clark
29779e7739fSRob Clark		pp1000_l3a_sdr845: ldo3 {
29879e7739fSRob Clark			regulator-min-microvolt = <1000000>;
29979e7739fSRob Clark			regulator-max-microvolt = <1000000>;
30079e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
30179e7739fSRob Clark		};
30279e7739fSRob Clark
30379e7739fSRob Clark		vdd_wcss_cx:
30479e7739fSRob Clark		vdd_wcss_mx:
30579e7739fSRob Clark		vdda_wcss_pll:
30679e7739fSRob Clark		src_pp800_l5a: ldo5 {
30779e7739fSRob Clark			regulator-min-microvolt = <800000>;
30879e7739fSRob Clark			regulator-max-microvolt = <800000>;
30979e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
31079e7739fSRob Clark		};
31179e7739fSRob Clark
31279e7739fSRob Clark		vddpx_13:
31379e7739fSRob Clark		src_pp1800_l6a: ldo6 {
31479e7739fSRob Clark			regulator-min-microvolt = <1856000>;
31579e7739fSRob Clark			regulator-max-microvolt = <1856000>;
31679e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
31779e7739fSRob Clark		};
31879e7739fSRob Clark
31979e7739fSRob Clark		pp1800_l7a_wcn3990: ldo7 {
32079e7739fSRob Clark			regulator-min-microvolt = <1800000>;
32179e7739fSRob Clark			regulator-max-microvolt = <1800000>;
32279e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
32379e7739fSRob Clark		};
32479e7739fSRob Clark
32579e7739fSRob Clark		src_pp1200_l8a: ldo8 {
32679e7739fSRob Clark			regulator-min-microvolt = <1200000>;
32779e7739fSRob Clark			regulator-max-microvolt = <1248000>;
32879e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
32979e7739fSRob Clark		};
33079e7739fSRob Clark
33179e7739fSRob Clark		pp1800_dx_pen:
33279e7739fSRob Clark		src_pp1800_l9a: ldo9 {
33379e7739fSRob Clark			regulator-min-microvolt = <1800000>;
33479e7739fSRob Clark			regulator-max-microvolt = <1800000>;
33579e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
33679e7739fSRob Clark		};
33779e7739fSRob Clark
33879e7739fSRob Clark		src_pp1800_l10a: ldo10 {
33979e7739fSRob Clark			regulator-min-microvolt = <1800000>;
34079e7739fSRob Clark			regulator-max-microvolt = <1800000>;
34179e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
34279e7739fSRob Clark		};
34379e7739fSRob Clark
34479e7739fSRob Clark		pp1000_l11a_sdr845: ldo11 {
34579e7739fSRob Clark			regulator-min-microvolt = <1000000>;
34679e7739fSRob Clark			regulator-max-microvolt = <1048000>;
34779e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
34879e7739fSRob Clark		};
34979e7739fSRob Clark
35079e7739fSRob Clark		vdd_qfprom:
35179e7739fSRob Clark		vdd_qfprom_sp:
35279e7739fSRob Clark		vdda_apc1_cs_1p8:
35379e7739fSRob Clark		vdda_gfx_cs_1p8:
35479e7739fSRob Clark		vdda_qrefs_1p8:
35579e7739fSRob Clark		vdda_qusb_hs0_1p8:
35679e7739fSRob Clark		vddpx_11:
35779e7739fSRob Clark		src_pp1800_l12a: ldo12 {
35879e7739fSRob Clark			regulator-min-microvolt = <1800000>;
35979e7739fSRob Clark			regulator-max-microvolt = <1800000>;
36079e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
36179e7739fSRob Clark		};
36279e7739fSRob Clark
36379e7739fSRob Clark		vddpx_2:
36479e7739fSRob Clark		src_pp2950_l13a: ldo13 {
36579e7739fSRob Clark			regulator-min-microvolt = <1800000>;
36679e7739fSRob Clark			regulator-max-microvolt = <2960000>;
36779e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
36879e7739fSRob Clark		};
36979e7739fSRob Clark
37079e7739fSRob Clark		src_pp1800_l14a: ldo14 {
37179e7739fSRob Clark			regulator-min-microvolt = <1800000>;
37279e7739fSRob Clark			regulator-max-microvolt = <1800000>;
37379e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
37479e7739fSRob Clark		};
37579e7739fSRob Clark
37679e7739fSRob Clark		src_pp1800_l15a: ldo15 {
37779e7739fSRob Clark			regulator-min-microvolt = <1800000>;
37879e7739fSRob Clark			regulator-max-microvolt = <1800000>;
37979e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
38079e7739fSRob Clark		};
38179e7739fSRob Clark
38279e7739fSRob Clark		pp2700_l16a: ldo16 {
38379e7739fSRob Clark			regulator-min-microvolt = <2704000>;
38479e7739fSRob Clark			regulator-max-microvolt = <2704000>;
38579e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
38679e7739fSRob Clark		};
38779e7739fSRob Clark
38879e7739fSRob Clark		src_pp1300_l17a: ldo17 {
38979e7739fSRob Clark			regulator-min-microvolt = <1304000>;
39079e7739fSRob Clark			regulator-max-microvolt = <1304000>;
39179e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
39279e7739fSRob Clark		};
39379e7739fSRob Clark
39479e7739fSRob Clark		pp2700_l18a: ldo18 {
39579e7739fSRob Clark			regulator-min-microvolt = <2704000>;
39679e7739fSRob Clark			regulator-max-microvolt = <2960000>;
39779e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
39879e7739fSRob Clark		};
39979e7739fSRob Clark
40079e7739fSRob Clark		/*
40179e7739fSRob Clark		 * NOTE: this rail should have been called
40279e7739fSRob Clark		 * src_pp3300_l19a in the schematic
40379e7739fSRob Clark		 */
40479e7739fSRob Clark		src_pp3000_l19a: ldo19 {
40579e7739fSRob Clark			regulator-min-microvolt = <3304000>;
40679e7739fSRob Clark			regulator-max-microvolt = <3304000>;
40779e7739fSRob Clark
40879e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
40979e7739fSRob Clark		};
41079e7739fSRob Clark
41179e7739fSRob Clark		src_pp2950_l20a: ldo20 {
41279e7739fSRob Clark			regulator-min-microvolt = <2704000>;
41379e7739fSRob Clark			regulator-max-microvolt = <2960000>;
41479e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
41579e7739fSRob Clark		};
41679e7739fSRob Clark
41779e7739fSRob Clark		src_pp2950_l21a: ldo21 {
41879e7739fSRob Clark			regulator-min-microvolt = <2704000>;
41979e7739fSRob Clark			regulator-max-microvolt = <2960000>;
42079e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
42179e7739fSRob Clark		};
42279e7739fSRob Clark
42379e7739fSRob Clark		pp3300_hub:
42479e7739fSRob Clark		src_pp3300_l22a: ldo22 {
42579e7739fSRob Clark			regulator-min-microvolt = <3304000>;
42679e7739fSRob Clark			regulator-max-microvolt = <3304000>;
42779e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
42879e7739fSRob Clark			/*
42979e7739fSRob Clark			 * HACK: Should add a usb hub node and driver
43079e7739fSRob Clark			 * to turn this on and off at suspend/resume time
43179e7739fSRob Clark			 */
43279e7739fSRob Clark			regulator-boot-on;
43379e7739fSRob Clark			regulator-always-on;
43479e7739fSRob Clark		};
43579e7739fSRob Clark
43679e7739fSRob Clark		pp3300_l23a_ch1_wcn3990: ldo23 {
43779e7739fSRob Clark			regulator-min-microvolt = <3000000>;
43879e7739fSRob Clark			regulator-max-microvolt = <3312000>;
43979e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
44079e7739fSRob Clark		};
44179e7739fSRob Clark
44279e7739fSRob Clark		vdda_qusb_hs0_3p1:
44379e7739fSRob Clark		src_pp3075_l24a: ldo24 {
44479e7739fSRob Clark			regulator-min-microvolt = <3088000>;
44579e7739fSRob Clark			regulator-max-microvolt = <3088000>;
44679e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
44779e7739fSRob Clark		};
44879e7739fSRob Clark
44979e7739fSRob Clark		pp3300_l25a_ch0_wcn3990: ldo25 {
45079e7739fSRob Clark			regulator-min-microvolt = <3304000>;
45179e7739fSRob Clark			regulator-max-microvolt = <3304000>;
45279e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
45379e7739fSRob Clark		};
45479e7739fSRob Clark
45579e7739fSRob Clark		pp1200_hub:
45679e7739fSRob Clark		vdda_hp_pcie_1p2:
45779e7739fSRob Clark		vdda_hv_ebi0:
45879e7739fSRob Clark		vdda_hv_ebi1:
45979e7739fSRob Clark		vdda_hv_ebi2:
46079e7739fSRob Clark		vdda_hv_ebi3:
46179e7739fSRob Clark		vdda_mipi_csi_1p25:
46279e7739fSRob Clark		vdda_mipi_dsi0_1p2:
46379e7739fSRob Clark		vdda_mipi_dsi1_1p2:
46479e7739fSRob Clark		vdda_pcie_1p2:
46579e7739fSRob Clark		vdda_ufs1_1p2:
46679e7739fSRob Clark		vdda_ufs2_1p2:
46779e7739fSRob Clark		vdda_usb1_ss_1p2:
46879e7739fSRob Clark		vdda_usb2_ss_1p2:
46979e7739fSRob Clark		src_pp1200_l26a: ldo26 {
47079e7739fSRob Clark			regulator-min-microvolt = <1200000>;
47179e7739fSRob Clark			regulator-max-microvolt = <1200000>;
47279e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
47379e7739fSRob Clark		};
47479e7739fSRob Clark
47579e7739fSRob Clark		pp3300_dx_pen:
47679e7739fSRob Clark		src_pp3300_l28a: ldo28 {
47779e7739fSRob Clark			regulator-min-microvolt = <3304000>;
47879e7739fSRob Clark			regulator-max-microvolt = <3304000>;
47979e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
48079e7739fSRob Clark		};
48179e7739fSRob Clark
48279e7739fSRob Clark		src_pp1800_lvs1: lvs1 {
48379e7739fSRob Clark			regulator-min-microvolt = <1800000>;
48479e7739fSRob Clark			regulator-max-microvolt = <1800000>;
48579e7739fSRob Clark		};
48679e7739fSRob Clark
48779e7739fSRob Clark		src_pp1800_lvs2: lvs2 {
48879e7739fSRob Clark			regulator-min-microvolt = <1800000>;
48979e7739fSRob Clark			regulator-max-microvolt = <1800000>;
49079e7739fSRob Clark		};
49179e7739fSRob Clark	};
49279e7739fSRob Clark
49379e7739fSRob Clark	pm8005-rpmh-regulators {
49479e7739fSRob Clark		compatible = "qcom,pm8005-rpmh-regulators";
49579e7739fSRob Clark		qcom,pmic-id = "c";
49679e7739fSRob Clark
49779e7739fSRob Clark		vdd-s1-supply = <&src_vph_pwr>;
49879e7739fSRob Clark		vdd-s2-supply = <&src_vph_pwr>;
49979e7739fSRob Clark		vdd-s3-supply = <&src_vph_pwr>;
50079e7739fSRob Clark		vdd-s4-supply = <&src_vph_pwr>;
50179e7739fSRob Clark
50279e7739fSRob Clark		src_pp600_s3c: smps3 {
50379e7739fSRob Clark			regulator-min-microvolt = <600000>;
50479e7739fSRob Clark			regulator-max-microvolt = <600000>;
50579e7739fSRob Clark		};
50679e7739fSRob Clark	};
50779e7739fSRob Clark};
50879e7739fSRob Clark
50979e7739fSRob Clark&dsi0 {
51079e7739fSRob Clark	status = "okay";
51179e7739fSRob Clark	vdda-supply = <&vdda_mipi_dsi0_1p2>;
51279e7739fSRob Clark
51379e7739fSRob Clark	ports {
51479e7739fSRob Clark		port@1 {
51579e7739fSRob Clark			endpoint {
51679e7739fSRob Clark				remote-endpoint = <&sn65dsi86_in>;
51779e7739fSRob Clark				data-lanes = <0 1 2 3>;
51879e7739fSRob Clark			};
51979e7739fSRob Clark		};
52079e7739fSRob Clark	};
52179e7739fSRob Clark};
52279e7739fSRob Clark
52379e7739fSRob Clark&dsi0_phy {
52479e7739fSRob Clark	status = "okay";
52579e7739fSRob Clark	vdds-supply = <&vdda_mipi_dsi0_pll>;
52679e7739fSRob Clark};
52779e7739fSRob Clark
52879e7739fSRob Clarkedp_brij_i2c: &i2c3 {
52979e7739fSRob Clark	status = "okay";
53079e7739fSRob Clark	clock-frequency = <400000>;
53179e7739fSRob Clark
53279e7739fSRob Clark	sn65dsi86_bridge: bridge@2d {
53379e7739fSRob Clark		compatible = "ti,sn65dsi86";
53479e7739fSRob Clark		reg = <0x2d>;
53579e7739fSRob Clark		pinctrl-names = "default";
53679e7739fSRob Clark		pinctrl-0 = <&edp_brij_en &edp_brij_irq>;
53779e7739fSRob Clark
53879e7739fSRob Clark		interrupt-parent = <&tlmm>;
53979e7739fSRob Clark		interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
54079e7739fSRob Clark
54179e7739fSRob Clark		enable-gpios = <&tlmm 102 GPIO_ACTIVE_HIGH>;
54279e7739fSRob Clark
54379e7739fSRob Clark		vpll-supply = <&src_pp1800_s4a>;
54479e7739fSRob Clark		vccio-supply = <&src_pp1800_s4a>;
54579e7739fSRob Clark		vcca-supply = <&src_pp1200_l2a>;
54679e7739fSRob Clark		vcc-supply = <&src_pp1200_l2a>;
54779e7739fSRob Clark
54879e7739fSRob Clark		clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
54979e7739fSRob Clark		clock-names = "refclk";
55079e7739fSRob Clark
55179e7739fSRob Clark		ports {
55279e7739fSRob Clark			#address-cells = <1>;
55379e7739fSRob Clark			#size-cells = <0>;
55479e7739fSRob Clark
55579e7739fSRob Clark			port@0 {
55679e7739fSRob Clark				reg = <0>;
55779e7739fSRob Clark				sn65dsi86_in: endpoint {
55879e7739fSRob Clark					remote-endpoint = <&dsi0_out>;
55979e7739fSRob Clark				};
56079e7739fSRob Clark			};
56179e7739fSRob Clark
56279e7739fSRob Clark			port@1 {
56379e7739fSRob Clark				reg = <1>;
56479e7739fSRob Clark				sn65dsi86_out: endpoint {
56579e7739fSRob Clark					remote-endpoint = <&panel_in_edp>;
56679e7739fSRob Clark				};
56779e7739fSRob Clark			};
56879e7739fSRob Clark		};
56979e7739fSRob Clark	};
57079e7739fSRob Clark};
57179e7739fSRob Clark
57279e7739fSRob Clarkap_pen_1v8: &i2c11 {
57379e7739fSRob Clark	status = "okay";
57479e7739fSRob Clark	clock-frequency = <400000>;
57579e7739fSRob Clark
57679e7739fSRob Clark	digitizer@9 {
57779e7739fSRob Clark		compatible = "wacom,w9013", "hid-over-i2c";
57879e7739fSRob Clark		reg = <0x9>;
57979e7739fSRob Clark		pinctrl-names = "default";
58079e7739fSRob Clark		pinctrl-0 = <&pen_irq_l>, <&pen_pdct_l>, <&pen_rst_l>;
58179e7739fSRob Clark
58279e7739fSRob Clark		vdd-supply = <&pp3300_dx_pen>;
58379e7739fSRob Clark		vddl-supply = <&pp1800_dx_pen>;
58479e7739fSRob Clark		post-power-on-delay-ms = <100>;
58579e7739fSRob Clark
58679e7739fSRob Clark		interrupt-parent = <&tlmm>;
58779e7739fSRob Clark		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
58879e7739fSRob Clark
58979e7739fSRob Clark		hid-descr-addr = <0x1>;
59079e7739fSRob Clark	};
59179e7739fSRob Clark};
59279e7739fSRob Clark
59379e7739fSRob Clarkamp_i2c: &i2c12 {
59479e7739fSRob Clark	status = "okay";
59579e7739fSRob Clark	clock-frequency = <400000>;
59679e7739fSRob Clark};
59779e7739fSRob Clark
59879e7739fSRob Clarkap_ts_i2c: &i2c14 {
59979e7739fSRob Clark	status = "okay";
60079e7739fSRob Clark	clock-frequency = <400000>;
60179e7739fSRob Clark
60279e7739fSRob Clark	touchscreen@10 {
60379e7739fSRob Clark		compatible = "elan,ekth3500";
60479e7739fSRob Clark		reg = <0x10>;
60579e7739fSRob Clark		pinctrl-names = "default";
60679e7739fSRob Clark		pinctrl-0 = <&ts_int_l &ts_reset_l>;
60779e7739fSRob Clark
60879e7739fSRob Clark		interrupt-parent = <&tlmm>;
60979e7739fSRob Clark		interrupts = <125 IRQ_TYPE_LEVEL_LOW>;
61079e7739fSRob Clark
61179e7739fSRob Clark		vcc33-supply = <&src_pp3300_l28a>;
61279e7739fSRob Clark
61379e7739fSRob Clark		reset-gpios = <&tlmm 118 GPIO_ACTIVE_LOW>;
61479e7739fSRob Clark	};
61579e7739fSRob Clark};
61679e7739fSRob Clark
617392a5855SAlex Elder&ipa {
618392a5855SAlex Elder	status = "okay";
619392a5855SAlex Elder	modem-init;
620392a5855SAlex Elder};
621392a5855SAlex Elder
62279e7739fSRob Clark&lpasscc {
62379e7739fSRob Clark	status = "okay";
62479e7739fSRob Clark};
62579e7739fSRob Clark
62679e7739fSRob Clark&mdss {
62779e7739fSRob Clark	status = "okay";
62879e7739fSRob Clark};
62979e7739fSRob Clark
63079e7739fSRob Clark&mdss_mdp {
63179e7739fSRob Clark	status = "okay";
63279e7739fSRob Clark};
63379e7739fSRob Clark
63431a233a5SStephen Boyd&pm8998_pwrkey {
63531a233a5SStephen Boyd	status = "disabled";
63631a233a5SStephen Boyd};
63731a233a5SStephen Boyd
63879e7739fSRob Clark&qupv3_id_0 {
63979e7739fSRob Clark	status = "okay";
64079e7739fSRob Clark};
64179e7739fSRob Clark
64279e7739fSRob Clark&qupv3_id_1 {
64379e7739fSRob Clark	status = "okay";
64479e7739fSRob Clark};
64579e7739fSRob Clark
64679e7739fSRob Clark&sdhc_2 {
64779e7739fSRob Clark	status = "okay";
64879e7739fSRob Clark
64979e7739fSRob Clark	pinctrl-names = "default";
65079e7739fSRob Clark	pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_cd_odl>;
65179e7739fSRob Clark
65279e7739fSRob Clark	vmmc-supply = <&src_pp2950_l21a>;
65379e7739fSRob Clark	vqmmc-supply = <&vddpx_2>;
65479e7739fSRob Clark
65579e7739fSRob Clark	cd-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
65679e7739fSRob Clark};
65779e7739fSRob Clark
65879e7739fSRob Clark&spi0 {
65979e7739fSRob Clark	status = "okay";
66079e7739fSRob Clark};
66179e7739fSRob Clark
66239523c56SStephen Boyd&spi5 {
66339523c56SStephen Boyd	status = "okay";
66439523c56SStephen Boyd
66539523c56SStephen Boyd	tpm@0 {
66639523c56SStephen Boyd		compatible = "google,cr50";
66739523c56SStephen Boyd		reg = <0>;
66839523c56SStephen Boyd		pinctrl-names = "default";
66939523c56SStephen Boyd		pinctrl-0 = <&h1_ap_int_odl>;
67039523c56SStephen Boyd		spi-max-frequency = <800000>;
67139523c56SStephen Boyd		interrupt-parent = <&tlmm>;
67239523c56SStephen Boyd		interrupts = <129 IRQ_TYPE_EDGE_RISING>;
67339523c56SStephen Boyd	};
67439523c56SStephen Boyd};
67539523c56SStephen Boyd
67679e7739fSRob Clark&spi10 {
67779e7739fSRob Clark	status = "okay";
67879e7739fSRob Clark
67979e7739fSRob Clark	cros_ec: ec@0 {
68079e7739fSRob Clark		compatible = "google,cros-ec-spi";
68179e7739fSRob Clark		reg = <0>;
68279e7739fSRob Clark		interrupt-parent = <&tlmm>;
68379e7739fSRob Clark		interrupts = <122 IRQ_TYPE_LEVEL_LOW>;
68479e7739fSRob Clark		pinctrl-names = "default";
68579e7739fSRob Clark		pinctrl-0 = <&ec_ap_int_l>;
68679e7739fSRob Clark		spi-max-frequency = <3000000>;
68779e7739fSRob Clark
68879e7739fSRob Clark		cros_ec_pwm: ec-pwm {
68979e7739fSRob Clark			compatible = "google,cros-ec-pwm";
69079e7739fSRob Clark			#pwm-cells = <1>;
69179e7739fSRob Clark		};
69279e7739fSRob Clark
69379e7739fSRob Clark		i2c_tunnel: i2c-tunnel {
69479e7739fSRob Clark			compatible = "google,cros-ec-i2c-tunnel";
69579e7739fSRob Clark			google,remote-bus = <0>;
69679e7739fSRob Clark			#address-cells = <1>;
69779e7739fSRob Clark			#size-cells = <0>;
69879e7739fSRob Clark		};
69979e7739fSRob Clark
70079e7739fSRob Clark		pdupdate {
70179e7739fSRob Clark			compatible = "google,cros-ec-pd-update";
70279e7739fSRob Clark		};
70379e7739fSRob Clark	};
70479e7739fSRob Clark};
70579e7739fSRob Clark
70679e7739fSRob Clark#include <arm/cros-ec-keyboard.dtsi>
70779e7739fSRob Clark#include <arm/cros-ec-sbs.dtsi>
70879e7739fSRob Clark
70979e7739fSRob Clark&uart6 {
71079e7739fSRob Clark	status = "okay";
71179e7739fSRob Clark
71279e7739fSRob Clark	bluetooth: wcn3990-bt {
71379e7739fSRob Clark		compatible = "qcom,wcn3990-bt";
71479e7739fSRob Clark		vddio-supply = <&src_pp1800_s4a>;
71579e7739fSRob Clark		vddxo-supply = <&pp1800_l7a_wcn3990>;
71679e7739fSRob Clark		vddrf-supply = <&src_pp1300_l17a>;
71779e7739fSRob Clark		vddch0-supply = <&pp3300_l25a_ch0_wcn3990>;
71879e7739fSRob Clark		max-speed = <3200000>;
71979e7739fSRob Clark	};
72079e7739fSRob Clark};
72179e7739fSRob Clark
72279e7739fSRob Clark&uart9 {
72379e7739fSRob Clark	status = "okay";
72479e7739fSRob Clark};
72579e7739fSRob Clark
72679e7739fSRob Clark&ufs_mem_hc {
72779e7739fSRob Clark	status = "okay";
72810e99d47SStephen Boyd
72910e99d47SStephen Boyd	reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
73079e7739fSRob Clark
73179e7739fSRob Clark	vcc-supply = <&src_pp2950_l20a>;
73279e7739fSRob Clark	vcc-max-microamp = <600000>;
73379e7739fSRob Clark};
73479e7739fSRob Clark
73579e7739fSRob Clark&ufs_mem_phy {
73679e7739fSRob Clark	status = "okay";
73779e7739fSRob Clark
73879e7739fSRob Clark	vdda-phy-supply = <&vdda_ufs1_core>;
73979e7739fSRob Clark	vdda-pll-supply = <&vdda_ufs1_1p2>;
74079e7739fSRob Clark};
74179e7739fSRob Clark
74279e7739fSRob Clark&usb_1 {
74379e7739fSRob Clark	status = "okay";
74479e7739fSRob Clark
74579e7739fSRob Clark	/* We'll use this as USB 2.0 only */
74679e7739fSRob Clark	qcom,select-utmi-as-pipe-clk;
74779e7739fSRob Clark};
74879e7739fSRob Clark
74979e7739fSRob Clark&usb_1_dwc3 {
75079e7739fSRob Clark	/*
75179e7739fSRob Clark	 * The hardware design intends this port to be hooked up in peripheral
75279e7739fSRob Clark	 * mode, so we'll hardcode it here.  Some details:
75379e7739fSRob Clark	 * - SDM845 expects only a single Type C connector so it has only one
75479e7739fSRob Clark	 *   native Type C port but cheza has two Type C connectors.
75579e7739fSRob Clark	 * - The only source of DP is the single native Type C port.
75679e7739fSRob Clark	 * - On cheza we want to be able to hook DP up to _either_ of the
75779e7739fSRob Clark	 *   two Type C connectors and want to be able to achieve 4 lanes of DP.
75879e7739fSRob Clark	 * - When you configure a Type C port for 4 lanes of DP you lose USB3.
75979e7739fSRob Clark	 * - In order to make everything work, the native Type C port is always
76079e7739fSRob Clark	 *   configured as 4-lanes DP so it's always available.
76179e7739fSRob Clark	 * - The extra USB3 port on SDM845 goes to a USB 3 hub which is then
76279e7739fSRob Clark	 *   sent to the two Type C connectors.
76379e7739fSRob Clark	 * - The extra USB2 lines from the native Type C port are always
76479e7739fSRob Clark	 *   setup as "peripheral" so that we can mux them over to one connector
76579e7739fSRob Clark	 *   or the other if someone needs the connector configured as a gadget
76679e7739fSRob Clark	 *   (but they only get USB2 speeds).
76779e7739fSRob Clark	 *
76879e7739fSRob Clark	 * All the hardware muxes would allow us to hook things up in different
76979e7739fSRob Clark	 * ways to some potential benefit for static configurations (you could
77079e7739fSRob Clark	 * achieve extra USB2 bandwidth by using two different ports for the
771e3c5bc56SGeert Uytterhoeven	 * two connectors or possibly even get USB3 peripheral mode), but in
77279e7739fSRob Clark	 * each case you end up forcing to disconnect/reconnect an in-use
77379e7739fSRob Clark	 * USB session in some cases depending on what you hotplug into the
77479e7739fSRob Clark	 * other connector.  Thus hardcoding this as peripheral makes sense.
77579e7739fSRob Clark	 */
77679e7739fSRob Clark	dr_mode = "peripheral";
77779e7739fSRob Clark
77879e7739fSRob Clark	/*
77979e7739fSRob Clark	 * We always need the high speed pins as 4-lanes DP in case someone
78079e7739fSRob Clark	 * hotplugs a DP peripheral.  Thus limit this port to a max of high
78179e7739fSRob Clark	 * speed.
78279e7739fSRob Clark	 */
78379e7739fSRob Clark	maximum-speed = "high-speed";
78479e7739fSRob Clark
78579e7739fSRob Clark	/*
78679e7739fSRob Clark	 * We don't need the usb3-phy since we run in highspeed mode always, so
78779e7739fSRob Clark	 * re-define these properties removing the superspeed USB PHY reference.
78879e7739fSRob Clark	 */
78979e7739fSRob Clark	phys = <&usb_1_hsphy>;
79079e7739fSRob Clark	phy-names = "usb2-phy";
79179e7739fSRob Clark};
79279e7739fSRob Clark
79379e7739fSRob Clark&usb_1_hsphy {
79479e7739fSRob Clark	status = "okay";
79579e7739fSRob Clark
79679e7739fSRob Clark	vdd-supply = <&vdda_usb1_ss_core>;
79779e7739fSRob Clark	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
79879e7739fSRob Clark	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
79979e7739fSRob Clark
80079e7739fSRob Clark	qcom,imp-res-offset-value = <8>;
80179e7739fSRob Clark	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
80279e7739fSRob Clark	qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
80379e7739fSRob Clark	qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
80479e7739fSRob Clark};
80579e7739fSRob Clark
80679e7739fSRob Clark&usb_2 {
80779e7739fSRob Clark	status = "okay";
80879e7739fSRob Clark};
80979e7739fSRob Clark
81079e7739fSRob Clark&usb_2_dwc3 {
81179e7739fSRob Clark	/* We have this hooked up to a hub and we always use in host mode */
81279e7739fSRob Clark	dr_mode = "host";
81379e7739fSRob Clark};
81479e7739fSRob Clark
81579e7739fSRob Clark&usb_2_hsphy {
81679e7739fSRob Clark	status = "okay";
81779e7739fSRob Clark
81879e7739fSRob Clark	vdd-supply = <&vdda_usb2_ss_core>;
81979e7739fSRob Clark	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
82079e7739fSRob Clark	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
82179e7739fSRob Clark
82279e7739fSRob Clark	qcom,imp-res-offset-value = <8>;
82379e7739fSRob Clark	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
82479e7739fSRob Clark};
82579e7739fSRob Clark
82679e7739fSRob Clark&usb_2_qmpphy {
82779e7739fSRob Clark	status = "okay";
82879e7739fSRob Clark
82979e7739fSRob Clark	vdda-phy-supply = <&vdda_usb2_ss_1p2>;
83079e7739fSRob Clark	vdda-pll-supply = <&vdda_usb2_ss_core>;
83179e7739fSRob Clark};
83279e7739fSRob Clark
83379e7739fSRob Clark&wifi {
83479e7739fSRob Clark	status = "okay";
83579e7739fSRob Clark
83679e7739fSRob Clark	vdd-0.8-cx-mx-supply = <&src_pp800_l5a >;
83779e7739fSRob Clark	vdd-1.8-xo-supply = <&pp1800_l7a_wcn3990>;
83879e7739fSRob Clark	vdd-1.3-rfa-supply = <&src_pp1300_l17a>;
83979e7739fSRob Clark	vdd-3.3-ch0-supply = <&pp3300_l25a_ch0_wcn3990>;
84079e7739fSRob Clark};
84179e7739fSRob Clark
84279e7739fSRob Clark/* PINCTRL - additions to nodes defined in sdm845.dtsi */
84379e7739fSRob Clark
84479e7739fSRob Clark&qspi_cs0 {
84579e7739fSRob Clark	pinconf {
84679e7739fSRob Clark		pins = "gpio90";
84779e7739fSRob Clark		bias-disable;
84879e7739fSRob Clark	};
84979e7739fSRob Clark};
85079e7739fSRob Clark
85179e7739fSRob Clark&qspi_clk {
85279e7739fSRob Clark	pinconf {
85379e7739fSRob Clark		pins = "gpio95";
85479e7739fSRob Clark		bias-disable;
85579e7739fSRob Clark	};
85679e7739fSRob Clark};
85779e7739fSRob Clark
85879e7739fSRob Clark&qspi_data01 {
85979e7739fSRob Clark	pinconf {
86079e7739fSRob Clark		pins = "gpio91", "gpio92";
86179e7739fSRob Clark
86279e7739fSRob Clark		/* High-Z when no transfers; nice to park the lines */
86379e7739fSRob Clark		bias-pull-up;
86479e7739fSRob Clark	};
86579e7739fSRob Clark};
86679e7739fSRob Clark
86779e7739fSRob Clark&qup_i2c3_default {
86879e7739fSRob Clark	pinconf {
86979e7739fSRob Clark		pins = "gpio41", "gpio42";
87079e7739fSRob Clark		drive-strength = <2>;
87179e7739fSRob Clark
87279e7739fSRob Clark		/* Has external pullup */
87379e7739fSRob Clark		bias-disable;
87479e7739fSRob Clark	};
87579e7739fSRob Clark};
87679e7739fSRob Clark
87779e7739fSRob Clark&qup_i2c11_default {
87879e7739fSRob Clark	pinconf {
87979e7739fSRob Clark		pins = "gpio31", "gpio32";
88079e7739fSRob Clark		drive-strength = <2>;
88179e7739fSRob Clark
88279e7739fSRob Clark		/* Has external pullup */
88379e7739fSRob Clark		bias-disable;
88479e7739fSRob Clark	};
88579e7739fSRob Clark};
88679e7739fSRob Clark
88779e7739fSRob Clark&qup_i2c12_default {
88879e7739fSRob Clark	pinconf {
88979e7739fSRob Clark		pins = "gpio49", "gpio50";
89079e7739fSRob Clark		drive-strength = <2>;
89179e7739fSRob Clark
89279e7739fSRob Clark		/* Has external pullup */
89379e7739fSRob Clark		bias-disable;
89479e7739fSRob Clark	};
89579e7739fSRob Clark};
89679e7739fSRob Clark
89779e7739fSRob Clark&qup_i2c14_default {
89879e7739fSRob Clark	pinconf {
89979e7739fSRob Clark		pins = "gpio33", "gpio34";
90079e7739fSRob Clark		drive-strength = <2>;
90179e7739fSRob Clark
90279e7739fSRob Clark		/* Has external pullup */
90379e7739fSRob Clark		bias-disable;
90479e7739fSRob Clark	};
90579e7739fSRob Clark};
90679e7739fSRob Clark
90779e7739fSRob Clark&qup_spi0_default {
90879e7739fSRob Clark	pinconf {
90979e7739fSRob Clark		pins = "gpio0", "gpio1", "gpio2", "gpio3";
91079e7739fSRob Clark		drive-strength = <2>;
91179e7739fSRob Clark		bias-disable;
91279e7739fSRob Clark	};
91379e7739fSRob Clark};
91479e7739fSRob Clark
91579e7739fSRob Clark&qup_spi5_default {
91679e7739fSRob Clark	pinconf {
91779e7739fSRob Clark		pins = "gpio85", "gpio86", "gpio87", "gpio88";
91879e7739fSRob Clark		drive-strength = <2>;
91979e7739fSRob Clark		bias-disable;
92079e7739fSRob Clark	};
92179e7739fSRob Clark};
92279e7739fSRob Clark
92379e7739fSRob Clark&qup_spi10_default {
92479e7739fSRob Clark	pinconf {
92579e7739fSRob Clark		pins = "gpio53", "gpio54", "gpio55", "gpio56";
92679e7739fSRob Clark		drive-strength = <2>;
92779e7739fSRob Clark		bias-disable;
92879e7739fSRob Clark	};
92979e7739fSRob Clark};
93079e7739fSRob Clark
93179e7739fSRob Clark&qup_uart6_default {
93279e7739fSRob Clark	/* Change pinmux to all 4 pins since CTS and RTS are connected */
93379e7739fSRob Clark	pinmux {
93479e7739fSRob Clark		pins = "gpio45", "gpio46",
93579e7739fSRob Clark		       "gpio47", "gpio48";
93679e7739fSRob Clark	};
93779e7739fSRob Clark
93879e7739fSRob Clark	pinconf-cts {
93979e7739fSRob Clark		/*
94079e7739fSRob Clark		 * Configure a pull-down on 45 (CTS) to match the pull of
94179e7739fSRob Clark		 * the Bluetooth module.
94279e7739fSRob Clark		 */
94379e7739fSRob Clark		pins = "gpio45";
94479e7739fSRob Clark		bias-pull-down;
94579e7739fSRob Clark	};
94679e7739fSRob Clark
94779e7739fSRob Clark	pinconf-rts-tx {
94879e7739fSRob Clark		/* We'll drive 46 (RTS) and 47 (TX), so no pull */
94979e7739fSRob Clark		pins = "gpio46", "gpio47";
95079e7739fSRob Clark		drive-strength = <2>;
95179e7739fSRob Clark		bias-disable;
95279e7739fSRob Clark	};
95379e7739fSRob Clark
95479e7739fSRob Clark	pinconf-rx {
95579e7739fSRob Clark		/*
95679e7739fSRob Clark		 * Configure a pull-up on 48 (RX). This is needed to avoid
95779e7739fSRob Clark		 * garbage data when the TX pin of the Bluetooth module is
95879e7739fSRob Clark		 * in tri-state (module powered off or not driving the
95979e7739fSRob Clark		 * signal yet).
96079e7739fSRob Clark		 */
96179e7739fSRob Clark		pins = "gpio48";
96279e7739fSRob Clark		bias-pull-up;
96379e7739fSRob Clark	};
96479e7739fSRob Clark};
96579e7739fSRob Clark
96679e7739fSRob Clark&qup_uart9_default {
96779e7739fSRob Clark	pinconf-tx {
96879e7739fSRob Clark		pins = "gpio4";
96979e7739fSRob Clark		drive-strength = <2>;
97079e7739fSRob Clark		bias-disable;
97179e7739fSRob Clark	};
97279e7739fSRob Clark
97379e7739fSRob Clark	pinconf-rx {
97479e7739fSRob Clark		pins = "gpio5";
97579e7739fSRob Clark		drive-strength = <2>;
97679e7739fSRob Clark		bias-pull-up;
97779e7739fSRob Clark	};
97879e7739fSRob Clark};
97979e7739fSRob Clark
98079e7739fSRob Clark/* PINCTRL - board-specific pinctrl */
98179e7739fSRob Clark&pm8005_gpio {
98279e7739fSRob Clark	gpio-line-names = "",
98379e7739fSRob Clark			  "",
98479e7739fSRob Clark			  "SLB",
98579e7739fSRob Clark			  "";
98679e7739fSRob Clark};
98779e7739fSRob Clark
98879e7739fSRob Clark&pm8998_adc {
9892833d79cSVinod Koul	adc-chan@4d {
99079e7739fSRob Clark		reg = <ADC5_AMUX_THM1_100K_PU>;
99179e7739fSRob Clark		label = "sdm_temp";
99279e7739fSRob Clark	};
99379e7739fSRob Clark
9942833d79cSVinod Koul	adc-chan@4e {
99579e7739fSRob Clark		reg = <ADC5_AMUX_THM2_100K_PU>;
99679e7739fSRob Clark		label = "quiet_temp";
99779e7739fSRob Clark	};
99879e7739fSRob Clark
9992833d79cSVinod Koul	adc-chan@4f {
100079e7739fSRob Clark		reg = <ADC5_AMUX_THM3_100K_PU>;
100179e7739fSRob Clark		label = "lte_temp_1";
100279e7739fSRob Clark	};
100379e7739fSRob Clark
10042833d79cSVinod Koul	adc-chan@50 {
100579e7739fSRob Clark		reg = <ADC5_AMUX_THM4_100K_PU>;
100679e7739fSRob Clark		label = "lte_temp_2";
100779e7739fSRob Clark	};
100879e7739fSRob Clark
10092833d79cSVinod Koul	adc-chan@51 {
101079e7739fSRob Clark		reg = <ADC5_AMUX_THM5_100K_PU>;
101179e7739fSRob Clark		label = "charger_temp";
101279e7739fSRob Clark	};
101379e7739fSRob Clark};
101479e7739fSRob Clark
101579e7739fSRob Clark&pm8998_gpio {
101679e7739fSRob Clark	gpio-line-names = "",
101779e7739fSRob Clark			  "",
101879e7739fSRob Clark			  "SW_CTRL",
101979e7739fSRob Clark			  "",
102079e7739fSRob Clark			  "",
102179e7739fSRob Clark			  "",
102279e7739fSRob Clark			  "",
102379e7739fSRob Clark			  "",
102479e7739fSRob Clark			  "",
102579e7739fSRob Clark			  "",
102679e7739fSRob Clark			  "",
102779e7739fSRob Clark			  "",
102879e7739fSRob Clark			  "",
102979e7739fSRob Clark			  "",
103079e7739fSRob Clark			  "",
103179e7739fSRob Clark			  "",
103279e7739fSRob Clark			  "",
103379e7739fSRob Clark			  "",
103479e7739fSRob Clark			  "",
103579e7739fSRob Clark			  "",
103679e7739fSRob Clark			  "",
103779e7739fSRob Clark			  "CFG_OPT1",
103879e7739fSRob Clark			  "WCSS_PWR_REQ",
103979e7739fSRob Clark			  "",
104079e7739fSRob Clark			  "CFG_OPT2",
104179e7739fSRob Clark			  "SLB";
104279e7739fSRob Clark};
104379e7739fSRob Clark
104479e7739fSRob Clark&tlmm {
104579e7739fSRob Clark	/*
104679e7739fSRob Clark	 * pinctrl settings for pins that have no real owners.
104779e7739fSRob Clark	 */
104879e7739fSRob Clark	pinctrl-names = "default", "sleep";
104979e7739fSRob Clark	pinctrl-0 = <&bios_flash_wp_r_l>,
105079e7739fSRob Clark		    <&ap_suspend_l_deassert>;
105179e7739fSRob Clark
105279e7739fSRob Clark	pinctrl-1 = <&bios_flash_wp_r_l>,
105379e7739fSRob Clark		    <&ap_suspend_l_assert>;
105479e7739fSRob Clark
105579e7739fSRob Clark	/*
105679e7739fSRob Clark	 * Hogs prevent usermode from changing the value. A GPIO can be both
105779e7739fSRob Clark	 * here and in the pinctrl section.
105879e7739fSRob Clark	 */
105979e7739fSRob Clark	ap-suspend-l-hog {
106079e7739fSRob Clark		gpio-hog;
106179e7739fSRob Clark		gpios = <126 GPIO_ACTIVE_LOW>;
106279e7739fSRob Clark		output-low;
106379e7739fSRob Clark	};
106479e7739fSRob Clark
106579e7739fSRob Clark	ap_edp_bklten: ap-edp-bklten {
106679e7739fSRob Clark		pinmux {
106779e7739fSRob Clark			pins = "gpio37";
106879e7739fSRob Clark			function = "gpio";
106979e7739fSRob Clark		};
107079e7739fSRob Clark
107179e7739fSRob Clark		pinconf {
107279e7739fSRob Clark			pins = "gpio37";
107379e7739fSRob Clark			drive-strength = <2>;
107479e7739fSRob Clark			bias-disable;
107579e7739fSRob Clark		};
107679e7739fSRob Clark	};
107779e7739fSRob Clark
107879e7739fSRob Clark	bios_flash_wp_r_l: bios-flash-wp-r-l {
107979e7739fSRob Clark		pinmux {
108079e7739fSRob Clark			pins = "gpio128";
108179e7739fSRob Clark			function = "gpio";
108279e7739fSRob Clark			input-enable;
108379e7739fSRob Clark		};
108479e7739fSRob Clark
108579e7739fSRob Clark		pinconf {
108679e7739fSRob Clark			pins = "gpio128";
108779e7739fSRob Clark			bias-disable;
108879e7739fSRob Clark		};
108979e7739fSRob Clark	};
109079e7739fSRob Clark
109179e7739fSRob Clark	ec_ap_int_l: ec-ap-int-l {
109279e7739fSRob Clark		pinmux {
109379e7739fSRob Clark		       pins = "gpio122";
109479e7739fSRob Clark		       function = "gpio";
109579e7739fSRob Clark		       input-enable;
109679e7739fSRob Clark		};
109779e7739fSRob Clark
109879e7739fSRob Clark		pinconf {
109979e7739fSRob Clark		       pins = "gpio122";
110079e7739fSRob Clark		       bias-pull-up;
110179e7739fSRob Clark		};
110279e7739fSRob Clark	};
110379e7739fSRob Clark
110479e7739fSRob Clark	edp_brij_en: edp-brij-en {
110579e7739fSRob Clark		pinmux {
110679e7739fSRob Clark			pins = "gpio102";
110779e7739fSRob Clark			function = "gpio";
110879e7739fSRob Clark		};
110979e7739fSRob Clark
111079e7739fSRob Clark		pinconf {
111179e7739fSRob Clark			pins = "gpio102";
111279e7739fSRob Clark			drive-strength = <2>;
111379e7739fSRob Clark			bias-disable;
111479e7739fSRob Clark		};
111579e7739fSRob Clark	};
111679e7739fSRob Clark
111779e7739fSRob Clark	edp_brij_irq: edp-brij-irq {
111879e7739fSRob Clark		pinmux {
111979e7739fSRob Clark			pins = "gpio10";
112079e7739fSRob Clark			function = "gpio";
112179e7739fSRob Clark		};
112279e7739fSRob Clark
112379e7739fSRob Clark		pinconf {
112479e7739fSRob Clark			pins = "gpio10";
112579e7739fSRob Clark			drive-strength = <2>;
112679e7739fSRob Clark			bias-pull-down;
112779e7739fSRob Clark		};
112879e7739fSRob Clark	};
112979e7739fSRob Clark
113079e7739fSRob Clark	en_pp3300_dx_edp: en-pp3300-dx-edp {
113179e7739fSRob Clark		pinmux {
113279e7739fSRob Clark			pins = "gpio43";
113379e7739fSRob Clark			function = "gpio";
113479e7739fSRob Clark		};
113579e7739fSRob Clark
113679e7739fSRob Clark		pinconf {
113779e7739fSRob Clark			pins = "gpio43";
113879e7739fSRob Clark			drive-strength = <2>;
113979e7739fSRob Clark			bias-disable;
114079e7739fSRob Clark		};
114179e7739fSRob Clark	};
114279e7739fSRob Clark
114379e7739fSRob Clark	h1_ap_int_odl: h1-ap-int-odl {
114479e7739fSRob Clark		pinmux {
114579e7739fSRob Clark			pins = "gpio129";
114679e7739fSRob Clark			function = "gpio";
114779e7739fSRob Clark			input-enable;
114879e7739fSRob Clark		};
114979e7739fSRob Clark
115079e7739fSRob Clark		pinconf {
115179e7739fSRob Clark			pins = "gpio129";
115279e7739fSRob Clark			bias-pull-up;
115379e7739fSRob Clark		};
115479e7739fSRob Clark	};
115579e7739fSRob Clark
115679e7739fSRob Clark	pen_eject_odl: pen-eject-odl {
115779e7739fSRob Clark		pinmux {
115879e7739fSRob Clark			pins = "gpio119";
115979e7739fSRob Clark			function = "gpio";
116079e7739fSRob Clark			bias-pull-up;
116179e7739fSRob Clark		};
116279e7739fSRob Clark	};
116379e7739fSRob Clark
116479e7739fSRob Clark	pen_irq_l: pen-irq-l {
116579e7739fSRob Clark		pinmux {
116679e7739fSRob Clark			pins = "gpio24";
116779e7739fSRob Clark			function = "gpio";
116879e7739fSRob Clark		};
116979e7739fSRob Clark
117079e7739fSRob Clark		pinconf {
117179e7739fSRob Clark			pins = "gpio24";
117279e7739fSRob Clark
117379e7739fSRob Clark			/* Has external pullup */
117479e7739fSRob Clark			bias-disable;
117579e7739fSRob Clark		};
117679e7739fSRob Clark	};
117779e7739fSRob Clark
117879e7739fSRob Clark	pen_pdct_l: pen-pdct-l {
117979e7739fSRob Clark		pinmux {
118079e7739fSRob Clark			pins = "gpio63";
118179e7739fSRob Clark			function = "gpio";
118279e7739fSRob Clark		};
118379e7739fSRob Clark
118479e7739fSRob Clark		pinconf {
118579e7739fSRob Clark			pins = "gpio63";
118679e7739fSRob Clark
118779e7739fSRob Clark			/* Has external pullup */
118879e7739fSRob Clark			bias-disable;
118979e7739fSRob Clark		};
119079e7739fSRob Clark	};
119179e7739fSRob Clark
119279e7739fSRob Clark	pen_rst_l: pen-rst-l {
119379e7739fSRob Clark		pinmux  {
119479e7739fSRob Clark			pins = "gpio23";
119579e7739fSRob Clark			function = "gpio";
119679e7739fSRob Clark		};
119779e7739fSRob Clark
119879e7739fSRob Clark		pinconf {
119979e7739fSRob Clark			pins = "gpio23";
120079e7739fSRob Clark			bias-disable;
120179e7739fSRob Clark			drive-strength = <2>;
120279e7739fSRob Clark
120379e7739fSRob Clark			/*
120479e7739fSRob Clark			 * The pen driver doesn't currently support
120579e7739fSRob Clark			 * driving this reset line.  By specifying
120679e7739fSRob Clark			 * output-high here we're relying on the fact
120779e7739fSRob Clark			 * that this pin has a default pulldown at boot
120879e7739fSRob Clark			 * (which makes sure the pen was in reset if it
120979e7739fSRob Clark			 * was powered) and then we set it high here to
121079e7739fSRob Clark			 * take it out of reset.  Better would be if the
121179e7739fSRob Clark			 * pen driver could control this and we could
121279e7739fSRob Clark			 * remove "output-high" here.
121379e7739fSRob Clark			 */
121479e7739fSRob Clark			output-high;
121579e7739fSRob Clark		};
121679e7739fSRob Clark	};
121779e7739fSRob Clark
121879e7739fSRob Clark	sdc2_clk: sdc2-clk {
121979e7739fSRob Clark		pinconf {
122079e7739fSRob Clark			pins = "sdc2_clk";
122179e7739fSRob Clark			bias-disable;
122279e7739fSRob Clark
122379e7739fSRob Clark			/*
122479e7739fSRob Clark			 * It seems that mmc_test reports errors if drive
122579e7739fSRob Clark			 * strength is not 16.
122679e7739fSRob Clark			 */
122779e7739fSRob Clark			drive-strength = <16>;
122879e7739fSRob Clark		};
122979e7739fSRob Clark	};
123079e7739fSRob Clark
123179e7739fSRob Clark	sdc2_cmd: sdc2-cmd {
123279e7739fSRob Clark		pinconf {
123379e7739fSRob Clark			pins = "sdc2_cmd";
123479e7739fSRob Clark			bias-pull-up;
123579e7739fSRob Clark			drive-strength = <16>;
123679e7739fSRob Clark		};
123779e7739fSRob Clark	};
123879e7739fSRob Clark
123979e7739fSRob Clark	sdc2_data: sdc2-data {
124079e7739fSRob Clark		pinconf {
124179e7739fSRob Clark			pins = "sdc2_data";
124279e7739fSRob Clark			bias-pull-up;
124379e7739fSRob Clark			drive-strength = <16>;
124479e7739fSRob Clark		};
124579e7739fSRob Clark	};
124679e7739fSRob Clark
124779e7739fSRob Clark	sd_cd_odl: sd-cd-odl {
124879e7739fSRob Clark		pinmux {
124979e7739fSRob Clark			pins = "gpio44";
125079e7739fSRob Clark			function = "gpio";
125179e7739fSRob Clark		};
125279e7739fSRob Clark
125379e7739fSRob Clark		pinconf {
125479e7739fSRob Clark			pins = "gpio44";
125579e7739fSRob Clark			bias-pull-up;
125679e7739fSRob Clark		};
125779e7739fSRob Clark	};
125879e7739fSRob Clark
125979e7739fSRob Clark	ts_int_l: ts-int-l {
126079e7739fSRob Clark		pinmux  {
126179e7739fSRob Clark			pins = "gpio125";
126279e7739fSRob Clark			function = "gpio";
126379e7739fSRob Clark		};
126479e7739fSRob Clark
126579e7739fSRob Clark		pinconf {
126679e7739fSRob Clark			pins = "gpio125";
126779e7739fSRob Clark			bias-pull-up;
126879e7739fSRob Clark		};
126979e7739fSRob Clark	};
127079e7739fSRob Clark
127179e7739fSRob Clark	ts_reset_l: ts-reset-l {
127279e7739fSRob Clark		pinmux  {
127379e7739fSRob Clark			pins = "gpio118";
127479e7739fSRob Clark			function = "gpio";
127579e7739fSRob Clark		};
127679e7739fSRob Clark
127779e7739fSRob Clark		pinconf {
127879e7739fSRob Clark			pins = "gpio118";
127979e7739fSRob Clark			bias-disable;
128079e7739fSRob Clark			drive-strength = <2>;
128179e7739fSRob Clark		};
128279e7739fSRob Clark	};
128379e7739fSRob Clark
128479e7739fSRob Clark	ap_suspend_l_assert: ap_suspend_l_assert {
128579e7739fSRob Clark		config {
128679e7739fSRob Clark			pins = "gpio126";
128779e7739fSRob Clark			function = "gpio";
128879e7739fSRob Clark			bias-no-pull;
128979e7739fSRob Clark			drive-strength = <2>;
129079e7739fSRob Clark			output-low;
129179e7739fSRob Clark		};
129279e7739fSRob Clark	};
129379e7739fSRob Clark
129479e7739fSRob Clark	ap_suspend_l_deassert: ap_suspend_l_deassert {
129579e7739fSRob Clark		config {
129679e7739fSRob Clark			pins = "gpio126";
129779e7739fSRob Clark			function = "gpio";
129879e7739fSRob Clark			bias-no-pull;
129979e7739fSRob Clark			drive-strength = <2>;
130079e7739fSRob Clark			output-high;
130179e7739fSRob Clark		};
130279e7739fSRob Clark	};
130379e7739fSRob Clark};
130448a0585bSAlexandre Courbot
130548a0585bSAlexandre Courbot&venus {
130648a0585bSAlexandre Courbot	video-firmware {
130748a0585bSAlexandre Courbot		iommus = <&apps_smmu 0x10b2 0x0>;
130848a0585bSAlexandre Courbot	};
130948a0585bSAlexandre Courbot};
1310