1a7823180SKathiravan T// SPDX-License-Identifier: BSD-3-Clause 2a7823180SKathiravan T/* 3a7823180SKathiravan T * IPQ5332 RDP442 board device tree source 4a7823180SKathiravan T * 5a7823180SKathiravan T * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 6a7823180SKathiravan T */ 7a7823180SKathiravan T 8a7823180SKathiravan T/dts-v1/; 9a7823180SKathiravan T 10*6d5872f2SSridharan S N#include "ipq5332-rdp-common.dtsi" 11a7823180SKathiravan T 12a7823180SKathiravan T/ { 13a7823180SKathiravan T model = "Qualcomm Technologies, Inc. IPQ5332 MI01.3"; 14a7823180SKathiravan T compatible = "qcom,ipq5332-ap-mi01.3", "qcom,ipq5332"; 15a7823180SKathiravan T}; 16a7823180SKathiravan T 17a7823180SKathiravan T&blsp1_i2c1 { 18a7823180SKathiravan T clock-frequency = <400000>; 19a7823180SKathiravan T pinctrl-0 = <&i2c_1_pins>; 20a7823180SKathiravan T pinctrl-names = "default"; 21a7823180SKathiravan T status = "okay"; 22a7823180SKathiravan T}; 23a7823180SKathiravan T 24a7823180SKathiravan T&blsp1_spi0 { 25a7823180SKathiravan T pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>; 26a7823180SKathiravan T pinctrl-names = "default"; 27a7823180SKathiravan T status = "okay"; 28a7823180SKathiravan T 29a7823180SKathiravan T flash@0 { 30a7823180SKathiravan T compatible = "micron,n25q128a11", "jedec,spi-nor"; 31a7823180SKathiravan T reg = <0>; 32a7823180SKathiravan T #address-cells = <1>; 33a7823180SKathiravan T #size-cells = <1>; 34a7823180SKathiravan T spi-max-frequency = <50000000>; 35a7823180SKathiravan T }; 36a7823180SKathiravan T}; 37a7823180SKathiravan T 38a7823180SKathiravan T&sdhc { 39a7823180SKathiravan T bus-width = <4>; 40a7823180SKathiravan T max-frequency = <192000000>; 41a7823180SKathiravan T mmc-ddr-1_8v; 42a7823180SKathiravan T mmc-hs200-1_8v; 43a7823180SKathiravan T non-removable; 44a7823180SKathiravan T pinctrl-0 = <&sdc_default_state>; 45a7823180SKathiravan T pinctrl-names = "default"; 46a7823180SKathiravan T status = "okay"; 47a7823180SKathiravan T}; 48a7823180SKathiravan T 49a7823180SKathiravan T&tlmm { 50a7823180SKathiravan T i2c_1_pins: i2c-1-state { 51a7823180SKathiravan T pins = "gpio29", "gpio30"; 52a7823180SKathiravan T function = "blsp1_i2c0"; 53a7823180SKathiravan T drive-strength = <8>; 54a7823180SKathiravan T bias-pull-up; 55a7823180SKathiravan T }; 56a7823180SKathiravan T 57a7823180SKathiravan T sdc_default_state: sdc-default-state { 58a7823180SKathiravan T clk-pins { 59a7823180SKathiravan T pins = "gpio13"; 60a7823180SKathiravan T function = "sdc_clk"; 61a7823180SKathiravan T drive-strength = <8>; 62a7823180SKathiravan T bias-disable; 63a7823180SKathiravan T }; 64a7823180SKathiravan T 65a7823180SKathiravan T cmd-pins { 66a7823180SKathiravan T pins = "gpio12"; 67a7823180SKathiravan T function = "sdc_cmd"; 68a7823180SKathiravan T drive-strength = <8>; 69a7823180SKathiravan T bias-pull-up; 70a7823180SKathiravan T }; 71a7823180SKathiravan T 72a7823180SKathiravan T data-pins { 73a7823180SKathiravan T pins = "gpio8", "gpio9", "gpio10", "gpio11"; 74a7823180SKathiravan T function = "sdc_data"; 75a7823180SKathiravan T drive-strength = <8>; 76a7823180SKathiravan T bias-pull-up; 77a7823180SKathiravan T }; 78a7823180SKathiravan T }; 79a7823180SKathiravan T 80a7823180SKathiravan T spi_0_data_clk_pins: spi-0-data-clk-state { 81a7823180SKathiravan T pins = "gpio14", "gpio15", "gpio16"; 82a7823180SKathiravan T function = "blsp0_spi"; 83a7823180SKathiravan T drive-strength = <2>; 84a7823180SKathiravan T bias-pull-down; 85a7823180SKathiravan T }; 86a7823180SKathiravan T 87a7823180SKathiravan T spi_0_cs_pins: spi-0-cs-state { 88a7823180SKathiravan T pins = "gpio17"; 89a7823180SKathiravan T function = "blsp0_spi"; 90a7823180SKathiravan T drive-strength = <2>; 91a7823180SKathiravan T bias-pull-up; 92a7823180SKathiravan T }; 93a7823180SKathiravan T}; 94