xref: /openbmc/linux/scripts/dtc/include-prefixes/arm64/qcom/ipq5332-rdp441.dts (revision c900529f3d9161bfde5cca0754f83b4d3c3e0220)
1b59cd290SKathiravan T// SPDX-License-Identifier: BSD-3-Clause
2b59cd290SKathiravan T/*
3b59cd290SKathiravan T * IPQ5332 AP-MI01.2 board device tree source
4b59cd290SKathiravan T *
5b59cd290SKathiravan T * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
6b59cd290SKathiravan T */
7b59cd290SKathiravan T
8b59cd290SKathiravan T/dts-v1/;
9b59cd290SKathiravan T
10*6d5872f2SSridharan S N#include "ipq5332-rdp-common.dtsi"
11b59cd290SKathiravan T
12b59cd290SKathiravan T/ {
13b59cd290SKathiravan T	model = "Qualcomm Technologies, Inc. IPQ5332 MI01.2";
14b59cd290SKathiravan T	compatible = "qcom,ipq5332-ap-mi01.2", "qcom,ipq5332";
15b59cd290SKathiravan T};
16b59cd290SKathiravan T
17b59cd290SKathiravan T&blsp1_i2c1 {
18b59cd290SKathiravan T	clock-frequency  = <400000>;
19b59cd290SKathiravan T	pinctrl-0 = <&i2c_1_pins>;
20b59cd290SKathiravan T	pinctrl-names = "default";
21b59cd290SKathiravan T	status = "okay";
22b59cd290SKathiravan T};
23b59cd290SKathiravan T
24b59cd290SKathiravan T&sdhc {
25b59cd290SKathiravan T	bus-width = <4>;
26b59cd290SKathiravan T	max-frequency = <192000000>;
27b59cd290SKathiravan T	mmc-ddr-1_8v;
28b59cd290SKathiravan T	mmc-hs200-1_8v;
29b59cd290SKathiravan T	non-removable;
30b59cd290SKathiravan T	pinctrl-0 = <&sdc_default_state>;
31b59cd290SKathiravan T	pinctrl-names = "default";
32b59cd290SKathiravan T	status = "okay";
33b59cd290SKathiravan T};
34b59cd290SKathiravan T
35b59cd290SKathiravan T&tlmm {
36b59cd290SKathiravan T	i2c_1_pins: i2c-1-state {
37b59cd290SKathiravan T		pins = "gpio29", "gpio30";
38b59cd290SKathiravan T		function = "blsp1_i2c0";
39b59cd290SKathiravan T		drive-strength = <8>;
40b59cd290SKathiravan T		bias-pull-up;
41b59cd290SKathiravan T	};
42b59cd290SKathiravan T
43b59cd290SKathiravan T	sdc_default_state: sdc-default-state {
44b59cd290SKathiravan T		clk-pins {
45b59cd290SKathiravan T			pins = "gpio13";
46b59cd290SKathiravan T			function = "sdc_clk";
47b59cd290SKathiravan T			drive-strength = <8>;
48b59cd290SKathiravan T			bias-disable;
49b59cd290SKathiravan T		};
50b59cd290SKathiravan T
51b59cd290SKathiravan T		cmd-pins {
52b59cd290SKathiravan T			pins = "gpio12";
53b59cd290SKathiravan T			function = "sdc_cmd";
54b59cd290SKathiravan T			drive-strength = <8>;
55b59cd290SKathiravan T			bias-pull-up;
56b59cd290SKathiravan T		};
57b59cd290SKathiravan T
58b59cd290SKathiravan T		data-pins {
59b59cd290SKathiravan T			pins = "gpio8", "gpio9", "gpio10", "gpio11";
60b59cd290SKathiravan T			function = "sdc_data";
61b59cd290SKathiravan T			drive-strength = <8>;
62b59cd290SKathiravan T			bias-pull-up;
63b59cd290SKathiravan T		};
64b59cd290SKathiravan T	};
65b59cd290SKathiravan T};
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