1b2441318SGreg Kroah-Hartman// SPDX-License-Identifier: GPL-2.0 2742af7e7SThierry Reding#include <dt-bindings/clock/tegra210-car.h> 3742af7e7SThierry Reding#include <dt-bindings/gpio/tegra-gpio.h> 4742af7e7SThierry Reding#include <dt-bindings/memory/tegra210-mc.h> 5742af7e7SThierry Reding#include <dt-bindings/pinctrl/pinctrl-tegra.h> 66641af7eSAapo Vienamo#include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 7742af7e7SThierry Reding#include <dt-bindings/interrupt-controller/arm-gic.h> 8e2bed1ebSWei Ni#include <dt-bindings/thermal/tegra124-soctherm.h> 9742af7e7SThierry Reding 10742af7e7SThierry Reding/ { 11742af7e7SThierry Reding compatible = "nvidia,tegra210"; 12742af7e7SThierry Reding interrupt-parent = <&lic>; 13742af7e7SThierry Reding #address-cells = <2>; 14742af7e7SThierry Reding #size-cells = <2>; 15742af7e7SThierry Reding 16475d99fcSRob Herring pcie@1003000 { 17589a2d3fSThierry Reding compatible = "nvidia,tegra210-pcie"; 18589a2d3fSThierry Reding device_type = "pci"; 19589a2d3fSThierry Reding reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ 20589a2d3fSThierry Reding 0x0 0x01003800 0x0 0x00000800 /* AFI registers */ 21589a2d3fSThierry Reding 0x0 0x02000000 0x0 0x10000000>; /* configuration space */ 22589a2d3fSThierry Reding reg-names = "pads", "afi", "cs"; 23589a2d3fSThierry Reding interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */ 24589a2d3fSThierry Reding <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */ 25589a2d3fSThierry Reding interrupt-names = "intr", "msi"; 26589a2d3fSThierry Reding 27589a2d3fSThierry Reding #interrupt-cells = <1>; 28589a2d3fSThierry Reding interrupt-map-mask = <0 0 0 0>; 29589a2d3fSThierry Reding interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 30589a2d3fSThierry Reding 31589a2d3fSThierry Reding bus-range = <0x00 0xff>; 32589a2d3fSThierry Reding #address-cells = <3>; 33589a2d3fSThierry Reding #size-cells = <2>; 34589a2d3fSThierry Reding 35589a2d3fSThierry Reding ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */ 36589a2d3fSThierry Reding 0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */ 37589a2d3fSThierry Reding 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */ 38589a2d3fSThierry Reding 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */ 39589a2d3fSThierry Reding 0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */ 40589a2d3fSThierry Reding 41589a2d3fSThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCIE>, 42589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_AFI>, 43589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>, 44589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_CML0>; 45589a2d3fSThierry Reding clock-names = "pex", "afi", "pll_e", "cml"; 46589a2d3fSThierry Reding resets = <&tegra_car 70>, 47589a2d3fSThierry Reding <&tegra_car 72>, 48589a2d3fSThierry Reding <&tegra_car 74>; 49589a2d3fSThierry Reding reset-names = "pex", "afi", "pcie_x"; 50589a2d3fSThierry Reding status = "disabled"; 51589a2d3fSThierry Reding 52589a2d3fSThierry Reding pci@1,0 { 53589a2d3fSThierry Reding device_type = "pci"; 54589a2d3fSThierry Reding assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; 55589a2d3fSThierry Reding reg = <0x000800 0 0 0 0>; 56475d99fcSRob Herring bus-range = <0x00 0xff>; 57589a2d3fSThierry Reding status = "disabled"; 58589a2d3fSThierry Reding 59589a2d3fSThierry Reding #address-cells = <3>; 60589a2d3fSThierry Reding #size-cells = <2>; 61589a2d3fSThierry Reding ranges; 62589a2d3fSThierry Reding 63589a2d3fSThierry Reding nvidia,num-lanes = <4>; 64589a2d3fSThierry Reding }; 65589a2d3fSThierry Reding 66589a2d3fSThierry Reding pci@2,0 { 67589a2d3fSThierry Reding device_type = "pci"; 68589a2d3fSThierry Reding assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; 69589a2d3fSThierry Reding reg = <0x001000 0 0 0 0>; 70475d99fcSRob Herring bus-range = <0x00 0xff>; 71589a2d3fSThierry Reding status = "disabled"; 72589a2d3fSThierry Reding 73589a2d3fSThierry Reding #address-cells = <3>; 74589a2d3fSThierry Reding #size-cells = <2>; 75589a2d3fSThierry Reding ranges; 76589a2d3fSThierry Reding 77589a2d3fSThierry Reding nvidia,num-lanes = <1>; 78589a2d3fSThierry Reding }; 79589a2d3fSThierry Reding }; 80589a2d3fSThierry Reding 81be70771dSThierry Reding host1x@50000000 { 82742af7e7SThierry Reding compatible = "nvidia,tegra210-host1x", "simple-bus"; 83742af7e7SThierry Reding reg = <0x0 0x50000000 0x0 0x00034000>; 84742af7e7SThierry Reding interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */ 85742af7e7SThierry Reding <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */ 86742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HOST1X>; 87742af7e7SThierry Reding clock-names = "host1x"; 88742af7e7SThierry Reding resets = <&tegra_car 28>; 89742af7e7SThierry Reding reset-names = "host1x"; 90742af7e7SThierry Reding 91742af7e7SThierry Reding #address-cells = <2>; 92742af7e7SThierry Reding #size-cells = <2>; 93742af7e7SThierry Reding 94742af7e7SThierry Reding ranges = <0x0 0x54000000 0x0 0x54000000 0x0 0x01000000>; 95742af7e7SThierry Reding 96116503a6SMikko Perttunen iommus = <&mc TEGRA_SWGROUP_HC>; 97116503a6SMikko Perttunen 98be70771dSThierry Reding dpaux1: dpaux@54040000 { 99742af7e7SThierry Reding compatible = "nvidia,tegra210-dpaux"; 100742af7e7SThierry Reding reg = <0x0 0x54040000 0x0 0x00040000>; 101742af7e7SThierry Reding interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 102742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX1>, 103742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 104742af7e7SThierry Reding clock-names = "dpaux", "parent"; 105742af7e7SThierry Reding resets = <&tegra_car 207>; 106742af7e7SThierry Reding reset-names = "dpaux"; 10796d1f078SJon Hunter power-domains = <&pd_sor>; 108742af7e7SThierry Reding status = "disabled"; 10966b2d6e9SJon Hunter 11066b2d6e9SJon Hunter state_dpaux1_aux: pinmux-aux { 11166b2d6e9SJon Hunter groups = "dpaux-io"; 11266b2d6e9SJon Hunter function = "aux"; 11366b2d6e9SJon Hunter }; 11466b2d6e9SJon Hunter 11566b2d6e9SJon Hunter state_dpaux1_i2c: pinmux-i2c { 11666b2d6e9SJon Hunter groups = "dpaux-io"; 11766b2d6e9SJon Hunter function = "i2c"; 11866b2d6e9SJon Hunter }; 11966b2d6e9SJon Hunter 12066b2d6e9SJon Hunter state_dpaux1_off: pinmux-off { 12166b2d6e9SJon Hunter groups = "dpaux-io"; 12266b2d6e9SJon Hunter function = "off"; 12366b2d6e9SJon Hunter }; 12466b2d6e9SJon Hunter 12566b2d6e9SJon Hunter i2c-bus { 12666b2d6e9SJon Hunter #address-cells = <1>; 12766b2d6e9SJon Hunter #size-cells = <0>; 12866b2d6e9SJon Hunter }; 129742af7e7SThierry Reding }; 130742af7e7SThierry Reding 131be70771dSThierry Reding vi@54080000 { 132742af7e7SThierry Reding compatible = "nvidia,tegra210-vi"; 133742af7e7SThierry Reding reg = <0x0 0x54080000 0x0 0x00040000>; 134742af7e7SThierry Reding interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 135742af7e7SThierry Reding status = "disabled"; 136742af7e7SThierry Reding }; 137742af7e7SThierry Reding 138be70771dSThierry Reding tsec@54100000 { 139742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 140742af7e7SThierry Reding reg = <0x0 0x54100000 0x0 0x00040000>; 141742af7e7SThierry Reding }; 142742af7e7SThierry Reding 143be70771dSThierry Reding dc@54200000 { 144742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 145742af7e7SThierry Reding reg = <0x0 0x54200000 0x0 0x00040000>; 146742af7e7SThierry Reding interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 147742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP1>, 148742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 149742af7e7SThierry Reding clock-names = "dc", "parent"; 150742af7e7SThierry Reding resets = <&tegra_car 27>; 151742af7e7SThierry Reding reset-names = "dc"; 152742af7e7SThierry Reding 153742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DC>; 154742af7e7SThierry Reding 155742af7e7SThierry Reding nvidia,head = <0>; 156742af7e7SThierry Reding }; 157742af7e7SThierry Reding 158be70771dSThierry Reding dc@54240000 { 159742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 160742af7e7SThierry Reding reg = <0x0 0x54240000 0x0 0x00040000>; 161742af7e7SThierry Reding interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 162742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP2>, 163742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 164742af7e7SThierry Reding clock-names = "dc", "parent"; 165742af7e7SThierry Reding resets = <&tegra_car 26>; 166742af7e7SThierry Reding reset-names = "dc"; 167742af7e7SThierry Reding 168742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DCB>; 169742af7e7SThierry Reding 170742af7e7SThierry Reding nvidia,head = <1>; 171742af7e7SThierry Reding }; 172742af7e7SThierry Reding 173be70771dSThierry Reding dsi@54300000 { 174742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 175742af7e7SThierry Reding reg = <0x0 0x54300000 0x0 0x00040000>; 176742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIA>, 177742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIALP>, 178742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 179742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 180742af7e7SThierry Reding resets = <&tegra_car 48>; 181742af7e7SThierry Reding reset-names = "dsi"; 18296d1f078SJon Hunter power-domains = <&pd_sor>; 183742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x0c0>; /* DSIA & DSIB pads */ 184742af7e7SThierry Reding 185742af7e7SThierry Reding status = "disabled"; 186742af7e7SThierry Reding 187742af7e7SThierry Reding #address-cells = <1>; 188742af7e7SThierry Reding #size-cells = <0>; 189742af7e7SThierry Reding }; 190742af7e7SThierry Reding 191be70771dSThierry Reding vic@54340000 { 192742af7e7SThierry Reding compatible = "nvidia,tegra210-vic"; 193742af7e7SThierry Reding reg = <0x0 0x54340000 0x0 0x00040000>; 19424963d1bSMikko Perttunen interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 19524963d1bSMikko Perttunen clocks = <&tegra_car TEGRA210_CLK_VIC03>; 19624963d1bSMikko Perttunen clock-names = "vic"; 19724963d1bSMikko Perttunen resets = <&tegra_car 178>; 19824963d1bSMikko Perttunen reset-names = "vic"; 19924963d1bSMikko Perttunen 20024963d1bSMikko Perttunen iommus = <&mc TEGRA_SWGROUP_VIC>; 20124963d1bSMikko Perttunen power-domains = <&pd_vic>; 202742af7e7SThierry Reding }; 203742af7e7SThierry Reding 204be70771dSThierry Reding nvjpg@54380000 { 205742af7e7SThierry Reding compatible = "nvidia,tegra210-nvjpg"; 206742af7e7SThierry Reding reg = <0x0 0x54380000 0x0 0x00040000>; 207742af7e7SThierry Reding status = "disabled"; 208742af7e7SThierry Reding }; 209742af7e7SThierry Reding 210be70771dSThierry Reding dsi@54400000 { 211742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 212742af7e7SThierry Reding reg = <0x0 0x54400000 0x0 0x00040000>; 213742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIB>, 214742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIBLP>, 215742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 216742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 217742af7e7SThierry Reding resets = <&tegra_car 82>; 218742af7e7SThierry Reding reset-names = "dsi"; 21996d1f078SJon Hunter power-domains = <&pd_sor>; 220742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x300>; /* DSIC & DSID pads */ 221742af7e7SThierry Reding 222742af7e7SThierry Reding status = "disabled"; 223742af7e7SThierry Reding 224742af7e7SThierry Reding #address-cells = <1>; 225742af7e7SThierry Reding #size-cells = <0>; 226742af7e7SThierry Reding }; 227742af7e7SThierry Reding 228be70771dSThierry Reding nvdec@54480000 { 229742af7e7SThierry Reding compatible = "nvidia,tegra210-nvdec"; 230742af7e7SThierry Reding reg = <0x0 0x54480000 0x0 0x00040000>; 231742af7e7SThierry Reding status = "disabled"; 232742af7e7SThierry Reding }; 233742af7e7SThierry Reding 234be70771dSThierry Reding nvenc@544c0000 { 235742af7e7SThierry Reding compatible = "nvidia,tegra210-nvenc"; 236742af7e7SThierry Reding reg = <0x0 0x544c0000 0x0 0x00040000>; 237742af7e7SThierry Reding status = "disabled"; 238742af7e7SThierry Reding }; 239742af7e7SThierry Reding 240be70771dSThierry Reding tsec@54500000 { 241742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 242742af7e7SThierry Reding reg = <0x0 0x54500000 0x0 0x00040000>; 243742af7e7SThierry Reding status = "disabled"; 244742af7e7SThierry Reding }; 245742af7e7SThierry Reding 246be70771dSThierry Reding sor@54540000 { 247742af7e7SThierry Reding compatible = "nvidia,tegra210-sor"; 248742af7e7SThierry Reding reg = <0x0 0x54540000 0x0 0x00040000>; 249742af7e7SThierry Reding interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 250742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR0>, 251742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>, 252742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 253742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 254742af7e7SThierry Reding clock-names = "sor", "parent", "dp", "safe"; 255742af7e7SThierry Reding resets = <&tegra_car 182>; 256742af7e7SThierry Reding reset-names = "sor"; 25766b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_aux>; 25866b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_i2c>; 25966b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux_off>; 26066b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 26196d1f078SJon Hunter power-domains = <&pd_sor>; 262742af7e7SThierry Reding status = "disabled"; 263742af7e7SThierry Reding }; 264742af7e7SThierry Reding 265be70771dSThierry Reding sor@54580000 { 266742af7e7SThierry Reding compatible = "nvidia,tegra210-sor1"; 267742af7e7SThierry Reding reg = <0x0 0x54580000 0x0 0x00040000>; 268742af7e7SThierry Reding interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 269742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR1>, 27050f5b841SThierry Reding <&tegra_car TEGRA210_CLK_SOR1_OUT>, 271742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D2_OUT0>, 272742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 273742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 27450f5b841SThierry Reding clock-names = "sor", "out", "parent", "dp", "safe"; 275742af7e7SThierry Reding resets = <&tegra_car 183>; 276742af7e7SThierry Reding reset-names = "sor"; 27766b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_aux>; 27866b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_i2c>; 27966b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux1_off>; 28066b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 28196d1f078SJon Hunter power-domains = <&pd_sor>; 282742af7e7SThierry Reding status = "disabled"; 283742af7e7SThierry Reding }; 284742af7e7SThierry Reding 285be70771dSThierry Reding dpaux: dpaux@545c0000 { 286742af7e7SThierry Reding compatible = "nvidia,tegra124-dpaux"; 287742af7e7SThierry Reding reg = <0x0 0x545c0000 0x0 0x00040000>; 288742af7e7SThierry Reding interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 289742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX>, 290742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 291742af7e7SThierry Reding clock-names = "dpaux", "parent"; 292742af7e7SThierry Reding resets = <&tegra_car 181>; 293742af7e7SThierry Reding reset-names = "dpaux"; 29496d1f078SJon Hunter power-domains = <&pd_sor>; 295742af7e7SThierry Reding status = "disabled"; 29666b2d6e9SJon Hunter 29766b2d6e9SJon Hunter state_dpaux_aux: pinmux-aux { 29866b2d6e9SJon Hunter groups = "dpaux-io"; 29966b2d6e9SJon Hunter function = "aux"; 30066b2d6e9SJon Hunter }; 30166b2d6e9SJon Hunter 30266b2d6e9SJon Hunter state_dpaux_i2c: pinmux-i2c { 30366b2d6e9SJon Hunter groups = "dpaux-io"; 30466b2d6e9SJon Hunter function = "i2c"; 30566b2d6e9SJon Hunter }; 30666b2d6e9SJon Hunter 30766b2d6e9SJon Hunter state_dpaux_off: pinmux-off { 30866b2d6e9SJon Hunter groups = "dpaux-io"; 30966b2d6e9SJon Hunter function = "off"; 31066b2d6e9SJon Hunter }; 31166b2d6e9SJon Hunter 31266b2d6e9SJon Hunter i2c-bus { 31366b2d6e9SJon Hunter #address-cells = <1>; 31466b2d6e9SJon Hunter #size-cells = <0>; 31566b2d6e9SJon Hunter }; 316742af7e7SThierry Reding }; 317742af7e7SThierry Reding 318be70771dSThierry Reding isp@54600000 { 319742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 320742af7e7SThierry Reding reg = <0x0 0x54600000 0x0 0x00040000>; 321742af7e7SThierry Reding interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 322742af7e7SThierry Reding status = "disabled"; 323742af7e7SThierry Reding }; 324742af7e7SThierry Reding 325be70771dSThierry Reding isp@54680000 { 326742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 327742af7e7SThierry Reding reg = <0x0 0x54680000 0x0 0x00040000>; 328742af7e7SThierry Reding interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 329742af7e7SThierry Reding status = "disabled"; 330742af7e7SThierry Reding }; 331742af7e7SThierry Reding 332be70771dSThierry Reding i2c@546c0000 { 333742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c-vi"; 334742af7e7SThierry Reding reg = <0x0 0x546c0000 0x0 0x00040000>; 335742af7e7SThierry Reding interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 336742af7e7SThierry Reding status = "disabled"; 337742af7e7SThierry Reding }; 338742af7e7SThierry Reding }; 339742af7e7SThierry Reding 340be70771dSThierry Reding gic: interrupt-controller@50041000 { 341742af7e7SThierry Reding compatible = "arm,gic-400"; 342742af7e7SThierry Reding #interrupt-cells = <3>; 343742af7e7SThierry Reding interrupt-controller; 344742af7e7SThierry Reding reg = <0x0 0x50041000 0x0 0x1000>, 345742af7e7SThierry Reding <0x0 0x50042000 0x0 0x2000>, 346742af7e7SThierry Reding <0x0 0x50044000 0x0 0x2000>, 347742af7e7SThierry Reding <0x0 0x50046000 0x0 0x2000>; 348742af7e7SThierry Reding interrupts = <GIC_PPI 9 349742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 350742af7e7SThierry Reding interrupt-parent = <&gic>; 351742af7e7SThierry Reding }; 352742af7e7SThierry Reding 353be70771dSThierry Reding gpu@57000000 { 354742af7e7SThierry Reding compatible = "nvidia,gm20b"; 355742af7e7SThierry Reding reg = <0x0 0x57000000 0x0 0x01000000>, 356742af7e7SThierry Reding <0x0 0x58000000 0x0 0x01000000>; 357742af7e7SThierry Reding interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 358742af7e7SThierry Reding <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 359742af7e7SThierry Reding interrupt-names = "stall", "nonstall"; 360742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_GPU>, 3614a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_P_OUT5>, 3624a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_G_REF>; 3634a0778e9SAlexandre Courbot clock-names = "gpu", "pwr", "ref"; 364742af7e7SThierry Reding resets = <&tegra_car 184>; 365742af7e7SThierry Reding reset-names = "gpu"; 36630f949bcSAlexandre Courbot 36730f949bcSAlexandre Courbot iommus = <&mc TEGRA_SWGROUP_GPU>; 36830f949bcSAlexandre Courbot 369742af7e7SThierry Reding status = "disabled"; 370742af7e7SThierry Reding }; 371742af7e7SThierry Reding 372be70771dSThierry Reding lic: interrupt-controller@60004000 { 373742af7e7SThierry Reding compatible = "nvidia,tegra210-ictlr"; 374742af7e7SThierry Reding reg = <0x0 0x60004000 0x0 0x40>, /* primary controller */ 375742af7e7SThierry Reding <0x0 0x60004100 0x0 0x40>, /* secondary controller */ 376742af7e7SThierry Reding <0x0 0x60004200 0x0 0x40>, /* tertiary controller */ 377742af7e7SThierry Reding <0x0 0x60004300 0x0 0x40>, /* quaternary controller */ 378742af7e7SThierry Reding <0x0 0x60004400 0x0 0x40>, /* quinary controller */ 379742af7e7SThierry Reding <0x0 0x60004500 0x0 0x40>; /* senary controller */ 380742af7e7SThierry Reding interrupt-controller; 381742af7e7SThierry Reding #interrupt-cells = <3>; 382742af7e7SThierry Reding interrupt-parent = <&gic>; 383742af7e7SThierry Reding }; 384742af7e7SThierry Reding 385be70771dSThierry Reding timer@60005000 { 386742af7e7SThierry Reding compatible = "nvidia,tegra210-timer", "nvidia,tegra20-timer"; 387742af7e7SThierry Reding reg = <0x0 0x60005000 0x0 0x400>; 388742af7e7SThierry Reding interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 389742af7e7SThierry Reding <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 390742af7e7SThierry Reding <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 391742af7e7SThierry Reding <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 392742af7e7SThierry Reding <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 393742af7e7SThierry Reding <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 394742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_TIMER>; 395742af7e7SThierry Reding clock-names = "timer"; 396742af7e7SThierry Reding }; 397742af7e7SThierry Reding 398be70771dSThierry Reding tegra_car: clock@60006000 { 399742af7e7SThierry Reding compatible = "nvidia,tegra210-car"; 400742af7e7SThierry Reding reg = <0x0 0x60006000 0x0 0x1000>; 401742af7e7SThierry Reding #clock-cells = <1>; 402742af7e7SThierry Reding #reset-cells = <1>; 403742af7e7SThierry Reding }; 404742af7e7SThierry Reding 405be70771dSThierry Reding flow-controller@60007000 { 406742af7e7SThierry Reding compatible = "nvidia,tegra210-flowctrl"; 407742af7e7SThierry Reding reg = <0x0 0x60007000 0x0 0x1000>; 408742af7e7SThierry Reding }; 409742af7e7SThierry Reding 410be70771dSThierry Reding gpio: gpio@6000d000 { 41101665512SStephen Warren compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio"; 412742af7e7SThierry Reding reg = <0x0 0x6000d000 0x0 0x1000>; 413742af7e7SThierry Reding interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 414742af7e7SThierry Reding <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 415742af7e7SThierry Reding <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 416742af7e7SThierry Reding <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 417742af7e7SThierry Reding <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 418742af7e7SThierry Reding <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 419742af7e7SThierry Reding <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 420742af7e7SThierry Reding <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 421742af7e7SThierry Reding #gpio-cells = <2>; 422742af7e7SThierry Reding gpio-controller; 423742af7e7SThierry Reding #interrupt-cells = <2>; 424742af7e7SThierry Reding interrupt-controller; 425742af7e7SThierry Reding }; 426742af7e7SThierry Reding 427be70771dSThierry Reding apbdma: dma@60020000 { 428742af7e7SThierry Reding compatible = "nvidia,tegra210-apbdma", "nvidia,tegra148-apbdma"; 429742af7e7SThierry Reding reg = <0x0 0x60020000 0x0 0x1400>; 430742af7e7SThierry Reding interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 431742af7e7SThierry Reding <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 432742af7e7SThierry Reding <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 433742af7e7SThierry Reding <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 434742af7e7SThierry Reding <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 435742af7e7SThierry Reding <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 436742af7e7SThierry Reding <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 437742af7e7SThierry Reding <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 438742af7e7SThierry Reding <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 439742af7e7SThierry Reding <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 440742af7e7SThierry Reding <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 441742af7e7SThierry Reding <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 442742af7e7SThierry Reding <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 443742af7e7SThierry Reding <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 444742af7e7SThierry Reding <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 445742af7e7SThierry Reding <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, 446742af7e7SThierry Reding <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 447742af7e7SThierry Reding <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 448742af7e7SThierry Reding <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 449742af7e7SThierry Reding <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 450742af7e7SThierry Reding <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 451742af7e7SThierry Reding <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, 452742af7e7SThierry Reding <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, 453742af7e7SThierry Reding <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 454742af7e7SThierry Reding <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 455742af7e7SThierry Reding <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 456742af7e7SThierry Reding <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 457742af7e7SThierry Reding <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>, 458742af7e7SThierry Reding <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, 459742af7e7SThierry Reding <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, 460742af7e7SThierry Reding <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 461742af7e7SThierry Reding <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 462742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_APBDMA>; 463742af7e7SThierry Reding clock-names = "dma"; 464742af7e7SThierry Reding resets = <&tegra_car 34>; 465742af7e7SThierry Reding reset-names = "dma"; 466742af7e7SThierry Reding #dma-cells = <1>; 467742af7e7SThierry Reding }; 468742af7e7SThierry Reding 469be70771dSThierry Reding apbmisc@70000800 { 470742af7e7SThierry Reding compatible = "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc"; 471742af7e7SThierry Reding reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */ 472742af7e7SThierry Reding <0x0 0x7000e864 0x0 0x04>; /* Strapping options */ 473742af7e7SThierry Reding }; 474742af7e7SThierry Reding 475be70771dSThierry Reding pinmux: pinmux@700008d4 { 476742af7e7SThierry Reding compatible = "nvidia,tegra210-pinmux"; 477742af7e7SThierry Reding reg = <0x0 0x700008d4 0x0 0x29c>, /* Pad control registers */ 478742af7e7SThierry Reding <0x0 0x70003000 0x0 0x294>; /* Mux registers */ 479742af7e7SThierry Reding }; 480742af7e7SThierry Reding 481742af7e7SThierry Reding /* 482742af7e7SThierry Reding * There are two serial driver i.e. 8250 based simple serial 483742af7e7SThierry Reding * driver and APB DMA based serial driver for higher baudrate 484ef769e32SAdam Buchbinder * and performance. To enable the 8250 based driver, the compatible 485742af7e7SThierry Reding * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable 48668cd8b2eSThierry Reding * the APB DMA based serial driver, the compatible is 487742af7e7SThierry Reding * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart". 488742af7e7SThierry Reding */ 489be70771dSThierry Reding uarta: serial@70006000 { 490742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 491742af7e7SThierry Reding reg = <0x0 0x70006000 0x0 0x40>; 492742af7e7SThierry Reding reg-shift = <2>; 493742af7e7SThierry Reding interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 494742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTA>; 495742af7e7SThierry Reding clock-names = "serial"; 496742af7e7SThierry Reding resets = <&tegra_car 6>; 497742af7e7SThierry Reding reset-names = "serial"; 498742af7e7SThierry Reding dmas = <&apbdma 8>, <&apbdma 8>; 499742af7e7SThierry Reding dma-names = "rx", "tx"; 500742af7e7SThierry Reding status = "disabled"; 501742af7e7SThierry Reding }; 502742af7e7SThierry Reding 503be70771dSThierry Reding uartb: serial@70006040 { 504742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 505742af7e7SThierry Reding reg = <0x0 0x70006040 0x0 0x40>; 506742af7e7SThierry Reding reg-shift = <2>; 507742af7e7SThierry Reding interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 508742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTB>; 509742af7e7SThierry Reding clock-names = "serial"; 510742af7e7SThierry Reding resets = <&tegra_car 7>; 511742af7e7SThierry Reding reset-names = "serial"; 512742af7e7SThierry Reding dmas = <&apbdma 9>, <&apbdma 9>; 513742af7e7SThierry Reding dma-names = "rx", "tx"; 514742af7e7SThierry Reding status = "disabled"; 515742af7e7SThierry Reding }; 516742af7e7SThierry Reding 517be70771dSThierry Reding uartc: serial@70006200 { 518742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 519742af7e7SThierry Reding reg = <0x0 0x70006200 0x0 0x40>; 520742af7e7SThierry Reding reg-shift = <2>; 521742af7e7SThierry Reding interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 522742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTC>; 523742af7e7SThierry Reding clock-names = "serial"; 524742af7e7SThierry Reding resets = <&tegra_car 55>; 525742af7e7SThierry Reding reset-names = "serial"; 526742af7e7SThierry Reding dmas = <&apbdma 10>, <&apbdma 10>; 527742af7e7SThierry Reding dma-names = "rx", "tx"; 528742af7e7SThierry Reding status = "disabled"; 529742af7e7SThierry Reding }; 530742af7e7SThierry Reding 531be70771dSThierry Reding uartd: serial@70006300 { 532742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 533742af7e7SThierry Reding reg = <0x0 0x70006300 0x0 0x40>; 534742af7e7SThierry Reding reg-shift = <2>; 535742af7e7SThierry Reding interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 536742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTD>; 537742af7e7SThierry Reding clock-names = "serial"; 538742af7e7SThierry Reding resets = <&tegra_car 65>; 539742af7e7SThierry Reding reset-names = "serial"; 540742af7e7SThierry Reding dmas = <&apbdma 19>, <&apbdma 19>; 541742af7e7SThierry Reding dma-names = "rx", "tx"; 542742af7e7SThierry Reding status = "disabled"; 543742af7e7SThierry Reding }; 544742af7e7SThierry Reding 545be70771dSThierry Reding pwm: pwm@7000a000 { 546742af7e7SThierry Reding compatible = "nvidia,tegra210-pwm", "nvidia,tegra20-pwm"; 547742af7e7SThierry Reding reg = <0x0 0x7000a000 0x0 0x100>; 548742af7e7SThierry Reding #pwm-cells = <2>; 549742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PWM>; 550742af7e7SThierry Reding clock-names = "pwm"; 551742af7e7SThierry Reding resets = <&tegra_car 17>; 552742af7e7SThierry Reding reset-names = "pwm"; 553742af7e7SThierry Reding status = "disabled"; 554742af7e7SThierry Reding }; 555742af7e7SThierry Reding 556be70771dSThierry Reding i2c@7000c000 { 557742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 558742af7e7SThierry Reding reg = <0x0 0x7000c000 0x0 0x100>; 559742af7e7SThierry Reding interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 560742af7e7SThierry Reding #address-cells = <1>; 561742af7e7SThierry Reding #size-cells = <0>; 562742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C1>; 563742af7e7SThierry Reding clock-names = "div-clk"; 564742af7e7SThierry Reding resets = <&tegra_car 12>; 565742af7e7SThierry Reding reset-names = "i2c"; 566742af7e7SThierry Reding dmas = <&apbdma 21>, <&apbdma 21>; 567742af7e7SThierry Reding dma-names = "rx", "tx"; 568742af7e7SThierry Reding status = "disabled"; 569742af7e7SThierry Reding }; 570742af7e7SThierry Reding 571be70771dSThierry Reding i2c@7000c400 { 572742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 573742af7e7SThierry Reding reg = <0x0 0x7000c400 0x0 0x100>; 574742af7e7SThierry Reding interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 575742af7e7SThierry Reding #address-cells = <1>; 576742af7e7SThierry Reding #size-cells = <0>; 577742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C2>; 578742af7e7SThierry Reding clock-names = "div-clk"; 579742af7e7SThierry Reding resets = <&tegra_car 54>; 580742af7e7SThierry Reding reset-names = "i2c"; 581742af7e7SThierry Reding dmas = <&apbdma 22>, <&apbdma 22>; 582742af7e7SThierry Reding dma-names = "rx", "tx"; 583742af7e7SThierry Reding status = "disabled"; 584742af7e7SThierry Reding }; 585742af7e7SThierry Reding 586be70771dSThierry Reding i2c@7000c500 { 587742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 588742af7e7SThierry Reding reg = <0x0 0x7000c500 0x0 0x100>; 589742af7e7SThierry Reding interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 590742af7e7SThierry Reding #address-cells = <1>; 591742af7e7SThierry Reding #size-cells = <0>; 592742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C3>; 593742af7e7SThierry Reding clock-names = "div-clk"; 594742af7e7SThierry Reding resets = <&tegra_car 67>; 595742af7e7SThierry Reding reset-names = "i2c"; 596742af7e7SThierry Reding dmas = <&apbdma 23>, <&apbdma 23>; 597742af7e7SThierry Reding dma-names = "rx", "tx"; 598742af7e7SThierry Reding status = "disabled"; 599742af7e7SThierry Reding }; 600742af7e7SThierry Reding 601be70771dSThierry Reding i2c@7000c700 { 602742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 603742af7e7SThierry Reding reg = <0x0 0x7000c700 0x0 0x100>; 604742af7e7SThierry Reding interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 605742af7e7SThierry Reding #address-cells = <1>; 606742af7e7SThierry Reding #size-cells = <0>; 607742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C4>; 608742af7e7SThierry Reding clock-names = "div-clk"; 609742af7e7SThierry Reding resets = <&tegra_car 103>; 610742af7e7SThierry Reding reset-names = "i2c"; 611742af7e7SThierry Reding dmas = <&apbdma 26>, <&apbdma 26>; 612742af7e7SThierry Reding dma-names = "rx", "tx"; 61366b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_i2c>; 61466b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_off>; 61566b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 616742af7e7SThierry Reding status = "disabled"; 617742af7e7SThierry Reding }; 618742af7e7SThierry Reding 619be70771dSThierry Reding i2c@7000d000 { 620742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 621742af7e7SThierry Reding reg = <0x0 0x7000d000 0x0 0x100>; 622742af7e7SThierry Reding interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 623742af7e7SThierry Reding #address-cells = <1>; 624742af7e7SThierry Reding #size-cells = <0>; 625742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C5>; 626742af7e7SThierry Reding clock-names = "div-clk"; 627742af7e7SThierry Reding resets = <&tegra_car 47>; 628742af7e7SThierry Reding reset-names = "i2c"; 629742af7e7SThierry Reding dmas = <&apbdma 24>, <&apbdma 24>; 630742af7e7SThierry Reding dma-names = "rx", "tx"; 631742af7e7SThierry Reding status = "disabled"; 632742af7e7SThierry Reding }; 633742af7e7SThierry Reding 634be70771dSThierry Reding i2c@7000d100 { 635742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 636742af7e7SThierry Reding reg = <0x0 0x7000d100 0x0 0x100>; 637742af7e7SThierry Reding interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 638742af7e7SThierry Reding #address-cells = <1>; 639742af7e7SThierry Reding #size-cells = <0>; 640742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C6>; 641742af7e7SThierry Reding clock-names = "div-clk"; 642742af7e7SThierry Reding resets = <&tegra_car 166>; 643742af7e7SThierry Reding reset-names = "i2c"; 644742af7e7SThierry Reding dmas = <&apbdma 30>, <&apbdma 30>; 645742af7e7SThierry Reding dma-names = "rx", "tx"; 64666b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_i2c>; 64766b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_off>; 64866b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 649742af7e7SThierry Reding status = "disabled"; 650742af7e7SThierry Reding }; 651742af7e7SThierry Reding 652be70771dSThierry Reding spi@7000d400 { 653742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 654742af7e7SThierry Reding reg = <0x0 0x7000d400 0x0 0x200>; 655742af7e7SThierry Reding interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 656742af7e7SThierry Reding #address-cells = <1>; 657742af7e7SThierry Reding #size-cells = <0>; 658742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC1>; 659742af7e7SThierry Reding clock-names = "spi"; 660742af7e7SThierry Reding resets = <&tegra_car 41>; 661742af7e7SThierry Reding reset-names = "spi"; 662742af7e7SThierry Reding dmas = <&apbdma 15>, <&apbdma 15>; 663742af7e7SThierry Reding dma-names = "rx", "tx"; 664742af7e7SThierry Reding status = "disabled"; 665742af7e7SThierry Reding }; 666742af7e7SThierry Reding 667be70771dSThierry Reding spi@7000d600 { 668742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 669742af7e7SThierry Reding reg = <0x0 0x7000d600 0x0 0x200>; 670742af7e7SThierry Reding interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 671742af7e7SThierry Reding #address-cells = <1>; 672742af7e7SThierry Reding #size-cells = <0>; 673742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC2>; 674742af7e7SThierry Reding clock-names = "spi"; 675742af7e7SThierry Reding resets = <&tegra_car 44>; 676742af7e7SThierry Reding reset-names = "spi"; 677742af7e7SThierry Reding dmas = <&apbdma 16>, <&apbdma 16>; 678742af7e7SThierry Reding dma-names = "rx", "tx"; 679742af7e7SThierry Reding status = "disabled"; 680742af7e7SThierry Reding }; 681742af7e7SThierry Reding 682be70771dSThierry Reding spi@7000d800 { 683742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 684742af7e7SThierry Reding reg = <0x0 0x7000d800 0x0 0x200>; 685742af7e7SThierry Reding interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 686742af7e7SThierry Reding #address-cells = <1>; 687742af7e7SThierry Reding #size-cells = <0>; 688742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC3>; 689742af7e7SThierry Reding clock-names = "spi"; 690742af7e7SThierry Reding resets = <&tegra_car 46>; 691742af7e7SThierry Reding reset-names = "spi"; 692742af7e7SThierry Reding dmas = <&apbdma 17>, <&apbdma 17>; 693742af7e7SThierry Reding dma-names = "rx", "tx"; 694742af7e7SThierry Reding status = "disabled"; 695742af7e7SThierry Reding }; 696742af7e7SThierry Reding 697be70771dSThierry Reding spi@7000da00 { 698742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 699742af7e7SThierry Reding reg = <0x0 0x7000da00 0x0 0x200>; 700742af7e7SThierry Reding interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 701742af7e7SThierry Reding #address-cells = <1>; 702742af7e7SThierry Reding #size-cells = <0>; 703742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC4>; 704742af7e7SThierry Reding clock-names = "spi"; 705742af7e7SThierry Reding resets = <&tegra_car 68>; 706742af7e7SThierry Reding reset-names = "spi"; 707742af7e7SThierry Reding dmas = <&apbdma 18>, <&apbdma 18>; 708742af7e7SThierry Reding dma-names = "rx", "tx"; 709742af7e7SThierry Reding status = "disabled"; 710742af7e7SThierry Reding }; 711742af7e7SThierry Reding 712be70771dSThierry Reding rtc@7000e000 { 713742af7e7SThierry Reding compatible = "nvidia,tegra210-rtc", "nvidia,tegra20-rtc"; 714742af7e7SThierry Reding reg = <0x0 0x7000e000 0x0 0x100>; 715742af7e7SThierry Reding interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 716742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_RTC>; 717742af7e7SThierry Reding clock-names = "rtc"; 718742af7e7SThierry Reding }; 719742af7e7SThierry Reding 720be70771dSThierry Reding pmc: pmc@7000e400 { 721742af7e7SThierry Reding compatible = "nvidia,tegra210-pmc"; 722742af7e7SThierry Reding reg = <0x0 0x7000e400 0x0 0x400>; 723742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; 724742af7e7SThierry Reding clock-names = "pclk", "clk32k_in"; 725c2b82445SJon Hunter 726c2b82445SJon Hunter powergates { 727c2b82445SJon Hunter pd_audio: aud { 728c2b82445SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 729c2b82445SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 730c2b82445SJon Hunter resets = <&tegra_car 198>; 731c2b82445SJon Hunter #power-domain-cells = <0>; 732c2b82445SJon Hunter }; 733241f02baSJon Hunter 73496d1f078SJon Hunter pd_sor: sor { 73596d1f078SJon Hunter clocks = <&tegra_car TEGRA210_CLK_SOR0>, 73696d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 73796d1f078SJon Hunter <&tegra_car TEGRA210_CLK_CSI>, 73896d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 73996d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 74096d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 74196d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 74296d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 74396d1f078SJon Hunter resets = <&tegra_car TEGRA210_CLK_SOR0>, 74496d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 74596d1f078SJon Hunter <&tegra_car TEGRA210_CLK_CSI>, 74696d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 74796d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 74896d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 74996d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 75096d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 75196d1f078SJon Hunter #power-domain-cells = <0>; 75296d1f078SJon Hunter }; 75396d1f078SJon Hunter 754241f02baSJon Hunter pd_xusbss: xusba { 755241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>; 756241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_SS>; 757241f02baSJon Hunter #power-domain-cells = <0>; 758241f02baSJon Hunter }; 759241f02baSJon Hunter 760241f02baSJon Hunter pd_xusbdev: xusbb { 761241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>; 762241f02baSJon Hunter resets = <&tegra_car 95>; 763241f02baSJon Hunter #power-domain-cells = <0>; 764241f02baSJon Hunter }; 765241f02baSJon Hunter 766241f02baSJon Hunter pd_xusbhost: xusbc { 767241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 768241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 769241f02baSJon Hunter #power-domain-cells = <0>; 770241f02baSJon Hunter }; 77124963d1bSMikko Perttunen 77224963d1bSMikko Perttunen pd_vic: vic { 77324963d1bSMikko Perttunen clocks = <&tegra_car TEGRA210_CLK_VIC03>; 77424963d1bSMikko Perttunen clock-names = "vic"; 77524963d1bSMikko Perttunen resets = <&tegra_car 178>; 77624963d1bSMikko Perttunen reset-names = "vic"; 77724963d1bSMikko Perttunen #power-domain-cells = <0>; 77824963d1bSMikko Perttunen }; 779c2b82445SJon Hunter }; 7806641af7eSAapo Vienamo 7816641af7eSAapo Vienamo sdmmc1_3v3: sdmmc1-3v3 { 7826641af7eSAapo Vienamo pins = "sdmmc1"; 7836641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>; 7846641af7eSAapo Vienamo }; 7856641af7eSAapo Vienamo 7866641af7eSAapo Vienamo sdmmc1_1v8: sdmmc1-1v8 { 7876641af7eSAapo Vienamo pins = "sdmmc1"; 7886641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>; 7896641af7eSAapo Vienamo }; 7906641af7eSAapo Vienamo 7916641af7eSAapo Vienamo sdmmc3_3v3: sdmmc3-3v3 { 7926641af7eSAapo Vienamo pins = "sdmmc3"; 7936641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>; 7946641af7eSAapo Vienamo }; 7956641af7eSAapo Vienamo 7966641af7eSAapo Vienamo sdmmc3_1v8: sdmmc3-1v8 { 7976641af7eSAapo Vienamo pins = "sdmmc3"; 7986641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>; 7996641af7eSAapo Vienamo }; 800742af7e7SThierry Reding }; 801742af7e7SThierry Reding 802be70771dSThierry Reding fuse@7000f800 { 803742af7e7SThierry Reding compatible = "nvidia,tegra210-efuse"; 804742af7e7SThierry Reding reg = <0x0 0x7000f800 0x0 0x400>; 805742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_FUSE>; 806742af7e7SThierry Reding clock-names = "fuse"; 807742af7e7SThierry Reding resets = <&tegra_car 39>; 808742af7e7SThierry Reding reset-names = "fuse"; 809742af7e7SThierry Reding }; 810742af7e7SThierry Reding 811be70771dSThierry Reding mc: memory-controller@70019000 { 812742af7e7SThierry Reding compatible = "nvidia,tegra210-mc"; 813742af7e7SThierry Reding reg = <0x0 0x70019000 0x0 0x1000>; 814742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MC>; 815742af7e7SThierry Reding clock-names = "mc"; 816742af7e7SThierry Reding 817742af7e7SThierry Reding interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 818742af7e7SThierry Reding 819742af7e7SThierry Reding #iommu-cells = <1>; 820742af7e7SThierry Reding }; 821742af7e7SThierry Reding 8226cb60ec4SPreetham Ramchandra sata@70020000 { 8236cb60ec4SPreetham Ramchandra compatible = "nvidia,tegra210-ahci"; 8246cb60ec4SPreetham Ramchandra reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */ 8256cb60ec4SPreetham Ramchandra <0x0 0x70020000 0x0 0x7000>, /* SATA */ 8266cb60ec4SPreetham Ramchandra <0x0 0x70001100 0x0 0x1000>; /* SATA AUX */ 8276cb60ec4SPreetham Ramchandra interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 8286cb60ec4SPreetham Ramchandra clocks = <&tegra_car TEGRA210_CLK_SATA>, 8296cb60ec4SPreetham Ramchandra <&tegra_car TEGRA210_CLK_SATA_OOB>; 8306cb60ec4SPreetham Ramchandra clock-names = "sata", "sata-oob"; 8316cb60ec4SPreetham Ramchandra resets = <&tegra_car 124>, 8326cb60ec4SPreetham Ramchandra <&tegra_car 123>, 8336cb60ec4SPreetham Ramchandra <&tegra_car 129>; 8346cb60ec4SPreetham Ramchandra reset-names = "sata", "sata-oob", "sata-cold"; 8356cb60ec4SPreetham Ramchandra status = "disabled"; 8366cb60ec4SPreetham Ramchandra }; 8376cb60ec4SPreetham Ramchandra 838be70771dSThierry Reding hda@70030000 { 839742af7e7SThierry Reding compatible = "nvidia,tegra210-hda", "nvidia,tegra30-hda"; 840742af7e7SThierry Reding reg = <0x0 0x70030000 0x0 0x10000>; 841742af7e7SThierry Reding interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 842742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HDA>, 843742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2HDMI>, 844742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2CODEC_2X>; 845742af7e7SThierry Reding clock-names = "hda", "hda2hdmi", "hda2codec_2x"; 846742af7e7SThierry Reding resets = <&tegra_car 125>, /* hda */ 847742af7e7SThierry Reding <&tegra_car 128>, /* hda2hdmi */ 848742af7e7SThierry Reding <&tegra_car 111>; /* hda2codec_2x */ 849742af7e7SThierry Reding reset-names = "hda", "hda2hdmi", "hda2codec_2x"; 850742af7e7SThierry Reding status = "disabled"; 851742af7e7SThierry Reding }; 852742af7e7SThierry Reding 853e7a99ac2SThierry Reding usb@70090000 { 854e7a99ac2SThierry Reding compatible = "nvidia,tegra210-xusb"; 855e7a99ac2SThierry Reding reg = <0x0 0x70090000 0x0 0x8000>, 856e7a99ac2SThierry Reding <0x0 0x70098000 0x0 0x1000>, 857e7a99ac2SThierry Reding <0x0 0x70099000 0x0 0x1000>; 858e7a99ac2SThierry Reding reg-names = "hcd", "fpci", "ipfs"; 859e7a99ac2SThierry Reding 860e7a99ac2SThierry Reding interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 8619168e1dbSJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 862e7a99ac2SThierry Reding 863e7a99ac2SThierry Reding clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>, 864e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>, 865e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>, 866e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS>, 867e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>, 868e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>, 869e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, 870e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, 871e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U_480M>, 872e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_CLK_M>, 873e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>; 874e7a99ac2SThierry Reding clock-names = "xusb_host", "xusb_host_src", 875e7a99ac2SThierry Reding "xusb_falcon_src", "xusb_ss", 876e7a99ac2SThierry Reding "xusb_ss_div2", "xusb_ss_src", 877e7a99ac2SThierry Reding "xusb_hs_src", "xusb_fs_src", 878e7a99ac2SThierry Reding "pll_u_480m", "clk_m", "pll_e"; 879e7a99ac2SThierry Reding resets = <&tegra_car 89>, <&tegra_car 156>, 880e7a99ac2SThierry Reding <&tegra_car 143>; 881e7a99ac2SThierry Reding reset-names = "xusb_host", "xusb_ss", "xusb_src"; 882e7a99ac2SThierry Reding 883e7a99ac2SThierry Reding nvidia,xusb-padctl = <&padctl>; 884e7a99ac2SThierry Reding 885e7a99ac2SThierry Reding status = "disabled"; 886e7a99ac2SThierry Reding }; 887e7a99ac2SThierry Reding 8884e07ac90SThierry Reding padctl: padctl@7009f000 { 8894e07ac90SThierry Reding compatible = "nvidia,tegra210-xusb-padctl"; 8904e07ac90SThierry Reding reg = <0x0 0x7009f000 0x0 0x1000>; 8914e07ac90SThierry Reding resets = <&tegra_car 142>; 8924e07ac90SThierry Reding reset-names = "padctl"; 8934e07ac90SThierry Reding 8944e07ac90SThierry Reding status = "disabled"; 8954e07ac90SThierry Reding 8964e07ac90SThierry Reding pads { 8974e07ac90SThierry Reding usb2 { 8984e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>; 8994e07ac90SThierry Reding clock-names = "trk"; 9004e07ac90SThierry Reding status = "disabled"; 9014e07ac90SThierry Reding 9024e07ac90SThierry Reding lanes { 9034e07ac90SThierry Reding usb2-0 { 9044e07ac90SThierry Reding status = "disabled"; 9054e07ac90SThierry Reding #phy-cells = <0>; 9064e07ac90SThierry Reding }; 9074e07ac90SThierry Reding 9084e07ac90SThierry Reding usb2-1 { 9094e07ac90SThierry Reding status = "disabled"; 9104e07ac90SThierry Reding #phy-cells = <0>; 9114e07ac90SThierry Reding }; 9124e07ac90SThierry Reding 9134e07ac90SThierry Reding usb2-2 { 9144e07ac90SThierry Reding status = "disabled"; 9154e07ac90SThierry Reding #phy-cells = <0>; 9164e07ac90SThierry Reding }; 9174e07ac90SThierry Reding 9184e07ac90SThierry Reding usb2-3 { 9194e07ac90SThierry Reding status = "disabled"; 9204e07ac90SThierry Reding #phy-cells = <0>; 9214e07ac90SThierry Reding }; 9224e07ac90SThierry Reding }; 9234e07ac90SThierry Reding }; 9244e07ac90SThierry Reding 9254e07ac90SThierry Reding hsic { 9264e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>; 9274e07ac90SThierry Reding clock-names = "trk"; 9284e07ac90SThierry Reding status = "disabled"; 9294e07ac90SThierry Reding 9304e07ac90SThierry Reding lanes { 9314e07ac90SThierry Reding hsic-0 { 9324e07ac90SThierry Reding status = "disabled"; 9334e07ac90SThierry Reding #phy-cells = <0>; 9344e07ac90SThierry Reding }; 9354e07ac90SThierry Reding 9364e07ac90SThierry Reding hsic-1 { 9374e07ac90SThierry Reding status = "disabled"; 9384e07ac90SThierry Reding #phy-cells = <0>; 9394e07ac90SThierry Reding }; 9404e07ac90SThierry Reding }; 9414e07ac90SThierry Reding }; 9424e07ac90SThierry Reding 9434e07ac90SThierry Reding pcie { 9444e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 9454e07ac90SThierry Reding clock-names = "pll"; 9464e07ac90SThierry Reding resets = <&tegra_car 205>; 9474e07ac90SThierry Reding reset-names = "phy"; 9484e07ac90SThierry Reding status = "disabled"; 9494e07ac90SThierry Reding 9504e07ac90SThierry Reding lanes { 9514e07ac90SThierry Reding pcie-0 { 9524e07ac90SThierry Reding status = "disabled"; 9534e07ac90SThierry Reding #phy-cells = <0>; 9544e07ac90SThierry Reding }; 9554e07ac90SThierry Reding 9564e07ac90SThierry Reding pcie-1 { 9574e07ac90SThierry Reding status = "disabled"; 9584e07ac90SThierry Reding #phy-cells = <0>; 9594e07ac90SThierry Reding }; 9604e07ac90SThierry Reding 9614e07ac90SThierry Reding pcie-2 { 9624e07ac90SThierry Reding status = "disabled"; 9634e07ac90SThierry Reding #phy-cells = <0>; 9644e07ac90SThierry Reding }; 9654e07ac90SThierry Reding 9664e07ac90SThierry Reding pcie-3 { 9674e07ac90SThierry Reding status = "disabled"; 9684e07ac90SThierry Reding #phy-cells = <0>; 9694e07ac90SThierry Reding }; 9704e07ac90SThierry Reding 9714e07ac90SThierry Reding pcie-4 { 9724e07ac90SThierry Reding status = "disabled"; 9734e07ac90SThierry Reding #phy-cells = <0>; 9744e07ac90SThierry Reding }; 9754e07ac90SThierry Reding 9764e07ac90SThierry Reding pcie-5 { 9774e07ac90SThierry Reding status = "disabled"; 9784e07ac90SThierry Reding #phy-cells = <0>; 9794e07ac90SThierry Reding }; 9804e07ac90SThierry Reding 9814e07ac90SThierry Reding pcie-6 { 9824e07ac90SThierry Reding status = "disabled"; 9834e07ac90SThierry Reding #phy-cells = <0>; 9844e07ac90SThierry Reding }; 9854e07ac90SThierry Reding }; 9864e07ac90SThierry Reding }; 9874e07ac90SThierry Reding 9884e07ac90SThierry Reding sata { 9894e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 9904e07ac90SThierry Reding clock-names = "pll"; 9914e07ac90SThierry Reding resets = <&tegra_car 204>; 9924e07ac90SThierry Reding reset-names = "phy"; 9934e07ac90SThierry Reding status = "disabled"; 9944e07ac90SThierry Reding 9954e07ac90SThierry Reding lanes { 9964e07ac90SThierry Reding sata-0 { 9974e07ac90SThierry Reding status = "disabled"; 9984e07ac90SThierry Reding #phy-cells = <0>; 9994e07ac90SThierry Reding }; 10004e07ac90SThierry Reding }; 10014e07ac90SThierry Reding }; 10024e07ac90SThierry Reding }; 10034e07ac90SThierry Reding 10044e07ac90SThierry Reding ports { 10054e07ac90SThierry Reding usb2-0 { 10064e07ac90SThierry Reding status = "disabled"; 10074e07ac90SThierry Reding }; 10084e07ac90SThierry Reding 10094e07ac90SThierry Reding usb2-1 { 10104e07ac90SThierry Reding status = "disabled"; 10114e07ac90SThierry Reding }; 10124e07ac90SThierry Reding 10134e07ac90SThierry Reding usb2-2 { 10144e07ac90SThierry Reding status = "disabled"; 10154e07ac90SThierry Reding }; 10164e07ac90SThierry Reding 10174e07ac90SThierry Reding usb2-3 { 10184e07ac90SThierry Reding status = "disabled"; 10194e07ac90SThierry Reding }; 10204e07ac90SThierry Reding 10214e07ac90SThierry Reding hsic-0 { 10224e07ac90SThierry Reding status = "disabled"; 10234e07ac90SThierry Reding }; 10244e07ac90SThierry Reding 10254e07ac90SThierry Reding usb3-0 { 10264e07ac90SThierry Reding status = "disabled"; 10274e07ac90SThierry Reding }; 10284e07ac90SThierry Reding 10294e07ac90SThierry Reding usb3-1 { 10304e07ac90SThierry Reding status = "disabled"; 10314e07ac90SThierry Reding }; 10324e07ac90SThierry Reding 10334e07ac90SThierry Reding usb3-2 { 10344e07ac90SThierry Reding status = "disabled"; 10354e07ac90SThierry Reding }; 10364e07ac90SThierry Reding 10374e07ac90SThierry Reding usb3-3 { 10384e07ac90SThierry Reding status = "disabled"; 10394e07ac90SThierry Reding }; 10404e07ac90SThierry Reding }; 10414e07ac90SThierry Reding }; 10424e07ac90SThierry Reding 1043be70771dSThierry Reding sdhci@700b0000 { 1044742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1045742af7e7SThierry Reding reg = <0x0 0x700b0000 0x0 0x200>; 1046742af7e7SThierry Reding interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1047742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC1>; 1048742af7e7SThierry Reding clock-names = "sdhci"; 1049742af7e7SThierry Reding resets = <&tegra_car 14>; 1050742af7e7SThierry Reding reset-names = "sdhci"; 10516641af7eSAapo Vienamo pinctrl-names = "sdmmc-3v3", "sdmmc-1v8"; 10526641af7eSAapo Vienamo pinctrl-0 = <&sdmmc1_3v3>; 10536641af7eSAapo Vienamo pinctrl-1 = <&sdmmc1_1v8>; 10541ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>; 10551ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>; 10561ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>; 10571ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>; 105863af8bcdSAapo Vienamo nvidia,default-tap = <0x2>; 105963af8bcdSAapo Vienamo nvidia,default-trim = <0x4>; 1060918f9671SAapo Vienamo assigned-clocks = <&tegra_car TEGRA210_CLK_SDMMC4>, 1061918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>, 1062918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4>; 1063918f9671SAapo Vienamo assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 1064918f9671SAapo Vienamo assigned-clock-rates = <200000000>, <1000000000>, <1000000000>; 1065742af7e7SThierry Reding status = "disabled"; 1066742af7e7SThierry Reding }; 1067742af7e7SThierry Reding 1068be70771dSThierry Reding sdhci@700b0200 { 1069742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1070742af7e7SThierry Reding reg = <0x0 0x700b0200 0x0 0x200>; 1071742af7e7SThierry Reding interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1072742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC2>; 1073742af7e7SThierry Reding clock-names = "sdhci"; 1074742af7e7SThierry Reding resets = <&tegra_car 9>; 1075742af7e7SThierry Reding reset-names = "sdhci"; 10761ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x05>; 10771ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x05>; 107863af8bcdSAapo Vienamo nvidia,default-tap = <0x8>; 107963af8bcdSAapo Vienamo nvidia,default-trim = <0x0>; 1080742af7e7SThierry Reding status = "disabled"; 1081742af7e7SThierry Reding }; 1082742af7e7SThierry Reding 1083be70771dSThierry Reding sdhci@700b0400 { 1084742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1085742af7e7SThierry Reding reg = <0x0 0x700b0400 0x0 0x200>; 1086742af7e7SThierry Reding interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 1087742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC3>; 1088742af7e7SThierry Reding clock-names = "sdhci"; 1089742af7e7SThierry Reding resets = <&tegra_car 69>; 1090742af7e7SThierry Reding reset-names = "sdhci"; 10916641af7eSAapo Vienamo pinctrl-names = "sdmmc-3v3", "sdmmc-1v8"; 10926641af7eSAapo Vienamo pinctrl-0 = <&sdmmc3_3v3>; 10936641af7eSAapo Vienamo pinctrl-1 = <&sdmmc3_1v8>; 10941ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>; 10951ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>; 10961ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>; 10971ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>; 109863af8bcdSAapo Vienamo nvidia,default-tap = <0x3>; 109963af8bcdSAapo Vienamo nvidia,default-trim = <0x3>; 1100742af7e7SThierry Reding status = "disabled"; 1101742af7e7SThierry Reding }; 1102742af7e7SThierry Reding 1103be70771dSThierry Reding sdhci@700b0600 { 1104742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1105742af7e7SThierry Reding reg = <0x0 0x700b0600 0x0 0x200>; 1106742af7e7SThierry Reding interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 1107742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC4>; 1108742af7e7SThierry Reding clock-names = "sdhci"; 1109742af7e7SThierry Reding resets = <&tegra_car 15>; 1110742af7e7SThierry Reding reset-names = "sdhci"; 11111ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x05>; 11121ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x05>; 111363af8bcdSAapo Vienamo nvidia,default-tap = <0x8>; 111463af8bcdSAapo Vienamo nvidia,default-trim = <0x0>; 1115918f9671SAapo Vienamo assigned-clocks = <&tegra_car TEGRA210_CLK_SDMMC4>, 1116918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 1117918f9671SAapo Vienamo assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 11185879600aSAapo Vienamo nvidia,dqs-trim = <40>; 1119d5d6b468SAapo Vienamo mmc-hs400-1_8v; 1120742af7e7SThierry Reding status = "disabled"; 1121742af7e7SThierry Reding }; 1122742af7e7SThierry Reding 1123be70771dSThierry Reding mipi: mipi@700e3000 { 1124742af7e7SThierry Reding compatible = "nvidia,tegra210-mipi"; 1125742af7e7SThierry Reding reg = <0x0 0x700e3000 0x0 0x100>; 1126742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MIPI_CAL>; 1127742af7e7SThierry Reding clock-names = "mipi-cal"; 112896d1f078SJon Hunter power-domains = <&pd_sor>; 1129742af7e7SThierry Reding #nvidia,mipi-calibrate-cells = <1>; 1130742af7e7SThierry Reding }; 1131742af7e7SThierry Reding 11320f133090SJon Hunter aconnect@702c0000 { 11330f133090SJon Hunter compatible = "nvidia,tegra210-aconnect"; 11340f133090SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 11350f133090SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 11360f133090SJon Hunter clock-names = "ape", "apb2ape"; 11370f133090SJon Hunter power-domains = <&pd_audio>; 11380f133090SJon Hunter #address-cells = <1>; 11390f133090SJon Hunter #size-cells = <1>; 11400f133090SJon Hunter ranges = <0x702c0000 0x0 0x702c0000 0x00040000>; 11410f133090SJon Hunter status = "disabled"; 1142bcdbde43SJon Hunter 114319e61213SJon Hunter adma: dma@702e2000 { 114419e61213SJon Hunter compatible = "nvidia,tegra210-adma"; 114519e61213SJon Hunter reg = <0x702e2000 0x2000>; 114619e61213SJon Hunter interrupt-parent = <&agic>; 114719e61213SJon Hunter interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, 114819e61213SJon Hunter <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, 114919e61213SJon Hunter <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, 115019e61213SJon Hunter <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, 115119e61213SJon Hunter <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, 115219e61213SJon Hunter <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 115319e61213SJon Hunter <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, 115419e61213SJon Hunter <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, 115519e61213SJon Hunter <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 115619e61213SJon Hunter <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 115719e61213SJon Hunter <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 115819e61213SJon Hunter <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 115919e61213SJon Hunter <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 116019e61213SJon Hunter <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 116119e61213SJon Hunter <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 116219e61213SJon Hunter <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 116319e61213SJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 116419e61213SJon Hunter <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 116519e61213SJon Hunter <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 116619e61213SJon Hunter <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 116719e61213SJon Hunter <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 116819e61213SJon Hunter <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 116919e61213SJon Hunter #dma-cells = <1>; 117019e61213SJon Hunter clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; 117119e61213SJon Hunter clock-names = "d_audio"; 117219e61213SJon Hunter status = "disabled"; 117319e61213SJon Hunter }; 117419e61213SJon Hunter 1175bcdbde43SJon Hunter agic: agic@702f9000 { 1176bcdbde43SJon Hunter compatible = "nvidia,tegra210-agic"; 1177bcdbde43SJon Hunter #interrupt-cells = <3>; 1178bcdbde43SJon Hunter interrupt-controller; 1179bcdbde43SJon Hunter reg = <0x702f9000 0x2000>, 1180bcdbde43SJon Hunter <0x702fa000 0x2000>; 1181bcdbde43SJon Hunter interrupts = <GIC_SPI 102 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 1182bcdbde43SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>; 1183bcdbde43SJon Hunter clock-names = "clk"; 1184bcdbde43SJon Hunter status = "disabled"; 1185bcdbde43SJon Hunter }; 11860f133090SJon Hunter }; 11870f133090SJon Hunter 1188be70771dSThierry Reding spi@70410000 { 1189742af7e7SThierry Reding compatible = "nvidia,tegra210-qspi"; 1190742af7e7SThierry Reding reg = <0x0 0x70410000 0x0 0x1000>; 1191742af7e7SThierry Reding interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 1192742af7e7SThierry Reding #address-cells = <1>; 1193742af7e7SThierry Reding #size-cells = <0>; 1194742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_QSPI>; 1195742af7e7SThierry Reding clock-names = "qspi"; 1196742af7e7SThierry Reding resets = <&tegra_car 211>; 1197742af7e7SThierry Reding reset-names = "qspi"; 1198742af7e7SThierry Reding dmas = <&apbdma 5>, <&apbdma 5>; 1199742af7e7SThierry Reding dma-names = "rx", "tx"; 1200742af7e7SThierry Reding status = "disabled"; 1201742af7e7SThierry Reding }; 1202742af7e7SThierry Reding 1203be70771dSThierry Reding usb@7d000000 { 1204742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1205742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>; 1206742af7e7SThierry Reding interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 1207742af7e7SThierry Reding phy_type = "utmi"; 1208742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>; 1209742af7e7SThierry Reding clock-names = "usb"; 1210742af7e7SThierry Reding resets = <&tegra_car 22>; 1211742af7e7SThierry Reding reset-names = "usb"; 1212742af7e7SThierry Reding nvidia,phy = <&phy1>; 1213742af7e7SThierry Reding status = "disabled"; 1214742af7e7SThierry Reding }; 1215742af7e7SThierry Reding 1216be70771dSThierry Reding phy1: usb-phy@7d000000 { 1217742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1218742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>, 1219742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1220742af7e7SThierry Reding phy_type = "utmi"; 1221742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>, 1222742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1223742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1224742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1225742af7e7SThierry Reding resets = <&tegra_car 22>, <&tegra_car 22>; 1226742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1227742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1228742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1229742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1230742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1231742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1232742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1233742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1234742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1235742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1236742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1237742af7e7SThierry Reding nvidia,has-utmi-pad-registers; 1238742af7e7SThierry Reding status = "disabled"; 1239742af7e7SThierry Reding }; 1240742af7e7SThierry Reding 1241be70771dSThierry Reding usb@7d004000 { 1242742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1243742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>; 1244742af7e7SThierry Reding interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1245742af7e7SThierry Reding phy_type = "utmi"; 1246742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>; 1247742af7e7SThierry Reding clock-names = "usb"; 1248742af7e7SThierry Reding resets = <&tegra_car 58>; 1249742af7e7SThierry Reding reset-names = "usb"; 1250742af7e7SThierry Reding nvidia,phy = <&phy2>; 1251742af7e7SThierry Reding status = "disabled"; 1252742af7e7SThierry Reding }; 1253742af7e7SThierry Reding 1254be70771dSThierry Reding phy2: usb-phy@7d004000 { 1255742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1256742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>, 1257742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1258742af7e7SThierry Reding phy_type = "utmi"; 1259742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>, 1260742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1261742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1262742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1263742af7e7SThierry Reding resets = <&tegra_car 58>, <&tegra_car 22>; 1264742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1265742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1266742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1267742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1268742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1269742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1270742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1271742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1272742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1273742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1274742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1275742af7e7SThierry Reding status = "disabled"; 1276742af7e7SThierry Reding }; 1277742af7e7SThierry Reding 1278742af7e7SThierry Reding cpus { 1279742af7e7SThierry Reding #address-cells = <1>; 1280742af7e7SThierry Reding #size-cells = <0>; 1281742af7e7SThierry Reding 1282742af7e7SThierry Reding cpu@0 { 1283742af7e7SThierry Reding device_type = "cpu"; 1284742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1285742af7e7SThierry Reding reg = <0>; 1286742af7e7SThierry Reding }; 1287742af7e7SThierry Reding 1288742af7e7SThierry Reding cpu@1 { 1289742af7e7SThierry Reding device_type = "cpu"; 1290742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1291742af7e7SThierry Reding reg = <1>; 1292742af7e7SThierry Reding }; 1293742af7e7SThierry Reding 1294742af7e7SThierry Reding cpu@2 { 1295742af7e7SThierry Reding device_type = "cpu"; 1296742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1297742af7e7SThierry Reding reg = <2>; 1298742af7e7SThierry Reding }; 1299742af7e7SThierry Reding 1300742af7e7SThierry Reding cpu@3 { 1301742af7e7SThierry Reding device_type = "cpu"; 1302742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1303742af7e7SThierry Reding reg = <3>; 1304742af7e7SThierry Reding }; 1305742af7e7SThierry Reding }; 1306742af7e7SThierry Reding 1307742af7e7SThierry Reding timer { 1308742af7e7SThierry Reding compatible = "arm,armv8-timer"; 1309742af7e7SThierry Reding interrupts = <GIC_PPI 13 1310742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1311742af7e7SThierry Reding <GIC_PPI 14 1312742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1313742af7e7SThierry Reding <GIC_PPI 11 1314742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1315742af7e7SThierry Reding <GIC_PPI 10 1316742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 1317742af7e7SThierry Reding interrupt-parent = <&gic>; 1318742af7e7SThierry Reding }; 1319e2bed1ebSWei Ni 1320e2bed1ebSWei Ni soctherm: thermal-sensor@700e2000 { 1321e2bed1ebSWei Ni compatible = "nvidia,tegra210-soctherm"; 1322cbd0f000SWei Ni reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */ 1323cbd0f000SWei Ni 0x0 0x60006000 0x0 0x400>; /* CAR reg_base */ 1324cbd0f000SWei Ni reg-names = "soctherm-reg", "car-reg"; 1325e2bed1ebSWei Ni interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 1326e2bed1ebSWei Ni clocks = <&tegra_car TEGRA210_CLK_TSENSOR>, 1327e2bed1ebSWei Ni <&tegra_car TEGRA210_CLK_SOC_THERM>; 1328e2bed1ebSWei Ni clock-names = "tsensor", "soctherm"; 1329e2bed1ebSWei Ni resets = <&tegra_car 78>; 1330e2bed1ebSWei Ni reset-names = "soctherm"; 1331e2bed1ebSWei Ni #thermal-sensor-cells = <1>; 1332cbd0f000SWei Ni 1333cbd0f000SWei Ni throttle-cfgs { 1334cbd0f000SWei Ni throttle_heavy: heavy { 1335cbd0f000SWei Ni nvidia,priority = <100>; 1336cbd0f000SWei Ni nvidia,cpu-throt-percent = <85>; 1337cbd0f000SWei Ni 1338cbd0f000SWei Ni #cooling-cells = <2>; 1339cbd0f000SWei Ni }; 1340cbd0f000SWei Ni }; 1341e2bed1ebSWei Ni }; 1342e2bed1ebSWei Ni 1343e2bed1ebSWei Ni thermal-zones { 1344e2bed1ebSWei Ni cpu { 1345e2bed1ebSWei Ni polling-delay-passive = <1000>; 1346e2bed1ebSWei Ni polling-delay = <0>; 1347e2bed1ebSWei Ni 1348e2bed1ebSWei Ni thermal-sensors = 1349e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; 13505e03f663SWei Ni 13515e03f663SWei Ni trips { 13525e03f663SWei Ni cpu-shutdown-trip { 13535e03f663SWei Ni temperature = <102500>; 13545e03f663SWei Ni hysteresis = <0>; 13555e03f663SWei Ni type = "critical"; 13565e03f663SWei Ni }; 1357cbd0f000SWei Ni 1358cbd0f000SWei Ni cpu_throttle_trip: throttle-trip { 1359cbd0f000SWei Ni temperature = <98500>; 1360cbd0f000SWei Ni hysteresis = <1000>; 1361cbd0f000SWei Ni type = "hot"; 1362cbd0f000SWei Ni }; 13635e03f663SWei Ni }; 13645e03f663SWei Ni 13655e03f663SWei Ni cooling-maps { 1366cbd0f000SWei Ni map0 { 1367cbd0f000SWei Ni trip = <&cpu_throttle_trip>; 1368cbd0f000SWei Ni cooling-device = <&throttle_heavy 1 1>; 1369cbd0f000SWei Ni }; 13705e03f663SWei Ni }; 1371e2bed1ebSWei Ni }; 1372e2bed1ebSWei Ni mem { 1373e2bed1ebSWei Ni polling-delay-passive = <0>; 1374e2bed1ebSWei Ni polling-delay = <0>; 1375e2bed1ebSWei Ni 1376e2bed1ebSWei Ni thermal-sensors = 1377e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; 13785e03f663SWei Ni 13795e03f663SWei Ni trips { 13805e03f663SWei Ni mem-shutdown-trip { 13815e03f663SWei Ni temperature = <103000>; 13825e03f663SWei Ni hysteresis = <0>; 13835e03f663SWei Ni type = "critical"; 13845e03f663SWei Ni }; 13855e03f663SWei Ni }; 13865e03f663SWei Ni 13875e03f663SWei Ni cooling-maps { 13885e03f663SWei Ni /* 13895e03f663SWei Ni * There are currently no cooling maps, 13905e03f663SWei Ni * because there are no cooling devices. 13915e03f663SWei Ni */ 13925e03f663SWei Ni }; 1393e2bed1ebSWei Ni }; 1394e2bed1ebSWei Ni gpu { 1395e2bed1ebSWei Ni polling-delay-passive = <1000>; 1396e2bed1ebSWei Ni polling-delay = <0>; 1397e2bed1ebSWei Ni 1398e2bed1ebSWei Ni thermal-sensors = 1399e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; 14005e03f663SWei Ni 14015e03f663SWei Ni trips { 14025e03f663SWei Ni gpu-shutdown-trip { 14035e03f663SWei Ni temperature = <103000>; 14045e03f663SWei Ni hysteresis = <0>; 14055e03f663SWei Ni type = "critical"; 14065e03f663SWei Ni }; 1407cbd0f000SWei Ni 1408cbd0f000SWei Ni gpu_throttle_trip: throttle-trip { 1409cbd0f000SWei Ni temperature = <100000>; 1410cbd0f000SWei Ni hysteresis = <1000>; 1411cbd0f000SWei Ni type = "hot"; 1412cbd0f000SWei Ni }; 14135e03f663SWei Ni }; 14145e03f663SWei Ni 14155e03f663SWei Ni cooling-maps { 1416cbd0f000SWei Ni map0 { 1417cbd0f000SWei Ni trip = <&gpu_throttle_trip>; 1418cbd0f000SWei Ni cooling-device = <&throttle_heavy 1 1>; 1419cbd0f000SWei Ni }; 14205e03f663SWei Ni }; 1421e2bed1ebSWei Ni }; 1422e2bed1ebSWei Ni pllx { 1423e2bed1ebSWei Ni polling-delay-passive = <0>; 1424e2bed1ebSWei Ni polling-delay = <0>; 1425e2bed1ebSWei Ni 1426e2bed1ebSWei Ni thermal-sensors = 1427e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; 14285e03f663SWei Ni 14295e03f663SWei Ni trips { 14305e03f663SWei Ni pllx-shutdown-trip { 14315e03f663SWei Ni temperature = <103000>; 14325e03f663SWei Ni hysteresis = <0>; 14335e03f663SWei Ni type = "critical"; 14345e03f663SWei Ni }; 14355e03f663SWei Ni }; 14365e03f663SWei Ni 14375e03f663SWei Ni cooling-maps { 14385e03f663SWei Ni /* 14395e03f663SWei Ni * There are currently no cooling maps, 14405e03f663SWei Ni * because there are no cooling devices. 14415e03f663SWei Ni */ 14425e03f663SWei Ni }; 1443e2bed1ebSWei Ni }; 1444e2bed1ebSWei Ni }; 1445742af7e7SThierry Reding}; 1446