1b2441318SGreg Kroah-Hartman// SPDX-License-Identifier: GPL-2.0 2742af7e7SThierry Reding#include <dt-bindings/clock/tegra210-car.h> 3742af7e7SThierry Reding#include <dt-bindings/gpio/tegra-gpio.h> 4742af7e7SThierry Reding#include <dt-bindings/memory/tegra210-mc.h> 5742af7e7SThierry Reding#include <dt-bindings/pinctrl/pinctrl-tegra.h> 6742af7e7SThierry Reding#include <dt-bindings/interrupt-controller/arm-gic.h> 7e2bed1ebSWei Ni#include <dt-bindings/thermal/tegra124-soctherm.h> 8742af7e7SThierry Reding 9742af7e7SThierry Reding/ { 10742af7e7SThierry Reding compatible = "nvidia,tegra210"; 11742af7e7SThierry Reding interrupt-parent = <&lic>; 12742af7e7SThierry Reding #address-cells = <2>; 13742af7e7SThierry Reding #size-cells = <2>; 14742af7e7SThierry Reding 15475d99fcSRob Herring pcie@1003000 { 16589a2d3fSThierry Reding compatible = "nvidia,tegra210-pcie"; 17589a2d3fSThierry Reding device_type = "pci"; 18589a2d3fSThierry Reding reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ 19589a2d3fSThierry Reding 0x0 0x01003800 0x0 0x00000800 /* AFI registers */ 20589a2d3fSThierry Reding 0x0 0x02000000 0x0 0x10000000>; /* configuration space */ 21589a2d3fSThierry Reding reg-names = "pads", "afi", "cs"; 22589a2d3fSThierry Reding interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */ 23589a2d3fSThierry Reding <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */ 24589a2d3fSThierry Reding interrupt-names = "intr", "msi"; 25589a2d3fSThierry Reding 26589a2d3fSThierry Reding #interrupt-cells = <1>; 27589a2d3fSThierry Reding interrupt-map-mask = <0 0 0 0>; 28589a2d3fSThierry Reding interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 29589a2d3fSThierry Reding 30589a2d3fSThierry Reding bus-range = <0x00 0xff>; 31589a2d3fSThierry Reding #address-cells = <3>; 32589a2d3fSThierry Reding #size-cells = <2>; 33589a2d3fSThierry Reding 34589a2d3fSThierry Reding ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */ 35589a2d3fSThierry Reding 0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */ 36589a2d3fSThierry Reding 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */ 37589a2d3fSThierry Reding 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */ 38589a2d3fSThierry Reding 0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */ 39589a2d3fSThierry Reding 40589a2d3fSThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCIE>, 41589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_AFI>, 42589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>, 43589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_CML0>; 44589a2d3fSThierry Reding clock-names = "pex", "afi", "pll_e", "cml"; 45589a2d3fSThierry Reding resets = <&tegra_car 70>, 46589a2d3fSThierry Reding <&tegra_car 72>, 47589a2d3fSThierry Reding <&tegra_car 74>; 48589a2d3fSThierry Reding reset-names = "pex", "afi", "pcie_x"; 49589a2d3fSThierry Reding status = "disabled"; 50589a2d3fSThierry Reding 51589a2d3fSThierry Reding pci@1,0 { 52589a2d3fSThierry Reding device_type = "pci"; 53589a2d3fSThierry Reding assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; 54589a2d3fSThierry Reding reg = <0x000800 0 0 0 0>; 55475d99fcSRob Herring bus-range = <0x00 0xff>; 56589a2d3fSThierry Reding status = "disabled"; 57589a2d3fSThierry Reding 58589a2d3fSThierry Reding #address-cells = <3>; 59589a2d3fSThierry Reding #size-cells = <2>; 60589a2d3fSThierry Reding ranges; 61589a2d3fSThierry Reding 62589a2d3fSThierry Reding nvidia,num-lanes = <4>; 63589a2d3fSThierry Reding }; 64589a2d3fSThierry Reding 65589a2d3fSThierry Reding pci@2,0 { 66589a2d3fSThierry Reding device_type = "pci"; 67589a2d3fSThierry Reding assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; 68589a2d3fSThierry Reding reg = <0x001000 0 0 0 0>; 69475d99fcSRob Herring bus-range = <0x00 0xff>; 70589a2d3fSThierry Reding status = "disabled"; 71589a2d3fSThierry Reding 72589a2d3fSThierry Reding #address-cells = <3>; 73589a2d3fSThierry Reding #size-cells = <2>; 74589a2d3fSThierry Reding ranges; 75589a2d3fSThierry Reding 76589a2d3fSThierry Reding nvidia,num-lanes = <1>; 77589a2d3fSThierry Reding }; 78589a2d3fSThierry Reding }; 79589a2d3fSThierry Reding 80be70771dSThierry Reding host1x@50000000 { 81742af7e7SThierry Reding compatible = "nvidia,tegra210-host1x", "simple-bus"; 82742af7e7SThierry Reding reg = <0x0 0x50000000 0x0 0x00034000>; 83742af7e7SThierry Reding interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */ 84742af7e7SThierry Reding <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */ 85742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HOST1X>; 86742af7e7SThierry Reding clock-names = "host1x"; 87742af7e7SThierry Reding resets = <&tegra_car 28>; 88742af7e7SThierry Reding reset-names = "host1x"; 89742af7e7SThierry Reding 90742af7e7SThierry Reding #address-cells = <2>; 91742af7e7SThierry Reding #size-cells = <2>; 92742af7e7SThierry Reding 93742af7e7SThierry Reding ranges = <0x0 0x54000000 0x0 0x54000000 0x0 0x01000000>; 94742af7e7SThierry Reding 95116503a6SMikko Perttunen iommus = <&mc TEGRA_SWGROUP_HC>; 96116503a6SMikko Perttunen 97be70771dSThierry Reding dpaux1: dpaux@54040000 { 98742af7e7SThierry Reding compatible = "nvidia,tegra210-dpaux"; 99742af7e7SThierry Reding reg = <0x0 0x54040000 0x0 0x00040000>; 100742af7e7SThierry Reding interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 101742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX1>, 102742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 103742af7e7SThierry Reding clock-names = "dpaux", "parent"; 104742af7e7SThierry Reding resets = <&tegra_car 207>; 105742af7e7SThierry Reding reset-names = "dpaux"; 10696d1f078SJon Hunter power-domains = <&pd_sor>; 107742af7e7SThierry Reding status = "disabled"; 10866b2d6e9SJon Hunter 10966b2d6e9SJon Hunter state_dpaux1_aux: pinmux-aux { 11066b2d6e9SJon Hunter groups = "dpaux-io"; 11166b2d6e9SJon Hunter function = "aux"; 11266b2d6e9SJon Hunter }; 11366b2d6e9SJon Hunter 11466b2d6e9SJon Hunter state_dpaux1_i2c: pinmux-i2c { 11566b2d6e9SJon Hunter groups = "dpaux-io"; 11666b2d6e9SJon Hunter function = "i2c"; 11766b2d6e9SJon Hunter }; 11866b2d6e9SJon Hunter 11966b2d6e9SJon Hunter state_dpaux1_off: pinmux-off { 12066b2d6e9SJon Hunter groups = "dpaux-io"; 12166b2d6e9SJon Hunter function = "off"; 12266b2d6e9SJon Hunter }; 12366b2d6e9SJon Hunter 12466b2d6e9SJon Hunter i2c-bus { 12566b2d6e9SJon Hunter #address-cells = <1>; 12666b2d6e9SJon Hunter #size-cells = <0>; 12766b2d6e9SJon Hunter }; 128742af7e7SThierry Reding }; 129742af7e7SThierry Reding 130be70771dSThierry Reding vi@54080000 { 131742af7e7SThierry Reding compatible = "nvidia,tegra210-vi"; 132742af7e7SThierry Reding reg = <0x0 0x54080000 0x0 0x00040000>; 133742af7e7SThierry Reding interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 134742af7e7SThierry Reding status = "disabled"; 135742af7e7SThierry Reding }; 136742af7e7SThierry Reding 137be70771dSThierry Reding tsec@54100000 { 138742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 139742af7e7SThierry Reding reg = <0x0 0x54100000 0x0 0x00040000>; 140742af7e7SThierry Reding }; 141742af7e7SThierry Reding 142be70771dSThierry Reding dc@54200000 { 143742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 144742af7e7SThierry Reding reg = <0x0 0x54200000 0x0 0x00040000>; 145742af7e7SThierry Reding interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 146742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP1>, 147742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 148742af7e7SThierry Reding clock-names = "dc", "parent"; 149742af7e7SThierry Reding resets = <&tegra_car 27>; 150742af7e7SThierry Reding reset-names = "dc"; 151742af7e7SThierry Reding 152742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DC>; 153742af7e7SThierry Reding 154742af7e7SThierry Reding nvidia,head = <0>; 155742af7e7SThierry Reding }; 156742af7e7SThierry Reding 157be70771dSThierry Reding dc@54240000 { 158742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 159742af7e7SThierry Reding reg = <0x0 0x54240000 0x0 0x00040000>; 160742af7e7SThierry Reding interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 161742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP2>, 162742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 163742af7e7SThierry Reding clock-names = "dc", "parent"; 164742af7e7SThierry Reding resets = <&tegra_car 26>; 165742af7e7SThierry Reding reset-names = "dc"; 166742af7e7SThierry Reding 167742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DCB>; 168742af7e7SThierry Reding 169742af7e7SThierry Reding nvidia,head = <1>; 170742af7e7SThierry Reding }; 171742af7e7SThierry Reding 172be70771dSThierry Reding dsi@54300000 { 173742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 174742af7e7SThierry Reding reg = <0x0 0x54300000 0x0 0x00040000>; 175742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIA>, 176742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIALP>, 177742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 178742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 179742af7e7SThierry Reding resets = <&tegra_car 48>; 180742af7e7SThierry Reding reset-names = "dsi"; 18196d1f078SJon Hunter power-domains = <&pd_sor>; 182742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x0c0>; /* DSIA & DSIB pads */ 183742af7e7SThierry Reding 184742af7e7SThierry Reding status = "disabled"; 185742af7e7SThierry Reding 186742af7e7SThierry Reding #address-cells = <1>; 187742af7e7SThierry Reding #size-cells = <0>; 188742af7e7SThierry Reding }; 189742af7e7SThierry Reding 190be70771dSThierry Reding vic@54340000 { 191742af7e7SThierry Reding compatible = "nvidia,tegra210-vic"; 192742af7e7SThierry Reding reg = <0x0 0x54340000 0x0 0x00040000>; 19324963d1bSMikko Perttunen interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 19424963d1bSMikko Perttunen clocks = <&tegra_car TEGRA210_CLK_VIC03>; 19524963d1bSMikko Perttunen clock-names = "vic"; 19624963d1bSMikko Perttunen resets = <&tegra_car 178>; 19724963d1bSMikko Perttunen reset-names = "vic"; 19824963d1bSMikko Perttunen 19924963d1bSMikko Perttunen iommus = <&mc TEGRA_SWGROUP_VIC>; 20024963d1bSMikko Perttunen power-domains = <&pd_vic>; 201742af7e7SThierry Reding }; 202742af7e7SThierry Reding 203be70771dSThierry Reding nvjpg@54380000 { 204742af7e7SThierry Reding compatible = "nvidia,tegra210-nvjpg"; 205742af7e7SThierry Reding reg = <0x0 0x54380000 0x0 0x00040000>; 206742af7e7SThierry Reding status = "disabled"; 207742af7e7SThierry Reding }; 208742af7e7SThierry Reding 209be70771dSThierry Reding dsi@54400000 { 210742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 211742af7e7SThierry Reding reg = <0x0 0x54400000 0x0 0x00040000>; 212742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIB>, 213742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIBLP>, 214742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 215742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 216742af7e7SThierry Reding resets = <&tegra_car 82>; 217742af7e7SThierry Reding reset-names = "dsi"; 21896d1f078SJon Hunter power-domains = <&pd_sor>; 219742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x300>; /* DSIC & DSID pads */ 220742af7e7SThierry Reding 221742af7e7SThierry Reding status = "disabled"; 222742af7e7SThierry Reding 223742af7e7SThierry Reding #address-cells = <1>; 224742af7e7SThierry Reding #size-cells = <0>; 225742af7e7SThierry Reding }; 226742af7e7SThierry Reding 227be70771dSThierry Reding nvdec@54480000 { 228742af7e7SThierry Reding compatible = "nvidia,tegra210-nvdec"; 229742af7e7SThierry Reding reg = <0x0 0x54480000 0x0 0x00040000>; 230742af7e7SThierry Reding status = "disabled"; 231742af7e7SThierry Reding }; 232742af7e7SThierry Reding 233be70771dSThierry Reding nvenc@544c0000 { 234742af7e7SThierry Reding compatible = "nvidia,tegra210-nvenc"; 235742af7e7SThierry Reding reg = <0x0 0x544c0000 0x0 0x00040000>; 236742af7e7SThierry Reding status = "disabled"; 237742af7e7SThierry Reding }; 238742af7e7SThierry Reding 239be70771dSThierry Reding tsec@54500000 { 240742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 241742af7e7SThierry Reding reg = <0x0 0x54500000 0x0 0x00040000>; 242742af7e7SThierry Reding status = "disabled"; 243742af7e7SThierry Reding }; 244742af7e7SThierry Reding 245be70771dSThierry Reding sor@54540000 { 246742af7e7SThierry Reding compatible = "nvidia,tegra210-sor"; 247742af7e7SThierry Reding reg = <0x0 0x54540000 0x0 0x00040000>; 248742af7e7SThierry Reding interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 249742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR0>, 250742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>, 251742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 252742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 253742af7e7SThierry Reding clock-names = "sor", "parent", "dp", "safe"; 254742af7e7SThierry Reding resets = <&tegra_car 182>; 255742af7e7SThierry Reding reset-names = "sor"; 25666b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_aux>; 25766b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_i2c>; 25866b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux_off>; 25966b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 26096d1f078SJon Hunter power-domains = <&pd_sor>; 261742af7e7SThierry Reding status = "disabled"; 262742af7e7SThierry Reding }; 263742af7e7SThierry Reding 264be70771dSThierry Reding sor@54580000 { 265742af7e7SThierry Reding compatible = "nvidia,tegra210-sor1"; 266742af7e7SThierry Reding reg = <0x0 0x54580000 0x0 0x00040000>; 267742af7e7SThierry Reding interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 268742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR1>, 269237d5cc7SThierry Reding <&tegra_car TEGRA210_CLK_SOR1_SRC>, 270742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D2_OUT0>, 271742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 272742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 273237d5cc7SThierry Reding clock-names = "sor", "source", "parent", "dp", "safe"; 274742af7e7SThierry Reding resets = <&tegra_car 183>; 275742af7e7SThierry Reding reset-names = "sor"; 27666b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_aux>; 27766b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_i2c>; 27866b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux1_off>; 27966b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 28096d1f078SJon Hunter power-domains = <&pd_sor>; 281742af7e7SThierry Reding status = "disabled"; 282742af7e7SThierry Reding }; 283742af7e7SThierry Reding 284be70771dSThierry Reding dpaux: dpaux@545c0000 { 285742af7e7SThierry Reding compatible = "nvidia,tegra124-dpaux"; 286742af7e7SThierry Reding reg = <0x0 0x545c0000 0x0 0x00040000>; 287742af7e7SThierry Reding interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 288742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX>, 289742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 290742af7e7SThierry Reding clock-names = "dpaux", "parent"; 291742af7e7SThierry Reding resets = <&tegra_car 181>; 292742af7e7SThierry Reding reset-names = "dpaux"; 29396d1f078SJon Hunter power-domains = <&pd_sor>; 294742af7e7SThierry Reding status = "disabled"; 29566b2d6e9SJon Hunter 29666b2d6e9SJon Hunter state_dpaux_aux: pinmux-aux { 29766b2d6e9SJon Hunter groups = "dpaux-io"; 29866b2d6e9SJon Hunter function = "aux"; 29966b2d6e9SJon Hunter }; 30066b2d6e9SJon Hunter 30166b2d6e9SJon Hunter state_dpaux_i2c: pinmux-i2c { 30266b2d6e9SJon Hunter groups = "dpaux-io"; 30366b2d6e9SJon Hunter function = "i2c"; 30466b2d6e9SJon Hunter }; 30566b2d6e9SJon Hunter 30666b2d6e9SJon Hunter state_dpaux_off: pinmux-off { 30766b2d6e9SJon Hunter groups = "dpaux-io"; 30866b2d6e9SJon Hunter function = "off"; 30966b2d6e9SJon Hunter }; 31066b2d6e9SJon Hunter 31166b2d6e9SJon Hunter i2c-bus { 31266b2d6e9SJon Hunter #address-cells = <1>; 31366b2d6e9SJon Hunter #size-cells = <0>; 31466b2d6e9SJon Hunter }; 315742af7e7SThierry Reding }; 316742af7e7SThierry Reding 317be70771dSThierry Reding isp@54600000 { 318742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 319742af7e7SThierry Reding reg = <0x0 0x54600000 0x0 0x00040000>; 320742af7e7SThierry Reding interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 321742af7e7SThierry Reding status = "disabled"; 322742af7e7SThierry Reding }; 323742af7e7SThierry Reding 324be70771dSThierry Reding isp@54680000 { 325742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 326742af7e7SThierry Reding reg = <0x0 0x54680000 0x0 0x00040000>; 327742af7e7SThierry Reding interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 328742af7e7SThierry Reding status = "disabled"; 329742af7e7SThierry Reding }; 330742af7e7SThierry Reding 331be70771dSThierry Reding i2c@546c0000 { 332742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c-vi"; 333742af7e7SThierry Reding reg = <0x0 0x546c0000 0x0 0x00040000>; 334742af7e7SThierry Reding interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 335742af7e7SThierry Reding status = "disabled"; 336742af7e7SThierry Reding }; 337742af7e7SThierry Reding }; 338742af7e7SThierry Reding 339be70771dSThierry Reding gic: interrupt-controller@50041000 { 340742af7e7SThierry Reding compatible = "arm,gic-400"; 341742af7e7SThierry Reding #interrupt-cells = <3>; 342742af7e7SThierry Reding interrupt-controller; 343742af7e7SThierry Reding reg = <0x0 0x50041000 0x0 0x1000>, 344742af7e7SThierry Reding <0x0 0x50042000 0x0 0x2000>, 345742af7e7SThierry Reding <0x0 0x50044000 0x0 0x2000>, 346742af7e7SThierry Reding <0x0 0x50046000 0x0 0x2000>; 347742af7e7SThierry Reding interrupts = <GIC_PPI 9 348742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 349742af7e7SThierry Reding interrupt-parent = <&gic>; 350742af7e7SThierry Reding }; 351742af7e7SThierry Reding 352be70771dSThierry Reding gpu@57000000 { 353742af7e7SThierry Reding compatible = "nvidia,gm20b"; 354742af7e7SThierry Reding reg = <0x0 0x57000000 0x0 0x01000000>, 355742af7e7SThierry Reding <0x0 0x58000000 0x0 0x01000000>; 356742af7e7SThierry Reding interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 357742af7e7SThierry Reding <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 358742af7e7SThierry Reding interrupt-names = "stall", "nonstall"; 359742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_GPU>, 3604a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_P_OUT5>, 3614a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_G_REF>; 3624a0778e9SAlexandre Courbot clock-names = "gpu", "pwr", "ref"; 363742af7e7SThierry Reding resets = <&tegra_car 184>; 364742af7e7SThierry Reding reset-names = "gpu"; 36530f949bcSAlexandre Courbot 36630f949bcSAlexandre Courbot iommus = <&mc TEGRA_SWGROUP_GPU>; 36730f949bcSAlexandre Courbot 368742af7e7SThierry Reding status = "disabled"; 369742af7e7SThierry Reding }; 370742af7e7SThierry Reding 371be70771dSThierry Reding lic: interrupt-controller@60004000 { 372742af7e7SThierry Reding compatible = "nvidia,tegra210-ictlr"; 373742af7e7SThierry Reding reg = <0x0 0x60004000 0x0 0x40>, /* primary controller */ 374742af7e7SThierry Reding <0x0 0x60004100 0x0 0x40>, /* secondary controller */ 375742af7e7SThierry Reding <0x0 0x60004200 0x0 0x40>, /* tertiary controller */ 376742af7e7SThierry Reding <0x0 0x60004300 0x0 0x40>, /* quaternary controller */ 377742af7e7SThierry Reding <0x0 0x60004400 0x0 0x40>, /* quinary controller */ 378742af7e7SThierry Reding <0x0 0x60004500 0x0 0x40>; /* senary controller */ 379742af7e7SThierry Reding interrupt-controller; 380742af7e7SThierry Reding #interrupt-cells = <3>; 381742af7e7SThierry Reding interrupt-parent = <&gic>; 382742af7e7SThierry Reding }; 383742af7e7SThierry Reding 384be70771dSThierry Reding timer@60005000 { 385742af7e7SThierry Reding compatible = "nvidia,tegra210-timer", "nvidia,tegra20-timer"; 386742af7e7SThierry Reding reg = <0x0 0x60005000 0x0 0x400>; 387742af7e7SThierry Reding interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 388742af7e7SThierry Reding <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 389742af7e7SThierry Reding <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 390742af7e7SThierry Reding <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 391742af7e7SThierry Reding <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 392742af7e7SThierry Reding <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 393742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_TIMER>; 394742af7e7SThierry Reding clock-names = "timer"; 395742af7e7SThierry Reding }; 396742af7e7SThierry Reding 397be70771dSThierry Reding tegra_car: clock@60006000 { 398742af7e7SThierry Reding compatible = "nvidia,tegra210-car"; 399742af7e7SThierry Reding reg = <0x0 0x60006000 0x0 0x1000>; 400742af7e7SThierry Reding #clock-cells = <1>; 401742af7e7SThierry Reding #reset-cells = <1>; 402742af7e7SThierry Reding }; 403742af7e7SThierry Reding 404be70771dSThierry Reding flow-controller@60007000 { 405742af7e7SThierry Reding compatible = "nvidia,tegra210-flowctrl"; 406742af7e7SThierry Reding reg = <0x0 0x60007000 0x0 0x1000>; 407742af7e7SThierry Reding }; 408742af7e7SThierry Reding 409be70771dSThierry Reding gpio: gpio@6000d000 { 41001665512SStephen Warren compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio"; 411742af7e7SThierry Reding reg = <0x0 0x6000d000 0x0 0x1000>; 412742af7e7SThierry Reding interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 413742af7e7SThierry Reding <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 414742af7e7SThierry Reding <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 415742af7e7SThierry Reding <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 416742af7e7SThierry Reding <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 417742af7e7SThierry Reding <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 418742af7e7SThierry Reding <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 419742af7e7SThierry Reding <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 420742af7e7SThierry Reding #gpio-cells = <2>; 421742af7e7SThierry Reding gpio-controller; 422742af7e7SThierry Reding #interrupt-cells = <2>; 423742af7e7SThierry Reding interrupt-controller; 424742af7e7SThierry Reding }; 425742af7e7SThierry Reding 426be70771dSThierry Reding apbdma: dma@60020000 { 427742af7e7SThierry Reding compatible = "nvidia,tegra210-apbdma", "nvidia,tegra148-apbdma"; 428742af7e7SThierry Reding reg = <0x0 0x60020000 0x0 0x1400>; 429742af7e7SThierry Reding interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 430742af7e7SThierry Reding <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 431742af7e7SThierry Reding <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 432742af7e7SThierry Reding <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 433742af7e7SThierry Reding <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 434742af7e7SThierry Reding <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 435742af7e7SThierry Reding <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 436742af7e7SThierry Reding <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 437742af7e7SThierry Reding <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 438742af7e7SThierry Reding <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 439742af7e7SThierry Reding <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 440742af7e7SThierry Reding <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 441742af7e7SThierry Reding <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 442742af7e7SThierry Reding <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 443742af7e7SThierry Reding <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 444742af7e7SThierry Reding <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, 445742af7e7SThierry Reding <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 446742af7e7SThierry Reding <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 447742af7e7SThierry Reding <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 448742af7e7SThierry Reding <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 449742af7e7SThierry Reding <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 450742af7e7SThierry Reding <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, 451742af7e7SThierry Reding <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, 452742af7e7SThierry Reding <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 453742af7e7SThierry Reding <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 454742af7e7SThierry Reding <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 455742af7e7SThierry Reding <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 456742af7e7SThierry Reding <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>, 457742af7e7SThierry Reding <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, 458742af7e7SThierry Reding <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, 459742af7e7SThierry Reding <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 460742af7e7SThierry Reding <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 461742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_APBDMA>; 462742af7e7SThierry Reding clock-names = "dma"; 463742af7e7SThierry Reding resets = <&tegra_car 34>; 464742af7e7SThierry Reding reset-names = "dma"; 465742af7e7SThierry Reding #dma-cells = <1>; 466742af7e7SThierry Reding }; 467742af7e7SThierry Reding 468be70771dSThierry Reding apbmisc@70000800 { 469742af7e7SThierry Reding compatible = "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc"; 470742af7e7SThierry Reding reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */ 471742af7e7SThierry Reding <0x0 0x7000e864 0x0 0x04>; /* Strapping options */ 472742af7e7SThierry Reding }; 473742af7e7SThierry Reding 474be70771dSThierry Reding pinmux: pinmux@700008d4 { 475742af7e7SThierry Reding compatible = "nvidia,tegra210-pinmux"; 476742af7e7SThierry Reding reg = <0x0 0x700008d4 0x0 0x29c>, /* Pad control registers */ 477742af7e7SThierry Reding <0x0 0x70003000 0x0 0x294>; /* Mux registers */ 478742af7e7SThierry Reding }; 479742af7e7SThierry Reding 480742af7e7SThierry Reding /* 481742af7e7SThierry Reding * There are two serial driver i.e. 8250 based simple serial 482742af7e7SThierry Reding * driver and APB DMA based serial driver for higher baudrate 483ef769e32SAdam Buchbinder * and performance. To enable the 8250 based driver, the compatible 484742af7e7SThierry Reding * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable 48568cd8b2eSThierry Reding * the APB DMA based serial driver, the compatible is 486742af7e7SThierry Reding * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart". 487742af7e7SThierry Reding */ 488be70771dSThierry Reding uarta: serial@70006000 { 489742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 490742af7e7SThierry Reding reg = <0x0 0x70006000 0x0 0x40>; 491742af7e7SThierry Reding reg-shift = <2>; 492742af7e7SThierry Reding interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 493742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTA>; 494742af7e7SThierry Reding clock-names = "serial"; 495742af7e7SThierry Reding resets = <&tegra_car 6>; 496742af7e7SThierry Reding reset-names = "serial"; 497742af7e7SThierry Reding dmas = <&apbdma 8>, <&apbdma 8>; 498742af7e7SThierry Reding dma-names = "rx", "tx"; 499742af7e7SThierry Reding status = "disabled"; 500742af7e7SThierry Reding }; 501742af7e7SThierry Reding 502be70771dSThierry Reding uartb: serial@70006040 { 503742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 504742af7e7SThierry Reding reg = <0x0 0x70006040 0x0 0x40>; 505742af7e7SThierry Reding reg-shift = <2>; 506742af7e7SThierry Reding interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 507742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTB>; 508742af7e7SThierry Reding clock-names = "serial"; 509742af7e7SThierry Reding resets = <&tegra_car 7>; 510742af7e7SThierry Reding reset-names = "serial"; 511742af7e7SThierry Reding dmas = <&apbdma 9>, <&apbdma 9>; 512742af7e7SThierry Reding dma-names = "rx", "tx"; 513742af7e7SThierry Reding status = "disabled"; 514742af7e7SThierry Reding }; 515742af7e7SThierry Reding 516be70771dSThierry Reding uartc: serial@70006200 { 517742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 518742af7e7SThierry Reding reg = <0x0 0x70006200 0x0 0x40>; 519742af7e7SThierry Reding reg-shift = <2>; 520742af7e7SThierry Reding interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 521742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTC>; 522742af7e7SThierry Reding clock-names = "serial"; 523742af7e7SThierry Reding resets = <&tegra_car 55>; 524742af7e7SThierry Reding reset-names = "serial"; 525742af7e7SThierry Reding dmas = <&apbdma 10>, <&apbdma 10>; 526742af7e7SThierry Reding dma-names = "rx", "tx"; 527742af7e7SThierry Reding status = "disabled"; 528742af7e7SThierry Reding }; 529742af7e7SThierry Reding 530be70771dSThierry Reding uartd: serial@70006300 { 531742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 532742af7e7SThierry Reding reg = <0x0 0x70006300 0x0 0x40>; 533742af7e7SThierry Reding reg-shift = <2>; 534742af7e7SThierry Reding interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 535742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTD>; 536742af7e7SThierry Reding clock-names = "serial"; 537742af7e7SThierry Reding resets = <&tegra_car 65>; 538742af7e7SThierry Reding reset-names = "serial"; 539742af7e7SThierry Reding dmas = <&apbdma 19>, <&apbdma 19>; 540742af7e7SThierry Reding dma-names = "rx", "tx"; 541742af7e7SThierry Reding status = "disabled"; 542742af7e7SThierry Reding }; 543742af7e7SThierry Reding 544be70771dSThierry Reding pwm: pwm@7000a000 { 545742af7e7SThierry Reding compatible = "nvidia,tegra210-pwm", "nvidia,tegra20-pwm"; 546742af7e7SThierry Reding reg = <0x0 0x7000a000 0x0 0x100>; 547742af7e7SThierry Reding #pwm-cells = <2>; 548742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PWM>; 549742af7e7SThierry Reding clock-names = "pwm"; 550742af7e7SThierry Reding resets = <&tegra_car 17>; 551742af7e7SThierry Reding reset-names = "pwm"; 552742af7e7SThierry Reding status = "disabled"; 553742af7e7SThierry Reding }; 554742af7e7SThierry Reding 555be70771dSThierry Reding i2c@7000c000 { 556742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 557742af7e7SThierry Reding reg = <0x0 0x7000c000 0x0 0x100>; 558742af7e7SThierry Reding interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 559742af7e7SThierry Reding #address-cells = <1>; 560742af7e7SThierry Reding #size-cells = <0>; 561742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C1>; 562742af7e7SThierry Reding clock-names = "div-clk"; 563742af7e7SThierry Reding resets = <&tegra_car 12>; 564742af7e7SThierry Reding reset-names = "i2c"; 565742af7e7SThierry Reding dmas = <&apbdma 21>, <&apbdma 21>; 566742af7e7SThierry Reding dma-names = "rx", "tx"; 567742af7e7SThierry Reding status = "disabled"; 568742af7e7SThierry Reding }; 569742af7e7SThierry Reding 570be70771dSThierry Reding i2c@7000c400 { 571742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 572742af7e7SThierry Reding reg = <0x0 0x7000c400 0x0 0x100>; 573742af7e7SThierry Reding interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 574742af7e7SThierry Reding #address-cells = <1>; 575742af7e7SThierry Reding #size-cells = <0>; 576742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C2>; 577742af7e7SThierry Reding clock-names = "div-clk"; 578742af7e7SThierry Reding resets = <&tegra_car 54>; 579742af7e7SThierry Reding reset-names = "i2c"; 580742af7e7SThierry Reding dmas = <&apbdma 22>, <&apbdma 22>; 581742af7e7SThierry Reding dma-names = "rx", "tx"; 582742af7e7SThierry Reding status = "disabled"; 583742af7e7SThierry Reding }; 584742af7e7SThierry Reding 585be70771dSThierry Reding i2c@7000c500 { 586742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 587742af7e7SThierry Reding reg = <0x0 0x7000c500 0x0 0x100>; 588742af7e7SThierry Reding interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 589742af7e7SThierry Reding #address-cells = <1>; 590742af7e7SThierry Reding #size-cells = <0>; 591742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C3>; 592742af7e7SThierry Reding clock-names = "div-clk"; 593742af7e7SThierry Reding resets = <&tegra_car 67>; 594742af7e7SThierry Reding reset-names = "i2c"; 595742af7e7SThierry Reding dmas = <&apbdma 23>, <&apbdma 23>; 596742af7e7SThierry Reding dma-names = "rx", "tx"; 597742af7e7SThierry Reding status = "disabled"; 598742af7e7SThierry Reding }; 599742af7e7SThierry Reding 600be70771dSThierry Reding i2c@7000c700 { 601742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 602742af7e7SThierry Reding reg = <0x0 0x7000c700 0x0 0x100>; 603742af7e7SThierry Reding interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 604742af7e7SThierry Reding #address-cells = <1>; 605742af7e7SThierry Reding #size-cells = <0>; 606742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C4>; 607742af7e7SThierry Reding clock-names = "div-clk"; 608742af7e7SThierry Reding resets = <&tegra_car 103>; 609742af7e7SThierry Reding reset-names = "i2c"; 610742af7e7SThierry Reding dmas = <&apbdma 26>, <&apbdma 26>; 611742af7e7SThierry Reding dma-names = "rx", "tx"; 61266b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_i2c>; 61366b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_off>; 61466b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 615742af7e7SThierry Reding status = "disabled"; 616742af7e7SThierry Reding }; 617742af7e7SThierry Reding 618be70771dSThierry Reding i2c@7000d000 { 619742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 620742af7e7SThierry Reding reg = <0x0 0x7000d000 0x0 0x100>; 621742af7e7SThierry Reding interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 622742af7e7SThierry Reding #address-cells = <1>; 623742af7e7SThierry Reding #size-cells = <0>; 624742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C5>; 625742af7e7SThierry Reding clock-names = "div-clk"; 626742af7e7SThierry Reding resets = <&tegra_car 47>; 627742af7e7SThierry Reding reset-names = "i2c"; 628742af7e7SThierry Reding dmas = <&apbdma 24>, <&apbdma 24>; 629742af7e7SThierry Reding dma-names = "rx", "tx"; 630742af7e7SThierry Reding status = "disabled"; 631742af7e7SThierry Reding }; 632742af7e7SThierry Reding 633be70771dSThierry Reding i2c@7000d100 { 634742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 635742af7e7SThierry Reding reg = <0x0 0x7000d100 0x0 0x100>; 636742af7e7SThierry Reding interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 637742af7e7SThierry Reding #address-cells = <1>; 638742af7e7SThierry Reding #size-cells = <0>; 639742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C6>; 640742af7e7SThierry Reding clock-names = "div-clk"; 641742af7e7SThierry Reding resets = <&tegra_car 166>; 642742af7e7SThierry Reding reset-names = "i2c"; 643742af7e7SThierry Reding dmas = <&apbdma 30>, <&apbdma 30>; 644742af7e7SThierry Reding dma-names = "rx", "tx"; 64566b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_i2c>; 64666b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_off>; 64766b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 648742af7e7SThierry Reding status = "disabled"; 649742af7e7SThierry Reding }; 650742af7e7SThierry Reding 651be70771dSThierry Reding spi@7000d400 { 652742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 653742af7e7SThierry Reding reg = <0x0 0x7000d400 0x0 0x200>; 654742af7e7SThierry Reding interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 655742af7e7SThierry Reding #address-cells = <1>; 656742af7e7SThierry Reding #size-cells = <0>; 657742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC1>; 658742af7e7SThierry Reding clock-names = "spi"; 659742af7e7SThierry Reding resets = <&tegra_car 41>; 660742af7e7SThierry Reding reset-names = "spi"; 661742af7e7SThierry Reding dmas = <&apbdma 15>, <&apbdma 15>; 662742af7e7SThierry Reding dma-names = "rx", "tx"; 663742af7e7SThierry Reding status = "disabled"; 664742af7e7SThierry Reding }; 665742af7e7SThierry Reding 666be70771dSThierry Reding spi@7000d600 { 667742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 668742af7e7SThierry Reding reg = <0x0 0x7000d600 0x0 0x200>; 669742af7e7SThierry Reding interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 670742af7e7SThierry Reding #address-cells = <1>; 671742af7e7SThierry Reding #size-cells = <0>; 672742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC2>; 673742af7e7SThierry Reding clock-names = "spi"; 674742af7e7SThierry Reding resets = <&tegra_car 44>; 675742af7e7SThierry Reding reset-names = "spi"; 676742af7e7SThierry Reding dmas = <&apbdma 16>, <&apbdma 16>; 677742af7e7SThierry Reding dma-names = "rx", "tx"; 678742af7e7SThierry Reding status = "disabled"; 679742af7e7SThierry Reding }; 680742af7e7SThierry Reding 681be70771dSThierry Reding spi@7000d800 { 682742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 683742af7e7SThierry Reding reg = <0x0 0x7000d800 0x0 0x200>; 684742af7e7SThierry Reding interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 685742af7e7SThierry Reding #address-cells = <1>; 686742af7e7SThierry Reding #size-cells = <0>; 687742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC3>; 688742af7e7SThierry Reding clock-names = "spi"; 689742af7e7SThierry Reding resets = <&tegra_car 46>; 690742af7e7SThierry Reding reset-names = "spi"; 691742af7e7SThierry Reding dmas = <&apbdma 17>, <&apbdma 17>; 692742af7e7SThierry Reding dma-names = "rx", "tx"; 693742af7e7SThierry Reding status = "disabled"; 694742af7e7SThierry Reding }; 695742af7e7SThierry Reding 696be70771dSThierry Reding spi@7000da00 { 697742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 698742af7e7SThierry Reding reg = <0x0 0x7000da00 0x0 0x200>; 699742af7e7SThierry Reding interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 700742af7e7SThierry Reding #address-cells = <1>; 701742af7e7SThierry Reding #size-cells = <0>; 702742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC4>; 703742af7e7SThierry Reding clock-names = "spi"; 704742af7e7SThierry Reding resets = <&tegra_car 68>; 705742af7e7SThierry Reding reset-names = "spi"; 706742af7e7SThierry Reding dmas = <&apbdma 18>, <&apbdma 18>; 707742af7e7SThierry Reding dma-names = "rx", "tx"; 708742af7e7SThierry Reding status = "disabled"; 709742af7e7SThierry Reding }; 710742af7e7SThierry Reding 711be70771dSThierry Reding rtc@7000e000 { 712742af7e7SThierry Reding compatible = "nvidia,tegra210-rtc", "nvidia,tegra20-rtc"; 713742af7e7SThierry Reding reg = <0x0 0x7000e000 0x0 0x100>; 714742af7e7SThierry Reding interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 715742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_RTC>; 716742af7e7SThierry Reding clock-names = "rtc"; 717742af7e7SThierry Reding }; 718742af7e7SThierry Reding 719be70771dSThierry Reding pmc: pmc@7000e400 { 720742af7e7SThierry Reding compatible = "nvidia,tegra210-pmc"; 721742af7e7SThierry Reding reg = <0x0 0x7000e400 0x0 0x400>; 722742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; 723742af7e7SThierry Reding clock-names = "pclk", "clk32k_in"; 724c2b82445SJon Hunter 725c2b82445SJon Hunter powergates { 726c2b82445SJon Hunter pd_audio: aud { 727c2b82445SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 728c2b82445SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 729c2b82445SJon Hunter resets = <&tegra_car 198>; 730c2b82445SJon Hunter #power-domain-cells = <0>; 731c2b82445SJon Hunter }; 732241f02baSJon Hunter 73396d1f078SJon Hunter pd_sor: sor { 73496d1f078SJon Hunter clocks = <&tegra_car TEGRA210_CLK_SOR0>, 73596d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 73696d1f078SJon Hunter <&tegra_car TEGRA210_CLK_CSI>, 73796d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 73896d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 73996d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 74096d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 74196d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 74296d1f078SJon Hunter resets = <&tegra_car TEGRA210_CLK_SOR0>, 74396d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 74496d1f078SJon Hunter <&tegra_car TEGRA210_CLK_CSI>, 74596d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 74696d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 74796d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 74896d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 74996d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 75096d1f078SJon Hunter #power-domain-cells = <0>; 75196d1f078SJon Hunter }; 75296d1f078SJon Hunter 753241f02baSJon Hunter pd_xusbss: xusba { 754241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>; 755241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_SS>; 756241f02baSJon Hunter #power-domain-cells = <0>; 757241f02baSJon Hunter }; 758241f02baSJon Hunter 759241f02baSJon Hunter pd_xusbdev: xusbb { 760241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>; 761241f02baSJon Hunter resets = <&tegra_car 95>; 762241f02baSJon Hunter #power-domain-cells = <0>; 763241f02baSJon Hunter }; 764241f02baSJon Hunter 765241f02baSJon Hunter pd_xusbhost: xusbc { 766241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 767241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 768241f02baSJon Hunter #power-domain-cells = <0>; 769241f02baSJon Hunter }; 77024963d1bSMikko Perttunen 77124963d1bSMikko Perttunen pd_vic: vic { 77224963d1bSMikko Perttunen clocks = <&tegra_car TEGRA210_CLK_VIC03>; 77324963d1bSMikko Perttunen clock-names = "vic"; 77424963d1bSMikko Perttunen resets = <&tegra_car 178>; 77524963d1bSMikko Perttunen reset-names = "vic"; 77624963d1bSMikko Perttunen #power-domain-cells = <0>; 77724963d1bSMikko Perttunen }; 778c2b82445SJon Hunter }; 779742af7e7SThierry Reding }; 780742af7e7SThierry Reding 781be70771dSThierry Reding fuse@7000f800 { 782742af7e7SThierry Reding compatible = "nvidia,tegra210-efuse"; 783742af7e7SThierry Reding reg = <0x0 0x7000f800 0x0 0x400>; 784742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_FUSE>; 785742af7e7SThierry Reding clock-names = "fuse"; 786742af7e7SThierry Reding resets = <&tegra_car 39>; 787742af7e7SThierry Reding reset-names = "fuse"; 788742af7e7SThierry Reding }; 789742af7e7SThierry Reding 790be70771dSThierry Reding mc: memory-controller@70019000 { 791742af7e7SThierry Reding compatible = "nvidia,tegra210-mc"; 792742af7e7SThierry Reding reg = <0x0 0x70019000 0x0 0x1000>; 793742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MC>; 794742af7e7SThierry Reding clock-names = "mc"; 795742af7e7SThierry Reding 796742af7e7SThierry Reding interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 797742af7e7SThierry Reding 798742af7e7SThierry Reding #iommu-cells = <1>; 799742af7e7SThierry Reding }; 800742af7e7SThierry Reding 801be70771dSThierry Reding hda@70030000 { 802742af7e7SThierry Reding compatible = "nvidia,tegra210-hda", "nvidia,tegra30-hda"; 803742af7e7SThierry Reding reg = <0x0 0x70030000 0x0 0x10000>; 804742af7e7SThierry Reding interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 805742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HDA>, 806742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2HDMI>, 807742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2CODEC_2X>; 808742af7e7SThierry Reding clock-names = "hda", "hda2hdmi", "hda2codec_2x"; 809742af7e7SThierry Reding resets = <&tegra_car 125>, /* hda */ 810742af7e7SThierry Reding <&tegra_car 128>, /* hda2hdmi */ 811742af7e7SThierry Reding <&tegra_car 111>; /* hda2codec_2x */ 812742af7e7SThierry Reding reset-names = "hda", "hda2hdmi", "hda2codec_2x"; 813742af7e7SThierry Reding status = "disabled"; 814742af7e7SThierry Reding }; 815742af7e7SThierry Reding 816e7a99ac2SThierry Reding usb@70090000 { 817e7a99ac2SThierry Reding compatible = "nvidia,tegra210-xusb"; 818e7a99ac2SThierry Reding reg = <0x0 0x70090000 0x0 0x8000>, 819e7a99ac2SThierry Reding <0x0 0x70098000 0x0 0x1000>, 820e7a99ac2SThierry Reding <0x0 0x70099000 0x0 0x1000>; 821e7a99ac2SThierry Reding reg-names = "hcd", "fpci", "ipfs"; 822e7a99ac2SThierry Reding 823e7a99ac2SThierry Reding interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 8249168e1dbSJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 825e7a99ac2SThierry Reding 826e7a99ac2SThierry Reding clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>, 827e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>, 828e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>, 829e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS>, 830e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>, 831e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>, 832e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, 833e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, 834e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U_480M>, 835e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_CLK_M>, 836e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>; 837e7a99ac2SThierry Reding clock-names = "xusb_host", "xusb_host_src", 838e7a99ac2SThierry Reding "xusb_falcon_src", "xusb_ss", 839e7a99ac2SThierry Reding "xusb_ss_div2", "xusb_ss_src", 840e7a99ac2SThierry Reding "xusb_hs_src", "xusb_fs_src", 841e7a99ac2SThierry Reding "pll_u_480m", "clk_m", "pll_e"; 842e7a99ac2SThierry Reding resets = <&tegra_car 89>, <&tegra_car 156>, 843e7a99ac2SThierry Reding <&tegra_car 143>; 844e7a99ac2SThierry Reding reset-names = "xusb_host", "xusb_ss", "xusb_src"; 845e7a99ac2SThierry Reding 846e7a99ac2SThierry Reding nvidia,xusb-padctl = <&padctl>; 847e7a99ac2SThierry Reding 848e7a99ac2SThierry Reding status = "disabled"; 849e7a99ac2SThierry Reding }; 850e7a99ac2SThierry Reding 8514e07ac90SThierry Reding padctl: padctl@7009f000 { 8524e07ac90SThierry Reding compatible = "nvidia,tegra210-xusb-padctl"; 8534e07ac90SThierry Reding reg = <0x0 0x7009f000 0x0 0x1000>; 8544e07ac90SThierry Reding resets = <&tegra_car 142>; 8554e07ac90SThierry Reding reset-names = "padctl"; 8564e07ac90SThierry Reding 8574e07ac90SThierry Reding status = "disabled"; 8584e07ac90SThierry Reding 8594e07ac90SThierry Reding pads { 8604e07ac90SThierry Reding usb2 { 8614e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>; 8624e07ac90SThierry Reding clock-names = "trk"; 8634e07ac90SThierry Reding status = "disabled"; 8644e07ac90SThierry Reding 8654e07ac90SThierry Reding lanes { 8664e07ac90SThierry Reding usb2-0 { 8674e07ac90SThierry Reding status = "disabled"; 8684e07ac90SThierry Reding #phy-cells = <0>; 8694e07ac90SThierry Reding }; 8704e07ac90SThierry Reding 8714e07ac90SThierry Reding usb2-1 { 8724e07ac90SThierry Reding status = "disabled"; 8734e07ac90SThierry Reding #phy-cells = <0>; 8744e07ac90SThierry Reding }; 8754e07ac90SThierry Reding 8764e07ac90SThierry Reding usb2-2 { 8774e07ac90SThierry Reding status = "disabled"; 8784e07ac90SThierry Reding #phy-cells = <0>; 8794e07ac90SThierry Reding }; 8804e07ac90SThierry Reding 8814e07ac90SThierry Reding usb2-3 { 8824e07ac90SThierry Reding status = "disabled"; 8834e07ac90SThierry Reding #phy-cells = <0>; 8844e07ac90SThierry Reding }; 8854e07ac90SThierry Reding }; 8864e07ac90SThierry Reding }; 8874e07ac90SThierry Reding 8884e07ac90SThierry Reding hsic { 8894e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>; 8904e07ac90SThierry Reding clock-names = "trk"; 8914e07ac90SThierry Reding status = "disabled"; 8924e07ac90SThierry Reding 8934e07ac90SThierry Reding lanes { 8944e07ac90SThierry Reding hsic-0 { 8954e07ac90SThierry Reding status = "disabled"; 8964e07ac90SThierry Reding #phy-cells = <0>; 8974e07ac90SThierry Reding }; 8984e07ac90SThierry Reding 8994e07ac90SThierry Reding hsic-1 { 9004e07ac90SThierry Reding status = "disabled"; 9014e07ac90SThierry Reding #phy-cells = <0>; 9024e07ac90SThierry Reding }; 9034e07ac90SThierry Reding }; 9044e07ac90SThierry Reding }; 9054e07ac90SThierry Reding 9064e07ac90SThierry Reding pcie { 9074e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 9084e07ac90SThierry Reding clock-names = "pll"; 9094e07ac90SThierry Reding resets = <&tegra_car 205>; 9104e07ac90SThierry Reding reset-names = "phy"; 9114e07ac90SThierry Reding status = "disabled"; 9124e07ac90SThierry Reding 9134e07ac90SThierry Reding lanes { 9144e07ac90SThierry Reding pcie-0 { 9154e07ac90SThierry Reding status = "disabled"; 9164e07ac90SThierry Reding #phy-cells = <0>; 9174e07ac90SThierry Reding }; 9184e07ac90SThierry Reding 9194e07ac90SThierry Reding pcie-1 { 9204e07ac90SThierry Reding status = "disabled"; 9214e07ac90SThierry Reding #phy-cells = <0>; 9224e07ac90SThierry Reding }; 9234e07ac90SThierry Reding 9244e07ac90SThierry Reding pcie-2 { 9254e07ac90SThierry Reding status = "disabled"; 9264e07ac90SThierry Reding #phy-cells = <0>; 9274e07ac90SThierry Reding }; 9284e07ac90SThierry Reding 9294e07ac90SThierry Reding pcie-3 { 9304e07ac90SThierry Reding status = "disabled"; 9314e07ac90SThierry Reding #phy-cells = <0>; 9324e07ac90SThierry Reding }; 9334e07ac90SThierry Reding 9344e07ac90SThierry Reding pcie-4 { 9354e07ac90SThierry Reding status = "disabled"; 9364e07ac90SThierry Reding #phy-cells = <0>; 9374e07ac90SThierry Reding }; 9384e07ac90SThierry Reding 9394e07ac90SThierry Reding pcie-5 { 9404e07ac90SThierry Reding status = "disabled"; 9414e07ac90SThierry Reding #phy-cells = <0>; 9424e07ac90SThierry Reding }; 9434e07ac90SThierry Reding 9444e07ac90SThierry Reding pcie-6 { 9454e07ac90SThierry Reding status = "disabled"; 9464e07ac90SThierry Reding #phy-cells = <0>; 9474e07ac90SThierry Reding }; 9484e07ac90SThierry Reding }; 9494e07ac90SThierry Reding }; 9504e07ac90SThierry Reding 9514e07ac90SThierry Reding sata { 9524e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 9534e07ac90SThierry Reding clock-names = "pll"; 9544e07ac90SThierry Reding resets = <&tegra_car 204>; 9554e07ac90SThierry Reding reset-names = "phy"; 9564e07ac90SThierry Reding status = "disabled"; 9574e07ac90SThierry Reding 9584e07ac90SThierry Reding lanes { 9594e07ac90SThierry Reding sata-0 { 9604e07ac90SThierry Reding status = "disabled"; 9614e07ac90SThierry Reding #phy-cells = <0>; 9624e07ac90SThierry Reding }; 9634e07ac90SThierry Reding }; 9644e07ac90SThierry Reding }; 9654e07ac90SThierry Reding }; 9664e07ac90SThierry Reding 9674e07ac90SThierry Reding ports { 9684e07ac90SThierry Reding usb2-0 { 9694e07ac90SThierry Reding status = "disabled"; 9704e07ac90SThierry Reding }; 9714e07ac90SThierry Reding 9724e07ac90SThierry Reding usb2-1 { 9734e07ac90SThierry Reding status = "disabled"; 9744e07ac90SThierry Reding }; 9754e07ac90SThierry Reding 9764e07ac90SThierry Reding usb2-2 { 9774e07ac90SThierry Reding status = "disabled"; 9784e07ac90SThierry Reding }; 9794e07ac90SThierry Reding 9804e07ac90SThierry Reding usb2-3 { 9814e07ac90SThierry Reding status = "disabled"; 9824e07ac90SThierry Reding }; 9834e07ac90SThierry Reding 9844e07ac90SThierry Reding hsic-0 { 9854e07ac90SThierry Reding status = "disabled"; 9864e07ac90SThierry Reding }; 9874e07ac90SThierry Reding 9884e07ac90SThierry Reding usb3-0 { 9894e07ac90SThierry Reding status = "disabled"; 9904e07ac90SThierry Reding }; 9914e07ac90SThierry Reding 9924e07ac90SThierry Reding usb3-1 { 9934e07ac90SThierry Reding status = "disabled"; 9944e07ac90SThierry Reding }; 9954e07ac90SThierry Reding 9964e07ac90SThierry Reding usb3-2 { 9974e07ac90SThierry Reding status = "disabled"; 9984e07ac90SThierry Reding }; 9994e07ac90SThierry Reding 10004e07ac90SThierry Reding usb3-3 { 10014e07ac90SThierry Reding status = "disabled"; 10024e07ac90SThierry Reding }; 10034e07ac90SThierry Reding }; 10044e07ac90SThierry Reding }; 10054e07ac90SThierry Reding 1006be70771dSThierry Reding sdhci@700b0000 { 1007742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1008742af7e7SThierry Reding reg = <0x0 0x700b0000 0x0 0x200>; 1009742af7e7SThierry Reding interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1010742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC1>; 1011742af7e7SThierry Reding clock-names = "sdhci"; 1012742af7e7SThierry Reding resets = <&tegra_car 14>; 1013742af7e7SThierry Reding reset-names = "sdhci"; 1014742af7e7SThierry Reding status = "disabled"; 1015742af7e7SThierry Reding }; 1016742af7e7SThierry Reding 1017be70771dSThierry Reding sdhci@700b0200 { 1018742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1019742af7e7SThierry Reding reg = <0x0 0x700b0200 0x0 0x200>; 1020742af7e7SThierry Reding interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1021742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC2>; 1022742af7e7SThierry Reding clock-names = "sdhci"; 1023742af7e7SThierry Reding resets = <&tegra_car 9>; 1024742af7e7SThierry Reding reset-names = "sdhci"; 1025742af7e7SThierry Reding status = "disabled"; 1026742af7e7SThierry Reding }; 1027742af7e7SThierry Reding 1028be70771dSThierry Reding sdhci@700b0400 { 1029742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1030742af7e7SThierry Reding reg = <0x0 0x700b0400 0x0 0x200>; 1031742af7e7SThierry Reding interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 1032742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC3>; 1033742af7e7SThierry Reding clock-names = "sdhci"; 1034742af7e7SThierry Reding resets = <&tegra_car 69>; 1035742af7e7SThierry Reding reset-names = "sdhci"; 1036742af7e7SThierry Reding status = "disabled"; 1037742af7e7SThierry Reding }; 1038742af7e7SThierry Reding 1039be70771dSThierry Reding sdhci@700b0600 { 1040742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1041742af7e7SThierry Reding reg = <0x0 0x700b0600 0x0 0x200>; 1042742af7e7SThierry Reding interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 1043742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC4>; 1044742af7e7SThierry Reding clock-names = "sdhci"; 1045742af7e7SThierry Reding resets = <&tegra_car 15>; 1046742af7e7SThierry Reding reset-names = "sdhci"; 1047742af7e7SThierry Reding status = "disabled"; 1048742af7e7SThierry Reding }; 1049742af7e7SThierry Reding 1050be70771dSThierry Reding mipi: mipi@700e3000 { 1051742af7e7SThierry Reding compatible = "nvidia,tegra210-mipi"; 1052742af7e7SThierry Reding reg = <0x0 0x700e3000 0x0 0x100>; 1053742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MIPI_CAL>; 1054742af7e7SThierry Reding clock-names = "mipi-cal"; 105596d1f078SJon Hunter power-domains = <&pd_sor>; 1056742af7e7SThierry Reding #nvidia,mipi-calibrate-cells = <1>; 1057742af7e7SThierry Reding }; 1058742af7e7SThierry Reding 10590f133090SJon Hunter aconnect@702c0000 { 10600f133090SJon Hunter compatible = "nvidia,tegra210-aconnect"; 10610f133090SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 10620f133090SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 10630f133090SJon Hunter clock-names = "ape", "apb2ape"; 10640f133090SJon Hunter power-domains = <&pd_audio>; 10650f133090SJon Hunter #address-cells = <1>; 10660f133090SJon Hunter #size-cells = <1>; 10670f133090SJon Hunter ranges = <0x702c0000 0x0 0x702c0000 0x00040000>; 10680f133090SJon Hunter status = "disabled"; 1069bcdbde43SJon Hunter 107019e61213SJon Hunter adma: dma@702e2000 { 107119e61213SJon Hunter compatible = "nvidia,tegra210-adma"; 107219e61213SJon Hunter reg = <0x702e2000 0x2000>; 107319e61213SJon Hunter interrupt-parent = <&agic>; 107419e61213SJon Hunter interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, 107519e61213SJon Hunter <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, 107619e61213SJon Hunter <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, 107719e61213SJon Hunter <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, 107819e61213SJon Hunter <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, 107919e61213SJon Hunter <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 108019e61213SJon Hunter <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, 108119e61213SJon Hunter <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, 108219e61213SJon Hunter <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 108319e61213SJon Hunter <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 108419e61213SJon Hunter <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 108519e61213SJon Hunter <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 108619e61213SJon Hunter <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 108719e61213SJon Hunter <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 108819e61213SJon Hunter <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 108919e61213SJon Hunter <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 109019e61213SJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 109119e61213SJon Hunter <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 109219e61213SJon Hunter <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 109319e61213SJon Hunter <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 109419e61213SJon Hunter <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 109519e61213SJon Hunter <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 109619e61213SJon Hunter #dma-cells = <1>; 109719e61213SJon Hunter clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; 109819e61213SJon Hunter clock-names = "d_audio"; 109919e61213SJon Hunter status = "disabled"; 110019e61213SJon Hunter }; 110119e61213SJon Hunter 1102bcdbde43SJon Hunter agic: agic@702f9000 { 1103bcdbde43SJon Hunter compatible = "nvidia,tegra210-agic"; 1104bcdbde43SJon Hunter #interrupt-cells = <3>; 1105bcdbde43SJon Hunter interrupt-controller; 1106bcdbde43SJon Hunter reg = <0x702f9000 0x2000>, 1107bcdbde43SJon Hunter <0x702fa000 0x2000>; 1108bcdbde43SJon Hunter interrupts = <GIC_SPI 102 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 1109bcdbde43SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>; 1110bcdbde43SJon Hunter clock-names = "clk"; 1111bcdbde43SJon Hunter status = "disabled"; 1112bcdbde43SJon Hunter }; 11130f133090SJon Hunter }; 11140f133090SJon Hunter 1115be70771dSThierry Reding spi@70410000 { 1116742af7e7SThierry Reding compatible = "nvidia,tegra210-qspi"; 1117742af7e7SThierry Reding reg = <0x0 0x70410000 0x0 0x1000>; 1118742af7e7SThierry Reding interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 1119742af7e7SThierry Reding #address-cells = <1>; 1120742af7e7SThierry Reding #size-cells = <0>; 1121742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_QSPI>; 1122742af7e7SThierry Reding clock-names = "qspi"; 1123742af7e7SThierry Reding resets = <&tegra_car 211>; 1124742af7e7SThierry Reding reset-names = "qspi"; 1125742af7e7SThierry Reding dmas = <&apbdma 5>, <&apbdma 5>; 1126742af7e7SThierry Reding dma-names = "rx", "tx"; 1127742af7e7SThierry Reding status = "disabled"; 1128742af7e7SThierry Reding }; 1129742af7e7SThierry Reding 1130be70771dSThierry Reding usb@7d000000 { 1131742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1132742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>; 1133742af7e7SThierry Reding interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 1134742af7e7SThierry Reding phy_type = "utmi"; 1135742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>; 1136742af7e7SThierry Reding clock-names = "usb"; 1137742af7e7SThierry Reding resets = <&tegra_car 22>; 1138742af7e7SThierry Reding reset-names = "usb"; 1139742af7e7SThierry Reding nvidia,phy = <&phy1>; 1140742af7e7SThierry Reding status = "disabled"; 1141742af7e7SThierry Reding }; 1142742af7e7SThierry Reding 1143be70771dSThierry Reding phy1: usb-phy@7d000000 { 1144742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1145742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>, 1146742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1147742af7e7SThierry Reding phy_type = "utmi"; 1148742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>, 1149742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1150742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1151742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1152742af7e7SThierry Reding resets = <&tegra_car 22>, <&tegra_car 22>; 1153742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1154742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1155742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1156742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1157742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1158742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1159742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1160742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1161742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1162742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1163742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1164742af7e7SThierry Reding nvidia,has-utmi-pad-registers; 1165742af7e7SThierry Reding status = "disabled"; 1166742af7e7SThierry Reding }; 1167742af7e7SThierry Reding 1168be70771dSThierry Reding usb@7d004000 { 1169742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1170742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>; 1171742af7e7SThierry Reding interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1172742af7e7SThierry Reding phy_type = "utmi"; 1173742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>; 1174742af7e7SThierry Reding clock-names = "usb"; 1175742af7e7SThierry Reding resets = <&tegra_car 58>; 1176742af7e7SThierry Reding reset-names = "usb"; 1177742af7e7SThierry Reding nvidia,phy = <&phy2>; 1178742af7e7SThierry Reding status = "disabled"; 1179742af7e7SThierry Reding }; 1180742af7e7SThierry Reding 1181be70771dSThierry Reding phy2: usb-phy@7d004000 { 1182742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1183742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>, 1184742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1185742af7e7SThierry Reding phy_type = "utmi"; 1186742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>, 1187742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1188742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1189742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1190742af7e7SThierry Reding resets = <&tegra_car 58>, <&tegra_car 22>; 1191742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1192742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1193742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1194742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1195742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1196742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1197742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1198742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1199742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1200742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1201742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1202742af7e7SThierry Reding status = "disabled"; 1203742af7e7SThierry Reding }; 1204742af7e7SThierry Reding 1205742af7e7SThierry Reding cpus { 1206742af7e7SThierry Reding #address-cells = <1>; 1207742af7e7SThierry Reding #size-cells = <0>; 1208742af7e7SThierry Reding 1209742af7e7SThierry Reding cpu@0 { 1210742af7e7SThierry Reding device_type = "cpu"; 1211742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1212742af7e7SThierry Reding reg = <0>; 1213742af7e7SThierry Reding }; 1214742af7e7SThierry Reding 1215742af7e7SThierry Reding cpu@1 { 1216742af7e7SThierry Reding device_type = "cpu"; 1217742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1218742af7e7SThierry Reding reg = <1>; 1219742af7e7SThierry Reding }; 1220742af7e7SThierry Reding 1221742af7e7SThierry Reding cpu@2 { 1222742af7e7SThierry Reding device_type = "cpu"; 1223742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1224742af7e7SThierry Reding reg = <2>; 1225742af7e7SThierry Reding }; 1226742af7e7SThierry Reding 1227742af7e7SThierry Reding cpu@3 { 1228742af7e7SThierry Reding device_type = "cpu"; 1229742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1230742af7e7SThierry Reding reg = <3>; 1231742af7e7SThierry Reding }; 1232742af7e7SThierry Reding }; 1233742af7e7SThierry Reding 1234742af7e7SThierry Reding timer { 1235742af7e7SThierry Reding compatible = "arm,armv8-timer"; 1236742af7e7SThierry Reding interrupts = <GIC_PPI 13 1237742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1238742af7e7SThierry Reding <GIC_PPI 14 1239742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1240742af7e7SThierry Reding <GIC_PPI 11 1241742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1242742af7e7SThierry Reding <GIC_PPI 10 1243742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 1244742af7e7SThierry Reding interrupt-parent = <&gic>; 1245742af7e7SThierry Reding }; 1246e2bed1ebSWei Ni 1247e2bed1ebSWei Ni soctherm: thermal-sensor@700e2000 { 1248e2bed1ebSWei Ni compatible = "nvidia,tegra210-soctherm"; 1249cbd0f000SWei Ni reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */ 1250cbd0f000SWei Ni 0x0 0x60006000 0x0 0x400>; /* CAR reg_base */ 1251cbd0f000SWei Ni reg-names = "soctherm-reg", "car-reg"; 1252e2bed1ebSWei Ni interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 1253e2bed1ebSWei Ni clocks = <&tegra_car TEGRA210_CLK_TSENSOR>, 1254e2bed1ebSWei Ni <&tegra_car TEGRA210_CLK_SOC_THERM>; 1255e2bed1ebSWei Ni clock-names = "tsensor", "soctherm"; 1256e2bed1ebSWei Ni resets = <&tegra_car 78>; 1257e2bed1ebSWei Ni reset-names = "soctherm"; 1258e2bed1ebSWei Ni #thermal-sensor-cells = <1>; 1259cbd0f000SWei Ni 1260cbd0f000SWei Ni throttle-cfgs { 1261cbd0f000SWei Ni throttle_heavy: heavy { 1262cbd0f000SWei Ni nvidia,priority = <100>; 1263cbd0f000SWei Ni nvidia,cpu-throt-percent = <85>; 1264cbd0f000SWei Ni 1265cbd0f000SWei Ni #cooling-cells = <2>; 1266cbd0f000SWei Ni }; 1267cbd0f000SWei Ni }; 1268e2bed1ebSWei Ni }; 1269e2bed1ebSWei Ni 1270e2bed1ebSWei Ni thermal-zones { 1271e2bed1ebSWei Ni cpu { 1272e2bed1ebSWei Ni polling-delay-passive = <1000>; 1273e2bed1ebSWei Ni polling-delay = <0>; 1274e2bed1ebSWei Ni 1275e2bed1ebSWei Ni thermal-sensors = 1276e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; 12775e03f663SWei Ni 12785e03f663SWei Ni trips { 12795e03f663SWei Ni cpu-shutdown-trip { 12805e03f663SWei Ni temperature = <102500>; 12815e03f663SWei Ni hysteresis = <0>; 12825e03f663SWei Ni type = "critical"; 12835e03f663SWei Ni }; 1284cbd0f000SWei Ni 1285cbd0f000SWei Ni cpu_throttle_trip: throttle-trip { 1286cbd0f000SWei Ni temperature = <98500>; 1287cbd0f000SWei Ni hysteresis = <1000>; 1288cbd0f000SWei Ni type = "hot"; 1289cbd0f000SWei Ni }; 12905e03f663SWei Ni }; 12915e03f663SWei Ni 12925e03f663SWei Ni cooling-maps { 1293cbd0f000SWei Ni map0 { 1294cbd0f000SWei Ni trip = <&cpu_throttle_trip>; 1295cbd0f000SWei Ni cooling-device = <&throttle_heavy 1 1>; 1296cbd0f000SWei Ni }; 12975e03f663SWei Ni }; 1298e2bed1ebSWei Ni }; 1299e2bed1ebSWei Ni mem { 1300e2bed1ebSWei Ni polling-delay-passive = <0>; 1301e2bed1ebSWei Ni polling-delay = <0>; 1302e2bed1ebSWei Ni 1303e2bed1ebSWei Ni thermal-sensors = 1304e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; 13055e03f663SWei Ni 13065e03f663SWei Ni trips { 13075e03f663SWei Ni mem-shutdown-trip { 13085e03f663SWei Ni temperature = <103000>; 13095e03f663SWei Ni hysteresis = <0>; 13105e03f663SWei Ni type = "critical"; 13115e03f663SWei Ni }; 13125e03f663SWei Ni }; 13135e03f663SWei Ni 13145e03f663SWei Ni cooling-maps { 13155e03f663SWei Ni /* 13165e03f663SWei Ni * There are currently no cooling maps, 13175e03f663SWei Ni * because there are no cooling devices. 13185e03f663SWei Ni */ 13195e03f663SWei Ni }; 1320e2bed1ebSWei Ni }; 1321e2bed1ebSWei Ni gpu { 1322e2bed1ebSWei Ni polling-delay-passive = <1000>; 1323e2bed1ebSWei Ni polling-delay = <0>; 1324e2bed1ebSWei Ni 1325e2bed1ebSWei Ni thermal-sensors = 1326e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; 13275e03f663SWei Ni 13285e03f663SWei Ni trips { 13295e03f663SWei Ni gpu-shutdown-trip { 13305e03f663SWei Ni temperature = <103000>; 13315e03f663SWei Ni hysteresis = <0>; 13325e03f663SWei Ni type = "critical"; 13335e03f663SWei Ni }; 1334cbd0f000SWei Ni 1335cbd0f000SWei Ni gpu_throttle_trip: throttle-trip { 1336cbd0f000SWei Ni temperature = <100000>; 1337cbd0f000SWei Ni hysteresis = <1000>; 1338cbd0f000SWei Ni type = "hot"; 1339cbd0f000SWei Ni }; 13405e03f663SWei Ni }; 13415e03f663SWei Ni 13425e03f663SWei Ni cooling-maps { 1343cbd0f000SWei Ni map0 { 1344cbd0f000SWei Ni trip = <&gpu_throttle_trip>; 1345cbd0f000SWei Ni cooling-device = <&throttle_heavy 1 1>; 1346cbd0f000SWei Ni }; 13475e03f663SWei Ni }; 1348e2bed1ebSWei Ni }; 1349e2bed1ebSWei Ni pllx { 1350e2bed1ebSWei Ni polling-delay-passive = <0>; 1351e2bed1ebSWei Ni polling-delay = <0>; 1352e2bed1ebSWei Ni 1353e2bed1ebSWei Ni thermal-sensors = 1354e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; 13555e03f663SWei Ni 13565e03f663SWei Ni trips { 13575e03f663SWei Ni pllx-shutdown-trip { 13585e03f663SWei Ni temperature = <103000>; 13595e03f663SWei Ni hysteresis = <0>; 13605e03f663SWei Ni type = "critical"; 13615e03f663SWei Ni }; 13625e03f663SWei Ni }; 13635e03f663SWei Ni 13645e03f663SWei Ni cooling-maps { 13655e03f663SWei Ni /* 13665e03f663SWei Ni * There are currently no cooling maps, 13675e03f663SWei Ni * because there are no cooling devices. 13685e03f663SWei Ni */ 13695e03f663SWei Ni }; 1370e2bed1ebSWei Ni }; 1371e2bed1ebSWei Ni }; 1372742af7e7SThierry Reding}; 1373