1b2441318SGreg Kroah-Hartman// SPDX-License-Identifier: GPL-2.0 2742af7e7SThierry Reding#include <dt-bindings/clock/tegra210-car.h> 3742af7e7SThierry Reding#include <dt-bindings/gpio/tegra-gpio.h> 4742af7e7SThierry Reding#include <dt-bindings/memory/tegra210-mc.h> 5742af7e7SThierry Reding#include <dt-bindings/pinctrl/pinctrl-tegra.h> 66641af7eSAapo Vienamo#include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 72ceed593SJoseph Lo#include <dt-bindings/reset/tegra210-car.h> 8742af7e7SThierry Reding#include <dt-bindings/interrupt-controller/arm-gic.h> 9e2bed1ebSWei Ni#include <dt-bindings/thermal/tegra124-soctherm.h> 10359ae651SSowjanya Komatineni#include <dt-bindings/soc/tegra-pmc.h> 11742af7e7SThierry Reding 12742af7e7SThierry Reding/ { 13742af7e7SThierry Reding compatible = "nvidia,tegra210"; 14742af7e7SThierry Reding interrupt-parent = <&lic>; 15742af7e7SThierry Reding #address-cells = <2>; 16742af7e7SThierry Reding #size-cells = <2>; 17742af7e7SThierry Reding 18475d99fcSRob Herring pcie@1003000 { 19589a2d3fSThierry Reding compatible = "nvidia,tegra210-pcie"; 20589a2d3fSThierry Reding device_type = "pci"; 21644c569dSThierry Reding reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */ 22644c569dSThierry Reding <0x0 0x01003800 0x0 0x00000800>, /* AFI registers */ 23644c569dSThierry Reding <0x0 0x02000000 0x0 0x10000000>; /* configuration space */ 24589a2d3fSThierry Reding reg-names = "pads", "afi", "cs"; 25589a2d3fSThierry Reding interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */ 26589a2d3fSThierry Reding <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */ 27589a2d3fSThierry Reding interrupt-names = "intr", "msi"; 28589a2d3fSThierry Reding 29589a2d3fSThierry Reding #interrupt-cells = <1>; 30589a2d3fSThierry Reding interrupt-map-mask = <0 0 0 0>; 31589a2d3fSThierry Reding interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 32589a2d3fSThierry Reding 33589a2d3fSThierry Reding bus-range = <0x00 0xff>; 34589a2d3fSThierry Reding #address-cells = <3>; 35589a2d3fSThierry Reding #size-cells = <2>; 36589a2d3fSThierry Reding 37644c569dSThierry Reding ranges = <0x02000000 0 0x01000000 0x0 0x01000000 0 0x00001000>, /* port 0 configuration space */ 38644c569dSThierry Reding <0x02000000 0 0x01001000 0x0 0x01001000 0 0x00001000>, /* port 1 configuration space */ 39644c569dSThierry Reding <0x01000000 0 0x0 0x0 0x12000000 0 0x00010000>, /* downstream I/O (64 KiB) */ 40644c569dSThierry Reding <0x02000000 0 0x13000000 0x0 0x13000000 0 0x0d000000>, /* non-prefetchable memory (208 MiB) */ 41644c569dSThierry Reding <0x42000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */ 42589a2d3fSThierry Reding 43589a2d3fSThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCIE>, 44589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_AFI>, 45589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>, 46589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_CML0>; 47589a2d3fSThierry Reding clock-names = "pex", "afi", "pll_e", "cml"; 48589a2d3fSThierry Reding resets = <&tegra_car 70>, 49589a2d3fSThierry Reding <&tegra_car 72>, 50589a2d3fSThierry Reding <&tegra_car 74>; 51589a2d3fSThierry Reding reset-names = "pex", "afi", "pcie_x"; 52871be845SManikanta Maddireddy 53871be845SManikanta Maddireddy pinctrl-names = "default", "idle"; 54871be845SManikanta Maddireddy pinctrl-0 = <&pex_dpd_disable>; 55871be845SManikanta Maddireddy pinctrl-1 = <&pex_dpd_enable>; 56871be845SManikanta Maddireddy 57589a2d3fSThierry Reding status = "disabled"; 58589a2d3fSThierry Reding 59589a2d3fSThierry Reding pci@1,0 { 60589a2d3fSThierry Reding device_type = "pci"; 61589a2d3fSThierry Reding assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; 62589a2d3fSThierry Reding reg = <0x000800 0 0 0 0>; 63475d99fcSRob Herring bus-range = <0x00 0xff>; 64589a2d3fSThierry Reding status = "disabled"; 65589a2d3fSThierry Reding 66589a2d3fSThierry Reding #address-cells = <3>; 67589a2d3fSThierry Reding #size-cells = <2>; 68589a2d3fSThierry Reding ranges; 69589a2d3fSThierry Reding 70589a2d3fSThierry Reding nvidia,num-lanes = <4>; 71589a2d3fSThierry Reding }; 72589a2d3fSThierry Reding 73589a2d3fSThierry Reding pci@2,0 { 74589a2d3fSThierry Reding device_type = "pci"; 75589a2d3fSThierry Reding assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; 76589a2d3fSThierry Reding reg = <0x001000 0 0 0 0>; 77475d99fcSRob Herring bus-range = <0x00 0xff>; 78589a2d3fSThierry Reding status = "disabled"; 79589a2d3fSThierry Reding 80589a2d3fSThierry Reding #address-cells = <3>; 81589a2d3fSThierry Reding #size-cells = <2>; 82589a2d3fSThierry Reding ranges; 83589a2d3fSThierry Reding 84589a2d3fSThierry Reding nvidia,num-lanes = <1>; 85589a2d3fSThierry Reding }; 86589a2d3fSThierry Reding }; 87589a2d3fSThierry Reding 88be70771dSThierry Reding host1x@50000000 { 89ef126bc4SThierry Reding compatible = "nvidia,tegra210-host1x"; 90742af7e7SThierry Reding reg = <0x0 0x50000000 0x0 0x00034000>; 91742af7e7SThierry Reding interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */ 92742af7e7SThierry Reding <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */ 93052d3f65SThierry Reding interrupt-names = "syncpt", "host1x"; 94742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HOST1X>; 95742af7e7SThierry Reding clock-names = "host1x"; 96742af7e7SThierry Reding resets = <&tegra_car 28>; 97742af7e7SThierry Reding reset-names = "host1x"; 98742af7e7SThierry Reding 99742af7e7SThierry Reding #address-cells = <2>; 100742af7e7SThierry Reding #size-cells = <2>; 101742af7e7SThierry Reding 102742af7e7SThierry Reding ranges = <0x0 0x54000000 0x0 0x54000000 0x0 0x01000000>; 103742af7e7SThierry Reding 104116503a6SMikko Perttunen iommus = <&mc TEGRA_SWGROUP_HC>; 105116503a6SMikko Perttunen 106be70771dSThierry Reding dpaux1: dpaux@54040000 { 107742af7e7SThierry Reding compatible = "nvidia,tegra210-dpaux"; 108742af7e7SThierry Reding reg = <0x0 0x54040000 0x0 0x00040000>; 109742af7e7SThierry Reding interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 110742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX1>, 111742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 112742af7e7SThierry Reding clock-names = "dpaux", "parent"; 113742af7e7SThierry Reding resets = <&tegra_car 207>; 114742af7e7SThierry Reding reset-names = "dpaux"; 11596d1f078SJon Hunter power-domains = <&pd_sor>; 116742af7e7SThierry Reding status = "disabled"; 11766b2d6e9SJon Hunter 11866b2d6e9SJon Hunter state_dpaux1_aux: pinmux-aux { 11966b2d6e9SJon Hunter groups = "dpaux-io"; 12066b2d6e9SJon Hunter function = "aux"; 12166b2d6e9SJon Hunter }; 12266b2d6e9SJon Hunter 12366b2d6e9SJon Hunter state_dpaux1_i2c: pinmux-i2c { 12466b2d6e9SJon Hunter groups = "dpaux-io"; 12566b2d6e9SJon Hunter function = "i2c"; 12666b2d6e9SJon Hunter }; 12766b2d6e9SJon Hunter 12866b2d6e9SJon Hunter state_dpaux1_off: pinmux-off { 12966b2d6e9SJon Hunter groups = "dpaux-io"; 13066b2d6e9SJon Hunter function = "off"; 13166b2d6e9SJon Hunter }; 13266b2d6e9SJon Hunter 13366b2d6e9SJon Hunter i2c-bus { 13466b2d6e9SJon Hunter #address-cells = <1>; 13566b2d6e9SJon Hunter #size-cells = <0>; 13666b2d6e9SJon Hunter }; 137742af7e7SThierry Reding }; 138742af7e7SThierry Reding 139be70771dSThierry Reding vi@54080000 { 140742af7e7SThierry Reding compatible = "nvidia,tegra210-vi"; 141c4153885SSowjanya Komatineni reg = <0x0 0x54080000 0x0 0x700>; 142742af7e7SThierry Reding interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 143742af7e7SThierry Reding status = "disabled"; 144c4153885SSowjanya Komatineni assigned-clocks = <&tegra_car TEGRA210_CLK_VI>; 145c4153885SSowjanya Komatineni assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 146c4153885SSowjanya Komatineni 147c4153885SSowjanya Komatineni clocks = <&tegra_car TEGRA210_CLK_VI>; 148c4153885SSowjanya Komatineni power-domains = <&pd_venc>; 149c4153885SSowjanya Komatineni 150c4153885SSowjanya Komatineni #address-cells = <1>; 151c4153885SSowjanya Komatineni #size-cells = <1>; 152c4153885SSowjanya Komatineni 153c4153885SSowjanya Komatineni ranges = <0x0 0x0 0x54080000 0x2000>; 154c4153885SSowjanya Komatineni 155c4153885SSowjanya Komatineni csi@838 { 156c4153885SSowjanya Komatineni compatible = "nvidia,tegra210-csi"; 157c4153885SSowjanya Komatineni reg = <0x838 0x1300>; 158c4153885SSowjanya Komatineni status = "disabled"; 159c4153885SSowjanya Komatineni assigned-clocks = <&tegra_car TEGRA210_CLK_CILAB>, 160c4153885SSowjanya Komatineni <&tegra_car TEGRA210_CLK_CILCD>, 161c4153885SSowjanya Komatineni <&tegra_car TEGRA210_CLK_CILE>, 162c4153885SSowjanya Komatineni <&tegra_car TEGRA210_CLK_CSI_TPG>; 163c4153885SSowjanya Komatineni assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_P>, 164c4153885SSowjanya Komatineni <&tegra_car TEGRA210_CLK_PLL_P>, 165c4153885SSowjanya Komatineni <&tegra_car TEGRA210_CLK_PLL_P>; 166c4153885SSowjanya Komatineni assigned-clock-rates = <102000000>, 167c4153885SSowjanya Komatineni <102000000>, 168c4153885SSowjanya Komatineni <102000000>, 169c4153885SSowjanya Komatineni <972000000>; 170c4153885SSowjanya Komatineni 171c4153885SSowjanya Komatineni clocks = <&tegra_car TEGRA210_CLK_CSI>, 172c4153885SSowjanya Komatineni <&tegra_car TEGRA210_CLK_CILAB>, 173c4153885SSowjanya Komatineni <&tegra_car TEGRA210_CLK_CILCD>, 174c4153885SSowjanya Komatineni <&tegra_car TEGRA210_CLK_CILE>, 175c4153885SSowjanya Komatineni <&tegra_car TEGRA210_CLK_CSI_TPG>; 176c4153885SSowjanya Komatineni clock-names = "csi", "cilab", "cilcd", "cile", "csi_tpg"; 177c4153885SSowjanya Komatineni power-domains = <&pd_sor>; 178c4153885SSowjanya Komatineni }; 179742af7e7SThierry Reding }; 180742af7e7SThierry Reding 181be70771dSThierry Reding tsec@54100000 { 182742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 183742af7e7SThierry Reding reg = <0x0 0x54100000 0x0 0x00040000>; 184742af7e7SThierry Reding }; 185742af7e7SThierry Reding 186be70771dSThierry Reding dc@54200000 { 187742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 188742af7e7SThierry Reding reg = <0x0 0x54200000 0x0 0x00040000>; 189742af7e7SThierry Reding interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 190352092b0SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP1>; 191352092b0SThierry Reding clock-names = "dc"; 192742af7e7SThierry Reding resets = <&tegra_car 27>; 193742af7e7SThierry Reding reset-names = "dc"; 194742af7e7SThierry Reding 195742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DC>; 196742af7e7SThierry Reding 197742af7e7SThierry Reding nvidia,head = <0>; 198742af7e7SThierry Reding }; 199742af7e7SThierry Reding 200be70771dSThierry Reding dc@54240000 { 201742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 202742af7e7SThierry Reding reg = <0x0 0x54240000 0x0 0x00040000>; 203742af7e7SThierry Reding interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 204352092b0SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP2>; 205352092b0SThierry Reding clock-names = "dc"; 206742af7e7SThierry Reding resets = <&tegra_car 26>; 207742af7e7SThierry Reding reset-names = "dc"; 208742af7e7SThierry Reding 209742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DCB>; 210742af7e7SThierry Reding 211742af7e7SThierry Reding nvidia,head = <1>; 212742af7e7SThierry Reding }; 213742af7e7SThierry Reding 214be70771dSThierry Reding dsi@54300000 { 215742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 216742af7e7SThierry Reding reg = <0x0 0x54300000 0x0 0x00040000>; 217742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIA>, 218742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIALP>, 219742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 220742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 221742af7e7SThierry Reding resets = <&tegra_car 48>; 222742af7e7SThierry Reding reset-names = "dsi"; 22396d1f078SJon Hunter power-domains = <&pd_sor>; 224742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x0c0>; /* DSIA & DSIB pads */ 225742af7e7SThierry Reding 226742af7e7SThierry Reding status = "disabled"; 227742af7e7SThierry Reding 228742af7e7SThierry Reding #address-cells = <1>; 229742af7e7SThierry Reding #size-cells = <0>; 230742af7e7SThierry Reding }; 231742af7e7SThierry Reding 232be70771dSThierry Reding vic@54340000 { 233742af7e7SThierry Reding compatible = "nvidia,tegra210-vic"; 234742af7e7SThierry Reding reg = <0x0 0x54340000 0x0 0x00040000>; 23524963d1bSMikko Perttunen interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 23624963d1bSMikko Perttunen clocks = <&tegra_car TEGRA210_CLK_VIC03>; 23724963d1bSMikko Perttunen clock-names = "vic"; 23824963d1bSMikko Perttunen resets = <&tegra_car 178>; 23924963d1bSMikko Perttunen reset-names = "vic"; 24024963d1bSMikko Perttunen 24124963d1bSMikko Perttunen iommus = <&mc TEGRA_SWGROUP_VIC>; 24224963d1bSMikko Perttunen power-domains = <&pd_vic>; 243742af7e7SThierry Reding }; 244742af7e7SThierry Reding 245be70771dSThierry Reding nvjpg@54380000 { 246742af7e7SThierry Reding compatible = "nvidia,tegra210-nvjpg"; 247742af7e7SThierry Reding reg = <0x0 0x54380000 0x0 0x00040000>; 248742af7e7SThierry Reding status = "disabled"; 249742af7e7SThierry Reding }; 250742af7e7SThierry Reding 251be70771dSThierry Reding dsi@54400000 { 252742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 253742af7e7SThierry Reding reg = <0x0 0x54400000 0x0 0x00040000>; 254742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIB>, 255742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIBLP>, 256742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 257742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 258742af7e7SThierry Reding resets = <&tegra_car 82>; 259742af7e7SThierry Reding reset-names = "dsi"; 26096d1f078SJon Hunter power-domains = <&pd_sor>; 261742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x300>; /* DSIC & DSID pads */ 262742af7e7SThierry Reding 263742af7e7SThierry Reding status = "disabled"; 264742af7e7SThierry Reding 265742af7e7SThierry Reding #address-cells = <1>; 266742af7e7SThierry Reding #size-cells = <0>; 267742af7e7SThierry Reding }; 268742af7e7SThierry Reding 269be70771dSThierry Reding nvdec@54480000 { 270742af7e7SThierry Reding compatible = "nvidia,tegra210-nvdec"; 271742af7e7SThierry Reding reg = <0x0 0x54480000 0x0 0x00040000>; 272742af7e7SThierry Reding status = "disabled"; 273742af7e7SThierry Reding }; 274742af7e7SThierry Reding 275be70771dSThierry Reding nvenc@544c0000 { 276742af7e7SThierry Reding compatible = "nvidia,tegra210-nvenc"; 277742af7e7SThierry Reding reg = <0x0 0x544c0000 0x0 0x00040000>; 278742af7e7SThierry Reding status = "disabled"; 279742af7e7SThierry Reding }; 280742af7e7SThierry Reding 281be70771dSThierry Reding tsec@54500000 { 282742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 283742af7e7SThierry Reding reg = <0x0 0x54500000 0x0 0x00040000>; 284742af7e7SThierry Reding status = "disabled"; 285742af7e7SThierry Reding }; 286742af7e7SThierry Reding 287be70771dSThierry Reding sor@54540000 { 288742af7e7SThierry Reding compatible = "nvidia,tegra210-sor"; 289742af7e7SThierry Reding reg = <0x0 0x54540000 0x0 0x00040000>; 290742af7e7SThierry Reding interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 291742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR0>, 292ed93a666SThierry Reding <&tegra_car TEGRA210_CLK_SOR0_OUT>, 293742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>, 294742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 295742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 296ed93a666SThierry Reding clock-names = "sor", "out", "parent", "dp", "safe"; 297742af7e7SThierry Reding resets = <&tegra_car 182>; 298742af7e7SThierry Reding reset-names = "sor"; 29966b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_aux>; 30066b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_i2c>; 30166b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux_off>; 30266b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 30396d1f078SJon Hunter power-domains = <&pd_sor>; 304742af7e7SThierry Reding status = "disabled"; 305742af7e7SThierry Reding }; 306742af7e7SThierry Reding 307be70771dSThierry Reding sor@54580000 { 308742af7e7SThierry Reding compatible = "nvidia,tegra210-sor1"; 309742af7e7SThierry Reding reg = <0x0 0x54580000 0x0 0x00040000>; 310742af7e7SThierry Reding interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 311742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR1>, 31250f5b841SThierry Reding <&tegra_car TEGRA210_CLK_SOR1_OUT>, 313742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D2_OUT0>, 314742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 315742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 31650f5b841SThierry Reding clock-names = "sor", "out", "parent", "dp", "safe"; 317742af7e7SThierry Reding resets = <&tegra_car 183>; 318742af7e7SThierry Reding reset-names = "sor"; 31966b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_aux>; 32066b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_i2c>; 32166b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux1_off>; 32266b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 32396d1f078SJon Hunter power-domains = <&pd_sor>; 324742af7e7SThierry Reding status = "disabled"; 325742af7e7SThierry Reding }; 326742af7e7SThierry Reding 327be70771dSThierry Reding dpaux: dpaux@545c0000 { 328e989992aSThierry Reding compatible = "nvidia,tegra210-dpaux"; 329742af7e7SThierry Reding reg = <0x0 0x545c0000 0x0 0x00040000>; 330742af7e7SThierry Reding interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 331742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX>, 332742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 333742af7e7SThierry Reding clock-names = "dpaux", "parent"; 334742af7e7SThierry Reding resets = <&tegra_car 181>; 335742af7e7SThierry Reding reset-names = "dpaux"; 33696d1f078SJon Hunter power-domains = <&pd_sor>; 337742af7e7SThierry Reding status = "disabled"; 33866b2d6e9SJon Hunter 33966b2d6e9SJon Hunter state_dpaux_aux: pinmux-aux { 34066b2d6e9SJon Hunter groups = "dpaux-io"; 34166b2d6e9SJon Hunter function = "aux"; 34266b2d6e9SJon Hunter }; 34366b2d6e9SJon Hunter 34466b2d6e9SJon Hunter state_dpaux_i2c: pinmux-i2c { 34566b2d6e9SJon Hunter groups = "dpaux-io"; 34666b2d6e9SJon Hunter function = "i2c"; 34766b2d6e9SJon Hunter }; 34866b2d6e9SJon Hunter 34966b2d6e9SJon Hunter state_dpaux_off: pinmux-off { 35066b2d6e9SJon Hunter groups = "dpaux-io"; 35166b2d6e9SJon Hunter function = "off"; 35266b2d6e9SJon Hunter }; 35366b2d6e9SJon Hunter 35466b2d6e9SJon Hunter i2c-bus { 35566b2d6e9SJon Hunter #address-cells = <1>; 35666b2d6e9SJon Hunter #size-cells = <0>; 35766b2d6e9SJon Hunter }; 358742af7e7SThierry Reding }; 359742af7e7SThierry Reding 360be70771dSThierry Reding isp@54600000 { 361742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 362742af7e7SThierry Reding reg = <0x0 0x54600000 0x0 0x00040000>; 363742af7e7SThierry Reding interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 36497ace1b4SThierry Reding clocks = <&tegra_car TEGRA210_CLK_ISPA>; 36597ace1b4SThierry Reding resets = <&tegra_car 23>; 36697ace1b4SThierry Reding reset-names = "isp"; 367742af7e7SThierry Reding status = "disabled"; 368742af7e7SThierry Reding }; 369742af7e7SThierry Reding 370be70771dSThierry Reding isp@54680000 { 371742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 372742af7e7SThierry Reding reg = <0x0 0x54680000 0x0 0x00040000>; 373742af7e7SThierry Reding interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 37497ace1b4SThierry Reding clocks = <&tegra_car TEGRA210_CLK_ISPB>; 37597ace1b4SThierry Reding resets = <&tegra_car 3>; 37697ace1b4SThierry Reding reset-names = "isp"; 377742af7e7SThierry Reding status = "disabled"; 378742af7e7SThierry Reding }; 379742af7e7SThierry Reding 380be70771dSThierry Reding i2c@546c0000 { 381742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c-vi"; 382742af7e7SThierry Reding reg = <0x0 0x546c0000 0x0 0x00040000>; 383742af7e7SThierry Reding interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 384742af7e7SThierry Reding status = "disabled"; 385742af7e7SThierry Reding }; 386742af7e7SThierry Reding }; 387742af7e7SThierry Reding 388be70771dSThierry Reding gic: interrupt-controller@50041000 { 389742af7e7SThierry Reding compatible = "arm,gic-400"; 390742af7e7SThierry Reding #interrupt-cells = <3>; 391742af7e7SThierry Reding interrupt-controller; 392742af7e7SThierry Reding reg = <0x0 0x50041000 0x0 0x1000>, 393742af7e7SThierry Reding <0x0 0x50042000 0x0 0x2000>, 394742af7e7SThierry Reding <0x0 0x50044000 0x0 0x2000>, 395742af7e7SThierry Reding <0x0 0x50046000 0x0 0x2000>; 396742af7e7SThierry Reding interrupts = <GIC_PPI 9 397742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 398742af7e7SThierry Reding interrupt-parent = <&gic>; 399742af7e7SThierry Reding }; 400742af7e7SThierry Reding 401be70771dSThierry Reding gpu@57000000 { 402742af7e7SThierry Reding compatible = "nvidia,gm20b"; 403742af7e7SThierry Reding reg = <0x0 0x57000000 0x0 0x01000000>, 404742af7e7SThierry Reding <0x0 0x58000000 0x0 0x01000000>; 405742af7e7SThierry Reding interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 406742af7e7SThierry Reding <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 407742af7e7SThierry Reding interrupt-names = "stall", "nonstall"; 408742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_GPU>, 4094a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_P_OUT5>, 4104a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_G_REF>; 4114a0778e9SAlexandre Courbot clock-names = "gpu", "pwr", "ref"; 412742af7e7SThierry Reding resets = <&tegra_car 184>; 413742af7e7SThierry Reding reset-names = "gpu"; 41430f949bcSAlexandre Courbot 41530f949bcSAlexandre Courbot iommus = <&mc TEGRA_SWGROUP_GPU>; 41630f949bcSAlexandre Courbot 417742af7e7SThierry Reding status = "disabled"; 418742af7e7SThierry Reding }; 419742af7e7SThierry Reding 420be70771dSThierry Reding lic: interrupt-controller@60004000 { 421742af7e7SThierry Reding compatible = "nvidia,tegra210-ictlr"; 422742af7e7SThierry Reding reg = <0x0 0x60004000 0x0 0x40>, /* primary controller */ 423742af7e7SThierry Reding <0x0 0x60004100 0x0 0x40>, /* secondary controller */ 424742af7e7SThierry Reding <0x0 0x60004200 0x0 0x40>, /* tertiary controller */ 425742af7e7SThierry Reding <0x0 0x60004300 0x0 0x40>, /* quaternary controller */ 426742af7e7SThierry Reding <0x0 0x60004400 0x0 0x40>, /* quinary controller */ 427742af7e7SThierry Reding <0x0 0x60004500 0x0 0x40>; /* senary controller */ 428742af7e7SThierry Reding interrupt-controller; 429742af7e7SThierry Reding #interrupt-cells = <3>; 430742af7e7SThierry Reding interrupt-parent = <&gic>; 431742af7e7SThierry Reding }; 432742af7e7SThierry Reding 433be70771dSThierry Reding timer@60005000 { 434d9931a18SJoseph Lo compatible = "nvidia,tegra210-timer"; 435742af7e7SThierry Reding reg = <0x0 0x60005000 0x0 0x400>; 436d9931a18SJoseph Lo interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>, 437d9931a18SJoseph Lo <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 438742af7e7SThierry Reding <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 439742af7e7SThierry Reding <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 440742af7e7SThierry Reding <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 441742af7e7SThierry Reding <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 442d9931a18SJoseph Lo <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, 443d9931a18SJoseph Lo <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, 444d9931a18SJoseph Lo <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, 445d9931a18SJoseph Lo <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 446d9931a18SJoseph Lo <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>, 447d9931a18SJoseph Lo <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>, 448d9931a18SJoseph Lo <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>, 449d9931a18SJoseph Lo <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; 450742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_TIMER>; 451742af7e7SThierry Reding clock-names = "timer"; 452742af7e7SThierry Reding }; 453742af7e7SThierry Reding 454be70771dSThierry Reding tegra_car: clock@60006000 { 455742af7e7SThierry Reding compatible = "nvidia,tegra210-car"; 456742af7e7SThierry Reding reg = <0x0 0x60006000 0x0 0x1000>; 457742af7e7SThierry Reding #clock-cells = <1>; 458742af7e7SThierry Reding #reset-cells = <1>; 459742af7e7SThierry Reding }; 460742af7e7SThierry Reding 461be70771dSThierry Reding flow-controller@60007000 { 462742af7e7SThierry Reding compatible = "nvidia,tegra210-flowctrl"; 463742af7e7SThierry Reding reg = <0x0 0x60007000 0x0 0x1000>; 464742af7e7SThierry Reding }; 465742af7e7SThierry Reding 466be70771dSThierry Reding gpio: gpio@6000d000 { 46701665512SStephen Warren compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio"; 468742af7e7SThierry Reding reg = <0x0 0x6000d000 0x0 0x1000>; 469742af7e7SThierry Reding interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 470742af7e7SThierry Reding <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 471742af7e7SThierry Reding <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 472742af7e7SThierry Reding <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 473742af7e7SThierry Reding <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 474742af7e7SThierry Reding <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 475742af7e7SThierry Reding <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 476742af7e7SThierry Reding <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 477742af7e7SThierry Reding #gpio-cells = <2>; 478742af7e7SThierry Reding gpio-controller; 479742af7e7SThierry Reding #interrupt-cells = <2>; 480742af7e7SThierry Reding interrupt-controller; 481742af7e7SThierry Reding }; 482742af7e7SThierry Reding 483be70771dSThierry Reding apbdma: dma@60020000 { 484742af7e7SThierry Reding compatible = "nvidia,tegra210-apbdma", "nvidia,tegra148-apbdma"; 485742af7e7SThierry Reding reg = <0x0 0x60020000 0x0 0x1400>; 486742af7e7SThierry Reding interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 487742af7e7SThierry Reding <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 488742af7e7SThierry Reding <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 489742af7e7SThierry Reding <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 490742af7e7SThierry Reding <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 491742af7e7SThierry Reding <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 492742af7e7SThierry Reding <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 493742af7e7SThierry Reding <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 494742af7e7SThierry Reding <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 495742af7e7SThierry Reding <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 496742af7e7SThierry Reding <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 497742af7e7SThierry Reding <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 498742af7e7SThierry Reding <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 499742af7e7SThierry Reding <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 500742af7e7SThierry Reding <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 501742af7e7SThierry Reding <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, 502742af7e7SThierry Reding <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 503742af7e7SThierry Reding <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 504742af7e7SThierry Reding <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 505742af7e7SThierry Reding <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 506742af7e7SThierry Reding <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 507742af7e7SThierry Reding <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, 508742af7e7SThierry Reding <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, 509742af7e7SThierry Reding <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 510742af7e7SThierry Reding <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 511742af7e7SThierry Reding <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 512742af7e7SThierry Reding <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 513742af7e7SThierry Reding <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>, 514742af7e7SThierry Reding <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, 515742af7e7SThierry Reding <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, 516742af7e7SThierry Reding <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 517742af7e7SThierry Reding <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 518742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_APBDMA>; 519742af7e7SThierry Reding clock-names = "dma"; 520742af7e7SThierry Reding resets = <&tegra_car 34>; 521742af7e7SThierry Reding reset-names = "dma"; 522742af7e7SThierry Reding #dma-cells = <1>; 523742af7e7SThierry Reding }; 524742af7e7SThierry Reding 525be70771dSThierry Reding apbmisc@70000800 { 526742af7e7SThierry Reding compatible = "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc"; 527742af7e7SThierry Reding reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */ 52846e4b227SJoseph Lo <0x0 0x70000008 0x0 0x04>; /* Strapping options */ 529742af7e7SThierry Reding }; 530742af7e7SThierry Reding 531be70771dSThierry Reding pinmux: pinmux@700008d4 { 532742af7e7SThierry Reding compatible = "nvidia,tegra210-pinmux"; 533742af7e7SThierry Reding reg = <0x0 0x700008d4 0x0 0x29c>, /* Pad control registers */ 534742af7e7SThierry Reding <0x0 0x70003000 0x0 0x294>; /* Mux registers */ 5354e0f1229SSowjanya Komatineni sdmmc1_3v3_drv: sdmmc1-3v3-drv { 5364e0f1229SSowjanya Komatineni sdmmc1 { 5374e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc1"; 5384e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x8>; 5394e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x8>; 5404e0f1229SSowjanya Komatineni }; 5414e0f1229SSowjanya Komatineni }; 5424e0f1229SSowjanya Komatineni sdmmc1_1v8_drv: sdmmc1-1v8-drv { 5434e0f1229SSowjanya Komatineni sdmmc1 { 5444e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc1"; 5454e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x4>; 5464e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x3>; 5474e0f1229SSowjanya Komatineni }; 5484e0f1229SSowjanya Komatineni }; 5494e0f1229SSowjanya Komatineni sdmmc2_1v8_drv: sdmmc2-1v8-drv { 5504e0f1229SSowjanya Komatineni sdmmc2 { 5514e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc2"; 5524e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x10>; 5534e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x10>; 5544e0f1229SSowjanya Komatineni }; 5554e0f1229SSowjanya Komatineni }; 5564e0f1229SSowjanya Komatineni sdmmc3_3v3_drv: sdmmc3-3v3-drv { 5574e0f1229SSowjanya Komatineni sdmmc3 { 5584e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc3"; 5594e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x8>; 5604e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x8>; 5614e0f1229SSowjanya Komatineni }; 5624e0f1229SSowjanya Komatineni }; 5634e0f1229SSowjanya Komatineni sdmmc3_1v8_drv: sdmmc3-1v8-drv { 5644e0f1229SSowjanya Komatineni sdmmc3 { 5654e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc3"; 5664e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x4>; 5674e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x3>; 5684e0f1229SSowjanya Komatineni }; 5694e0f1229SSowjanya Komatineni }; 5704e0f1229SSowjanya Komatineni sdmmc4_1v8_drv: sdmmc4-1v8-drv { 5714e0f1229SSowjanya Komatineni sdmmc4 { 5724e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc4"; 5734e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x10>; 5744e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x10>; 5754e0f1229SSowjanya Komatineni }; 5764e0f1229SSowjanya Komatineni }; 577742af7e7SThierry Reding }; 578742af7e7SThierry Reding 579742af7e7SThierry Reding /* 580742af7e7SThierry Reding * There are two serial driver i.e. 8250 based simple serial 581742af7e7SThierry Reding * driver and APB DMA based serial driver for higher baudrate 582ef769e32SAdam Buchbinder * and performance. To enable the 8250 based driver, the compatible 583742af7e7SThierry Reding * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable 58468cd8b2eSThierry Reding * the APB DMA based serial driver, the compatible is 585742af7e7SThierry Reding * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart". 586742af7e7SThierry Reding */ 587be70771dSThierry Reding uarta: serial@70006000 { 588742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 589742af7e7SThierry Reding reg = <0x0 0x70006000 0x0 0x40>; 590742af7e7SThierry Reding reg-shift = <2>; 591742af7e7SThierry Reding interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 592742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTA>; 593742af7e7SThierry Reding clock-names = "serial"; 594742af7e7SThierry Reding resets = <&tegra_car 6>; 595742af7e7SThierry Reding reset-names = "serial"; 596742af7e7SThierry Reding dmas = <&apbdma 8>, <&apbdma 8>; 597742af7e7SThierry Reding dma-names = "rx", "tx"; 598742af7e7SThierry Reding status = "disabled"; 599742af7e7SThierry Reding }; 600742af7e7SThierry Reding 601be70771dSThierry Reding uartb: serial@70006040 { 602742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 603742af7e7SThierry Reding reg = <0x0 0x70006040 0x0 0x40>; 604742af7e7SThierry Reding reg-shift = <2>; 605742af7e7SThierry Reding interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 606742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTB>; 607742af7e7SThierry Reding clock-names = "serial"; 608742af7e7SThierry Reding resets = <&tegra_car 7>; 609742af7e7SThierry Reding reset-names = "serial"; 610742af7e7SThierry Reding dmas = <&apbdma 9>, <&apbdma 9>; 611742af7e7SThierry Reding dma-names = "rx", "tx"; 612742af7e7SThierry Reding status = "disabled"; 613742af7e7SThierry Reding }; 614742af7e7SThierry Reding 615be70771dSThierry Reding uartc: serial@70006200 { 616742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 617742af7e7SThierry Reding reg = <0x0 0x70006200 0x0 0x40>; 618742af7e7SThierry Reding reg-shift = <2>; 619742af7e7SThierry Reding interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 620742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTC>; 621742af7e7SThierry Reding clock-names = "serial"; 622742af7e7SThierry Reding resets = <&tegra_car 55>; 623742af7e7SThierry Reding reset-names = "serial"; 624742af7e7SThierry Reding dmas = <&apbdma 10>, <&apbdma 10>; 625742af7e7SThierry Reding dma-names = "rx", "tx"; 626742af7e7SThierry Reding status = "disabled"; 627742af7e7SThierry Reding }; 628742af7e7SThierry Reding 629be70771dSThierry Reding uartd: serial@70006300 { 630742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 631742af7e7SThierry Reding reg = <0x0 0x70006300 0x0 0x40>; 632742af7e7SThierry Reding reg-shift = <2>; 633742af7e7SThierry Reding interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 634742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTD>; 635742af7e7SThierry Reding clock-names = "serial"; 636742af7e7SThierry Reding resets = <&tegra_car 65>; 637742af7e7SThierry Reding reset-names = "serial"; 638742af7e7SThierry Reding dmas = <&apbdma 19>, <&apbdma 19>; 639742af7e7SThierry Reding dma-names = "rx", "tx"; 640742af7e7SThierry Reding status = "disabled"; 641742af7e7SThierry Reding }; 642742af7e7SThierry Reding 643be70771dSThierry Reding pwm: pwm@7000a000 { 644742af7e7SThierry Reding compatible = "nvidia,tegra210-pwm", "nvidia,tegra20-pwm"; 645742af7e7SThierry Reding reg = <0x0 0x7000a000 0x0 0x100>; 646742af7e7SThierry Reding #pwm-cells = <2>; 647742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PWM>; 648742af7e7SThierry Reding clock-names = "pwm"; 649742af7e7SThierry Reding resets = <&tegra_car 17>; 650742af7e7SThierry Reding reset-names = "pwm"; 651742af7e7SThierry Reding status = "disabled"; 652742af7e7SThierry Reding }; 653742af7e7SThierry Reding 654be70771dSThierry Reding i2c@7000c000 { 655140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 656742af7e7SThierry Reding reg = <0x0 0x7000c000 0x0 0x100>; 657742af7e7SThierry Reding interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 658742af7e7SThierry Reding #address-cells = <1>; 659742af7e7SThierry Reding #size-cells = <0>; 660742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C1>; 661742af7e7SThierry Reding clock-names = "div-clk"; 662742af7e7SThierry Reding resets = <&tegra_car 12>; 663742af7e7SThierry Reding reset-names = "i2c"; 664742af7e7SThierry Reding dmas = <&apbdma 21>, <&apbdma 21>; 665742af7e7SThierry Reding dma-names = "rx", "tx"; 666742af7e7SThierry Reding status = "disabled"; 667742af7e7SThierry Reding }; 668742af7e7SThierry Reding 669be70771dSThierry Reding i2c@7000c400 { 670140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 671742af7e7SThierry Reding reg = <0x0 0x7000c400 0x0 0x100>; 672742af7e7SThierry Reding interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 673742af7e7SThierry Reding #address-cells = <1>; 674742af7e7SThierry Reding #size-cells = <0>; 675742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C2>; 676742af7e7SThierry Reding clock-names = "div-clk"; 677742af7e7SThierry Reding resets = <&tegra_car 54>; 678742af7e7SThierry Reding reset-names = "i2c"; 679742af7e7SThierry Reding dmas = <&apbdma 22>, <&apbdma 22>; 680742af7e7SThierry Reding dma-names = "rx", "tx"; 681742af7e7SThierry Reding status = "disabled"; 682742af7e7SThierry Reding }; 683742af7e7SThierry Reding 684be70771dSThierry Reding i2c@7000c500 { 685140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 686742af7e7SThierry Reding reg = <0x0 0x7000c500 0x0 0x100>; 687742af7e7SThierry Reding interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 688742af7e7SThierry Reding #address-cells = <1>; 689742af7e7SThierry Reding #size-cells = <0>; 690742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C3>; 691742af7e7SThierry Reding clock-names = "div-clk"; 692742af7e7SThierry Reding resets = <&tegra_car 67>; 693742af7e7SThierry Reding reset-names = "i2c"; 694742af7e7SThierry Reding dmas = <&apbdma 23>, <&apbdma 23>; 695742af7e7SThierry Reding dma-names = "rx", "tx"; 696742af7e7SThierry Reding status = "disabled"; 697742af7e7SThierry Reding }; 698742af7e7SThierry Reding 699be70771dSThierry Reding i2c@7000c700 { 700140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 701742af7e7SThierry Reding reg = <0x0 0x7000c700 0x0 0x100>; 702742af7e7SThierry Reding interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 703742af7e7SThierry Reding #address-cells = <1>; 704742af7e7SThierry Reding #size-cells = <0>; 705742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C4>; 706742af7e7SThierry Reding clock-names = "div-clk"; 707742af7e7SThierry Reding resets = <&tegra_car 103>; 708742af7e7SThierry Reding reset-names = "i2c"; 709742af7e7SThierry Reding dmas = <&apbdma 26>, <&apbdma 26>; 710742af7e7SThierry Reding dma-names = "rx", "tx"; 71166b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_i2c>; 71266b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_off>; 71366b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 714742af7e7SThierry Reding status = "disabled"; 715742af7e7SThierry Reding }; 716742af7e7SThierry Reding 717be70771dSThierry Reding i2c@7000d000 { 718140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 719742af7e7SThierry Reding reg = <0x0 0x7000d000 0x0 0x100>; 720742af7e7SThierry Reding interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 721742af7e7SThierry Reding #address-cells = <1>; 722742af7e7SThierry Reding #size-cells = <0>; 723742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C5>; 724742af7e7SThierry Reding clock-names = "div-clk"; 725742af7e7SThierry Reding resets = <&tegra_car 47>; 726742af7e7SThierry Reding reset-names = "i2c"; 727742af7e7SThierry Reding dmas = <&apbdma 24>, <&apbdma 24>; 728742af7e7SThierry Reding dma-names = "rx", "tx"; 729742af7e7SThierry Reding status = "disabled"; 730742af7e7SThierry Reding }; 731742af7e7SThierry Reding 732be70771dSThierry Reding i2c@7000d100 { 733140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 734742af7e7SThierry Reding reg = <0x0 0x7000d100 0x0 0x100>; 735742af7e7SThierry Reding interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 736742af7e7SThierry Reding #address-cells = <1>; 737742af7e7SThierry Reding #size-cells = <0>; 738742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C6>; 739742af7e7SThierry Reding clock-names = "div-clk"; 740742af7e7SThierry Reding resets = <&tegra_car 166>; 741742af7e7SThierry Reding reset-names = "i2c"; 742742af7e7SThierry Reding dmas = <&apbdma 30>, <&apbdma 30>; 743742af7e7SThierry Reding dma-names = "rx", "tx"; 74466b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_i2c>; 74566b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_off>; 74666b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 747742af7e7SThierry Reding status = "disabled"; 748742af7e7SThierry Reding }; 749742af7e7SThierry Reding 750be70771dSThierry Reding spi@7000d400 { 751742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 752742af7e7SThierry Reding reg = <0x0 0x7000d400 0x0 0x200>; 753742af7e7SThierry Reding interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 754742af7e7SThierry Reding #address-cells = <1>; 755742af7e7SThierry Reding #size-cells = <0>; 756742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC1>; 757742af7e7SThierry Reding clock-names = "spi"; 758742af7e7SThierry Reding resets = <&tegra_car 41>; 759742af7e7SThierry Reding reset-names = "spi"; 760742af7e7SThierry Reding dmas = <&apbdma 15>, <&apbdma 15>; 761742af7e7SThierry Reding dma-names = "rx", "tx"; 762742af7e7SThierry Reding status = "disabled"; 763742af7e7SThierry Reding }; 764742af7e7SThierry Reding 765be70771dSThierry Reding spi@7000d600 { 766742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 767742af7e7SThierry Reding reg = <0x0 0x7000d600 0x0 0x200>; 768742af7e7SThierry Reding interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 769742af7e7SThierry Reding #address-cells = <1>; 770742af7e7SThierry Reding #size-cells = <0>; 771742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC2>; 772742af7e7SThierry Reding clock-names = "spi"; 773742af7e7SThierry Reding resets = <&tegra_car 44>; 774742af7e7SThierry Reding reset-names = "spi"; 775742af7e7SThierry Reding dmas = <&apbdma 16>, <&apbdma 16>; 776742af7e7SThierry Reding dma-names = "rx", "tx"; 777742af7e7SThierry Reding status = "disabled"; 778742af7e7SThierry Reding }; 779742af7e7SThierry Reding 780be70771dSThierry Reding spi@7000d800 { 781742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 782742af7e7SThierry Reding reg = <0x0 0x7000d800 0x0 0x200>; 783742af7e7SThierry Reding interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 784742af7e7SThierry Reding #address-cells = <1>; 785742af7e7SThierry Reding #size-cells = <0>; 786742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC3>; 787742af7e7SThierry Reding clock-names = "spi"; 788742af7e7SThierry Reding resets = <&tegra_car 46>; 789742af7e7SThierry Reding reset-names = "spi"; 790742af7e7SThierry Reding dmas = <&apbdma 17>, <&apbdma 17>; 791742af7e7SThierry Reding dma-names = "rx", "tx"; 792742af7e7SThierry Reding status = "disabled"; 793742af7e7SThierry Reding }; 794742af7e7SThierry Reding 795be70771dSThierry Reding spi@7000da00 { 796742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 797742af7e7SThierry Reding reg = <0x0 0x7000da00 0x0 0x200>; 798742af7e7SThierry Reding interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 799742af7e7SThierry Reding #address-cells = <1>; 800742af7e7SThierry Reding #size-cells = <0>; 801742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC4>; 802742af7e7SThierry Reding clock-names = "spi"; 803742af7e7SThierry Reding resets = <&tegra_car 68>; 804742af7e7SThierry Reding reset-names = "spi"; 805742af7e7SThierry Reding dmas = <&apbdma 18>, <&apbdma 18>; 806742af7e7SThierry Reding dma-names = "rx", "tx"; 807742af7e7SThierry Reding status = "disabled"; 808742af7e7SThierry Reding }; 809742af7e7SThierry Reding 810be70771dSThierry Reding rtc@7000e000 { 811742af7e7SThierry Reding compatible = "nvidia,tegra210-rtc", "nvidia,tegra20-rtc"; 812742af7e7SThierry Reding reg = <0x0 0x7000e000 0x0 0x100>; 813d13c13f4SSowjanya Komatineni interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; 814359ae651SSowjanya Komatineni interrupt-parent = <&tegra_pmc>; 815742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_RTC>; 816742af7e7SThierry Reding clock-names = "rtc"; 817742af7e7SThierry Reding }; 818742af7e7SThierry Reding 819359ae651SSowjanya Komatineni tegra_pmc: pmc@7000e400 { 820742af7e7SThierry Reding compatible = "nvidia,tegra210-pmc"; 821742af7e7SThierry Reding reg = <0x0 0x7000e400 0x0 0x400>; 822742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; 823742af7e7SThierry Reding clock-names = "pclk", "clk32k_in"; 824359ae651SSowjanya Komatineni #clock-cells = <1>; 825d13c13f4SSowjanya Komatineni #interrupt-cells = <2>; 826d13c13f4SSowjanya Komatineni interrupt-controller; 827c2b82445SJon Hunter 828c2b82445SJon Hunter powergates { 829c2b82445SJon Hunter pd_audio: aud { 830c2b82445SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 831c2b82445SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 832c2b82445SJon Hunter resets = <&tegra_car 198>; 833c2b82445SJon Hunter #power-domain-cells = <0>; 834c2b82445SJon Hunter }; 835241f02baSJon Hunter 83696d1f078SJon Hunter pd_sor: sor { 83796d1f078SJon Hunter clocks = <&tegra_car TEGRA210_CLK_SOR0>, 83896d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 839b4f99176SSowjanya Komatineni <&tegra_car TEGRA210_CLK_CILAB>, 840b4f99176SSowjanya Komatineni <&tegra_car TEGRA210_CLK_CILCD>, 841b4f99176SSowjanya Komatineni <&tegra_car TEGRA210_CLK_CILE>, 84296d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 84396d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 84496d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 84596d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 84696d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 84796d1f078SJon Hunter resets = <&tegra_car TEGRA210_CLK_SOR0>, 84896d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 84996d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 85096d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 85196d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 85296d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 85396d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 85496d1f078SJon Hunter #power-domain-cells = <0>; 85596d1f078SJon Hunter }; 85696d1f078SJon Hunter 857241f02baSJon Hunter pd_xusbss: xusba { 858241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>; 859241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_SS>; 860241f02baSJon Hunter #power-domain-cells = <0>; 861241f02baSJon Hunter }; 862241f02baSJon Hunter 863241f02baSJon Hunter pd_xusbdev: xusbb { 864241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>; 865241f02baSJon Hunter resets = <&tegra_car 95>; 866241f02baSJon Hunter #power-domain-cells = <0>; 867241f02baSJon Hunter }; 868241f02baSJon Hunter 869241f02baSJon Hunter pd_xusbhost: xusbc { 870241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 871241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 872241f02baSJon Hunter #power-domain-cells = <0>; 873241f02baSJon Hunter }; 87424963d1bSMikko Perttunen 87524963d1bSMikko Perttunen pd_vic: vic { 87624963d1bSMikko Perttunen clocks = <&tegra_car TEGRA210_CLK_VIC03>; 87724963d1bSMikko Perttunen clock-names = "vic"; 87824963d1bSMikko Perttunen resets = <&tegra_car 178>; 87924963d1bSMikko Perttunen reset-names = "vic"; 88024963d1bSMikko Perttunen #power-domain-cells = <0>; 88124963d1bSMikko Perttunen }; 882c4153885SSowjanya Komatineni 883c4153885SSowjanya Komatineni pd_venc: venc { 884c4153885SSowjanya Komatineni clocks = <&tegra_car TEGRA210_CLK_VI>, 885c4153885SSowjanya Komatineni <&tegra_car TEGRA210_CLK_CSI>; 886c4153885SSowjanya Komatineni resets = <&mc TEGRA210_MC_RESET_VI>, 887c4153885SSowjanya Komatineni <&tegra_car 20>, 888c4153885SSowjanya Komatineni <&tegra_car 52>; 889c4153885SSowjanya Komatineni #power-domain-cells = <0>; 890c4153885SSowjanya Komatineni }; 891c2b82445SJon Hunter }; 8926641af7eSAapo Vienamo 8936641af7eSAapo Vienamo sdmmc1_3v3: sdmmc1-3v3 { 8946641af7eSAapo Vienamo pins = "sdmmc1"; 8956641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>; 8966641af7eSAapo Vienamo }; 8976641af7eSAapo Vienamo 8986641af7eSAapo Vienamo sdmmc1_1v8: sdmmc1-1v8 { 8996641af7eSAapo Vienamo pins = "sdmmc1"; 9006641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>; 9016641af7eSAapo Vienamo }; 9026641af7eSAapo Vienamo 9036641af7eSAapo Vienamo sdmmc3_3v3: sdmmc3-3v3 { 9046641af7eSAapo Vienamo pins = "sdmmc3"; 9056641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>; 9066641af7eSAapo Vienamo }; 9076641af7eSAapo Vienamo 9086641af7eSAapo Vienamo sdmmc3_1v8: sdmmc3-1v8 { 9096641af7eSAapo Vienamo pins = "sdmmc3"; 9106641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>; 9116641af7eSAapo Vienamo }; 912871be845SManikanta Maddireddy 913871be845SManikanta Maddireddy pex_dpd_disable: pex_en { 914871be845SManikanta Maddireddy pex-dpd-disable { 915871be845SManikanta Maddireddy pins = "pex-bias", "pex-clk1", "pex-clk2"; 916871be845SManikanta Maddireddy low-power-disable; 917871be845SManikanta Maddireddy }; 918871be845SManikanta Maddireddy }; 919871be845SManikanta Maddireddy 920871be845SManikanta Maddireddy pex_dpd_enable: pex_dis { 921871be845SManikanta Maddireddy pex-dpd-enable { 922871be845SManikanta Maddireddy pins = "pex-bias", "pex-clk1", "pex-clk2"; 923871be845SManikanta Maddireddy low-power-enable; 924871be845SManikanta Maddireddy }; 925871be845SManikanta Maddireddy }; 926742af7e7SThierry Reding }; 927742af7e7SThierry Reding 928be70771dSThierry Reding fuse@7000f800 { 929742af7e7SThierry Reding compatible = "nvidia,tegra210-efuse"; 930742af7e7SThierry Reding reg = <0x0 0x7000f800 0x0 0x400>; 931742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_FUSE>; 932742af7e7SThierry Reding clock-names = "fuse"; 933742af7e7SThierry Reding resets = <&tegra_car 39>; 934742af7e7SThierry Reding reset-names = "fuse"; 935742af7e7SThierry Reding }; 936742af7e7SThierry Reding 937be70771dSThierry Reding mc: memory-controller@70019000 { 938742af7e7SThierry Reding compatible = "nvidia,tegra210-mc"; 939742af7e7SThierry Reding reg = <0x0 0x70019000 0x0 0x1000>; 940742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MC>; 941742af7e7SThierry Reding clock-names = "mc"; 942742af7e7SThierry Reding 943742af7e7SThierry Reding interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 944742af7e7SThierry Reding 945742af7e7SThierry Reding #iommu-cells = <1>; 9462eb8e1a4SSowjanya Komatineni #reset-cells = <1>; 947742af7e7SThierry Reding }; 948742af7e7SThierry Reding 949e12325f6SThierry Reding emc: external-memory-controller@7001b000 { 950cd9350c5SJoseph Lo compatible = "nvidia,tegra210-emc"; 951cd9350c5SJoseph Lo reg = <0x0 0x7001b000 0x0 0x1000>, 952cd9350c5SJoseph Lo <0x0 0x7001e000 0x0 0x1000>, 953cd9350c5SJoseph Lo <0x0 0x7001f000 0x0 0x1000>; 954cd9350c5SJoseph Lo clocks = <&tegra_car TEGRA210_CLK_EMC>; 955cd9350c5SJoseph Lo clock-names = "emc"; 956cd9350c5SJoseph Lo interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 957cd9350c5SJoseph Lo nvidia,memory-controller = <&mc>; 958e12325f6SThierry Reding #cooling-cells = <2>; 959cd9350c5SJoseph Lo }; 960cd9350c5SJoseph Lo 9616cb60ec4SPreetham Ramchandra sata@70020000 { 9626cb60ec4SPreetham Ramchandra compatible = "nvidia,tegra210-ahci"; 9636cb60ec4SPreetham Ramchandra reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */ 9646cb60ec4SPreetham Ramchandra <0x0 0x70020000 0x0 0x7000>, /* SATA */ 9656cb60ec4SPreetham Ramchandra <0x0 0x70001100 0x0 0x1000>; /* SATA AUX */ 9666cb60ec4SPreetham Ramchandra interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 9676cb60ec4SPreetham Ramchandra clocks = <&tegra_car TEGRA210_CLK_SATA>, 9686cb60ec4SPreetham Ramchandra <&tegra_car TEGRA210_CLK_SATA_OOB>; 9696cb60ec4SPreetham Ramchandra clock-names = "sata", "sata-oob"; 9706cb60ec4SPreetham Ramchandra resets = <&tegra_car 124>, 9716cb60ec4SPreetham Ramchandra <&tegra_car 123>, 9726cb60ec4SPreetham Ramchandra <&tegra_car 129>; 9736cb60ec4SPreetham Ramchandra reset-names = "sata", "sata-oob", "sata-cold"; 9746cb60ec4SPreetham Ramchandra status = "disabled"; 9756cb60ec4SPreetham Ramchandra }; 9766cb60ec4SPreetham Ramchandra 977be70771dSThierry Reding hda@70030000 { 978742af7e7SThierry Reding compatible = "nvidia,tegra210-hda", "nvidia,tegra30-hda"; 979742af7e7SThierry Reding reg = <0x0 0x70030000 0x0 0x10000>; 980742af7e7SThierry Reding interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 981742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HDA>, 982742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2HDMI>, 983742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2CODEC_2X>; 984742af7e7SThierry Reding clock-names = "hda", "hda2hdmi", "hda2codec_2x"; 985742af7e7SThierry Reding resets = <&tegra_car 125>, /* hda */ 986742af7e7SThierry Reding <&tegra_car 128>, /* hda2hdmi */ 987742af7e7SThierry Reding <&tegra_car 111>; /* hda2codec_2x */ 988742af7e7SThierry Reding reset-names = "hda", "hda2hdmi", "hda2codec_2x"; 989742af7e7SThierry Reding status = "disabled"; 990742af7e7SThierry Reding }; 991742af7e7SThierry Reding 992e7a99ac2SThierry Reding usb@70090000 { 993e7a99ac2SThierry Reding compatible = "nvidia,tegra210-xusb"; 994e7a99ac2SThierry Reding reg = <0x0 0x70090000 0x0 0x8000>, 995e7a99ac2SThierry Reding <0x0 0x70098000 0x0 0x1000>, 996e7a99ac2SThierry Reding <0x0 0x70099000 0x0 0x1000>; 997e7a99ac2SThierry Reding reg-names = "hcd", "fpci", "ipfs"; 998e7a99ac2SThierry Reding 999e7a99ac2SThierry Reding interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 10009168e1dbSJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 1001e7a99ac2SThierry Reding 1002e7a99ac2SThierry Reding clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>, 1003e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>, 1004e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>, 1005e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS>, 1006e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>, 1007d19532e6SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>, 1008e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, 1009e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, 1010e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U_480M>, 1011e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_CLK_M>, 1012e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>; 1013e7a99ac2SThierry Reding clock-names = "xusb_host", "xusb_host_src", 1014e7a99ac2SThierry Reding "xusb_falcon_src", "xusb_ss", 1015d19532e6SThierry Reding "xusb_ss_src", "xusb_ss_div2", 1016e7a99ac2SThierry Reding "xusb_hs_src", "xusb_fs_src", 1017e7a99ac2SThierry Reding "pll_u_480m", "clk_m", "pll_e"; 1018e7a99ac2SThierry Reding resets = <&tegra_car 89>, <&tegra_car 156>, 1019e7a99ac2SThierry Reding <&tegra_car 143>; 1020e7a99ac2SThierry Reding reset-names = "xusb_host", "xusb_ss", "xusb_src"; 102136ec29f7SJon Hunter power-domains = <&pd_xusbhost>, <&pd_xusbss>; 102236ec29f7SJon Hunter power-domain-names = "xusb_host", "xusb_ss"; 1023e7a99ac2SThierry Reding 1024e7a99ac2SThierry Reding nvidia,xusb-padctl = <&padctl>; 1025e7a99ac2SThierry Reding 1026e7a99ac2SThierry Reding status = "disabled"; 1027e7a99ac2SThierry Reding }; 1028e7a99ac2SThierry Reding 10294e07ac90SThierry Reding padctl: padctl@7009f000 { 10304e07ac90SThierry Reding compatible = "nvidia,tegra210-xusb-padctl"; 10314e07ac90SThierry Reding reg = <0x0 0x7009f000 0x0 0x1000>; 10324e07ac90SThierry Reding resets = <&tegra_car 142>; 10334e07ac90SThierry Reding reset-names = "padctl"; 10344e07ac90SThierry Reding 10354e07ac90SThierry Reding status = "disabled"; 10364e07ac90SThierry Reding 10374e07ac90SThierry Reding pads { 10384e07ac90SThierry Reding usb2 { 10394e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>; 10404e07ac90SThierry Reding clock-names = "trk"; 10414e07ac90SThierry Reding status = "disabled"; 10424e07ac90SThierry Reding 10434e07ac90SThierry Reding lanes { 10444e07ac90SThierry Reding usb2-0 { 10454e07ac90SThierry Reding status = "disabled"; 10464e07ac90SThierry Reding #phy-cells = <0>; 10474e07ac90SThierry Reding }; 10484e07ac90SThierry Reding 10494e07ac90SThierry Reding usb2-1 { 10504e07ac90SThierry Reding status = "disabled"; 10514e07ac90SThierry Reding #phy-cells = <0>; 10524e07ac90SThierry Reding }; 10534e07ac90SThierry Reding 10544e07ac90SThierry Reding usb2-2 { 10554e07ac90SThierry Reding status = "disabled"; 10564e07ac90SThierry Reding #phy-cells = <0>; 10574e07ac90SThierry Reding }; 10584e07ac90SThierry Reding 10594e07ac90SThierry Reding usb2-3 { 10604e07ac90SThierry Reding status = "disabled"; 10614e07ac90SThierry Reding #phy-cells = <0>; 10624e07ac90SThierry Reding }; 10634e07ac90SThierry Reding }; 10644e07ac90SThierry Reding }; 10654e07ac90SThierry Reding 10664e07ac90SThierry Reding hsic { 10674e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>; 10684e07ac90SThierry Reding clock-names = "trk"; 10694e07ac90SThierry Reding status = "disabled"; 10704e07ac90SThierry Reding 10714e07ac90SThierry Reding lanes { 10724e07ac90SThierry Reding hsic-0 { 10734e07ac90SThierry Reding status = "disabled"; 10744e07ac90SThierry Reding #phy-cells = <0>; 10754e07ac90SThierry Reding }; 10764e07ac90SThierry Reding 10774e07ac90SThierry Reding hsic-1 { 10784e07ac90SThierry Reding status = "disabled"; 10794e07ac90SThierry Reding #phy-cells = <0>; 10804e07ac90SThierry Reding }; 10814e07ac90SThierry Reding }; 10824e07ac90SThierry Reding }; 10834e07ac90SThierry Reding 10844e07ac90SThierry Reding pcie { 10854e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 10864e07ac90SThierry Reding clock-names = "pll"; 10874e07ac90SThierry Reding resets = <&tegra_car 205>; 10884e07ac90SThierry Reding reset-names = "phy"; 10894e07ac90SThierry Reding status = "disabled"; 10904e07ac90SThierry Reding 10914e07ac90SThierry Reding lanes { 10924e07ac90SThierry Reding pcie-0 { 10934e07ac90SThierry Reding status = "disabled"; 10944e07ac90SThierry Reding #phy-cells = <0>; 10954e07ac90SThierry Reding }; 10964e07ac90SThierry Reding 10974e07ac90SThierry Reding pcie-1 { 10984e07ac90SThierry Reding status = "disabled"; 10994e07ac90SThierry Reding #phy-cells = <0>; 11004e07ac90SThierry Reding }; 11014e07ac90SThierry Reding 11024e07ac90SThierry Reding pcie-2 { 11034e07ac90SThierry Reding status = "disabled"; 11044e07ac90SThierry Reding #phy-cells = <0>; 11054e07ac90SThierry Reding }; 11064e07ac90SThierry Reding 11074e07ac90SThierry Reding pcie-3 { 11084e07ac90SThierry Reding status = "disabled"; 11094e07ac90SThierry Reding #phy-cells = <0>; 11104e07ac90SThierry Reding }; 11114e07ac90SThierry Reding 11124e07ac90SThierry Reding pcie-4 { 11134e07ac90SThierry Reding status = "disabled"; 11144e07ac90SThierry Reding #phy-cells = <0>; 11154e07ac90SThierry Reding }; 11164e07ac90SThierry Reding 11174e07ac90SThierry Reding pcie-5 { 11184e07ac90SThierry Reding status = "disabled"; 11194e07ac90SThierry Reding #phy-cells = <0>; 11204e07ac90SThierry Reding }; 11214e07ac90SThierry Reding 11224e07ac90SThierry Reding pcie-6 { 11234e07ac90SThierry Reding status = "disabled"; 11244e07ac90SThierry Reding #phy-cells = <0>; 11254e07ac90SThierry Reding }; 11264e07ac90SThierry Reding }; 11274e07ac90SThierry Reding }; 11284e07ac90SThierry Reding 11294e07ac90SThierry Reding sata { 11304e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 11314e07ac90SThierry Reding clock-names = "pll"; 11324e07ac90SThierry Reding resets = <&tegra_car 204>; 11334e07ac90SThierry Reding reset-names = "phy"; 11344e07ac90SThierry Reding status = "disabled"; 11354e07ac90SThierry Reding 11364e07ac90SThierry Reding lanes { 11374e07ac90SThierry Reding sata-0 { 11384e07ac90SThierry Reding status = "disabled"; 11394e07ac90SThierry Reding #phy-cells = <0>; 11404e07ac90SThierry Reding }; 11414e07ac90SThierry Reding }; 11424e07ac90SThierry Reding }; 11434e07ac90SThierry Reding }; 11444e07ac90SThierry Reding 11454e07ac90SThierry Reding ports { 11464e07ac90SThierry Reding usb2-0 { 11474e07ac90SThierry Reding status = "disabled"; 11484e07ac90SThierry Reding }; 11494e07ac90SThierry Reding 11504e07ac90SThierry Reding usb2-1 { 11514e07ac90SThierry Reding status = "disabled"; 11524e07ac90SThierry Reding }; 11534e07ac90SThierry Reding 11544e07ac90SThierry Reding usb2-2 { 11554e07ac90SThierry Reding status = "disabled"; 11564e07ac90SThierry Reding }; 11574e07ac90SThierry Reding 11584e07ac90SThierry Reding usb2-3 { 11594e07ac90SThierry Reding status = "disabled"; 11604e07ac90SThierry Reding }; 11614e07ac90SThierry Reding 11624e07ac90SThierry Reding hsic-0 { 11634e07ac90SThierry Reding status = "disabled"; 11644e07ac90SThierry Reding }; 11654e07ac90SThierry Reding 11664e07ac90SThierry Reding usb3-0 { 11674e07ac90SThierry Reding status = "disabled"; 11684e07ac90SThierry Reding }; 11694e07ac90SThierry Reding 11704e07ac90SThierry Reding usb3-1 { 11714e07ac90SThierry Reding status = "disabled"; 11724e07ac90SThierry Reding }; 11734e07ac90SThierry Reding 11744e07ac90SThierry Reding usb3-2 { 11754e07ac90SThierry Reding status = "disabled"; 11764e07ac90SThierry Reding }; 11774e07ac90SThierry Reding 11784e07ac90SThierry Reding usb3-3 { 11794e07ac90SThierry Reding status = "disabled"; 11804e07ac90SThierry Reding }; 11814e07ac90SThierry Reding }; 11824e07ac90SThierry Reding }; 11834e07ac90SThierry Reding 118467bb17f6SThierry Reding mmc@700b0000 { 1185b3fa0e03SThierry Reding compatible = "nvidia,tegra210-sdhci"; 1186742af7e7SThierry Reding reg = <0x0 0x700b0000 0x0 0x200>; 1187742af7e7SThierry Reding interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1188742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC1>; 1189742af7e7SThierry Reding clock-names = "sdhci"; 1190742af7e7SThierry Reding resets = <&tegra_car 14>; 1191742af7e7SThierry Reding reset-names = "sdhci"; 11924e0f1229SSowjanya Komatineni pinctrl-names = "sdmmc-3v3", "sdmmc-1v8", 11934e0f1229SSowjanya Komatineni "sdmmc-3v3-drv", "sdmmc-1v8-drv"; 11946641af7eSAapo Vienamo pinctrl-0 = <&sdmmc1_3v3>; 11956641af7eSAapo Vienamo pinctrl-1 = <&sdmmc1_1v8>; 11964e0f1229SSowjanya Komatineni pinctrl-2 = <&sdmmc1_3v3_drv>; 11974e0f1229SSowjanya Komatineni pinctrl-3 = <&sdmmc1_1v8_drv>; 11981ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>; 11991ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>; 12001ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>; 12011ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>; 120263af8bcdSAapo Vienamo nvidia,default-tap = <0x2>; 120363af8bcdSAapo Vienamo nvidia,default-trim = <0x4>; 1204918f9671SAapo Vienamo assigned-clocks = <&tegra_car TEGRA210_CLK_SDMMC4>, 1205918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>, 1206918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4>; 1207918f9671SAapo Vienamo assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 1208918f9671SAapo Vienamo assigned-clock-rates = <200000000>, <1000000000>, <1000000000>; 1209742af7e7SThierry Reding status = "disabled"; 1210742af7e7SThierry Reding }; 1211742af7e7SThierry Reding 121267bb17f6SThierry Reding mmc@700b0200 { 1213b3fa0e03SThierry Reding compatible = "nvidia,tegra210-sdhci"; 1214742af7e7SThierry Reding reg = <0x0 0x700b0200 0x0 0x200>; 1215742af7e7SThierry Reding interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1216742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC2>; 1217742af7e7SThierry Reding clock-names = "sdhci"; 1218742af7e7SThierry Reding resets = <&tegra_car 9>; 1219742af7e7SThierry Reding reset-names = "sdhci"; 12204e0f1229SSowjanya Komatineni pinctrl-names = "sdmmc-1v8-drv"; 12214e0f1229SSowjanya Komatineni pinctrl-0 = <&sdmmc2_1v8_drv>; 12221ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x05>; 12231ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x05>; 122463af8bcdSAapo Vienamo nvidia,default-tap = <0x8>; 122563af8bcdSAapo Vienamo nvidia,default-trim = <0x0>; 1226742af7e7SThierry Reding status = "disabled"; 1227742af7e7SThierry Reding }; 1228742af7e7SThierry Reding 122967bb17f6SThierry Reding mmc@700b0400 { 1230b3fa0e03SThierry Reding compatible = "nvidia,tegra210-sdhci"; 1231742af7e7SThierry Reding reg = <0x0 0x700b0400 0x0 0x200>; 1232742af7e7SThierry Reding interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 1233742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC3>; 1234742af7e7SThierry Reding clock-names = "sdhci"; 1235742af7e7SThierry Reding resets = <&tegra_car 69>; 1236742af7e7SThierry Reding reset-names = "sdhci"; 12374e0f1229SSowjanya Komatineni pinctrl-names = "sdmmc-3v3", "sdmmc-1v8", 12384e0f1229SSowjanya Komatineni "sdmmc-3v3-drv", "sdmmc-1v8-drv"; 12396641af7eSAapo Vienamo pinctrl-0 = <&sdmmc3_3v3>; 12406641af7eSAapo Vienamo pinctrl-1 = <&sdmmc3_1v8>; 12414e0f1229SSowjanya Komatineni pinctrl-2 = <&sdmmc3_3v3_drv>; 12424e0f1229SSowjanya Komatineni pinctrl-3 = <&sdmmc3_1v8_drv>; 12431ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>; 12441ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>; 12451ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>; 12461ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>; 124763af8bcdSAapo Vienamo nvidia,default-tap = <0x3>; 124863af8bcdSAapo Vienamo nvidia,default-trim = <0x3>; 1249742af7e7SThierry Reding status = "disabled"; 1250742af7e7SThierry Reding }; 1251742af7e7SThierry Reding 125267bb17f6SThierry Reding mmc@700b0600 { 1253b3fa0e03SThierry Reding compatible = "nvidia,tegra210-sdhci"; 1254742af7e7SThierry Reding reg = <0x0 0x700b0600 0x0 0x200>; 1255742af7e7SThierry Reding interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 1256742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC4>; 1257742af7e7SThierry Reding clock-names = "sdhci"; 1258742af7e7SThierry Reding resets = <&tegra_car 15>; 1259742af7e7SThierry Reding reset-names = "sdhci"; 12604e0f1229SSowjanya Komatineni pinctrl-names = "sdmmc-3v3-drv", "sdmmc-1v8-drv"; 12614e0f1229SSowjanya Komatineni pinctrl-0 = <&sdmmc4_1v8_drv>; 12624e0f1229SSowjanya Komatineni pinctrl-1 = <&sdmmc4_1v8_drv>; 12631ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x05>; 12641ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x05>; 126563af8bcdSAapo Vienamo nvidia,default-tap = <0x8>; 126663af8bcdSAapo Vienamo nvidia,default-trim = <0x0>; 1267918f9671SAapo Vienamo assigned-clocks = <&tegra_car TEGRA210_CLK_SDMMC4>, 1268918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 1269918f9671SAapo Vienamo assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 12705879600aSAapo Vienamo nvidia,dqs-trim = <40>; 1271d5d6b468SAapo Vienamo mmc-hs400-1_8v; 1272742af7e7SThierry Reding status = "disabled"; 1273742af7e7SThierry Reding }; 1274742af7e7SThierry Reding 1275e74db5a5SNagarjuna Kristam usb@700d0000 { 1276e74db5a5SNagarjuna Kristam compatible = "nvidia,tegra210-xudc"; 1277e74db5a5SNagarjuna Kristam reg = <0x0 0x700d0000 0x0 0x8000>, 1278e74db5a5SNagarjuna Kristam <0x0 0x700d8000 0x0 0x1000>, 1279e74db5a5SNagarjuna Kristam <0x0 0x700d9000 0x0 0x1000>; 1280e74db5a5SNagarjuna Kristam reg-names = "base", "fpci", "ipfs"; 1281e74db5a5SNagarjuna Kristam interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 1282e74db5a5SNagarjuna Kristam clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>, 1283e74db5a5SNagarjuna Kristam <&tegra_car TEGRA210_CLK_XUSB_SS>, 1284e74db5a5SNagarjuna Kristam <&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>, 1285e74db5a5SNagarjuna Kristam <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, 1286e74db5a5SNagarjuna Kristam <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>; 1287e74db5a5SNagarjuna Kristam clock-names = "dev", "ss", "ss_src", "fs_src", "hs_src"; 1288e74db5a5SNagarjuna Kristam power-domains = <&pd_xusbdev>, <&pd_xusbss>; 1289e74db5a5SNagarjuna Kristam power-domain-names = "dev", "ss"; 1290e74db5a5SNagarjuna Kristam nvidia,xusb-padctl = <&padctl>; 1291e74db5a5SNagarjuna Kristam status = "disabled"; 1292e74db5a5SNagarjuna Kristam }; 1293e74db5a5SNagarjuna Kristam 1294be70771dSThierry Reding mipi: mipi@700e3000 { 1295742af7e7SThierry Reding compatible = "nvidia,tegra210-mipi"; 1296742af7e7SThierry Reding reg = <0x0 0x700e3000 0x0 0x100>; 1297742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MIPI_CAL>; 1298742af7e7SThierry Reding clock-names = "mipi-cal"; 129996d1f078SJon Hunter power-domains = <&pd_sor>; 1300742af7e7SThierry Reding #nvidia,mipi-calibrate-cells = <1>; 1301742af7e7SThierry Reding }; 1302742af7e7SThierry Reding 13032ceed593SJoseph Lo dfll: clock@70110000 { 13042ceed593SJoseph Lo compatible = "nvidia,tegra210-dfll"; 13052ceed593SJoseph Lo reg = <0 0x70110000 0 0x100>, /* DFLL control */ 13062ceed593SJoseph Lo <0 0x70110000 0 0x100>, /* I2C output control */ 13072ceed593SJoseph Lo <0 0x70110100 0 0x100>, /* Integrated I2C controller */ 13082ceed593SJoseph Lo <0 0x70110200 0 0x100>; /* Look-up table RAM */ 13092ceed593SJoseph Lo interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 13102ceed593SJoseph Lo clocks = <&tegra_car TEGRA210_CLK_DFLL_SOC>, 13112ceed593SJoseph Lo <&tegra_car TEGRA210_CLK_DFLL_REF>, 13122ceed593SJoseph Lo <&tegra_car TEGRA210_CLK_I2C5>; 13132ceed593SJoseph Lo clock-names = "soc", "ref", "i2c"; 13142ceed593SJoseph Lo resets = <&tegra_car TEGRA210_RST_DFLL_DVCO>; 13152ceed593SJoseph Lo reset-names = "dvco"; 13162ceed593SJoseph Lo #clock-cells = <0>; 13172ceed593SJoseph Lo clock-output-names = "dfllCPU_out"; 13182ceed593SJoseph Lo status = "disabled"; 13192ceed593SJoseph Lo }; 13202ceed593SJoseph Lo 13210f133090SJon Hunter aconnect@702c0000 { 13220f133090SJon Hunter compatible = "nvidia,tegra210-aconnect"; 13230f133090SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 13240f133090SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 13250f133090SJon Hunter clock-names = "ape", "apb2ape"; 13260f133090SJon Hunter power-domains = <&pd_audio>; 13270f133090SJon Hunter #address-cells = <1>; 13280f133090SJon Hunter #size-cells = <1>; 13290f133090SJon Hunter ranges = <0x702c0000 0x0 0x702c0000 0x00040000>; 13300f133090SJon Hunter status = "disabled"; 1331bcdbde43SJon Hunter 133219e61213SJon Hunter adma: dma@702e2000 { 133319e61213SJon Hunter compatible = "nvidia,tegra210-adma"; 133419e61213SJon Hunter reg = <0x702e2000 0x2000>; 133519e61213SJon Hunter interrupt-parent = <&agic>; 133619e61213SJon Hunter interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, 133719e61213SJon Hunter <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, 133819e61213SJon Hunter <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, 133919e61213SJon Hunter <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, 134019e61213SJon Hunter <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, 134119e61213SJon Hunter <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 134219e61213SJon Hunter <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, 134319e61213SJon Hunter <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, 134419e61213SJon Hunter <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 134519e61213SJon Hunter <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 134619e61213SJon Hunter <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 134719e61213SJon Hunter <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 134819e61213SJon Hunter <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 134919e61213SJon Hunter <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 135019e61213SJon Hunter <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 135119e61213SJon Hunter <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 135219e61213SJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 135319e61213SJon Hunter <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 135419e61213SJon Hunter <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 135519e61213SJon Hunter <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 135619e61213SJon Hunter <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 135719e61213SJon Hunter <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 135819e61213SJon Hunter #dma-cells = <1>; 135919e61213SJon Hunter clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; 136019e61213SJon Hunter clock-names = "d_audio"; 136119e61213SJon Hunter status = "disabled"; 136219e61213SJon Hunter }; 136319e61213SJon Hunter 1364df93557bSThierry Reding agic: interrupt-controller@702f9000 { 1365bcdbde43SJon Hunter compatible = "nvidia,tegra210-agic"; 1366bcdbde43SJon Hunter #interrupt-cells = <3>; 1367bcdbde43SJon Hunter interrupt-controller; 1368ba24eee6SJon Hunter reg = <0x702f9000 0x1000>, 1369bcdbde43SJon Hunter <0x702fa000 0x2000>; 1370bcdbde43SJon Hunter interrupts = <GIC_SPI 102 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 1371bcdbde43SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>; 1372bcdbde43SJon Hunter clock-names = "clk"; 1373bcdbde43SJon Hunter status = "disabled"; 1374bcdbde43SJon Hunter }; 13750f133090SJon Hunter }; 13760f133090SJon Hunter 1377be70771dSThierry Reding spi@70410000 { 1378742af7e7SThierry Reding compatible = "nvidia,tegra210-qspi"; 1379742af7e7SThierry Reding reg = <0x0 0x70410000 0x0 0x1000>; 1380742af7e7SThierry Reding interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 1381742af7e7SThierry Reding #address-cells = <1>; 1382742af7e7SThierry Reding #size-cells = <0>; 1383742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_QSPI>; 1384742af7e7SThierry Reding clock-names = "qspi"; 1385742af7e7SThierry Reding resets = <&tegra_car 211>; 1386742af7e7SThierry Reding reset-names = "qspi"; 1387742af7e7SThierry Reding dmas = <&apbdma 5>, <&apbdma 5>; 1388742af7e7SThierry Reding dma-names = "rx", "tx"; 1389742af7e7SThierry Reding status = "disabled"; 1390742af7e7SThierry Reding }; 1391742af7e7SThierry Reding 1392be70771dSThierry Reding usb@7d000000 { 1393742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1394742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>; 1395742af7e7SThierry Reding interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 1396742af7e7SThierry Reding phy_type = "utmi"; 1397742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>; 1398742af7e7SThierry Reding clock-names = "usb"; 1399742af7e7SThierry Reding resets = <&tegra_car 22>; 1400742af7e7SThierry Reding reset-names = "usb"; 1401742af7e7SThierry Reding nvidia,phy = <&phy1>; 1402742af7e7SThierry Reding status = "disabled"; 1403742af7e7SThierry Reding }; 1404742af7e7SThierry Reding 1405be70771dSThierry Reding phy1: usb-phy@7d000000 { 1406742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1407742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>, 1408742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1409742af7e7SThierry Reding phy_type = "utmi"; 1410742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>, 1411742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1412742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1413742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1414742af7e7SThierry Reding resets = <&tegra_car 22>, <&tegra_car 22>; 1415742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1416742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1417742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1418742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1419742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1420742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1421742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1422742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1423742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1424742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1425742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1426742af7e7SThierry Reding nvidia,has-utmi-pad-registers; 1427742af7e7SThierry Reding status = "disabled"; 1428742af7e7SThierry Reding }; 1429742af7e7SThierry Reding 1430be70771dSThierry Reding usb@7d004000 { 1431742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1432742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>; 1433742af7e7SThierry Reding interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1434742af7e7SThierry Reding phy_type = "utmi"; 1435742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>; 1436742af7e7SThierry Reding clock-names = "usb"; 1437742af7e7SThierry Reding resets = <&tegra_car 58>; 1438742af7e7SThierry Reding reset-names = "usb"; 1439742af7e7SThierry Reding nvidia,phy = <&phy2>; 1440742af7e7SThierry Reding status = "disabled"; 1441742af7e7SThierry Reding }; 1442742af7e7SThierry Reding 1443be70771dSThierry Reding phy2: usb-phy@7d004000 { 1444742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1445742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>, 1446742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1447742af7e7SThierry Reding phy_type = "utmi"; 1448742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>, 1449742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1450742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1451742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1452742af7e7SThierry Reding resets = <&tegra_car 58>, <&tegra_car 22>; 1453742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1454742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1455742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1456742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1457742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1458742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1459742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1460742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1461742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1462742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1463742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1464742af7e7SThierry Reding status = "disabled"; 1465742af7e7SThierry Reding }; 1466742af7e7SThierry Reding 1467742af7e7SThierry Reding cpus { 1468742af7e7SThierry Reding #address-cells = <1>; 1469742af7e7SThierry Reding #size-cells = <0>; 1470742af7e7SThierry Reding 1471742af7e7SThierry Reding cpu@0 { 1472742af7e7SThierry Reding device_type = "cpu"; 1473742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1474742af7e7SThierry Reding reg = <0>; 147543b9b402SJoseph Lo clocks = <&tegra_car TEGRA210_CLK_CCLK_G>, 147643b9b402SJoseph Lo <&tegra_car TEGRA210_CLK_PLL_X>, 147743b9b402SJoseph Lo <&tegra_car TEGRA210_CLK_PLL_P_OUT4>, 147843b9b402SJoseph Lo <&dfll>; 147943b9b402SJoseph Lo clock-names = "cpu_g", "pll_x", "pll_p", "dfll"; 148043b9b402SJoseph Lo clock-latency = <300000>; 1481da77c6d9SJoseph Lo cpu-idle-states = <&CPU_SLEEP>; 14826c00cac1SJoseph Lo next-level-cache = <&L2>; 1483742af7e7SThierry Reding }; 1484742af7e7SThierry Reding 1485742af7e7SThierry Reding cpu@1 { 1486742af7e7SThierry Reding device_type = "cpu"; 1487742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1488742af7e7SThierry Reding reg = <1>; 1489da77c6d9SJoseph Lo cpu-idle-states = <&CPU_SLEEP>; 14906c00cac1SJoseph Lo next-level-cache = <&L2>; 1491742af7e7SThierry Reding }; 1492742af7e7SThierry Reding 1493742af7e7SThierry Reding cpu@2 { 1494742af7e7SThierry Reding device_type = "cpu"; 1495742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1496742af7e7SThierry Reding reg = <2>; 1497da77c6d9SJoseph Lo cpu-idle-states = <&CPU_SLEEP>; 14986c00cac1SJoseph Lo next-level-cache = <&L2>; 1499742af7e7SThierry Reding }; 1500742af7e7SThierry Reding 1501742af7e7SThierry Reding cpu@3 { 1502742af7e7SThierry Reding device_type = "cpu"; 1503742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1504742af7e7SThierry Reding reg = <3>; 1505da77c6d9SJoseph Lo cpu-idle-states = <&CPU_SLEEP>; 15066c00cac1SJoseph Lo next-level-cache = <&L2>; 1507da77c6d9SJoseph Lo }; 1508da77c6d9SJoseph Lo 1509da77c6d9SJoseph Lo idle-states { 1510da77c6d9SJoseph Lo entry-method = "psci"; 1511da77c6d9SJoseph Lo 1512da77c6d9SJoseph Lo CPU_SLEEP: cpu-sleep { 1513da77c6d9SJoseph Lo compatible = "arm,idle-state"; 1514da77c6d9SJoseph Lo arm,psci-suspend-param = <0x40000007>; 1515da77c6d9SJoseph Lo entry-latency-us = <100>; 1516da77c6d9SJoseph Lo exit-latency-us = <30>; 1517da77c6d9SJoseph Lo min-residency-us = <1000>; 1518da77c6d9SJoseph Lo wakeup-latency-us = <130>; 1519da77c6d9SJoseph Lo idle-state-name = "cpu-sleep"; 1520da77c6d9SJoseph Lo status = "disabled"; 1521da77c6d9SJoseph Lo }; 1522742af7e7SThierry Reding }; 15236c00cac1SJoseph Lo 15246c00cac1SJoseph Lo L2: l2-cache { 15256c00cac1SJoseph Lo compatible = "cache"; 15266c00cac1SJoseph Lo }; 1527742af7e7SThierry Reding }; 1528742af7e7SThierry Reding 1529264064abSThierry Reding pmu { 1530264064abSThierry Reding compatible = "arm,armv8-pmuv3"; 1531264064abSThierry Reding interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, 1532264064abSThierry Reding <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, 1533264064abSThierry Reding <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>, 1534264064abSThierry Reding <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 1535264064abSThierry Reding interrupt-affinity = <&{/cpus/cpu@0} &{/cpus/cpu@1} 1536264064abSThierry Reding &{/cpus/cpu@2} &{/cpus/cpu@3}>; 1537264064abSThierry Reding }; 1538264064abSThierry Reding 1539742af7e7SThierry Reding timer { 1540742af7e7SThierry Reding compatible = "arm,armv8-timer"; 1541742af7e7SThierry Reding interrupts = <GIC_PPI 13 1542742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1543742af7e7SThierry Reding <GIC_PPI 14 1544742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1545742af7e7SThierry Reding <GIC_PPI 11 1546742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1547742af7e7SThierry Reding <GIC_PPI 10 1548742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 1549742af7e7SThierry Reding interrupt-parent = <&gic>; 15506b9e263bSThierry Reding arm,no-tick-in-suspend; 1551742af7e7SThierry Reding }; 1552e2bed1ebSWei Ni 1553e2bed1ebSWei Ni soctherm: thermal-sensor@700e2000 { 1554e2bed1ebSWei Ni compatible = "nvidia,tegra210-soctherm"; 1555644c569dSThierry Reding reg = <0x0 0x700e2000 0x0 0x600>, /* SOC_THERM reg_base */ 1556644c569dSThierry Reding <0x0 0x60006000 0x0 0x400>; /* CAR reg_base */ 1557cbd0f000SWei Ni reg-names = "soctherm-reg", "car-reg"; 155844ff822cSThierry Reding interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 155944ff822cSThierry Reding <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 156044ff822cSThierry Reding interrupt-names = "thermal", "edp"; 1561e2bed1ebSWei Ni clocks = <&tegra_car TEGRA210_CLK_TSENSOR>, 1562e2bed1ebSWei Ni <&tegra_car TEGRA210_CLK_SOC_THERM>; 1563e2bed1ebSWei Ni clock-names = "tsensor", "soctherm"; 1564e2bed1ebSWei Ni resets = <&tegra_car 78>; 1565e2bed1ebSWei Ni reset-names = "soctherm"; 1566e2bed1ebSWei Ni #thermal-sensor-cells = <1>; 1567cbd0f000SWei Ni 1568cbd0f000SWei Ni throttle-cfgs { 1569cbd0f000SWei Ni throttle_heavy: heavy { 1570cbd0f000SWei Ni nvidia,priority = <100>; 1571cbd0f000SWei Ni nvidia,cpu-throt-percent = <85>; 1572cbd0f000SWei Ni 1573cbd0f000SWei Ni #cooling-cells = <2>; 1574cbd0f000SWei Ni }; 1575cbd0f000SWei Ni }; 1576e2bed1ebSWei Ni }; 1577e2bed1ebSWei Ni 1578e2bed1ebSWei Ni thermal-zones { 1579e2bed1ebSWei Ni cpu { 1580e2bed1ebSWei Ni polling-delay-passive = <1000>; 1581e2bed1ebSWei Ni polling-delay = <0>; 1582e2bed1ebSWei Ni 1583e2bed1ebSWei Ni thermal-sensors = 1584e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; 15855e03f663SWei Ni 15865e03f663SWei Ni trips { 15875e03f663SWei Ni cpu-shutdown-trip { 15885e03f663SWei Ni temperature = <102500>; 15895e03f663SWei Ni hysteresis = <0>; 15905e03f663SWei Ni type = "critical"; 15915e03f663SWei Ni }; 1592cbd0f000SWei Ni 1593cbd0f000SWei Ni cpu_throttle_trip: throttle-trip { 1594cbd0f000SWei Ni temperature = <98500>; 1595cbd0f000SWei Ni hysteresis = <1000>; 1596cbd0f000SWei Ni type = "hot"; 1597cbd0f000SWei Ni }; 15985e03f663SWei Ni }; 15995e03f663SWei Ni 16005e03f663SWei Ni cooling-maps { 1601cbd0f000SWei Ni map0 { 1602cbd0f000SWei Ni trip = <&cpu_throttle_trip>; 1603cbd0f000SWei Ni cooling-device = <&throttle_heavy 1 1>; 1604cbd0f000SWei Ni }; 16055e03f663SWei Ni }; 1606e2bed1ebSWei Ni }; 160724fc3363SThierry Reding 1608e2bed1ebSWei Ni mem { 1609e2bed1ebSWei Ni polling-delay-passive = <0>; 1610e2bed1ebSWei Ni polling-delay = <0>; 1611e2bed1ebSWei Ni 1612e2bed1ebSWei Ni thermal-sensors = 1613e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; 16145e03f663SWei Ni 16155e03f663SWei Ni trips { 1616e12325f6SThierry Reding dram_nominal: mem-nominal-trip { 1617e12325f6SThierry Reding temperature = <50000>; 1618e12325f6SThierry Reding hysteresis = <1000>; 1619e12325f6SThierry Reding type = "passive"; 1620e12325f6SThierry Reding }; 1621e12325f6SThierry Reding 1622e12325f6SThierry Reding dram_throttle: mem-throttle-trip { 1623e12325f6SThierry Reding temperature = <70000>; 1624e12325f6SThierry Reding hysteresis = <1000>; 1625e12325f6SThierry Reding type = "active"; 1626e12325f6SThierry Reding }; 1627e12325f6SThierry Reding 16285e03f663SWei Ni mem-shutdown-trip { 16295e03f663SWei Ni temperature = <103000>; 16305e03f663SWei Ni hysteresis = <0>; 16315e03f663SWei Ni type = "critical"; 16325e03f663SWei Ni }; 16335e03f663SWei Ni }; 16345e03f663SWei Ni 16355e03f663SWei Ni cooling-maps { 1636e12325f6SThierry Reding dram-passive { 1637e12325f6SThierry Reding cooling-device = <&emc 0 0>; 1638e12325f6SThierry Reding trip = <&dram_nominal>; 1639e12325f6SThierry Reding }; 1640e12325f6SThierry Reding 1641e12325f6SThierry Reding dram-active { 1642e12325f6SThierry Reding cooling-device = <&emc 1 1>; 1643e12325f6SThierry Reding trip = <&dram_throttle>; 1644e12325f6SThierry Reding }; 16455e03f663SWei Ni }; 1646e2bed1ebSWei Ni }; 164724fc3363SThierry Reding 1648e2bed1ebSWei Ni gpu { 1649e2bed1ebSWei Ni polling-delay-passive = <1000>; 1650e2bed1ebSWei Ni polling-delay = <0>; 1651e2bed1ebSWei Ni 1652e2bed1ebSWei Ni thermal-sensors = 1653e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; 16545e03f663SWei Ni 16555e03f663SWei Ni trips { 16565e03f663SWei Ni gpu-shutdown-trip { 16575e03f663SWei Ni temperature = <103000>; 16585e03f663SWei Ni hysteresis = <0>; 16595e03f663SWei Ni type = "critical"; 16605e03f663SWei Ni }; 1661cbd0f000SWei Ni 1662cbd0f000SWei Ni gpu_throttle_trip: throttle-trip { 1663cbd0f000SWei Ni temperature = <100000>; 1664cbd0f000SWei Ni hysteresis = <1000>; 1665cbd0f000SWei Ni type = "hot"; 1666cbd0f000SWei Ni }; 16675e03f663SWei Ni }; 16685e03f663SWei Ni 16695e03f663SWei Ni cooling-maps { 1670cbd0f000SWei Ni map0 { 1671cbd0f000SWei Ni trip = <&gpu_throttle_trip>; 1672cbd0f000SWei Ni cooling-device = <&throttle_heavy 1 1>; 1673cbd0f000SWei Ni }; 16745e03f663SWei Ni }; 1675e2bed1ebSWei Ni }; 167624fc3363SThierry Reding 1677e2bed1ebSWei Ni pllx { 1678e2bed1ebSWei Ni polling-delay-passive = <0>; 1679e2bed1ebSWei Ni polling-delay = <0>; 1680e2bed1ebSWei Ni 1681e2bed1ebSWei Ni thermal-sensors = 1682e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; 16835e03f663SWei Ni 16845e03f663SWei Ni trips { 16855e03f663SWei Ni pllx-shutdown-trip { 16865e03f663SWei Ni temperature = <103000>; 16875e03f663SWei Ni hysteresis = <0>; 16885e03f663SWei Ni type = "critical"; 16895e03f663SWei Ni }; 16905e03f663SWei Ni }; 16915e03f663SWei Ni 16925e03f663SWei Ni cooling-maps { 16935e03f663SWei Ni /* 16945e03f663SWei Ni * There are currently no cooling maps, 16955e03f663SWei Ni * because there are no cooling devices. 16965e03f663SWei Ni */ 16975e03f663SWei Ni }; 1698e2bed1ebSWei Ni }; 1699e2bed1ebSWei Ni }; 1700742af7e7SThierry Reding}; 1701