1742af7e7SThierry Reding#include <dt-bindings/clock/tegra210-car.h> 2742af7e7SThierry Reding#include <dt-bindings/gpio/tegra-gpio.h> 3742af7e7SThierry Reding#include <dt-bindings/memory/tegra210-mc.h> 4742af7e7SThierry Reding#include <dt-bindings/pinctrl/pinctrl-tegra.h> 5742af7e7SThierry Reding#include <dt-bindings/interrupt-controller/arm-gic.h> 6742af7e7SThierry Reding 7742af7e7SThierry Reding/ { 8742af7e7SThierry Reding compatible = "nvidia,tegra210"; 9742af7e7SThierry Reding interrupt-parent = <&lic>; 10742af7e7SThierry Reding #address-cells = <2>; 11742af7e7SThierry Reding #size-cells = <2>; 12742af7e7SThierry Reding 13be70771dSThierry Reding host1x@50000000 { 14742af7e7SThierry Reding compatible = "nvidia,tegra210-host1x", "simple-bus"; 15742af7e7SThierry Reding reg = <0x0 0x50000000 0x0 0x00034000>; 16742af7e7SThierry Reding interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */ 17742af7e7SThierry Reding <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */ 18742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HOST1X>; 19742af7e7SThierry Reding clock-names = "host1x"; 20742af7e7SThierry Reding resets = <&tegra_car 28>; 21742af7e7SThierry Reding reset-names = "host1x"; 22742af7e7SThierry Reding 23742af7e7SThierry Reding #address-cells = <2>; 24742af7e7SThierry Reding #size-cells = <2>; 25742af7e7SThierry Reding 26742af7e7SThierry Reding ranges = <0x0 0x54000000 0x0 0x54000000 0x0 0x01000000>; 27742af7e7SThierry Reding 28be70771dSThierry Reding dpaux1: dpaux@54040000 { 29742af7e7SThierry Reding compatible = "nvidia,tegra210-dpaux"; 30742af7e7SThierry Reding reg = <0x0 0x54040000 0x0 0x00040000>; 31742af7e7SThierry Reding interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 32742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX1>, 33742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 34742af7e7SThierry Reding clock-names = "dpaux", "parent"; 35742af7e7SThierry Reding resets = <&tegra_car 207>; 36742af7e7SThierry Reding reset-names = "dpaux"; 3796d1f078SJon Hunter power-domains = <&pd_sor>; 38742af7e7SThierry Reding status = "disabled"; 3966b2d6e9SJon Hunter 4066b2d6e9SJon Hunter state_dpaux1_aux: pinmux-aux { 4166b2d6e9SJon Hunter groups = "dpaux-io"; 4266b2d6e9SJon Hunter function = "aux"; 4366b2d6e9SJon Hunter }; 4466b2d6e9SJon Hunter 4566b2d6e9SJon Hunter state_dpaux1_i2c: pinmux-i2c { 4666b2d6e9SJon Hunter groups = "dpaux-io"; 4766b2d6e9SJon Hunter function = "i2c"; 4866b2d6e9SJon Hunter }; 4966b2d6e9SJon Hunter 5066b2d6e9SJon Hunter state_dpaux1_off: pinmux-off { 5166b2d6e9SJon Hunter groups = "dpaux-io"; 5266b2d6e9SJon Hunter function = "off"; 5366b2d6e9SJon Hunter }; 5466b2d6e9SJon Hunter 5566b2d6e9SJon Hunter i2c-bus { 5666b2d6e9SJon Hunter #address-cells = <1>; 5766b2d6e9SJon Hunter #size-cells = <0>; 5866b2d6e9SJon Hunter }; 59742af7e7SThierry Reding }; 60742af7e7SThierry Reding 61be70771dSThierry Reding vi@54080000 { 62742af7e7SThierry Reding compatible = "nvidia,tegra210-vi"; 63742af7e7SThierry Reding reg = <0x0 0x54080000 0x0 0x00040000>; 64742af7e7SThierry Reding interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 65742af7e7SThierry Reding status = "disabled"; 66742af7e7SThierry Reding }; 67742af7e7SThierry Reding 68be70771dSThierry Reding tsec@54100000 { 69742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 70742af7e7SThierry Reding reg = <0x0 0x54100000 0x0 0x00040000>; 71742af7e7SThierry Reding }; 72742af7e7SThierry Reding 73be70771dSThierry Reding dc@54200000 { 74742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 75742af7e7SThierry Reding reg = <0x0 0x54200000 0x0 0x00040000>; 76742af7e7SThierry Reding interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 77742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP1>, 78742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 79742af7e7SThierry Reding clock-names = "dc", "parent"; 80742af7e7SThierry Reding resets = <&tegra_car 27>; 81742af7e7SThierry Reding reset-names = "dc"; 82742af7e7SThierry Reding 83742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DC>; 84742af7e7SThierry Reding 85742af7e7SThierry Reding nvidia,head = <0>; 86742af7e7SThierry Reding }; 87742af7e7SThierry Reding 88be70771dSThierry Reding dc@54240000 { 89742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 90742af7e7SThierry Reding reg = <0x0 0x54240000 0x0 0x00040000>; 91742af7e7SThierry Reding interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 92742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP2>, 93742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 94742af7e7SThierry Reding clock-names = "dc", "parent"; 95742af7e7SThierry Reding resets = <&tegra_car 26>; 96742af7e7SThierry Reding reset-names = "dc"; 97742af7e7SThierry Reding 98742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DCB>; 99742af7e7SThierry Reding 100742af7e7SThierry Reding nvidia,head = <1>; 101742af7e7SThierry Reding }; 102742af7e7SThierry Reding 103be70771dSThierry Reding dsi@54300000 { 104742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 105742af7e7SThierry Reding reg = <0x0 0x54300000 0x0 0x00040000>; 106742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIA>, 107742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIALP>, 108742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 109742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 110742af7e7SThierry Reding resets = <&tegra_car 48>; 111742af7e7SThierry Reding reset-names = "dsi"; 11296d1f078SJon Hunter power-domains = <&pd_sor>; 113742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x0c0>; /* DSIA & DSIB pads */ 114742af7e7SThierry Reding 115742af7e7SThierry Reding status = "disabled"; 116742af7e7SThierry Reding 117742af7e7SThierry Reding #address-cells = <1>; 118742af7e7SThierry Reding #size-cells = <0>; 119742af7e7SThierry Reding }; 120742af7e7SThierry Reding 121be70771dSThierry Reding vic@54340000 { 122742af7e7SThierry Reding compatible = "nvidia,tegra210-vic"; 123742af7e7SThierry Reding reg = <0x0 0x54340000 0x0 0x00040000>; 124742af7e7SThierry Reding status = "disabled"; 125742af7e7SThierry Reding }; 126742af7e7SThierry Reding 127be70771dSThierry Reding nvjpg@54380000 { 128742af7e7SThierry Reding compatible = "nvidia,tegra210-nvjpg"; 129742af7e7SThierry Reding reg = <0x0 0x54380000 0x0 0x00040000>; 130742af7e7SThierry Reding status = "disabled"; 131742af7e7SThierry Reding }; 132742af7e7SThierry Reding 133be70771dSThierry Reding dsi@54400000 { 134742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 135742af7e7SThierry Reding reg = <0x0 0x54400000 0x0 0x00040000>; 136742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIB>, 137742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIBLP>, 138742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 139742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 140742af7e7SThierry Reding resets = <&tegra_car 82>; 141742af7e7SThierry Reding reset-names = "dsi"; 14296d1f078SJon Hunter power-domains = <&pd_sor>; 143742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x300>; /* DSIC & DSID pads */ 144742af7e7SThierry Reding 145742af7e7SThierry Reding status = "disabled"; 146742af7e7SThierry Reding 147742af7e7SThierry Reding #address-cells = <1>; 148742af7e7SThierry Reding #size-cells = <0>; 149742af7e7SThierry Reding }; 150742af7e7SThierry Reding 151be70771dSThierry Reding nvdec@54480000 { 152742af7e7SThierry Reding compatible = "nvidia,tegra210-nvdec"; 153742af7e7SThierry Reding reg = <0x0 0x54480000 0x0 0x00040000>; 154742af7e7SThierry Reding status = "disabled"; 155742af7e7SThierry Reding }; 156742af7e7SThierry Reding 157be70771dSThierry Reding nvenc@544c0000 { 158742af7e7SThierry Reding compatible = "nvidia,tegra210-nvenc"; 159742af7e7SThierry Reding reg = <0x0 0x544c0000 0x0 0x00040000>; 160742af7e7SThierry Reding status = "disabled"; 161742af7e7SThierry Reding }; 162742af7e7SThierry Reding 163be70771dSThierry Reding tsec@54500000 { 164742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 165742af7e7SThierry Reding reg = <0x0 0x54500000 0x0 0x00040000>; 166742af7e7SThierry Reding status = "disabled"; 167742af7e7SThierry Reding }; 168742af7e7SThierry Reding 169be70771dSThierry Reding sor@54540000 { 170742af7e7SThierry Reding compatible = "nvidia,tegra210-sor"; 171742af7e7SThierry Reding reg = <0x0 0x54540000 0x0 0x00040000>; 172742af7e7SThierry Reding interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 173742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR0>, 174742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>, 175742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 176742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 177742af7e7SThierry Reding clock-names = "sor", "parent", "dp", "safe"; 178742af7e7SThierry Reding resets = <&tegra_car 182>; 179742af7e7SThierry Reding reset-names = "sor"; 18066b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_aux>; 18166b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_i2c>; 18266b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux_off>; 18366b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 18496d1f078SJon Hunter power-domains = <&pd_sor>; 185742af7e7SThierry Reding status = "disabled"; 186742af7e7SThierry Reding }; 187742af7e7SThierry Reding 188be70771dSThierry Reding sor@54580000 { 189742af7e7SThierry Reding compatible = "nvidia,tegra210-sor1"; 190742af7e7SThierry Reding reg = <0x0 0x54580000 0x0 0x00040000>; 191742af7e7SThierry Reding interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 192742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR1>, 193237d5cc7SThierry Reding <&tegra_car TEGRA210_CLK_SOR1_SRC>, 194742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D2_OUT0>, 195742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 196742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 197237d5cc7SThierry Reding clock-names = "sor", "source", "parent", "dp", "safe"; 198742af7e7SThierry Reding resets = <&tegra_car 183>; 199742af7e7SThierry Reding reset-names = "sor"; 20066b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_aux>; 20166b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_i2c>; 20266b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux1_off>; 20366b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 20496d1f078SJon Hunter power-domains = <&pd_sor>; 205742af7e7SThierry Reding status = "disabled"; 206742af7e7SThierry Reding }; 207742af7e7SThierry Reding 208be70771dSThierry Reding dpaux: dpaux@545c0000 { 209742af7e7SThierry Reding compatible = "nvidia,tegra124-dpaux"; 210742af7e7SThierry Reding reg = <0x0 0x545c0000 0x0 0x00040000>; 211742af7e7SThierry Reding interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 212742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX>, 213742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 214742af7e7SThierry Reding clock-names = "dpaux", "parent"; 215742af7e7SThierry Reding resets = <&tegra_car 181>; 216742af7e7SThierry Reding reset-names = "dpaux"; 21796d1f078SJon Hunter power-domains = <&pd_sor>; 218742af7e7SThierry Reding status = "disabled"; 21966b2d6e9SJon Hunter 22066b2d6e9SJon Hunter state_dpaux_aux: pinmux-aux { 22166b2d6e9SJon Hunter groups = "dpaux-io"; 22266b2d6e9SJon Hunter function = "aux"; 22366b2d6e9SJon Hunter }; 22466b2d6e9SJon Hunter 22566b2d6e9SJon Hunter state_dpaux_i2c: pinmux-i2c { 22666b2d6e9SJon Hunter groups = "dpaux-io"; 22766b2d6e9SJon Hunter function = "i2c"; 22866b2d6e9SJon Hunter }; 22966b2d6e9SJon Hunter 23066b2d6e9SJon Hunter state_dpaux_off: pinmux-off { 23166b2d6e9SJon Hunter groups = "dpaux-io"; 23266b2d6e9SJon Hunter function = "off"; 23366b2d6e9SJon Hunter }; 23466b2d6e9SJon Hunter 23566b2d6e9SJon Hunter i2c-bus { 23666b2d6e9SJon Hunter #address-cells = <1>; 23766b2d6e9SJon Hunter #size-cells = <0>; 23866b2d6e9SJon Hunter }; 239742af7e7SThierry Reding }; 240742af7e7SThierry Reding 241be70771dSThierry Reding isp@54600000 { 242742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 243742af7e7SThierry Reding reg = <0x0 0x54600000 0x0 0x00040000>; 244742af7e7SThierry Reding interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 245742af7e7SThierry Reding status = "disabled"; 246742af7e7SThierry Reding }; 247742af7e7SThierry Reding 248be70771dSThierry Reding isp@54680000 { 249742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 250742af7e7SThierry Reding reg = <0x0 0x54680000 0x0 0x00040000>; 251742af7e7SThierry Reding interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 252742af7e7SThierry Reding status = "disabled"; 253742af7e7SThierry Reding }; 254742af7e7SThierry Reding 255be70771dSThierry Reding i2c@546c0000 { 256742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c-vi"; 257742af7e7SThierry Reding reg = <0x0 0x546c0000 0x0 0x00040000>; 258742af7e7SThierry Reding interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 259742af7e7SThierry Reding status = "disabled"; 260742af7e7SThierry Reding }; 261742af7e7SThierry Reding }; 262742af7e7SThierry Reding 263be70771dSThierry Reding gic: interrupt-controller@50041000 { 264742af7e7SThierry Reding compatible = "arm,gic-400"; 265742af7e7SThierry Reding #interrupt-cells = <3>; 266742af7e7SThierry Reding interrupt-controller; 267742af7e7SThierry Reding reg = <0x0 0x50041000 0x0 0x1000>, 268742af7e7SThierry Reding <0x0 0x50042000 0x0 0x2000>, 269742af7e7SThierry Reding <0x0 0x50044000 0x0 0x2000>, 270742af7e7SThierry Reding <0x0 0x50046000 0x0 0x2000>; 271742af7e7SThierry Reding interrupts = <GIC_PPI 9 272742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 273742af7e7SThierry Reding interrupt-parent = <&gic>; 274742af7e7SThierry Reding }; 275742af7e7SThierry Reding 276be70771dSThierry Reding gpu@57000000 { 277742af7e7SThierry Reding compatible = "nvidia,gm20b"; 278742af7e7SThierry Reding reg = <0x0 0x57000000 0x0 0x01000000>, 279742af7e7SThierry Reding <0x0 0x58000000 0x0 0x01000000>; 280742af7e7SThierry Reding interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 281742af7e7SThierry Reding <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 282742af7e7SThierry Reding interrupt-names = "stall", "nonstall"; 283742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_GPU>, 2844a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_P_OUT5>, 2854a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_G_REF>; 2864a0778e9SAlexandre Courbot clock-names = "gpu", "pwr", "ref"; 287742af7e7SThierry Reding resets = <&tegra_car 184>; 288742af7e7SThierry Reding reset-names = "gpu"; 28930f949bcSAlexandre Courbot 29030f949bcSAlexandre Courbot iommus = <&mc TEGRA_SWGROUP_GPU>; 29130f949bcSAlexandre Courbot 292742af7e7SThierry Reding status = "disabled"; 293742af7e7SThierry Reding }; 294742af7e7SThierry Reding 295be70771dSThierry Reding lic: interrupt-controller@60004000 { 296742af7e7SThierry Reding compatible = "nvidia,tegra210-ictlr"; 297742af7e7SThierry Reding reg = <0x0 0x60004000 0x0 0x40>, /* primary controller */ 298742af7e7SThierry Reding <0x0 0x60004100 0x0 0x40>, /* secondary controller */ 299742af7e7SThierry Reding <0x0 0x60004200 0x0 0x40>, /* tertiary controller */ 300742af7e7SThierry Reding <0x0 0x60004300 0x0 0x40>, /* quaternary controller */ 301742af7e7SThierry Reding <0x0 0x60004400 0x0 0x40>, /* quinary controller */ 302742af7e7SThierry Reding <0x0 0x60004500 0x0 0x40>; /* senary controller */ 303742af7e7SThierry Reding interrupt-controller; 304742af7e7SThierry Reding #interrupt-cells = <3>; 305742af7e7SThierry Reding interrupt-parent = <&gic>; 306742af7e7SThierry Reding }; 307742af7e7SThierry Reding 308be70771dSThierry Reding timer@60005000 { 309742af7e7SThierry Reding compatible = "nvidia,tegra210-timer", "nvidia,tegra20-timer"; 310742af7e7SThierry Reding reg = <0x0 0x60005000 0x0 0x400>; 311742af7e7SThierry Reding interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 312742af7e7SThierry Reding <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 313742af7e7SThierry Reding <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 314742af7e7SThierry Reding <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 315742af7e7SThierry Reding <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 316742af7e7SThierry Reding <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 317742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_TIMER>; 318742af7e7SThierry Reding clock-names = "timer"; 319742af7e7SThierry Reding }; 320742af7e7SThierry Reding 321be70771dSThierry Reding tegra_car: clock@60006000 { 322742af7e7SThierry Reding compatible = "nvidia,tegra210-car"; 323742af7e7SThierry Reding reg = <0x0 0x60006000 0x0 0x1000>; 324742af7e7SThierry Reding #clock-cells = <1>; 325742af7e7SThierry Reding #reset-cells = <1>; 326742af7e7SThierry Reding }; 327742af7e7SThierry Reding 328be70771dSThierry Reding flow-controller@60007000 { 329742af7e7SThierry Reding compatible = "nvidia,tegra210-flowctrl"; 330742af7e7SThierry Reding reg = <0x0 0x60007000 0x0 0x1000>; 331742af7e7SThierry Reding }; 332742af7e7SThierry Reding 333be70771dSThierry Reding gpio: gpio@6000d000 { 33401665512SStephen Warren compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio"; 335742af7e7SThierry Reding reg = <0x0 0x6000d000 0x0 0x1000>; 336742af7e7SThierry Reding interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 337742af7e7SThierry Reding <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 338742af7e7SThierry Reding <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 339742af7e7SThierry Reding <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 340742af7e7SThierry Reding <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 341742af7e7SThierry Reding <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 342742af7e7SThierry Reding <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 343742af7e7SThierry Reding <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 344742af7e7SThierry Reding #gpio-cells = <2>; 345742af7e7SThierry Reding gpio-controller; 346742af7e7SThierry Reding #interrupt-cells = <2>; 347742af7e7SThierry Reding interrupt-controller; 348742af7e7SThierry Reding }; 349742af7e7SThierry Reding 350be70771dSThierry Reding apbdma: dma@60020000 { 351742af7e7SThierry Reding compatible = "nvidia,tegra210-apbdma", "nvidia,tegra148-apbdma"; 352742af7e7SThierry Reding reg = <0x0 0x60020000 0x0 0x1400>; 353742af7e7SThierry Reding interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 354742af7e7SThierry Reding <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 355742af7e7SThierry Reding <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 356742af7e7SThierry Reding <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 357742af7e7SThierry Reding <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 358742af7e7SThierry Reding <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 359742af7e7SThierry Reding <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 360742af7e7SThierry Reding <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 361742af7e7SThierry Reding <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 362742af7e7SThierry Reding <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 363742af7e7SThierry Reding <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 364742af7e7SThierry Reding <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 365742af7e7SThierry Reding <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 366742af7e7SThierry Reding <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 367742af7e7SThierry Reding <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 368742af7e7SThierry Reding <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, 369742af7e7SThierry Reding <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 370742af7e7SThierry Reding <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 371742af7e7SThierry Reding <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 372742af7e7SThierry Reding <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 373742af7e7SThierry Reding <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 374742af7e7SThierry Reding <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, 375742af7e7SThierry Reding <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, 376742af7e7SThierry Reding <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 377742af7e7SThierry Reding <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 378742af7e7SThierry Reding <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 379742af7e7SThierry Reding <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 380742af7e7SThierry Reding <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>, 381742af7e7SThierry Reding <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, 382742af7e7SThierry Reding <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, 383742af7e7SThierry Reding <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 384742af7e7SThierry Reding <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 385742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_APBDMA>; 386742af7e7SThierry Reding clock-names = "dma"; 387742af7e7SThierry Reding resets = <&tegra_car 34>; 388742af7e7SThierry Reding reset-names = "dma"; 389742af7e7SThierry Reding #dma-cells = <1>; 390742af7e7SThierry Reding }; 391742af7e7SThierry Reding 392be70771dSThierry Reding apbmisc@70000800 { 393742af7e7SThierry Reding compatible = "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc"; 394742af7e7SThierry Reding reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */ 395742af7e7SThierry Reding <0x0 0x7000e864 0x0 0x04>; /* Strapping options */ 396742af7e7SThierry Reding }; 397742af7e7SThierry Reding 398be70771dSThierry Reding pinmux: pinmux@700008d4 { 399742af7e7SThierry Reding compatible = "nvidia,tegra210-pinmux"; 400742af7e7SThierry Reding reg = <0x0 0x700008d4 0x0 0x29c>, /* Pad control registers */ 401742af7e7SThierry Reding <0x0 0x70003000 0x0 0x294>; /* Mux registers */ 402742af7e7SThierry Reding }; 403742af7e7SThierry Reding 404742af7e7SThierry Reding /* 405742af7e7SThierry Reding * There are two serial driver i.e. 8250 based simple serial 406742af7e7SThierry Reding * driver and APB DMA based serial driver for higher baudrate 407ef769e32SAdam Buchbinder * and performance. To enable the 8250 based driver, the compatible 408742af7e7SThierry Reding * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable 40968cd8b2eSThierry Reding * the APB DMA based serial driver, the compatible is 410742af7e7SThierry Reding * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart". 411742af7e7SThierry Reding */ 412be70771dSThierry Reding uarta: serial@70006000 { 413742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 414742af7e7SThierry Reding reg = <0x0 0x70006000 0x0 0x40>; 415742af7e7SThierry Reding reg-shift = <2>; 416742af7e7SThierry Reding interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 417742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTA>; 418742af7e7SThierry Reding clock-names = "serial"; 419742af7e7SThierry Reding resets = <&tegra_car 6>; 420742af7e7SThierry Reding reset-names = "serial"; 421742af7e7SThierry Reding dmas = <&apbdma 8>, <&apbdma 8>; 422742af7e7SThierry Reding dma-names = "rx", "tx"; 423742af7e7SThierry Reding status = "disabled"; 424742af7e7SThierry Reding }; 425742af7e7SThierry Reding 426be70771dSThierry Reding uartb: serial@70006040 { 427742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 428742af7e7SThierry Reding reg = <0x0 0x70006040 0x0 0x40>; 429742af7e7SThierry Reding reg-shift = <2>; 430742af7e7SThierry Reding interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 431742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTB>; 432742af7e7SThierry Reding clock-names = "serial"; 433742af7e7SThierry Reding resets = <&tegra_car 7>; 434742af7e7SThierry Reding reset-names = "serial"; 435742af7e7SThierry Reding dmas = <&apbdma 9>, <&apbdma 9>; 436742af7e7SThierry Reding dma-names = "rx", "tx"; 437742af7e7SThierry Reding status = "disabled"; 438742af7e7SThierry Reding }; 439742af7e7SThierry Reding 440be70771dSThierry Reding uartc: serial@70006200 { 441742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 442742af7e7SThierry Reding reg = <0x0 0x70006200 0x0 0x40>; 443742af7e7SThierry Reding reg-shift = <2>; 444742af7e7SThierry Reding interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 445742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTC>; 446742af7e7SThierry Reding clock-names = "serial"; 447742af7e7SThierry Reding resets = <&tegra_car 55>; 448742af7e7SThierry Reding reset-names = "serial"; 449742af7e7SThierry Reding dmas = <&apbdma 10>, <&apbdma 10>; 450742af7e7SThierry Reding dma-names = "rx", "tx"; 451742af7e7SThierry Reding status = "disabled"; 452742af7e7SThierry Reding }; 453742af7e7SThierry Reding 454be70771dSThierry Reding uartd: serial@70006300 { 455742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 456742af7e7SThierry Reding reg = <0x0 0x70006300 0x0 0x40>; 457742af7e7SThierry Reding reg-shift = <2>; 458742af7e7SThierry Reding interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 459742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTD>; 460742af7e7SThierry Reding clock-names = "serial"; 461742af7e7SThierry Reding resets = <&tegra_car 65>; 462742af7e7SThierry Reding reset-names = "serial"; 463742af7e7SThierry Reding dmas = <&apbdma 19>, <&apbdma 19>; 464742af7e7SThierry Reding dma-names = "rx", "tx"; 465742af7e7SThierry Reding status = "disabled"; 466742af7e7SThierry Reding }; 467742af7e7SThierry Reding 468be70771dSThierry Reding pwm: pwm@7000a000 { 469742af7e7SThierry Reding compatible = "nvidia,tegra210-pwm", "nvidia,tegra20-pwm"; 470742af7e7SThierry Reding reg = <0x0 0x7000a000 0x0 0x100>; 471742af7e7SThierry Reding #pwm-cells = <2>; 472742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PWM>; 473742af7e7SThierry Reding clock-names = "pwm"; 474742af7e7SThierry Reding resets = <&tegra_car 17>; 475742af7e7SThierry Reding reset-names = "pwm"; 476742af7e7SThierry Reding status = "disabled"; 477742af7e7SThierry Reding }; 478742af7e7SThierry Reding 479be70771dSThierry Reding i2c@7000c000 { 480742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 481742af7e7SThierry Reding reg = <0x0 0x7000c000 0x0 0x100>; 482742af7e7SThierry Reding interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 483742af7e7SThierry Reding #address-cells = <1>; 484742af7e7SThierry Reding #size-cells = <0>; 485742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C1>; 486742af7e7SThierry Reding clock-names = "div-clk"; 487742af7e7SThierry Reding resets = <&tegra_car 12>; 488742af7e7SThierry Reding reset-names = "i2c"; 489742af7e7SThierry Reding dmas = <&apbdma 21>, <&apbdma 21>; 490742af7e7SThierry Reding dma-names = "rx", "tx"; 491742af7e7SThierry Reding status = "disabled"; 492742af7e7SThierry Reding }; 493742af7e7SThierry Reding 494be70771dSThierry Reding i2c@7000c400 { 495742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 496742af7e7SThierry Reding reg = <0x0 0x7000c400 0x0 0x100>; 497742af7e7SThierry Reding interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 498742af7e7SThierry Reding #address-cells = <1>; 499742af7e7SThierry Reding #size-cells = <0>; 500742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C2>; 501742af7e7SThierry Reding clock-names = "div-clk"; 502742af7e7SThierry Reding resets = <&tegra_car 54>; 503742af7e7SThierry Reding reset-names = "i2c"; 504742af7e7SThierry Reding dmas = <&apbdma 22>, <&apbdma 22>; 505742af7e7SThierry Reding dma-names = "rx", "tx"; 506742af7e7SThierry Reding status = "disabled"; 507742af7e7SThierry Reding }; 508742af7e7SThierry Reding 509be70771dSThierry Reding i2c@7000c500 { 510742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 511742af7e7SThierry Reding reg = <0x0 0x7000c500 0x0 0x100>; 512742af7e7SThierry Reding interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 513742af7e7SThierry Reding #address-cells = <1>; 514742af7e7SThierry Reding #size-cells = <0>; 515742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C3>; 516742af7e7SThierry Reding clock-names = "div-clk"; 517742af7e7SThierry Reding resets = <&tegra_car 67>; 518742af7e7SThierry Reding reset-names = "i2c"; 519742af7e7SThierry Reding dmas = <&apbdma 23>, <&apbdma 23>; 520742af7e7SThierry Reding dma-names = "rx", "tx"; 521742af7e7SThierry Reding status = "disabled"; 522742af7e7SThierry Reding }; 523742af7e7SThierry Reding 524be70771dSThierry Reding i2c@7000c700 { 525742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 526742af7e7SThierry Reding reg = <0x0 0x7000c700 0x0 0x100>; 527742af7e7SThierry Reding interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 528742af7e7SThierry Reding #address-cells = <1>; 529742af7e7SThierry Reding #size-cells = <0>; 530742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C4>; 531742af7e7SThierry Reding clock-names = "div-clk"; 532742af7e7SThierry Reding resets = <&tegra_car 103>; 533742af7e7SThierry Reding reset-names = "i2c"; 534742af7e7SThierry Reding dmas = <&apbdma 26>, <&apbdma 26>; 535742af7e7SThierry Reding dma-names = "rx", "tx"; 53666b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_i2c>; 53766b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_off>; 53866b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 539742af7e7SThierry Reding status = "disabled"; 540742af7e7SThierry Reding }; 541742af7e7SThierry Reding 542be70771dSThierry Reding i2c@7000d000 { 543742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 544742af7e7SThierry Reding reg = <0x0 0x7000d000 0x0 0x100>; 545742af7e7SThierry Reding interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 546742af7e7SThierry Reding #address-cells = <1>; 547742af7e7SThierry Reding #size-cells = <0>; 548742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C5>; 549742af7e7SThierry Reding clock-names = "div-clk"; 550742af7e7SThierry Reding resets = <&tegra_car 47>; 551742af7e7SThierry Reding reset-names = "i2c"; 552742af7e7SThierry Reding dmas = <&apbdma 24>, <&apbdma 24>; 553742af7e7SThierry Reding dma-names = "rx", "tx"; 554742af7e7SThierry Reding status = "disabled"; 555742af7e7SThierry Reding }; 556742af7e7SThierry Reding 557be70771dSThierry Reding i2c@7000d100 { 558742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 559742af7e7SThierry Reding reg = <0x0 0x7000d100 0x0 0x100>; 560742af7e7SThierry Reding interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 561742af7e7SThierry Reding #address-cells = <1>; 562742af7e7SThierry Reding #size-cells = <0>; 563742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C6>; 564742af7e7SThierry Reding clock-names = "div-clk"; 565742af7e7SThierry Reding resets = <&tegra_car 166>; 566742af7e7SThierry Reding reset-names = "i2c"; 567742af7e7SThierry Reding dmas = <&apbdma 30>, <&apbdma 30>; 568742af7e7SThierry Reding dma-names = "rx", "tx"; 56966b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_i2c>; 57066b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_off>; 57166b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 572742af7e7SThierry Reding status = "disabled"; 573742af7e7SThierry Reding }; 574742af7e7SThierry Reding 575be70771dSThierry Reding spi@7000d400 { 576742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 577742af7e7SThierry Reding reg = <0x0 0x7000d400 0x0 0x200>; 578742af7e7SThierry Reding interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 579742af7e7SThierry Reding #address-cells = <1>; 580742af7e7SThierry Reding #size-cells = <0>; 581742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC1>; 582742af7e7SThierry Reding clock-names = "spi"; 583742af7e7SThierry Reding resets = <&tegra_car 41>; 584742af7e7SThierry Reding reset-names = "spi"; 585742af7e7SThierry Reding dmas = <&apbdma 15>, <&apbdma 15>; 586742af7e7SThierry Reding dma-names = "rx", "tx"; 587742af7e7SThierry Reding status = "disabled"; 588742af7e7SThierry Reding }; 589742af7e7SThierry Reding 590be70771dSThierry Reding spi@7000d600 { 591742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 592742af7e7SThierry Reding reg = <0x0 0x7000d600 0x0 0x200>; 593742af7e7SThierry Reding interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 594742af7e7SThierry Reding #address-cells = <1>; 595742af7e7SThierry Reding #size-cells = <0>; 596742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC2>; 597742af7e7SThierry Reding clock-names = "spi"; 598742af7e7SThierry Reding resets = <&tegra_car 44>; 599742af7e7SThierry Reding reset-names = "spi"; 600742af7e7SThierry Reding dmas = <&apbdma 16>, <&apbdma 16>; 601742af7e7SThierry Reding dma-names = "rx", "tx"; 602742af7e7SThierry Reding status = "disabled"; 603742af7e7SThierry Reding }; 604742af7e7SThierry Reding 605be70771dSThierry Reding spi@7000d800 { 606742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 607742af7e7SThierry Reding reg = <0x0 0x7000d800 0x0 0x200>; 608742af7e7SThierry Reding interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 609742af7e7SThierry Reding #address-cells = <1>; 610742af7e7SThierry Reding #size-cells = <0>; 611742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC3>; 612742af7e7SThierry Reding clock-names = "spi"; 613742af7e7SThierry Reding resets = <&tegra_car 46>; 614742af7e7SThierry Reding reset-names = "spi"; 615742af7e7SThierry Reding dmas = <&apbdma 17>, <&apbdma 17>; 616742af7e7SThierry Reding dma-names = "rx", "tx"; 617742af7e7SThierry Reding status = "disabled"; 618742af7e7SThierry Reding }; 619742af7e7SThierry Reding 620be70771dSThierry Reding spi@7000da00 { 621742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 622742af7e7SThierry Reding reg = <0x0 0x7000da00 0x0 0x200>; 623742af7e7SThierry Reding interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 624742af7e7SThierry Reding #address-cells = <1>; 625742af7e7SThierry Reding #size-cells = <0>; 626742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC4>; 627742af7e7SThierry Reding clock-names = "spi"; 628742af7e7SThierry Reding resets = <&tegra_car 68>; 629742af7e7SThierry Reding reset-names = "spi"; 630742af7e7SThierry Reding dmas = <&apbdma 18>, <&apbdma 18>; 631742af7e7SThierry Reding dma-names = "rx", "tx"; 632742af7e7SThierry Reding status = "disabled"; 633742af7e7SThierry Reding }; 634742af7e7SThierry Reding 635be70771dSThierry Reding rtc@7000e000 { 636742af7e7SThierry Reding compatible = "nvidia,tegra210-rtc", "nvidia,tegra20-rtc"; 637742af7e7SThierry Reding reg = <0x0 0x7000e000 0x0 0x100>; 638742af7e7SThierry Reding interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 639742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_RTC>; 640742af7e7SThierry Reding clock-names = "rtc"; 641742af7e7SThierry Reding }; 642742af7e7SThierry Reding 643be70771dSThierry Reding pmc: pmc@7000e400 { 644742af7e7SThierry Reding compatible = "nvidia,tegra210-pmc"; 645742af7e7SThierry Reding reg = <0x0 0x7000e400 0x0 0x400>; 646742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; 647742af7e7SThierry Reding clock-names = "pclk", "clk32k_in"; 648c2b82445SJon Hunter 649c2b82445SJon Hunter powergates { 650c2b82445SJon Hunter pd_audio: aud { 651c2b82445SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 652c2b82445SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 653c2b82445SJon Hunter resets = <&tegra_car 198>; 654c2b82445SJon Hunter #power-domain-cells = <0>; 655c2b82445SJon Hunter }; 656241f02baSJon Hunter 65796d1f078SJon Hunter pd_sor: sor { 65896d1f078SJon Hunter clocks = <&tegra_car TEGRA210_CLK_SOR0>, 65996d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 66096d1f078SJon Hunter <&tegra_car TEGRA210_CLK_CSI>, 66196d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 66296d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 66396d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 66496d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 66596d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 66696d1f078SJon Hunter resets = <&tegra_car TEGRA210_CLK_SOR0>, 66796d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 66896d1f078SJon Hunter <&tegra_car TEGRA210_CLK_CSI>, 66996d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 67096d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 67196d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 67296d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 67396d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 67496d1f078SJon Hunter #power-domain-cells = <0>; 67596d1f078SJon Hunter }; 67696d1f078SJon Hunter 677241f02baSJon Hunter pd_xusbss: xusba { 678241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>; 679241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_SS>; 680241f02baSJon Hunter #power-domain-cells = <0>; 681241f02baSJon Hunter }; 682241f02baSJon Hunter 683241f02baSJon Hunter pd_xusbdev: xusbb { 684241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>; 685241f02baSJon Hunter resets = <&tegra_car 95>; 686241f02baSJon Hunter #power-domain-cells = <0>; 687241f02baSJon Hunter }; 688241f02baSJon Hunter 689241f02baSJon Hunter pd_xusbhost: xusbc { 690241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 691241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 692241f02baSJon Hunter #power-domain-cells = <0>; 693241f02baSJon Hunter }; 694c2b82445SJon Hunter }; 695742af7e7SThierry Reding }; 696742af7e7SThierry Reding 697be70771dSThierry Reding fuse@7000f800 { 698742af7e7SThierry Reding compatible = "nvidia,tegra210-efuse"; 699742af7e7SThierry Reding reg = <0x0 0x7000f800 0x0 0x400>; 700742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_FUSE>; 701742af7e7SThierry Reding clock-names = "fuse"; 702742af7e7SThierry Reding resets = <&tegra_car 39>; 703742af7e7SThierry Reding reset-names = "fuse"; 704742af7e7SThierry Reding }; 705742af7e7SThierry Reding 706be70771dSThierry Reding mc: memory-controller@70019000 { 707742af7e7SThierry Reding compatible = "nvidia,tegra210-mc"; 708742af7e7SThierry Reding reg = <0x0 0x70019000 0x0 0x1000>; 709742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MC>; 710742af7e7SThierry Reding clock-names = "mc"; 711742af7e7SThierry Reding 712742af7e7SThierry Reding interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 713742af7e7SThierry Reding 714742af7e7SThierry Reding #iommu-cells = <1>; 715742af7e7SThierry Reding }; 716742af7e7SThierry Reding 717be70771dSThierry Reding hda@70030000 { 718742af7e7SThierry Reding compatible = "nvidia,tegra210-hda", "nvidia,tegra30-hda"; 719742af7e7SThierry Reding reg = <0x0 0x70030000 0x0 0x10000>; 720742af7e7SThierry Reding interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 721742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HDA>, 722742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2HDMI>, 723742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2CODEC_2X>; 724742af7e7SThierry Reding clock-names = "hda", "hda2hdmi", "hda2codec_2x"; 725742af7e7SThierry Reding resets = <&tegra_car 125>, /* hda */ 726742af7e7SThierry Reding <&tegra_car 128>, /* hda2hdmi */ 727742af7e7SThierry Reding <&tegra_car 111>; /* hda2codec_2x */ 728742af7e7SThierry Reding reset-names = "hda", "hda2hdmi", "hda2codec_2x"; 729742af7e7SThierry Reding status = "disabled"; 730742af7e7SThierry Reding }; 731742af7e7SThierry Reding 732e7a99ac2SThierry Reding usb@70090000 { 733e7a99ac2SThierry Reding compatible = "nvidia,tegra210-xusb"; 734e7a99ac2SThierry Reding reg = <0x0 0x70090000 0x0 0x8000>, 735e7a99ac2SThierry Reding <0x0 0x70098000 0x0 0x1000>, 736e7a99ac2SThierry Reding <0x0 0x70099000 0x0 0x1000>; 737e7a99ac2SThierry Reding reg-names = "hcd", "fpci", "ipfs"; 738e7a99ac2SThierry Reding 739e7a99ac2SThierry Reding interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 7409168e1dbSJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 741e7a99ac2SThierry Reding 742e7a99ac2SThierry Reding clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>, 743e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>, 744e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>, 745e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS>, 746e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>, 747e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>, 748e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, 749e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, 750e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U_480M>, 751e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_CLK_M>, 752e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>; 753e7a99ac2SThierry Reding clock-names = "xusb_host", "xusb_host_src", 754e7a99ac2SThierry Reding "xusb_falcon_src", "xusb_ss", 755e7a99ac2SThierry Reding "xusb_ss_div2", "xusb_ss_src", 756e7a99ac2SThierry Reding "xusb_hs_src", "xusb_fs_src", 757e7a99ac2SThierry Reding "pll_u_480m", "clk_m", "pll_e"; 758e7a99ac2SThierry Reding resets = <&tegra_car 89>, <&tegra_car 156>, 759e7a99ac2SThierry Reding <&tegra_car 143>; 760e7a99ac2SThierry Reding reset-names = "xusb_host", "xusb_ss", "xusb_src"; 761e7a99ac2SThierry Reding 762e7a99ac2SThierry Reding nvidia,xusb-padctl = <&padctl>; 763e7a99ac2SThierry Reding 764e7a99ac2SThierry Reding status = "disabled"; 765e7a99ac2SThierry Reding }; 766e7a99ac2SThierry Reding 7674e07ac90SThierry Reding padctl: padctl@7009f000 { 7684e07ac90SThierry Reding compatible = "nvidia,tegra210-xusb-padctl"; 7694e07ac90SThierry Reding reg = <0x0 0x7009f000 0x0 0x1000>; 7704e07ac90SThierry Reding resets = <&tegra_car 142>; 7714e07ac90SThierry Reding reset-names = "padctl"; 7724e07ac90SThierry Reding 7734e07ac90SThierry Reding status = "disabled"; 7744e07ac90SThierry Reding 7754e07ac90SThierry Reding pads { 7764e07ac90SThierry Reding usb2 { 7774e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>; 7784e07ac90SThierry Reding clock-names = "trk"; 7794e07ac90SThierry Reding status = "disabled"; 7804e07ac90SThierry Reding 7814e07ac90SThierry Reding lanes { 7824e07ac90SThierry Reding usb2-0 { 7834e07ac90SThierry Reding status = "disabled"; 7844e07ac90SThierry Reding #phy-cells = <0>; 7854e07ac90SThierry Reding }; 7864e07ac90SThierry Reding 7874e07ac90SThierry Reding usb2-1 { 7884e07ac90SThierry Reding status = "disabled"; 7894e07ac90SThierry Reding #phy-cells = <0>; 7904e07ac90SThierry Reding }; 7914e07ac90SThierry Reding 7924e07ac90SThierry Reding usb2-2 { 7934e07ac90SThierry Reding status = "disabled"; 7944e07ac90SThierry Reding #phy-cells = <0>; 7954e07ac90SThierry Reding }; 7964e07ac90SThierry Reding 7974e07ac90SThierry Reding usb2-3 { 7984e07ac90SThierry Reding status = "disabled"; 7994e07ac90SThierry Reding #phy-cells = <0>; 8004e07ac90SThierry Reding }; 8014e07ac90SThierry Reding }; 8024e07ac90SThierry Reding }; 8034e07ac90SThierry Reding 8044e07ac90SThierry Reding hsic { 8054e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>; 8064e07ac90SThierry Reding clock-names = "trk"; 8074e07ac90SThierry Reding status = "disabled"; 8084e07ac90SThierry Reding 8094e07ac90SThierry Reding lanes { 8104e07ac90SThierry Reding hsic-0 { 8114e07ac90SThierry Reding status = "disabled"; 8124e07ac90SThierry Reding #phy-cells = <0>; 8134e07ac90SThierry Reding }; 8144e07ac90SThierry Reding 8154e07ac90SThierry Reding hsic-1 { 8164e07ac90SThierry Reding status = "disabled"; 8174e07ac90SThierry Reding #phy-cells = <0>; 8184e07ac90SThierry Reding }; 8194e07ac90SThierry Reding }; 8204e07ac90SThierry Reding }; 8214e07ac90SThierry Reding 8224e07ac90SThierry Reding pcie { 8234e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 8244e07ac90SThierry Reding clock-names = "pll"; 8254e07ac90SThierry Reding resets = <&tegra_car 205>; 8264e07ac90SThierry Reding reset-names = "phy"; 8274e07ac90SThierry Reding status = "disabled"; 8284e07ac90SThierry Reding 8294e07ac90SThierry Reding lanes { 8304e07ac90SThierry Reding pcie-0 { 8314e07ac90SThierry Reding status = "disabled"; 8324e07ac90SThierry Reding #phy-cells = <0>; 8334e07ac90SThierry Reding }; 8344e07ac90SThierry Reding 8354e07ac90SThierry Reding pcie-1 { 8364e07ac90SThierry Reding status = "disabled"; 8374e07ac90SThierry Reding #phy-cells = <0>; 8384e07ac90SThierry Reding }; 8394e07ac90SThierry Reding 8404e07ac90SThierry Reding pcie-2 { 8414e07ac90SThierry Reding status = "disabled"; 8424e07ac90SThierry Reding #phy-cells = <0>; 8434e07ac90SThierry Reding }; 8444e07ac90SThierry Reding 8454e07ac90SThierry Reding pcie-3 { 8464e07ac90SThierry Reding status = "disabled"; 8474e07ac90SThierry Reding #phy-cells = <0>; 8484e07ac90SThierry Reding }; 8494e07ac90SThierry Reding 8504e07ac90SThierry Reding pcie-4 { 8514e07ac90SThierry Reding status = "disabled"; 8524e07ac90SThierry Reding #phy-cells = <0>; 8534e07ac90SThierry Reding }; 8544e07ac90SThierry Reding 8554e07ac90SThierry Reding pcie-5 { 8564e07ac90SThierry Reding status = "disabled"; 8574e07ac90SThierry Reding #phy-cells = <0>; 8584e07ac90SThierry Reding }; 8594e07ac90SThierry Reding 8604e07ac90SThierry Reding pcie-6 { 8614e07ac90SThierry Reding status = "disabled"; 8624e07ac90SThierry Reding #phy-cells = <0>; 8634e07ac90SThierry Reding }; 8644e07ac90SThierry Reding }; 8654e07ac90SThierry Reding }; 8664e07ac90SThierry Reding 8674e07ac90SThierry Reding sata { 8684e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 8694e07ac90SThierry Reding clock-names = "pll"; 8704e07ac90SThierry Reding resets = <&tegra_car 204>; 8714e07ac90SThierry Reding reset-names = "phy"; 8724e07ac90SThierry Reding status = "disabled"; 8734e07ac90SThierry Reding 8744e07ac90SThierry Reding lanes { 8754e07ac90SThierry Reding sata-0 { 8764e07ac90SThierry Reding status = "disabled"; 8774e07ac90SThierry Reding #phy-cells = <0>; 8784e07ac90SThierry Reding }; 8794e07ac90SThierry Reding }; 8804e07ac90SThierry Reding }; 8814e07ac90SThierry Reding }; 8824e07ac90SThierry Reding 8834e07ac90SThierry Reding ports { 8844e07ac90SThierry Reding usb2-0 { 8854e07ac90SThierry Reding status = "disabled"; 8864e07ac90SThierry Reding }; 8874e07ac90SThierry Reding 8884e07ac90SThierry Reding usb2-1 { 8894e07ac90SThierry Reding status = "disabled"; 8904e07ac90SThierry Reding }; 8914e07ac90SThierry Reding 8924e07ac90SThierry Reding usb2-2 { 8934e07ac90SThierry Reding status = "disabled"; 8944e07ac90SThierry Reding }; 8954e07ac90SThierry Reding 8964e07ac90SThierry Reding usb2-3 { 8974e07ac90SThierry Reding status = "disabled"; 8984e07ac90SThierry Reding }; 8994e07ac90SThierry Reding 9004e07ac90SThierry Reding hsic-0 { 9014e07ac90SThierry Reding status = "disabled"; 9024e07ac90SThierry Reding }; 9034e07ac90SThierry Reding 9044e07ac90SThierry Reding usb3-0 { 9054e07ac90SThierry Reding status = "disabled"; 9064e07ac90SThierry Reding }; 9074e07ac90SThierry Reding 9084e07ac90SThierry Reding usb3-1 { 9094e07ac90SThierry Reding status = "disabled"; 9104e07ac90SThierry Reding }; 9114e07ac90SThierry Reding 9124e07ac90SThierry Reding usb3-2 { 9134e07ac90SThierry Reding status = "disabled"; 9144e07ac90SThierry Reding }; 9154e07ac90SThierry Reding 9164e07ac90SThierry Reding usb3-3 { 9174e07ac90SThierry Reding status = "disabled"; 9184e07ac90SThierry Reding }; 9194e07ac90SThierry Reding }; 9204e07ac90SThierry Reding }; 9214e07ac90SThierry Reding 922be70771dSThierry Reding sdhci@700b0000 { 923742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 924742af7e7SThierry Reding reg = <0x0 0x700b0000 0x0 0x200>; 925742af7e7SThierry Reding interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 926742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC1>; 927742af7e7SThierry Reding clock-names = "sdhci"; 928742af7e7SThierry Reding resets = <&tegra_car 14>; 929742af7e7SThierry Reding reset-names = "sdhci"; 930742af7e7SThierry Reding status = "disabled"; 931742af7e7SThierry Reding }; 932742af7e7SThierry Reding 933be70771dSThierry Reding sdhci@700b0200 { 934742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 935742af7e7SThierry Reding reg = <0x0 0x700b0200 0x0 0x200>; 936742af7e7SThierry Reding interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 937742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC2>; 938742af7e7SThierry Reding clock-names = "sdhci"; 939742af7e7SThierry Reding resets = <&tegra_car 9>; 940742af7e7SThierry Reding reset-names = "sdhci"; 941742af7e7SThierry Reding status = "disabled"; 942742af7e7SThierry Reding }; 943742af7e7SThierry Reding 944be70771dSThierry Reding sdhci@700b0400 { 945742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 946742af7e7SThierry Reding reg = <0x0 0x700b0400 0x0 0x200>; 947742af7e7SThierry Reding interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 948742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC3>; 949742af7e7SThierry Reding clock-names = "sdhci"; 950742af7e7SThierry Reding resets = <&tegra_car 69>; 951742af7e7SThierry Reding reset-names = "sdhci"; 952742af7e7SThierry Reding status = "disabled"; 953742af7e7SThierry Reding }; 954742af7e7SThierry Reding 955be70771dSThierry Reding sdhci@700b0600 { 956742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 957742af7e7SThierry Reding reg = <0x0 0x700b0600 0x0 0x200>; 958742af7e7SThierry Reding interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 959742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC4>; 960742af7e7SThierry Reding clock-names = "sdhci"; 961742af7e7SThierry Reding resets = <&tegra_car 15>; 962742af7e7SThierry Reding reset-names = "sdhci"; 963742af7e7SThierry Reding status = "disabled"; 964742af7e7SThierry Reding }; 965742af7e7SThierry Reding 966be70771dSThierry Reding mipi: mipi@700e3000 { 967742af7e7SThierry Reding compatible = "nvidia,tegra210-mipi"; 968742af7e7SThierry Reding reg = <0x0 0x700e3000 0x0 0x100>; 969742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MIPI_CAL>; 970742af7e7SThierry Reding clock-names = "mipi-cal"; 97196d1f078SJon Hunter power-domains = <&pd_sor>; 972742af7e7SThierry Reding #nvidia,mipi-calibrate-cells = <1>; 973742af7e7SThierry Reding }; 974742af7e7SThierry Reding 9750f133090SJon Hunter aconnect@702c0000 { 9760f133090SJon Hunter compatible = "nvidia,tegra210-aconnect"; 9770f133090SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 9780f133090SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 9790f133090SJon Hunter clock-names = "ape", "apb2ape"; 9800f133090SJon Hunter power-domains = <&pd_audio>; 9810f133090SJon Hunter #address-cells = <1>; 9820f133090SJon Hunter #size-cells = <1>; 9830f133090SJon Hunter ranges = <0x702c0000 0x0 0x702c0000 0x00040000>; 9840f133090SJon Hunter status = "disabled"; 985bcdbde43SJon Hunter 98619e61213SJon Hunter adma: dma@702e2000 { 98719e61213SJon Hunter compatible = "nvidia,tegra210-adma"; 98819e61213SJon Hunter reg = <0x702e2000 0x2000>; 98919e61213SJon Hunter interrupt-parent = <&agic>; 99019e61213SJon Hunter interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, 99119e61213SJon Hunter <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, 99219e61213SJon Hunter <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, 99319e61213SJon Hunter <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, 99419e61213SJon Hunter <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, 99519e61213SJon Hunter <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 99619e61213SJon Hunter <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, 99719e61213SJon Hunter <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, 99819e61213SJon Hunter <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 99919e61213SJon Hunter <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 100019e61213SJon Hunter <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 100119e61213SJon Hunter <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 100219e61213SJon Hunter <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 100319e61213SJon Hunter <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 100419e61213SJon Hunter <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 100519e61213SJon Hunter <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 100619e61213SJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 100719e61213SJon Hunter <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 100819e61213SJon Hunter <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 100919e61213SJon Hunter <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 101019e61213SJon Hunter <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 101119e61213SJon Hunter <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 101219e61213SJon Hunter #dma-cells = <1>; 101319e61213SJon Hunter clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; 101419e61213SJon Hunter clock-names = "d_audio"; 101519e61213SJon Hunter status = "disabled"; 101619e61213SJon Hunter }; 101719e61213SJon Hunter 1018bcdbde43SJon Hunter agic: agic@702f9000 { 1019bcdbde43SJon Hunter compatible = "nvidia,tegra210-agic"; 1020bcdbde43SJon Hunter #interrupt-cells = <3>; 1021bcdbde43SJon Hunter interrupt-controller; 1022bcdbde43SJon Hunter reg = <0x702f9000 0x2000>, 1023bcdbde43SJon Hunter <0x702fa000 0x2000>; 1024bcdbde43SJon Hunter interrupts = <GIC_SPI 102 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 1025bcdbde43SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>; 1026bcdbde43SJon Hunter clock-names = "clk"; 1027bcdbde43SJon Hunter status = "disabled"; 1028bcdbde43SJon Hunter }; 10290f133090SJon Hunter }; 10300f133090SJon Hunter 1031be70771dSThierry Reding spi@70410000 { 1032742af7e7SThierry Reding compatible = "nvidia,tegra210-qspi"; 1033742af7e7SThierry Reding reg = <0x0 0x70410000 0x0 0x1000>; 1034742af7e7SThierry Reding interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 1035742af7e7SThierry Reding #address-cells = <1>; 1036742af7e7SThierry Reding #size-cells = <0>; 1037742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_QSPI>; 1038742af7e7SThierry Reding clock-names = "qspi"; 1039742af7e7SThierry Reding resets = <&tegra_car 211>; 1040742af7e7SThierry Reding reset-names = "qspi"; 1041742af7e7SThierry Reding dmas = <&apbdma 5>, <&apbdma 5>; 1042742af7e7SThierry Reding dma-names = "rx", "tx"; 1043742af7e7SThierry Reding status = "disabled"; 1044742af7e7SThierry Reding }; 1045742af7e7SThierry Reding 1046be70771dSThierry Reding usb@7d000000 { 1047742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1048742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>; 1049742af7e7SThierry Reding interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 1050742af7e7SThierry Reding phy_type = "utmi"; 1051742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>; 1052742af7e7SThierry Reding clock-names = "usb"; 1053742af7e7SThierry Reding resets = <&tegra_car 22>; 1054742af7e7SThierry Reding reset-names = "usb"; 1055742af7e7SThierry Reding nvidia,phy = <&phy1>; 1056742af7e7SThierry Reding status = "disabled"; 1057742af7e7SThierry Reding }; 1058742af7e7SThierry Reding 1059be70771dSThierry Reding phy1: usb-phy@7d000000 { 1060742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1061742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>, 1062742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1063742af7e7SThierry Reding phy_type = "utmi"; 1064742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>, 1065742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1066742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1067742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1068742af7e7SThierry Reding resets = <&tegra_car 22>, <&tegra_car 22>; 1069742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1070742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1071742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1072742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1073742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1074742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1075742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1076742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1077742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1078742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1079742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1080742af7e7SThierry Reding nvidia,has-utmi-pad-registers; 1081742af7e7SThierry Reding status = "disabled"; 1082742af7e7SThierry Reding }; 1083742af7e7SThierry Reding 1084be70771dSThierry Reding usb@7d004000 { 1085742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1086742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>; 1087742af7e7SThierry Reding interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1088742af7e7SThierry Reding phy_type = "utmi"; 1089742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>; 1090742af7e7SThierry Reding clock-names = "usb"; 1091742af7e7SThierry Reding resets = <&tegra_car 58>; 1092742af7e7SThierry Reding reset-names = "usb"; 1093742af7e7SThierry Reding nvidia,phy = <&phy2>; 1094742af7e7SThierry Reding status = "disabled"; 1095742af7e7SThierry Reding }; 1096742af7e7SThierry Reding 1097be70771dSThierry Reding phy2: usb-phy@7d004000 { 1098742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1099742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>, 1100742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1101742af7e7SThierry Reding phy_type = "utmi"; 1102742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>, 1103742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1104742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1105742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1106742af7e7SThierry Reding resets = <&tegra_car 58>, <&tegra_car 22>; 1107742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1108742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1109742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1110742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1111742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1112742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1113742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1114742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1115742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1116742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1117742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1118742af7e7SThierry Reding status = "disabled"; 1119742af7e7SThierry Reding }; 1120742af7e7SThierry Reding 1121742af7e7SThierry Reding cpus { 1122742af7e7SThierry Reding #address-cells = <1>; 1123742af7e7SThierry Reding #size-cells = <0>; 1124742af7e7SThierry Reding 1125742af7e7SThierry Reding cpu@0 { 1126742af7e7SThierry Reding device_type = "cpu"; 1127742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1128742af7e7SThierry Reding reg = <0>; 1129742af7e7SThierry Reding }; 1130742af7e7SThierry Reding 1131742af7e7SThierry Reding cpu@1 { 1132742af7e7SThierry Reding device_type = "cpu"; 1133742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1134742af7e7SThierry Reding reg = <1>; 1135742af7e7SThierry Reding }; 1136742af7e7SThierry Reding 1137742af7e7SThierry Reding cpu@2 { 1138742af7e7SThierry Reding device_type = "cpu"; 1139742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1140742af7e7SThierry Reding reg = <2>; 1141742af7e7SThierry Reding }; 1142742af7e7SThierry Reding 1143742af7e7SThierry Reding cpu@3 { 1144742af7e7SThierry Reding device_type = "cpu"; 1145742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1146742af7e7SThierry Reding reg = <3>; 1147742af7e7SThierry Reding }; 1148742af7e7SThierry Reding }; 1149742af7e7SThierry Reding 1150742af7e7SThierry Reding timer { 1151742af7e7SThierry Reding compatible = "arm,armv8-timer"; 1152742af7e7SThierry Reding interrupts = <GIC_PPI 13 1153742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1154742af7e7SThierry Reding <GIC_PPI 14 1155742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1156742af7e7SThierry Reding <GIC_PPI 11 1157742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1158742af7e7SThierry Reding <GIC_PPI 10 1159742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 1160742af7e7SThierry Reding interrupt-parent = <&gic>; 1161742af7e7SThierry Reding }; 1162742af7e7SThierry Reding}; 1163