1742af7e7SThierry Reding#include <dt-bindings/clock/tegra210-car.h> 2742af7e7SThierry Reding#include <dt-bindings/gpio/tegra-gpio.h> 3742af7e7SThierry Reding#include <dt-bindings/memory/tegra210-mc.h> 4742af7e7SThierry Reding#include <dt-bindings/pinctrl/pinctrl-tegra.h> 5742af7e7SThierry Reding#include <dt-bindings/interrupt-controller/arm-gic.h> 6742af7e7SThierry Reding 7742af7e7SThierry Reding/ { 8742af7e7SThierry Reding compatible = "nvidia,tegra210"; 9742af7e7SThierry Reding interrupt-parent = <&lic>; 10742af7e7SThierry Reding #address-cells = <2>; 11742af7e7SThierry Reding #size-cells = <2>; 12742af7e7SThierry Reding 13be70771dSThierry Reding host1x@50000000 { 14742af7e7SThierry Reding compatible = "nvidia,tegra210-host1x", "simple-bus"; 15742af7e7SThierry Reding reg = <0x0 0x50000000 0x0 0x00034000>; 16742af7e7SThierry Reding interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */ 17742af7e7SThierry Reding <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */ 18742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HOST1X>; 19742af7e7SThierry Reding clock-names = "host1x"; 20742af7e7SThierry Reding resets = <&tegra_car 28>; 21742af7e7SThierry Reding reset-names = "host1x"; 22742af7e7SThierry Reding 23742af7e7SThierry Reding #address-cells = <2>; 24742af7e7SThierry Reding #size-cells = <2>; 25742af7e7SThierry Reding 26742af7e7SThierry Reding ranges = <0x0 0x54000000 0x0 0x54000000 0x0 0x01000000>; 27742af7e7SThierry Reding 28be70771dSThierry Reding dpaux1: dpaux@54040000 { 29742af7e7SThierry Reding compatible = "nvidia,tegra210-dpaux"; 30742af7e7SThierry Reding reg = <0x0 0x54040000 0x0 0x00040000>; 31742af7e7SThierry Reding interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 32742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX1>, 33742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 34742af7e7SThierry Reding clock-names = "dpaux", "parent"; 35742af7e7SThierry Reding resets = <&tegra_car 207>; 36742af7e7SThierry Reding reset-names = "dpaux"; 37742af7e7SThierry Reding status = "disabled"; 3866b2d6e9SJon Hunter 3966b2d6e9SJon Hunter state_dpaux1_aux: pinmux-aux { 4066b2d6e9SJon Hunter groups = "dpaux-io"; 4166b2d6e9SJon Hunter function = "aux"; 4266b2d6e9SJon Hunter }; 4366b2d6e9SJon Hunter 4466b2d6e9SJon Hunter state_dpaux1_i2c: pinmux-i2c { 4566b2d6e9SJon Hunter groups = "dpaux-io"; 4666b2d6e9SJon Hunter function = "i2c"; 4766b2d6e9SJon Hunter }; 4866b2d6e9SJon Hunter 4966b2d6e9SJon Hunter state_dpaux1_off: pinmux-off { 5066b2d6e9SJon Hunter groups = "dpaux-io"; 5166b2d6e9SJon Hunter function = "off"; 5266b2d6e9SJon Hunter }; 5366b2d6e9SJon Hunter 5466b2d6e9SJon Hunter i2c-bus { 5566b2d6e9SJon Hunter #address-cells = <1>; 5666b2d6e9SJon Hunter #size-cells = <0>; 5766b2d6e9SJon Hunter }; 58742af7e7SThierry Reding }; 59742af7e7SThierry Reding 60be70771dSThierry Reding vi@54080000 { 61742af7e7SThierry Reding compatible = "nvidia,tegra210-vi"; 62742af7e7SThierry Reding reg = <0x0 0x54080000 0x0 0x00040000>; 63742af7e7SThierry Reding interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 64742af7e7SThierry Reding status = "disabled"; 65742af7e7SThierry Reding }; 66742af7e7SThierry Reding 67be70771dSThierry Reding tsec@54100000 { 68742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 69742af7e7SThierry Reding reg = <0x0 0x54100000 0x0 0x00040000>; 70742af7e7SThierry Reding }; 71742af7e7SThierry Reding 72be70771dSThierry Reding dc@54200000 { 73742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 74742af7e7SThierry Reding reg = <0x0 0x54200000 0x0 0x00040000>; 75742af7e7SThierry Reding interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 76742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP1>, 77742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 78742af7e7SThierry Reding clock-names = "dc", "parent"; 79742af7e7SThierry Reding resets = <&tegra_car 27>; 80742af7e7SThierry Reding reset-names = "dc"; 81742af7e7SThierry Reding 82742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DC>; 83742af7e7SThierry Reding 84742af7e7SThierry Reding nvidia,head = <0>; 85742af7e7SThierry Reding }; 86742af7e7SThierry Reding 87be70771dSThierry Reding dc@54240000 { 88742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 89742af7e7SThierry Reding reg = <0x0 0x54240000 0x0 0x00040000>; 90742af7e7SThierry Reding interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 91742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP2>, 92742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 93742af7e7SThierry Reding clock-names = "dc", "parent"; 94742af7e7SThierry Reding resets = <&tegra_car 26>; 95742af7e7SThierry Reding reset-names = "dc"; 96742af7e7SThierry Reding 97742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DCB>; 98742af7e7SThierry Reding 99742af7e7SThierry Reding nvidia,head = <1>; 100742af7e7SThierry Reding }; 101742af7e7SThierry Reding 102be70771dSThierry Reding dsi@54300000 { 103742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 104742af7e7SThierry Reding reg = <0x0 0x54300000 0x0 0x00040000>; 105742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIA>, 106742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIALP>, 107742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 108742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 109742af7e7SThierry Reding resets = <&tegra_car 48>; 110742af7e7SThierry Reding reset-names = "dsi"; 111742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x0c0>; /* DSIA & DSIB pads */ 112742af7e7SThierry Reding 113742af7e7SThierry Reding status = "disabled"; 114742af7e7SThierry Reding 115742af7e7SThierry Reding #address-cells = <1>; 116742af7e7SThierry Reding #size-cells = <0>; 117742af7e7SThierry Reding }; 118742af7e7SThierry Reding 119be70771dSThierry Reding vic@54340000 { 120742af7e7SThierry Reding compatible = "nvidia,tegra210-vic"; 121742af7e7SThierry Reding reg = <0x0 0x54340000 0x0 0x00040000>; 122742af7e7SThierry Reding status = "disabled"; 123742af7e7SThierry Reding }; 124742af7e7SThierry Reding 125be70771dSThierry Reding nvjpg@54380000 { 126742af7e7SThierry Reding compatible = "nvidia,tegra210-nvjpg"; 127742af7e7SThierry Reding reg = <0x0 0x54380000 0x0 0x00040000>; 128742af7e7SThierry Reding status = "disabled"; 129742af7e7SThierry Reding }; 130742af7e7SThierry Reding 131be70771dSThierry Reding dsi@54400000 { 132742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 133742af7e7SThierry Reding reg = <0x0 0x54400000 0x0 0x00040000>; 134742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIB>, 135742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIBLP>, 136742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 137742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 138742af7e7SThierry Reding resets = <&tegra_car 82>; 139742af7e7SThierry Reding reset-names = "dsi"; 140742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x300>; /* DSIC & DSID pads */ 141742af7e7SThierry Reding 142742af7e7SThierry Reding status = "disabled"; 143742af7e7SThierry Reding 144742af7e7SThierry Reding #address-cells = <1>; 145742af7e7SThierry Reding #size-cells = <0>; 146742af7e7SThierry Reding }; 147742af7e7SThierry Reding 148be70771dSThierry Reding nvdec@54480000 { 149742af7e7SThierry Reding compatible = "nvidia,tegra210-nvdec"; 150742af7e7SThierry Reding reg = <0x0 0x54480000 0x0 0x00040000>; 151742af7e7SThierry Reding status = "disabled"; 152742af7e7SThierry Reding }; 153742af7e7SThierry Reding 154be70771dSThierry Reding nvenc@544c0000 { 155742af7e7SThierry Reding compatible = "nvidia,tegra210-nvenc"; 156742af7e7SThierry Reding reg = <0x0 0x544c0000 0x0 0x00040000>; 157742af7e7SThierry Reding status = "disabled"; 158742af7e7SThierry Reding }; 159742af7e7SThierry Reding 160be70771dSThierry Reding tsec@54500000 { 161742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 162742af7e7SThierry Reding reg = <0x0 0x54500000 0x0 0x00040000>; 163742af7e7SThierry Reding status = "disabled"; 164742af7e7SThierry Reding }; 165742af7e7SThierry Reding 166be70771dSThierry Reding sor@54540000 { 167742af7e7SThierry Reding compatible = "nvidia,tegra210-sor"; 168742af7e7SThierry Reding reg = <0x0 0x54540000 0x0 0x00040000>; 169742af7e7SThierry Reding interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 170742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR0>, 171742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>, 172742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 173742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 174742af7e7SThierry Reding clock-names = "sor", "parent", "dp", "safe"; 175742af7e7SThierry Reding resets = <&tegra_car 182>; 176742af7e7SThierry Reding reset-names = "sor"; 17766b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_aux>; 17866b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_i2c>; 17966b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux_off>; 18066b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 181742af7e7SThierry Reding status = "disabled"; 182742af7e7SThierry Reding }; 183742af7e7SThierry Reding 184be70771dSThierry Reding sor@54580000 { 185742af7e7SThierry Reding compatible = "nvidia,tegra210-sor1"; 186742af7e7SThierry Reding reg = <0x0 0x54580000 0x0 0x00040000>; 187742af7e7SThierry Reding interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 188742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR1>, 189742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D2_OUT0>, 190742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 191742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 192742af7e7SThierry Reding clock-names = "sor", "parent", "dp", "safe"; 193742af7e7SThierry Reding resets = <&tegra_car 183>; 194742af7e7SThierry Reding reset-names = "sor"; 19566b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_aux>; 19666b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_i2c>; 19766b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux1_off>; 19866b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 199742af7e7SThierry Reding status = "disabled"; 200742af7e7SThierry Reding }; 201742af7e7SThierry Reding 202be70771dSThierry Reding dpaux: dpaux@545c0000 { 203742af7e7SThierry Reding compatible = "nvidia,tegra124-dpaux"; 204742af7e7SThierry Reding reg = <0x0 0x545c0000 0x0 0x00040000>; 205742af7e7SThierry Reding interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 206742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX>, 207742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 208742af7e7SThierry Reding clock-names = "dpaux", "parent"; 209742af7e7SThierry Reding resets = <&tegra_car 181>; 210742af7e7SThierry Reding reset-names = "dpaux"; 211742af7e7SThierry Reding status = "disabled"; 21266b2d6e9SJon Hunter 21366b2d6e9SJon Hunter state_dpaux_aux: pinmux-aux { 21466b2d6e9SJon Hunter groups = "dpaux-io"; 21566b2d6e9SJon Hunter function = "aux"; 21666b2d6e9SJon Hunter }; 21766b2d6e9SJon Hunter 21866b2d6e9SJon Hunter state_dpaux_i2c: pinmux-i2c { 21966b2d6e9SJon Hunter groups = "dpaux-io"; 22066b2d6e9SJon Hunter function = "i2c"; 22166b2d6e9SJon Hunter }; 22266b2d6e9SJon Hunter 22366b2d6e9SJon Hunter state_dpaux_off: pinmux-off { 22466b2d6e9SJon Hunter groups = "dpaux-io"; 22566b2d6e9SJon Hunter function = "off"; 22666b2d6e9SJon Hunter }; 22766b2d6e9SJon Hunter 22866b2d6e9SJon Hunter i2c-bus { 22966b2d6e9SJon Hunter #address-cells = <1>; 23066b2d6e9SJon Hunter #size-cells = <0>; 23166b2d6e9SJon Hunter }; 232742af7e7SThierry Reding }; 233742af7e7SThierry Reding 234be70771dSThierry Reding isp@54600000 { 235742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 236742af7e7SThierry Reding reg = <0x0 0x54600000 0x0 0x00040000>; 237742af7e7SThierry Reding interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 238742af7e7SThierry Reding status = "disabled"; 239742af7e7SThierry Reding }; 240742af7e7SThierry Reding 241be70771dSThierry Reding isp@54680000 { 242742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 243742af7e7SThierry Reding reg = <0x0 0x54680000 0x0 0x00040000>; 244742af7e7SThierry Reding interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 245742af7e7SThierry Reding status = "disabled"; 246742af7e7SThierry Reding }; 247742af7e7SThierry Reding 248be70771dSThierry Reding i2c@546c0000 { 249742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c-vi"; 250742af7e7SThierry Reding reg = <0x0 0x546c0000 0x0 0x00040000>; 251742af7e7SThierry Reding interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 252742af7e7SThierry Reding status = "disabled"; 253742af7e7SThierry Reding }; 254742af7e7SThierry Reding }; 255742af7e7SThierry Reding 256be70771dSThierry Reding gic: interrupt-controller@50041000 { 257742af7e7SThierry Reding compatible = "arm,gic-400"; 258742af7e7SThierry Reding #interrupt-cells = <3>; 259742af7e7SThierry Reding interrupt-controller; 260742af7e7SThierry Reding reg = <0x0 0x50041000 0x0 0x1000>, 261742af7e7SThierry Reding <0x0 0x50042000 0x0 0x2000>, 262742af7e7SThierry Reding <0x0 0x50044000 0x0 0x2000>, 263742af7e7SThierry Reding <0x0 0x50046000 0x0 0x2000>; 264742af7e7SThierry Reding interrupts = <GIC_PPI 9 265742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 266742af7e7SThierry Reding interrupt-parent = <&gic>; 267742af7e7SThierry Reding }; 268742af7e7SThierry Reding 269be70771dSThierry Reding gpu@57000000 { 270742af7e7SThierry Reding compatible = "nvidia,gm20b"; 271742af7e7SThierry Reding reg = <0x0 0x57000000 0x0 0x01000000>, 272742af7e7SThierry Reding <0x0 0x58000000 0x0 0x01000000>; 273742af7e7SThierry Reding interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 274742af7e7SThierry Reding <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 275742af7e7SThierry Reding interrupt-names = "stall", "nonstall"; 276742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_GPU>, 2774a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_P_OUT5>, 2784a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_G_REF>; 2794a0778e9SAlexandre Courbot clock-names = "gpu", "pwr", "ref"; 280742af7e7SThierry Reding resets = <&tegra_car 184>; 281742af7e7SThierry Reding reset-names = "gpu"; 28230f949bcSAlexandre Courbot 28330f949bcSAlexandre Courbot iommus = <&mc TEGRA_SWGROUP_GPU>; 28430f949bcSAlexandre Courbot 285742af7e7SThierry Reding status = "disabled"; 286742af7e7SThierry Reding }; 287742af7e7SThierry Reding 288be70771dSThierry Reding lic: interrupt-controller@60004000 { 289742af7e7SThierry Reding compatible = "nvidia,tegra210-ictlr"; 290742af7e7SThierry Reding reg = <0x0 0x60004000 0x0 0x40>, /* primary controller */ 291742af7e7SThierry Reding <0x0 0x60004100 0x0 0x40>, /* secondary controller */ 292742af7e7SThierry Reding <0x0 0x60004200 0x0 0x40>, /* tertiary controller */ 293742af7e7SThierry Reding <0x0 0x60004300 0x0 0x40>, /* quaternary controller */ 294742af7e7SThierry Reding <0x0 0x60004400 0x0 0x40>, /* quinary controller */ 295742af7e7SThierry Reding <0x0 0x60004500 0x0 0x40>; /* senary controller */ 296742af7e7SThierry Reding interrupt-controller; 297742af7e7SThierry Reding #interrupt-cells = <3>; 298742af7e7SThierry Reding interrupt-parent = <&gic>; 299742af7e7SThierry Reding }; 300742af7e7SThierry Reding 301be70771dSThierry Reding timer@60005000 { 302742af7e7SThierry Reding compatible = "nvidia,tegra210-timer", "nvidia,tegra20-timer"; 303742af7e7SThierry Reding reg = <0x0 0x60005000 0x0 0x400>; 304742af7e7SThierry Reding interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 305742af7e7SThierry Reding <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 306742af7e7SThierry Reding <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 307742af7e7SThierry Reding <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 308742af7e7SThierry Reding <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 309742af7e7SThierry Reding <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 310742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_TIMER>; 311742af7e7SThierry Reding clock-names = "timer"; 312742af7e7SThierry Reding }; 313742af7e7SThierry Reding 314be70771dSThierry Reding tegra_car: clock@60006000 { 315742af7e7SThierry Reding compatible = "nvidia,tegra210-car"; 316742af7e7SThierry Reding reg = <0x0 0x60006000 0x0 0x1000>; 317742af7e7SThierry Reding #clock-cells = <1>; 318742af7e7SThierry Reding #reset-cells = <1>; 319742af7e7SThierry Reding }; 320742af7e7SThierry Reding 321be70771dSThierry Reding flow-controller@60007000 { 322742af7e7SThierry Reding compatible = "nvidia,tegra210-flowctrl"; 323742af7e7SThierry Reding reg = <0x0 0x60007000 0x0 0x1000>; 324742af7e7SThierry Reding }; 325742af7e7SThierry Reding 326be70771dSThierry Reding gpio: gpio@6000d000 { 327742af7e7SThierry Reding compatible = "nvidia,tegra210-gpio", "nvidia,tegra124-gpio", "nvidia,tegra30-gpio"; 328742af7e7SThierry Reding reg = <0x0 0x6000d000 0x0 0x1000>; 329742af7e7SThierry Reding interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 330742af7e7SThierry Reding <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 331742af7e7SThierry Reding <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 332742af7e7SThierry Reding <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 333742af7e7SThierry Reding <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 334742af7e7SThierry Reding <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 335742af7e7SThierry Reding <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 336742af7e7SThierry Reding <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 337742af7e7SThierry Reding #gpio-cells = <2>; 338742af7e7SThierry Reding gpio-controller; 339742af7e7SThierry Reding #interrupt-cells = <2>; 340742af7e7SThierry Reding interrupt-controller; 341742af7e7SThierry Reding }; 342742af7e7SThierry Reding 343be70771dSThierry Reding apbdma: dma@60020000 { 344742af7e7SThierry Reding compatible = "nvidia,tegra210-apbdma", "nvidia,tegra148-apbdma"; 345742af7e7SThierry Reding reg = <0x0 0x60020000 0x0 0x1400>; 346742af7e7SThierry Reding interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 347742af7e7SThierry Reding <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 348742af7e7SThierry Reding <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 349742af7e7SThierry Reding <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 350742af7e7SThierry Reding <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 351742af7e7SThierry Reding <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 352742af7e7SThierry Reding <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 353742af7e7SThierry Reding <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 354742af7e7SThierry Reding <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 355742af7e7SThierry Reding <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 356742af7e7SThierry Reding <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 357742af7e7SThierry Reding <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 358742af7e7SThierry Reding <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 359742af7e7SThierry Reding <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 360742af7e7SThierry Reding <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 361742af7e7SThierry Reding <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, 362742af7e7SThierry Reding <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 363742af7e7SThierry Reding <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 364742af7e7SThierry Reding <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 365742af7e7SThierry Reding <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 366742af7e7SThierry Reding <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 367742af7e7SThierry Reding <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, 368742af7e7SThierry Reding <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, 369742af7e7SThierry Reding <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 370742af7e7SThierry Reding <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 371742af7e7SThierry Reding <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 372742af7e7SThierry Reding <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 373742af7e7SThierry Reding <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>, 374742af7e7SThierry Reding <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, 375742af7e7SThierry Reding <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, 376742af7e7SThierry Reding <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 377742af7e7SThierry Reding <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 378742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_APBDMA>; 379742af7e7SThierry Reding clock-names = "dma"; 380742af7e7SThierry Reding resets = <&tegra_car 34>; 381742af7e7SThierry Reding reset-names = "dma"; 382742af7e7SThierry Reding #dma-cells = <1>; 383742af7e7SThierry Reding }; 384742af7e7SThierry Reding 385be70771dSThierry Reding apbmisc@70000800 { 386742af7e7SThierry Reding compatible = "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc"; 387742af7e7SThierry Reding reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */ 388742af7e7SThierry Reding <0x0 0x7000e864 0x0 0x04>; /* Strapping options */ 389742af7e7SThierry Reding }; 390742af7e7SThierry Reding 391be70771dSThierry Reding pinmux: pinmux@700008d4 { 392742af7e7SThierry Reding compatible = "nvidia,tegra210-pinmux"; 393742af7e7SThierry Reding reg = <0x0 0x700008d4 0x0 0x29c>, /* Pad control registers */ 394742af7e7SThierry Reding <0x0 0x70003000 0x0 0x294>; /* Mux registers */ 395742af7e7SThierry Reding }; 396742af7e7SThierry Reding 397742af7e7SThierry Reding /* 398742af7e7SThierry Reding * There are two serial driver i.e. 8250 based simple serial 399742af7e7SThierry Reding * driver and APB DMA based serial driver for higher baudrate 400ef769e32SAdam Buchbinder * and performance. To enable the 8250 based driver, the compatible 401742af7e7SThierry Reding * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable 40268cd8b2eSThierry Reding * the APB DMA based serial driver, the compatible is 403742af7e7SThierry Reding * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart". 404742af7e7SThierry Reding */ 405be70771dSThierry Reding uarta: serial@70006000 { 406742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 407742af7e7SThierry Reding reg = <0x0 0x70006000 0x0 0x40>; 408742af7e7SThierry Reding reg-shift = <2>; 409742af7e7SThierry Reding interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 410742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTA>; 411742af7e7SThierry Reding clock-names = "serial"; 412742af7e7SThierry Reding resets = <&tegra_car 6>; 413742af7e7SThierry Reding reset-names = "serial"; 414742af7e7SThierry Reding dmas = <&apbdma 8>, <&apbdma 8>; 415742af7e7SThierry Reding dma-names = "rx", "tx"; 416742af7e7SThierry Reding status = "disabled"; 417742af7e7SThierry Reding }; 418742af7e7SThierry Reding 419be70771dSThierry Reding uartb: serial@70006040 { 420742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 421742af7e7SThierry Reding reg = <0x0 0x70006040 0x0 0x40>; 422742af7e7SThierry Reding reg-shift = <2>; 423742af7e7SThierry Reding interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 424742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTB>; 425742af7e7SThierry Reding clock-names = "serial"; 426742af7e7SThierry Reding resets = <&tegra_car 7>; 427742af7e7SThierry Reding reset-names = "serial"; 428742af7e7SThierry Reding dmas = <&apbdma 9>, <&apbdma 9>; 429742af7e7SThierry Reding dma-names = "rx", "tx"; 430742af7e7SThierry Reding status = "disabled"; 431742af7e7SThierry Reding }; 432742af7e7SThierry Reding 433be70771dSThierry Reding uartc: serial@70006200 { 434742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 435742af7e7SThierry Reding reg = <0x0 0x70006200 0x0 0x40>; 436742af7e7SThierry Reding reg-shift = <2>; 437742af7e7SThierry Reding interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 438742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTC>; 439742af7e7SThierry Reding clock-names = "serial"; 440742af7e7SThierry Reding resets = <&tegra_car 55>; 441742af7e7SThierry Reding reset-names = "serial"; 442742af7e7SThierry Reding dmas = <&apbdma 10>, <&apbdma 10>; 443742af7e7SThierry Reding dma-names = "rx", "tx"; 444742af7e7SThierry Reding status = "disabled"; 445742af7e7SThierry Reding }; 446742af7e7SThierry Reding 447be70771dSThierry Reding uartd: serial@70006300 { 448742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 449742af7e7SThierry Reding reg = <0x0 0x70006300 0x0 0x40>; 450742af7e7SThierry Reding reg-shift = <2>; 451742af7e7SThierry Reding interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 452742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTD>; 453742af7e7SThierry Reding clock-names = "serial"; 454742af7e7SThierry Reding resets = <&tegra_car 65>; 455742af7e7SThierry Reding reset-names = "serial"; 456742af7e7SThierry Reding dmas = <&apbdma 19>, <&apbdma 19>; 457742af7e7SThierry Reding dma-names = "rx", "tx"; 458742af7e7SThierry Reding status = "disabled"; 459742af7e7SThierry Reding }; 460742af7e7SThierry Reding 461be70771dSThierry Reding pwm: pwm@7000a000 { 462742af7e7SThierry Reding compatible = "nvidia,tegra210-pwm", "nvidia,tegra20-pwm"; 463742af7e7SThierry Reding reg = <0x0 0x7000a000 0x0 0x100>; 464742af7e7SThierry Reding #pwm-cells = <2>; 465742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PWM>; 466742af7e7SThierry Reding clock-names = "pwm"; 467742af7e7SThierry Reding resets = <&tegra_car 17>; 468742af7e7SThierry Reding reset-names = "pwm"; 469742af7e7SThierry Reding status = "disabled"; 470742af7e7SThierry Reding }; 471742af7e7SThierry Reding 472be70771dSThierry Reding i2c@7000c000 { 473742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 474742af7e7SThierry Reding reg = <0x0 0x7000c000 0x0 0x100>; 475742af7e7SThierry Reding interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 476742af7e7SThierry Reding #address-cells = <1>; 477742af7e7SThierry Reding #size-cells = <0>; 478742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C1>; 479742af7e7SThierry Reding clock-names = "div-clk"; 480742af7e7SThierry Reding resets = <&tegra_car 12>; 481742af7e7SThierry Reding reset-names = "i2c"; 482742af7e7SThierry Reding dmas = <&apbdma 21>, <&apbdma 21>; 483742af7e7SThierry Reding dma-names = "rx", "tx"; 484742af7e7SThierry Reding status = "disabled"; 485742af7e7SThierry Reding }; 486742af7e7SThierry Reding 487be70771dSThierry Reding i2c@7000c400 { 488742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 489742af7e7SThierry Reding reg = <0x0 0x7000c400 0x0 0x100>; 490742af7e7SThierry Reding interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 491742af7e7SThierry Reding #address-cells = <1>; 492742af7e7SThierry Reding #size-cells = <0>; 493742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C2>; 494742af7e7SThierry Reding clock-names = "div-clk"; 495742af7e7SThierry Reding resets = <&tegra_car 54>; 496742af7e7SThierry Reding reset-names = "i2c"; 497742af7e7SThierry Reding dmas = <&apbdma 22>, <&apbdma 22>; 498742af7e7SThierry Reding dma-names = "rx", "tx"; 499742af7e7SThierry Reding status = "disabled"; 500742af7e7SThierry Reding }; 501742af7e7SThierry Reding 502be70771dSThierry Reding i2c@7000c500 { 503742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 504742af7e7SThierry Reding reg = <0x0 0x7000c500 0x0 0x100>; 505742af7e7SThierry Reding interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 506742af7e7SThierry Reding #address-cells = <1>; 507742af7e7SThierry Reding #size-cells = <0>; 508742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C3>; 509742af7e7SThierry Reding clock-names = "div-clk"; 510742af7e7SThierry Reding resets = <&tegra_car 67>; 511742af7e7SThierry Reding reset-names = "i2c"; 512742af7e7SThierry Reding dmas = <&apbdma 23>, <&apbdma 23>; 513742af7e7SThierry Reding dma-names = "rx", "tx"; 514742af7e7SThierry Reding status = "disabled"; 515742af7e7SThierry Reding }; 516742af7e7SThierry Reding 517be70771dSThierry Reding i2c@7000c700 { 518742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 519742af7e7SThierry Reding reg = <0x0 0x7000c700 0x0 0x100>; 520742af7e7SThierry Reding interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 521742af7e7SThierry Reding #address-cells = <1>; 522742af7e7SThierry Reding #size-cells = <0>; 523742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C4>; 524742af7e7SThierry Reding clock-names = "div-clk"; 525742af7e7SThierry Reding resets = <&tegra_car 103>; 526742af7e7SThierry Reding reset-names = "i2c"; 527742af7e7SThierry Reding dmas = <&apbdma 26>, <&apbdma 26>; 528742af7e7SThierry Reding dma-names = "rx", "tx"; 52966b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_i2c>; 53066b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_off>; 53166b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 532742af7e7SThierry Reding status = "disabled"; 533742af7e7SThierry Reding }; 534742af7e7SThierry Reding 535be70771dSThierry Reding i2c@7000d000 { 536742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 537742af7e7SThierry Reding reg = <0x0 0x7000d000 0x0 0x100>; 538742af7e7SThierry Reding interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 539742af7e7SThierry Reding #address-cells = <1>; 540742af7e7SThierry Reding #size-cells = <0>; 541742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C5>; 542742af7e7SThierry Reding clock-names = "div-clk"; 543742af7e7SThierry Reding resets = <&tegra_car 47>; 544742af7e7SThierry Reding reset-names = "i2c"; 545742af7e7SThierry Reding dmas = <&apbdma 24>, <&apbdma 24>; 546742af7e7SThierry Reding dma-names = "rx", "tx"; 547742af7e7SThierry Reding status = "disabled"; 548742af7e7SThierry Reding }; 549742af7e7SThierry Reding 550be70771dSThierry Reding i2c@7000d100 { 551742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 552742af7e7SThierry Reding reg = <0x0 0x7000d100 0x0 0x100>; 553742af7e7SThierry Reding interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 554742af7e7SThierry Reding #address-cells = <1>; 555742af7e7SThierry Reding #size-cells = <0>; 556742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C6>; 557742af7e7SThierry Reding clock-names = "div-clk"; 558742af7e7SThierry Reding resets = <&tegra_car 166>; 559742af7e7SThierry Reding reset-names = "i2c"; 560742af7e7SThierry Reding dmas = <&apbdma 30>, <&apbdma 30>; 561742af7e7SThierry Reding dma-names = "rx", "tx"; 56266b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_i2c>; 56366b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_off>; 56466b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 565742af7e7SThierry Reding status = "disabled"; 566742af7e7SThierry Reding }; 567742af7e7SThierry Reding 568be70771dSThierry Reding spi@7000d400 { 569742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 570742af7e7SThierry Reding reg = <0x0 0x7000d400 0x0 0x200>; 571742af7e7SThierry Reding interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 572742af7e7SThierry Reding #address-cells = <1>; 573742af7e7SThierry Reding #size-cells = <0>; 574742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC1>; 575742af7e7SThierry Reding clock-names = "spi"; 576742af7e7SThierry Reding resets = <&tegra_car 41>; 577742af7e7SThierry Reding reset-names = "spi"; 578742af7e7SThierry Reding dmas = <&apbdma 15>, <&apbdma 15>; 579742af7e7SThierry Reding dma-names = "rx", "tx"; 580742af7e7SThierry Reding status = "disabled"; 581742af7e7SThierry Reding }; 582742af7e7SThierry Reding 583be70771dSThierry Reding spi@7000d600 { 584742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 585742af7e7SThierry Reding reg = <0x0 0x7000d600 0x0 0x200>; 586742af7e7SThierry Reding interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 587742af7e7SThierry Reding #address-cells = <1>; 588742af7e7SThierry Reding #size-cells = <0>; 589742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC2>; 590742af7e7SThierry Reding clock-names = "spi"; 591742af7e7SThierry Reding resets = <&tegra_car 44>; 592742af7e7SThierry Reding reset-names = "spi"; 593742af7e7SThierry Reding dmas = <&apbdma 16>, <&apbdma 16>; 594742af7e7SThierry Reding dma-names = "rx", "tx"; 595742af7e7SThierry Reding status = "disabled"; 596742af7e7SThierry Reding }; 597742af7e7SThierry Reding 598be70771dSThierry Reding spi@7000d800 { 599742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 600742af7e7SThierry Reding reg = <0x0 0x7000d800 0x0 0x200>; 601742af7e7SThierry Reding interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 602742af7e7SThierry Reding #address-cells = <1>; 603742af7e7SThierry Reding #size-cells = <0>; 604742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC3>; 605742af7e7SThierry Reding clock-names = "spi"; 606742af7e7SThierry Reding resets = <&tegra_car 46>; 607742af7e7SThierry Reding reset-names = "spi"; 608742af7e7SThierry Reding dmas = <&apbdma 17>, <&apbdma 17>; 609742af7e7SThierry Reding dma-names = "rx", "tx"; 610742af7e7SThierry Reding status = "disabled"; 611742af7e7SThierry Reding }; 612742af7e7SThierry Reding 613be70771dSThierry Reding spi@7000da00 { 614742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 615742af7e7SThierry Reding reg = <0x0 0x7000da00 0x0 0x200>; 616742af7e7SThierry Reding interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 617742af7e7SThierry Reding #address-cells = <1>; 618742af7e7SThierry Reding #size-cells = <0>; 619742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC4>; 620742af7e7SThierry Reding clock-names = "spi"; 621742af7e7SThierry Reding resets = <&tegra_car 68>; 622742af7e7SThierry Reding reset-names = "spi"; 623742af7e7SThierry Reding dmas = <&apbdma 18>, <&apbdma 18>; 624742af7e7SThierry Reding dma-names = "rx", "tx"; 625742af7e7SThierry Reding status = "disabled"; 626742af7e7SThierry Reding }; 627742af7e7SThierry Reding 628be70771dSThierry Reding rtc@7000e000 { 629742af7e7SThierry Reding compatible = "nvidia,tegra210-rtc", "nvidia,tegra20-rtc"; 630742af7e7SThierry Reding reg = <0x0 0x7000e000 0x0 0x100>; 631742af7e7SThierry Reding interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 632742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_RTC>; 633742af7e7SThierry Reding clock-names = "rtc"; 634742af7e7SThierry Reding }; 635742af7e7SThierry Reding 636be70771dSThierry Reding pmc: pmc@7000e400 { 637742af7e7SThierry Reding compatible = "nvidia,tegra210-pmc"; 638742af7e7SThierry Reding reg = <0x0 0x7000e400 0x0 0x400>; 639742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; 640742af7e7SThierry Reding clock-names = "pclk", "clk32k_in"; 641c2b82445SJon Hunter 642c2b82445SJon Hunter powergates { 643c2b82445SJon Hunter pd_audio: aud { 644c2b82445SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 645c2b82445SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 646c2b82445SJon Hunter resets = <&tegra_car 198>; 647c2b82445SJon Hunter #power-domain-cells = <0>; 648c2b82445SJon Hunter }; 649c2b82445SJon Hunter }; 650742af7e7SThierry Reding }; 651742af7e7SThierry Reding 652be70771dSThierry Reding fuse@7000f800 { 653742af7e7SThierry Reding compatible = "nvidia,tegra210-efuse"; 654742af7e7SThierry Reding reg = <0x0 0x7000f800 0x0 0x400>; 655742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_FUSE>; 656742af7e7SThierry Reding clock-names = "fuse"; 657742af7e7SThierry Reding resets = <&tegra_car 39>; 658742af7e7SThierry Reding reset-names = "fuse"; 659742af7e7SThierry Reding }; 660742af7e7SThierry Reding 661be70771dSThierry Reding mc: memory-controller@70019000 { 662742af7e7SThierry Reding compatible = "nvidia,tegra210-mc"; 663742af7e7SThierry Reding reg = <0x0 0x70019000 0x0 0x1000>; 664742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MC>; 665742af7e7SThierry Reding clock-names = "mc"; 666742af7e7SThierry Reding 667742af7e7SThierry Reding interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 668742af7e7SThierry Reding 669742af7e7SThierry Reding #iommu-cells = <1>; 670742af7e7SThierry Reding }; 671742af7e7SThierry Reding 672be70771dSThierry Reding hda@70030000 { 673742af7e7SThierry Reding compatible = "nvidia,tegra210-hda", "nvidia,tegra30-hda"; 674742af7e7SThierry Reding reg = <0x0 0x70030000 0x0 0x10000>; 675742af7e7SThierry Reding interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 676742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HDA>, 677742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2HDMI>, 678742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2CODEC_2X>; 679742af7e7SThierry Reding clock-names = "hda", "hda2hdmi", "hda2codec_2x"; 680742af7e7SThierry Reding resets = <&tegra_car 125>, /* hda */ 681742af7e7SThierry Reding <&tegra_car 128>, /* hda2hdmi */ 682742af7e7SThierry Reding <&tegra_car 111>; /* hda2codec_2x */ 683742af7e7SThierry Reding reset-names = "hda", "hda2hdmi", "hda2codec_2x"; 684742af7e7SThierry Reding status = "disabled"; 685742af7e7SThierry Reding }; 686742af7e7SThierry Reding 687e7a99ac2SThierry Reding usb@70090000 { 688e7a99ac2SThierry Reding compatible = "nvidia,tegra210-xusb"; 689e7a99ac2SThierry Reding reg = <0x0 0x70090000 0x0 0x8000>, 690e7a99ac2SThierry Reding <0x0 0x70098000 0x0 0x1000>, 691e7a99ac2SThierry Reding <0x0 0x70099000 0x0 0x1000>; 692e7a99ac2SThierry Reding reg-names = "hcd", "fpci", "ipfs"; 693e7a99ac2SThierry Reding 694e7a99ac2SThierry Reding interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 6959168e1dbSJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 696e7a99ac2SThierry Reding 697e7a99ac2SThierry Reding clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>, 698e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>, 699e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>, 700e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS>, 701e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>, 702e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>, 703e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, 704e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, 705e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U_480M>, 706e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_CLK_M>, 707e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>; 708e7a99ac2SThierry Reding clock-names = "xusb_host", "xusb_host_src", 709e7a99ac2SThierry Reding "xusb_falcon_src", "xusb_ss", 710e7a99ac2SThierry Reding "xusb_ss_div2", "xusb_ss_src", 711e7a99ac2SThierry Reding "xusb_hs_src", "xusb_fs_src", 712e7a99ac2SThierry Reding "pll_u_480m", "clk_m", "pll_e"; 713e7a99ac2SThierry Reding resets = <&tegra_car 89>, <&tegra_car 156>, 714e7a99ac2SThierry Reding <&tegra_car 143>; 715e7a99ac2SThierry Reding reset-names = "xusb_host", "xusb_ss", "xusb_src"; 716e7a99ac2SThierry Reding 717e7a99ac2SThierry Reding nvidia,xusb-padctl = <&padctl>; 718e7a99ac2SThierry Reding 719e7a99ac2SThierry Reding status = "disabled"; 720e7a99ac2SThierry Reding }; 721e7a99ac2SThierry Reding 7224e07ac90SThierry Reding padctl: padctl@7009f000 { 7234e07ac90SThierry Reding compatible = "nvidia,tegra210-xusb-padctl"; 7244e07ac90SThierry Reding reg = <0x0 0x7009f000 0x0 0x1000>; 7254e07ac90SThierry Reding resets = <&tegra_car 142>; 7264e07ac90SThierry Reding reset-names = "padctl"; 7274e07ac90SThierry Reding 7284e07ac90SThierry Reding status = "disabled"; 7294e07ac90SThierry Reding 7304e07ac90SThierry Reding pads { 7314e07ac90SThierry Reding usb2 { 7324e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>; 7334e07ac90SThierry Reding clock-names = "trk"; 7344e07ac90SThierry Reding status = "disabled"; 7354e07ac90SThierry Reding 7364e07ac90SThierry Reding lanes { 7374e07ac90SThierry Reding usb2-0 { 7384e07ac90SThierry Reding status = "disabled"; 7394e07ac90SThierry Reding #phy-cells = <0>; 7404e07ac90SThierry Reding }; 7414e07ac90SThierry Reding 7424e07ac90SThierry Reding usb2-1 { 7434e07ac90SThierry Reding status = "disabled"; 7444e07ac90SThierry Reding #phy-cells = <0>; 7454e07ac90SThierry Reding }; 7464e07ac90SThierry Reding 7474e07ac90SThierry Reding usb2-2 { 7484e07ac90SThierry Reding status = "disabled"; 7494e07ac90SThierry Reding #phy-cells = <0>; 7504e07ac90SThierry Reding }; 7514e07ac90SThierry Reding 7524e07ac90SThierry Reding usb2-3 { 7534e07ac90SThierry Reding status = "disabled"; 7544e07ac90SThierry Reding #phy-cells = <0>; 7554e07ac90SThierry Reding }; 7564e07ac90SThierry Reding }; 7574e07ac90SThierry Reding }; 7584e07ac90SThierry Reding 7594e07ac90SThierry Reding hsic { 7604e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>; 7614e07ac90SThierry Reding clock-names = "trk"; 7624e07ac90SThierry Reding status = "disabled"; 7634e07ac90SThierry Reding 7644e07ac90SThierry Reding lanes { 7654e07ac90SThierry Reding hsic-0 { 7664e07ac90SThierry Reding status = "disabled"; 7674e07ac90SThierry Reding #phy-cells = <0>; 7684e07ac90SThierry Reding }; 7694e07ac90SThierry Reding 7704e07ac90SThierry Reding hsic-1 { 7714e07ac90SThierry Reding status = "disabled"; 7724e07ac90SThierry Reding #phy-cells = <0>; 7734e07ac90SThierry Reding }; 7744e07ac90SThierry Reding }; 7754e07ac90SThierry Reding }; 7764e07ac90SThierry Reding 7774e07ac90SThierry Reding pcie { 7784e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 7794e07ac90SThierry Reding clock-names = "pll"; 7804e07ac90SThierry Reding resets = <&tegra_car 205>; 7814e07ac90SThierry Reding reset-names = "phy"; 7824e07ac90SThierry Reding status = "disabled"; 7834e07ac90SThierry Reding 7844e07ac90SThierry Reding lanes { 7854e07ac90SThierry Reding pcie-0 { 7864e07ac90SThierry Reding status = "disabled"; 7874e07ac90SThierry Reding #phy-cells = <0>; 7884e07ac90SThierry Reding }; 7894e07ac90SThierry Reding 7904e07ac90SThierry Reding pcie-1 { 7914e07ac90SThierry Reding status = "disabled"; 7924e07ac90SThierry Reding #phy-cells = <0>; 7934e07ac90SThierry Reding }; 7944e07ac90SThierry Reding 7954e07ac90SThierry Reding pcie-2 { 7964e07ac90SThierry Reding status = "disabled"; 7974e07ac90SThierry Reding #phy-cells = <0>; 7984e07ac90SThierry Reding }; 7994e07ac90SThierry Reding 8004e07ac90SThierry Reding pcie-3 { 8014e07ac90SThierry Reding status = "disabled"; 8024e07ac90SThierry Reding #phy-cells = <0>; 8034e07ac90SThierry Reding }; 8044e07ac90SThierry Reding 8054e07ac90SThierry Reding pcie-4 { 8064e07ac90SThierry Reding status = "disabled"; 8074e07ac90SThierry Reding #phy-cells = <0>; 8084e07ac90SThierry Reding }; 8094e07ac90SThierry Reding 8104e07ac90SThierry Reding pcie-5 { 8114e07ac90SThierry Reding status = "disabled"; 8124e07ac90SThierry Reding #phy-cells = <0>; 8134e07ac90SThierry Reding }; 8144e07ac90SThierry Reding 8154e07ac90SThierry Reding pcie-6 { 8164e07ac90SThierry Reding status = "disabled"; 8174e07ac90SThierry Reding #phy-cells = <0>; 8184e07ac90SThierry Reding }; 8194e07ac90SThierry Reding }; 8204e07ac90SThierry Reding }; 8214e07ac90SThierry Reding 8224e07ac90SThierry Reding sata { 8234e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 8244e07ac90SThierry Reding clock-names = "pll"; 8254e07ac90SThierry Reding resets = <&tegra_car 204>; 8264e07ac90SThierry Reding reset-names = "phy"; 8274e07ac90SThierry Reding status = "disabled"; 8284e07ac90SThierry Reding 8294e07ac90SThierry Reding lanes { 8304e07ac90SThierry Reding sata-0 { 8314e07ac90SThierry Reding status = "disabled"; 8324e07ac90SThierry Reding #phy-cells = <0>; 8334e07ac90SThierry Reding }; 8344e07ac90SThierry Reding }; 8354e07ac90SThierry Reding }; 8364e07ac90SThierry Reding }; 8374e07ac90SThierry Reding 8384e07ac90SThierry Reding ports { 8394e07ac90SThierry Reding usb2-0 { 8404e07ac90SThierry Reding status = "disabled"; 8414e07ac90SThierry Reding }; 8424e07ac90SThierry Reding 8434e07ac90SThierry Reding usb2-1 { 8444e07ac90SThierry Reding status = "disabled"; 8454e07ac90SThierry Reding }; 8464e07ac90SThierry Reding 8474e07ac90SThierry Reding usb2-2 { 8484e07ac90SThierry Reding status = "disabled"; 8494e07ac90SThierry Reding }; 8504e07ac90SThierry Reding 8514e07ac90SThierry Reding usb2-3 { 8524e07ac90SThierry Reding status = "disabled"; 8534e07ac90SThierry Reding }; 8544e07ac90SThierry Reding 8554e07ac90SThierry Reding hsic-0 { 8564e07ac90SThierry Reding status = "disabled"; 8574e07ac90SThierry Reding }; 8584e07ac90SThierry Reding 8594e07ac90SThierry Reding usb3-0 { 8604e07ac90SThierry Reding status = "disabled"; 8614e07ac90SThierry Reding }; 8624e07ac90SThierry Reding 8634e07ac90SThierry Reding usb3-1 { 8644e07ac90SThierry Reding status = "disabled"; 8654e07ac90SThierry Reding }; 8664e07ac90SThierry Reding 8674e07ac90SThierry Reding usb3-2 { 8684e07ac90SThierry Reding status = "disabled"; 8694e07ac90SThierry Reding }; 8704e07ac90SThierry Reding 8714e07ac90SThierry Reding usb3-3 { 8724e07ac90SThierry Reding status = "disabled"; 8734e07ac90SThierry Reding }; 8744e07ac90SThierry Reding }; 8754e07ac90SThierry Reding }; 8764e07ac90SThierry Reding 877be70771dSThierry Reding sdhci@700b0000 { 878742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 879742af7e7SThierry Reding reg = <0x0 0x700b0000 0x0 0x200>; 880742af7e7SThierry Reding interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 881742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC1>; 882742af7e7SThierry Reding clock-names = "sdhci"; 883742af7e7SThierry Reding resets = <&tegra_car 14>; 884742af7e7SThierry Reding reset-names = "sdhci"; 885742af7e7SThierry Reding status = "disabled"; 886742af7e7SThierry Reding }; 887742af7e7SThierry Reding 888be70771dSThierry Reding sdhci@700b0200 { 889742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 890742af7e7SThierry Reding reg = <0x0 0x700b0200 0x0 0x200>; 891742af7e7SThierry Reding interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 892742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC2>; 893742af7e7SThierry Reding clock-names = "sdhci"; 894742af7e7SThierry Reding resets = <&tegra_car 9>; 895742af7e7SThierry Reding reset-names = "sdhci"; 896742af7e7SThierry Reding status = "disabled"; 897742af7e7SThierry Reding }; 898742af7e7SThierry Reding 899be70771dSThierry Reding sdhci@700b0400 { 900742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 901742af7e7SThierry Reding reg = <0x0 0x700b0400 0x0 0x200>; 902742af7e7SThierry Reding interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 903742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC3>; 904742af7e7SThierry Reding clock-names = "sdhci"; 905742af7e7SThierry Reding resets = <&tegra_car 69>; 906742af7e7SThierry Reding reset-names = "sdhci"; 907742af7e7SThierry Reding status = "disabled"; 908742af7e7SThierry Reding }; 909742af7e7SThierry Reding 910be70771dSThierry Reding sdhci@700b0600 { 911742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 912742af7e7SThierry Reding reg = <0x0 0x700b0600 0x0 0x200>; 913742af7e7SThierry Reding interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 914742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC4>; 915742af7e7SThierry Reding clock-names = "sdhci"; 916742af7e7SThierry Reding resets = <&tegra_car 15>; 917742af7e7SThierry Reding reset-names = "sdhci"; 918742af7e7SThierry Reding status = "disabled"; 919742af7e7SThierry Reding }; 920742af7e7SThierry Reding 921be70771dSThierry Reding mipi: mipi@700e3000 { 922742af7e7SThierry Reding compatible = "nvidia,tegra210-mipi"; 923742af7e7SThierry Reding reg = <0x0 0x700e3000 0x0 0x100>; 924742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MIPI_CAL>; 925742af7e7SThierry Reding clock-names = "mipi-cal"; 926742af7e7SThierry Reding #nvidia,mipi-calibrate-cells = <1>; 927742af7e7SThierry Reding }; 928742af7e7SThierry Reding 9290f133090SJon Hunter aconnect@702c0000 { 9300f133090SJon Hunter compatible = "nvidia,tegra210-aconnect"; 9310f133090SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 9320f133090SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 9330f133090SJon Hunter clock-names = "ape", "apb2ape"; 9340f133090SJon Hunter power-domains = <&pd_audio>; 9350f133090SJon Hunter #address-cells = <1>; 9360f133090SJon Hunter #size-cells = <1>; 9370f133090SJon Hunter ranges = <0x702c0000 0x0 0x702c0000 0x00040000>; 9380f133090SJon Hunter status = "disabled"; 9390f133090SJon Hunter }; 9400f133090SJon Hunter 941be70771dSThierry Reding spi@70410000 { 942742af7e7SThierry Reding compatible = "nvidia,tegra210-qspi"; 943742af7e7SThierry Reding reg = <0x0 0x70410000 0x0 0x1000>; 944742af7e7SThierry Reding interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 945742af7e7SThierry Reding #address-cells = <1>; 946742af7e7SThierry Reding #size-cells = <0>; 947742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_QSPI>; 948742af7e7SThierry Reding clock-names = "qspi"; 949742af7e7SThierry Reding resets = <&tegra_car 211>; 950742af7e7SThierry Reding reset-names = "qspi"; 951742af7e7SThierry Reding dmas = <&apbdma 5>, <&apbdma 5>; 952742af7e7SThierry Reding dma-names = "rx", "tx"; 953742af7e7SThierry Reding status = "disabled"; 954742af7e7SThierry Reding }; 955742af7e7SThierry Reding 956be70771dSThierry Reding usb@7d000000 { 957742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 958742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>; 959742af7e7SThierry Reding interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 960742af7e7SThierry Reding phy_type = "utmi"; 961742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>; 962742af7e7SThierry Reding clock-names = "usb"; 963742af7e7SThierry Reding resets = <&tegra_car 22>; 964742af7e7SThierry Reding reset-names = "usb"; 965742af7e7SThierry Reding nvidia,phy = <&phy1>; 966742af7e7SThierry Reding status = "disabled"; 967742af7e7SThierry Reding }; 968742af7e7SThierry Reding 969be70771dSThierry Reding phy1: usb-phy@7d000000 { 970742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 971742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>, 972742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 973742af7e7SThierry Reding phy_type = "utmi"; 974742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>, 975742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 976742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 977742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 978742af7e7SThierry Reding resets = <&tegra_car 22>, <&tegra_car 22>; 979742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 980742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 981742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 982742af7e7SThierry Reding nvidia,elastic-limit = <16>; 983742af7e7SThierry Reding nvidia,term-range-adj = <6>; 984742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 985742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 986742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 987742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 988742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 989742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 990742af7e7SThierry Reding nvidia,has-utmi-pad-registers; 991742af7e7SThierry Reding status = "disabled"; 992742af7e7SThierry Reding }; 993742af7e7SThierry Reding 994be70771dSThierry Reding usb@7d004000 { 995742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 996742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>; 997742af7e7SThierry Reding interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 998742af7e7SThierry Reding phy_type = "utmi"; 999742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>; 1000742af7e7SThierry Reding clock-names = "usb"; 1001742af7e7SThierry Reding resets = <&tegra_car 58>; 1002742af7e7SThierry Reding reset-names = "usb"; 1003742af7e7SThierry Reding nvidia,phy = <&phy2>; 1004742af7e7SThierry Reding status = "disabled"; 1005742af7e7SThierry Reding }; 1006742af7e7SThierry Reding 1007be70771dSThierry Reding phy2: usb-phy@7d004000 { 1008742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1009742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>, 1010742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1011742af7e7SThierry Reding phy_type = "utmi"; 1012742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>, 1013742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1014742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1015742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1016742af7e7SThierry Reding resets = <&tegra_car 58>, <&tegra_car 22>; 1017742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1018742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1019742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1020742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1021742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1022742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1023742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1024742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1025742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1026742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1027742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1028742af7e7SThierry Reding status = "disabled"; 1029742af7e7SThierry Reding }; 1030742af7e7SThierry Reding 1031742af7e7SThierry Reding cpus { 1032742af7e7SThierry Reding #address-cells = <1>; 1033742af7e7SThierry Reding #size-cells = <0>; 1034742af7e7SThierry Reding 1035742af7e7SThierry Reding cpu@0 { 1036742af7e7SThierry Reding device_type = "cpu"; 1037742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1038742af7e7SThierry Reding reg = <0>; 1039742af7e7SThierry Reding }; 1040742af7e7SThierry Reding 1041742af7e7SThierry Reding cpu@1 { 1042742af7e7SThierry Reding device_type = "cpu"; 1043742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1044742af7e7SThierry Reding reg = <1>; 1045742af7e7SThierry Reding }; 1046742af7e7SThierry Reding 1047742af7e7SThierry Reding cpu@2 { 1048742af7e7SThierry Reding device_type = "cpu"; 1049742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1050742af7e7SThierry Reding reg = <2>; 1051742af7e7SThierry Reding }; 1052742af7e7SThierry Reding 1053742af7e7SThierry Reding cpu@3 { 1054742af7e7SThierry Reding device_type = "cpu"; 1055742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1056742af7e7SThierry Reding reg = <3>; 1057742af7e7SThierry Reding }; 1058742af7e7SThierry Reding }; 1059742af7e7SThierry Reding 1060742af7e7SThierry Reding timer { 1061742af7e7SThierry Reding compatible = "arm,armv8-timer"; 1062742af7e7SThierry Reding interrupts = <GIC_PPI 13 1063742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1064742af7e7SThierry Reding <GIC_PPI 14 1065742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1066742af7e7SThierry Reding <GIC_PPI 11 1067742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1068742af7e7SThierry Reding <GIC_PPI 10 1069742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 1070742af7e7SThierry Reding interrupt-parent = <&gic>; 1071742af7e7SThierry Reding }; 1072742af7e7SThierry Reding}; 1073