1742af7e7SThierry Reding#include <dt-bindings/clock/tegra210-car.h> 2742af7e7SThierry Reding#include <dt-bindings/gpio/tegra-gpio.h> 3742af7e7SThierry Reding#include <dt-bindings/memory/tegra210-mc.h> 4742af7e7SThierry Reding#include <dt-bindings/pinctrl/pinctrl-tegra.h> 5742af7e7SThierry Reding#include <dt-bindings/interrupt-controller/arm-gic.h> 6e2bed1ebSWei Ni#include <dt-bindings/thermal/tegra124-soctherm.h> 7742af7e7SThierry Reding 8742af7e7SThierry Reding/ { 9742af7e7SThierry Reding compatible = "nvidia,tegra210"; 10742af7e7SThierry Reding interrupt-parent = <&lic>; 11742af7e7SThierry Reding #address-cells = <2>; 12742af7e7SThierry Reding #size-cells = <2>; 13742af7e7SThierry Reding 14589a2d3fSThierry Reding pcie-controller@01003000 { 15589a2d3fSThierry Reding compatible = "nvidia,tegra210-pcie"; 16589a2d3fSThierry Reding device_type = "pci"; 17589a2d3fSThierry Reding reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ 18589a2d3fSThierry Reding 0x0 0x01003800 0x0 0x00000800 /* AFI registers */ 19589a2d3fSThierry Reding 0x0 0x02000000 0x0 0x10000000>; /* configuration space */ 20589a2d3fSThierry Reding reg-names = "pads", "afi", "cs"; 21589a2d3fSThierry Reding interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */ 22589a2d3fSThierry Reding <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */ 23589a2d3fSThierry Reding interrupt-names = "intr", "msi"; 24589a2d3fSThierry Reding 25589a2d3fSThierry Reding #interrupt-cells = <1>; 26589a2d3fSThierry Reding interrupt-map-mask = <0 0 0 0>; 27589a2d3fSThierry Reding interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 28589a2d3fSThierry Reding 29589a2d3fSThierry Reding bus-range = <0x00 0xff>; 30589a2d3fSThierry Reding #address-cells = <3>; 31589a2d3fSThierry Reding #size-cells = <2>; 32589a2d3fSThierry Reding 33589a2d3fSThierry Reding ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */ 34589a2d3fSThierry Reding 0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */ 35589a2d3fSThierry Reding 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */ 36589a2d3fSThierry Reding 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */ 37589a2d3fSThierry Reding 0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */ 38589a2d3fSThierry Reding 39589a2d3fSThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCIE>, 40589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_AFI>, 41589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>, 42589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_CML0>; 43589a2d3fSThierry Reding clock-names = "pex", "afi", "pll_e", "cml"; 44589a2d3fSThierry Reding resets = <&tegra_car 70>, 45589a2d3fSThierry Reding <&tegra_car 72>, 46589a2d3fSThierry Reding <&tegra_car 74>; 47589a2d3fSThierry Reding reset-names = "pex", "afi", "pcie_x"; 48589a2d3fSThierry Reding status = "disabled"; 49589a2d3fSThierry Reding 50589a2d3fSThierry Reding pci@1,0 { 51589a2d3fSThierry Reding device_type = "pci"; 52589a2d3fSThierry Reding assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; 53589a2d3fSThierry Reding reg = <0x000800 0 0 0 0>; 54589a2d3fSThierry Reding status = "disabled"; 55589a2d3fSThierry Reding 56589a2d3fSThierry Reding #address-cells = <3>; 57589a2d3fSThierry Reding #size-cells = <2>; 58589a2d3fSThierry Reding ranges; 59589a2d3fSThierry Reding 60589a2d3fSThierry Reding nvidia,num-lanes = <4>; 61589a2d3fSThierry Reding }; 62589a2d3fSThierry Reding 63589a2d3fSThierry Reding pci@2,0 { 64589a2d3fSThierry Reding device_type = "pci"; 65589a2d3fSThierry Reding assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; 66589a2d3fSThierry Reding reg = <0x001000 0 0 0 0>; 67589a2d3fSThierry Reding status = "disabled"; 68589a2d3fSThierry Reding 69589a2d3fSThierry Reding #address-cells = <3>; 70589a2d3fSThierry Reding #size-cells = <2>; 71589a2d3fSThierry Reding ranges; 72589a2d3fSThierry Reding 73589a2d3fSThierry Reding nvidia,num-lanes = <1>; 74589a2d3fSThierry Reding }; 75589a2d3fSThierry Reding }; 76589a2d3fSThierry Reding 77be70771dSThierry Reding host1x@50000000 { 78742af7e7SThierry Reding compatible = "nvidia,tegra210-host1x", "simple-bus"; 79742af7e7SThierry Reding reg = <0x0 0x50000000 0x0 0x00034000>; 80742af7e7SThierry Reding interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */ 81742af7e7SThierry Reding <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */ 82742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HOST1X>; 83742af7e7SThierry Reding clock-names = "host1x"; 84742af7e7SThierry Reding resets = <&tegra_car 28>; 85742af7e7SThierry Reding reset-names = "host1x"; 86742af7e7SThierry Reding 87742af7e7SThierry Reding #address-cells = <2>; 88742af7e7SThierry Reding #size-cells = <2>; 89742af7e7SThierry Reding 90742af7e7SThierry Reding ranges = <0x0 0x54000000 0x0 0x54000000 0x0 0x01000000>; 91742af7e7SThierry Reding 92be70771dSThierry Reding dpaux1: dpaux@54040000 { 93742af7e7SThierry Reding compatible = "nvidia,tegra210-dpaux"; 94742af7e7SThierry Reding reg = <0x0 0x54040000 0x0 0x00040000>; 95742af7e7SThierry Reding interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 96742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX1>, 97742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 98742af7e7SThierry Reding clock-names = "dpaux", "parent"; 99742af7e7SThierry Reding resets = <&tegra_car 207>; 100742af7e7SThierry Reding reset-names = "dpaux"; 10196d1f078SJon Hunter power-domains = <&pd_sor>; 102742af7e7SThierry Reding status = "disabled"; 10366b2d6e9SJon Hunter 10466b2d6e9SJon Hunter state_dpaux1_aux: pinmux-aux { 10566b2d6e9SJon Hunter groups = "dpaux-io"; 10666b2d6e9SJon Hunter function = "aux"; 10766b2d6e9SJon Hunter }; 10866b2d6e9SJon Hunter 10966b2d6e9SJon Hunter state_dpaux1_i2c: pinmux-i2c { 11066b2d6e9SJon Hunter groups = "dpaux-io"; 11166b2d6e9SJon Hunter function = "i2c"; 11266b2d6e9SJon Hunter }; 11366b2d6e9SJon Hunter 11466b2d6e9SJon Hunter state_dpaux1_off: pinmux-off { 11566b2d6e9SJon Hunter groups = "dpaux-io"; 11666b2d6e9SJon Hunter function = "off"; 11766b2d6e9SJon Hunter }; 11866b2d6e9SJon Hunter 11966b2d6e9SJon Hunter i2c-bus { 12066b2d6e9SJon Hunter #address-cells = <1>; 12166b2d6e9SJon Hunter #size-cells = <0>; 12266b2d6e9SJon Hunter }; 123742af7e7SThierry Reding }; 124742af7e7SThierry Reding 125be70771dSThierry Reding vi@54080000 { 126742af7e7SThierry Reding compatible = "nvidia,tegra210-vi"; 127742af7e7SThierry Reding reg = <0x0 0x54080000 0x0 0x00040000>; 128742af7e7SThierry Reding interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 129742af7e7SThierry Reding status = "disabled"; 130742af7e7SThierry Reding }; 131742af7e7SThierry Reding 132be70771dSThierry Reding tsec@54100000 { 133742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 134742af7e7SThierry Reding reg = <0x0 0x54100000 0x0 0x00040000>; 135742af7e7SThierry Reding }; 136742af7e7SThierry Reding 137be70771dSThierry Reding dc@54200000 { 138742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 139742af7e7SThierry Reding reg = <0x0 0x54200000 0x0 0x00040000>; 140742af7e7SThierry Reding interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 141742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP1>, 142742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 143742af7e7SThierry Reding clock-names = "dc", "parent"; 144742af7e7SThierry Reding resets = <&tegra_car 27>; 145742af7e7SThierry Reding reset-names = "dc"; 146742af7e7SThierry Reding 147742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DC>; 148742af7e7SThierry Reding 149742af7e7SThierry Reding nvidia,head = <0>; 150742af7e7SThierry Reding }; 151742af7e7SThierry Reding 152be70771dSThierry Reding dc@54240000 { 153742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 154742af7e7SThierry Reding reg = <0x0 0x54240000 0x0 0x00040000>; 155742af7e7SThierry Reding interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 156742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP2>, 157742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 158742af7e7SThierry Reding clock-names = "dc", "parent"; 159742af7e7SThierry Reding resets = <&tegra_car 26>; 160742af7e7SThierry Reding reset-names = "dc"; 161742af7e7SThierry Reding 162742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DCB>; 163742af7e7SThierry Reding 164742af7e7SThierry Reding nvidia,head = <1>; 165742af7e7SThierry Reding }; 166742af7e7SThierry Reding 167be70771dSThierry Reding dsi@54300000 { 168742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 169742af7e7SThierry Reding reg = <0x0 0x54300000 0x0 0x00040000>; 170742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIA>, 171742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIALP>, 172742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 173742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 174742af7e7SThierry Reding resets = <&tegra_car 48>; 175742af7e7SThierry Reding reset-names = "dsi"; 17696d1f078SJon Hunter power-domains = <&pd_sor>; 177742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x0c0>; /* DSIA & DSIB pads */ 178742af7e7SThierry Reding 179742af7e7SThierry Reding status = "disabled"; 180742af7e7SThierry Reding 181742af7e7SThierry Reding #address-cells = <1>; 182742af7e7SThierry Reding #size-cells = <0>; 183742af7e7SThierry Reding }; 184742af7e7SThierry Reding 185be70771dSThierry Reding vic@54340000 { 186742af7e7SThierry Reding compatible = "nvidia,tegra210-vic"; 187742af7e7SThierry Reding reg = <0x0 0x54340000 0x0 0x00040000>; 188742af7e7SThierry Reding status = "disabled"; 189742af7e7SThierry Reding }; 190742af7e7SThierry Reding 191be70771dSThierry Reding nvjpg@54380000 { 192742af7e7SThierry Reding compatible = "nvidia,tegra210-nvjpg"; 193742af7e7SThierry Reding reg = <0x0 0x54380000 0x0 0x00040000>; 194742af7e7SThierry Reding status = "disabled"; 195742af7e7SThierry Reding }; 196742af7e7SThierry Reding 197be70771dSThierry Reding dsi@54400000 { 198742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 199742af7e7SThierry Reding reg = <0x0 0x54400000 0x0 0x00040000>; 200742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIB>, 201742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIBLP>, 202742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 203742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 204742af7e7SThierry Reding resets = <&tegra_car 82>; 205742af7e7SThierry Reding reset-names = "dsi"; 20696d1f078SJon Hunter power-domains = <&pd_sor>; 207742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x300>; /* DSIC & DSID pads */ 208742af7e7SThierry Reding 209742af7e7SThierry Reding status = "disabled"; 210742af7e7SThierry Reding 211742af7e7SThierry Reding #address-cells = <1>; 212742af7e7SThierry Reding #size-cells = <0>; 213742af7e7SThierry Reding }; 214742af7e7SThierry Reding 215be70771dSThierry Reding nvdec@54480000 { 216742af7e7SThierry Reding compatible = "nvidia,tegra210-nvdec"; 217742af7e7SThierry Reding reg = <0x0 0x54480000 0x0 0x00040000>; 218742af7e7SThierry Reding status = "disabled"; 219742af7e7SThierry Reding }; 220742af7e7SThierry Reding 221be70771dSThierry Reding nvenc@544c0000 { 222742af7e7SThierry Reding compatible = "nvidia,tegra210-nvenc"; 223742af7e7SThierry Reding reg = <0x0 0x544c0000 0x0 0x00040000>; 224742af7e7SThierry Reding status = "disabled"; 225742af7e7SThierry Reding }; 226742af7e7SThierry Reding 227be70771dSThierry Reding tsec@54500000 { 228742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 229742af7e7SThierry Reding reg = <0x0 0x54500000 0x0 0x00040000>; 230742af7e7SThierry Reding status = "disabled"; 231742af7e7SThierry Reding }; 232742af7e7SThierry Reding 233be70771dSThierry Reding sor@54540000 { 234742af7e7SThierry Reding compatible = "nvidia,tegra210-sor"; 235742af7e7SThierry Reding reg = <0x0 0x54540000 0x0 0x00040000>; 236742af7e7SThierry Reding interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 237742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR0>, 238742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>, 239742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 240742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 241742af7e7SThierry Reding clock-names = "sor", "parent", "dp", "safe"; 242742af7e7SThierry Reding resets = <&tegra_car 182>; 243742af7e7SThierry Reding reset-names = "sor"; 24466b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_aux>; 24566b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_i2c>; 24666b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux_off>; 24766b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 24896d1f078SJon Hunter power-domains = <&pd_sor>; 249742af7e7SThierry Reding status = "disabled"; 250742af7e7SThierry Reding }; 251742af7e7SThierry Reding 252be70771dSThierry Reding sor@54580000 { 253742af7e7SThierry Reding compatible = "nvidia,tegra210-sor1"; 254742af7e7SThierry Reding reg = <0x0 0x54580000 0x0 0x00040000>; 255742af7e7SThierry Reding interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 256742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR1>, 257237d5cc7SThierry Reding <&tegra_car TEGRA210_CLK_SOR1_SRC>, 258742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D2_OUT0>, 259742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 260742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 261237d5cc7SThierry Reding clock-names = "sor", "source", "parent", "dp", "safe"; 262742af7e7SThierry Reding resets = <&tegra_car 183>; 263742af7e7SThierry Reding reset-names = "sor"; 26466b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_aux>; 26566b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_i2c>; 26666b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux1_off>; 26766b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 26896d1f078SJon Hunter power-domains = <&pd_sor>; 269742af7e7SThierry Reding status = "disabled"; 270742af7e7SThierry Reding }; 271742af7e7SThierry Reding 272be70771dSThierry Reding dpaux: dpaux@545c0000 { 273742af7e7SThierry Reding compatible = "nvidia,tegra124-dpaux"; 274742af7e7SThierry Reding reg = <0x0 0x545c0000 0x0 0x00040000>; 275742af7e7SThierry Reding interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 276742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX>, 277742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 278742af7e7SThierry Reding clock-names = "dpaux", "parent"; 279742af7e7SThierry Reding resets = <&tegra_car 181>; 280742af7e7SThierry Reding reset-names = "dpaux"; 28196d1f078SJon Hunter power-domains = <&pd_sor>; 282742af7e7SThierry Reding status = "disabled"; 28366b2d6e9SJon Hunter 28466b2d6e9SJon Hunter state_dpaux_aux: pinmux-aux { 28566b2d6e9SJon Hunter groups = "dpaux-io"; 28666b2d6e9SJon Hunter function = "aux"; 28766b2d6e9SJon Hunter }; 28866b2d6e9SJon Hunter 28966b2d6e9SJon Hunter state_dpaux_i2c: pinmux-i2c { 29066b2d6e9SJon Hunter groups = "dpaux-io"; 29166b2d6e9SJon Hunter function = "i2c"; 29266b2d6e9SJon Hunter }; 29366b2d6e9SJon Hunter 29466b2d6e9SJon Hunter state_dpaux_off: pinmux-off { 29566b2d6e9SJon Hunter groups = "dpaux-io"; 29666b2d6e9SJon Hunter function = "off"; 29766b2d6e9SJon Hunter }; 29866b2d6e9SJon Hunter 29966b2d6e9SJon Hunter i2c-bus { 30066b2d6e9SJon Hunter #address-cells = <1>; 30166b2d6e9SJon Hunter #size-cells = <0>; 30266b2d6e9SJon Hunter }; 303742af7e7SThierry Reding }; 304742af7e7SThierry Reding 305be70771dSThierry Reding isp@54600000 { 306742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 307742af7e7SThierry Reding reg = <0x0 0x54600000 0x0 0x00040000>; 308742af7e7SThierry Reding interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 309742af7e7SThierry Reding status = "disabled"; 310742af7e7SThierry Reding }; 311742af7e7SThierry Reding 312be70771dSThierry Reding isp@54680000 { 313742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 314742af7e7SThierry Reding reg = <0x0 0x54680000 0x0 0x00040000>; 315742af7e7SThierry Reding interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 316742af7e7SThierry Reding status = "disabled"; 317742af7e7SThierry Reding }; 318742af7e7SThierry Reding 319be70771dSThierry Reding i2c@546c0000 { 320742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c-vi"; 321742af7e7SThierry Reding reg = <0x0 0x546c0000 0x0 0x00040000>; 322742af7e7SThierry Reding interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 323742af7e7SThierry Reding status = "disabled"; 324742af7e7SThierry Reding }; 325742af7e7SThierry Reding }; 326742af7e7SThierry Reding 327be70771dSThierry Reding gic: interrupt-controller@50041000 { 328742af7e7SThierry Reding compatible = "arm,gic-400"; 329742af7e7SThierry Reding #interrupt-cells = <3>; 330742af7e7SThierry Reding interrupt-controller; 331742af7e7SThierry Reding reg = <0x0 0x50041000 0x0 0x1000>, 332742af7e7SThierry Reding <0x0 0x50042000 0x0 0x2000>, 333742af7e7SThierry Reding <0x0 0x50044000 0x0 0x2000>, 334742af7e7SThierry Reding <0x0 0x50046000 0x0 0x2000>; 335742af7e7SThierry Reding interrupts = <GIC_PPI 9 336742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 337742af7e7SThierry Reding interrupt-parent = <&gic>; 338742af7e7SThierry Reding }; 339742af7e7SThierry Reding 340be70771dSThierry Reding gpu@57000000 { 341742af7e7SThierry Reding compatible = "nvidia,gm20b"; 342742af7e7SThierry Reding reg = <0x0 0x57000000 0x0 0x01000000>, 343742af7e7SThierry Reding <0x0 0x58000000 0x0 0x01000000>; 344742af7e7SThierry Reding interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 345742af7e7SThierry Reding <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 346742af7e7SThierry Reding interrupt-names = "stall", "nonstall"; 347742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_GPU>, 3484a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_P_OUT5>, 3494a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_G_REF>; 3504a0778e9SAlexandre Courbot clock-names = "gpu", "pwr", "ref"; 351742af7e7SThierry Reding resets = <&tegra_car 184>; 352742af7e7SThierry Reding reset-names = "gpu"; 35330f949bcSAlexandre Courbot 35430f949bcSAlexandre Courbot iommus = <&mc TEGRA_SWGROUP_GPU>; 35530f949bcSAlexandre Courbot 356742af7e7SThierry Reding status = "disabled"; 357742af7e7SThierry Reding }; 358742af7e7SThierry Reding 359be70771dSThierry Reding lic: interrupt-controller@60004000 { 360742af7e7SThierry Reding compatible = "nvidia,tegra210-ictlr"; 361742af7e7SThierry Reding reg = <0x0 0x60004000 0x0 0x40>, /* primary controller */ 362742af7e7SThierry Reding <0x0 0x60004100 0x0 0x40>, /* secondary controller */ 363742af7e7SThierry Reding <0x0 0x60004200 0x0 0x40>, /* tertiary controller */ 364742af7e7SThierry Reding <0x0 0x60004300 0x0 0x40>, /* quaternary controller */ 365742af7e7SThierry Reding <0x0 0x60004400 0x0 0x40>, /* quinary controller */ 366742af7e7SThierry Reding <0x0 0x60004500 0x0 0x40>; /* senary controller */ 367742af7e7SThierry Reding interrupt-controller; 368742af7e7SThierry Reding #interrupt-cells = <3>; 369742af7e7SThierry Reding interrupt-parent = <&gic>; 370742af7e7SThierry Reding }; 371742af7e7SThierry Reding 372be70771dSThierry Reding timer@60005000 { 373742af7e7SThierry Reding compatible = "nvidia,tegra210-timer", "nvidia,tegra20-timer"; 374742af7e7SThierry Reding reg = <0x0 0x60005000 0x0 0x400>; 375742af7e7SThierry Reding interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 376742af7e7SThierry Reding <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 377742af7e7SThierry Reding <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 378742af7e7SThierry Reding <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 379742af7e7SThierry Reding <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 380742af7e7SThierry Reding <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 381742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_TIMER>; 382742af7e7SThierry Reding clock-names = "timer"; 383742af7e7SThierry Reding }; 384742af7e7SThierry Reding 385be70771dSThierry Reding tegra_car: clock@60006000 { 386742af7e7SThierry Reding compatible = "nvidia,tegra210-car"; 387742af7e7SThierry Reding reg = <0x0 0x60006000 0x0 0x1000>; 388742af7e7SThierry Reding #clock-cells = <1>; 389742af7e7SThierry Reding #reset-cells = <1>; 390742af7e7SThierry Reding }; 391742af7e7SThierry Reding 392be70771dSThierry Reding flow-controller@60007000 { 393742af7e7SThierry Reding compatible = "nvidia,tegra210-flowctrl"; 394742af7e7SThierry Reding reg = <0x0 0x60007000 0x0 0x1000>; 395742af7e7SThierry Reding }; 396742af7e7SThierry Reding 397be70771dSThierry Reding gpio: gpio@6000d000 { 39801665512SStephen Warren compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio"; 399742af7e7SThierry Reding reg = <0x0 0x6000d000 0x0 0x1000>; 400742af7e7SThierry Reding interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 401742af7e7SThierry Reding <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 402742af7e7SThierry Reding <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 403742af7e7SThierry Reding <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 404742af7e7SThierry Reding <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 405742af7e7SThierry Reding <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 406742af7e7SThierry Reding <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 407742af7e7SThierry Reding <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 408742af7e7SThierry Reding #gpio-cells = <2>; 409742af7e7SThierry Reding gpio-controller; 410742af7e7SThierry Reding #interrupt-cells = <2>; 411742af7e7SThierry Reding interrupt-controller; 412742af7e7SThierry Reding }; 413742af7e7SThierry Reding 414be70771dSThierry Reding apbdma: dma@60020000 { 415742af7e7SThierry Reding compatible = "nvidia,tegra210-apbdma", "nvidia,tegra148-apbdma"; 416742af7e7SThierry Reding reg = <0x0 0x60020000 0x0 0x1400>; 417742af7e7SThierry Reding interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 418742af7e7SThierry Reding <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 419742af7e7SThierry Reding <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 420742af7e7SThierry Reding <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 421742af7e7SThierry Reding <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 422742af7e7SThierry Reding <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 423742af7e7SThierry Reding <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 424742af7e7SThierry Reding <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 425742af7e7SThierry Reding <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 426742af7e7SThierry Reding <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 427742af7e7SThierry Reding <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 428742af7e7SThierry Reding <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 429742af7e7SThierry Reding <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 430742af7e7SThierry Reding <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 431742af7e7SThierry Reding <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 432742af7e7SThierry Reding <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, 433742af7e7SThierry Reding <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 434742af7e7SThierry Reding <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 435742af7e7SThierry Reding <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 436742af7e7SThierry Reding <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 437742af7e7SThierry Reding <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 438742af7e7SThierry Reding <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, 439742af7e7SThierry Reding <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, 440742af7e7SThierry Reding <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 441742af7e7SThierry Reding <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 442742af7e7SThierry Reding <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 443742af7e7SThierry Reding <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 444742af7e7SThierry Reding <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>, 445742af7e7SThierry Reding <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, 446742af7e7SThierry Reding <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, 447742af7e7SThierry Reding <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 448742af7e7SThierry Reding <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 449742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_APBDMA>; 450742af7e7SThierry Reding clock-names = "dma"; 451742af7e7SThierry Reding resets = <&tegra_car 34>; 452742af7e7SThierry Reding reset-names = "dma"; 453742af7e7SThierry Reding #dma-cells = <1>; 454742af7e7SThierry Reding }; 455742af7e7SThierry Reding 456be70771dSThierry Reding apbmisc@70000800 { 457742af7e7SThierry Reding compatible = "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc"; 458742af7e7SThierry Reding reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */ 459742af7e7SThierry Reding <0x0 0x7000e864 0x0 0x04>; /* Strapping options */ 460742af7e7SThierry Reding }; 461742af7e7SThierry Reding 462be70771dSThierry Reding pinmux: pinmux@700008d4 { 463742af7e7SThierry Reding compatible = "nvidia,tegra210-pinmux"; 464742af7e7SThierry Reding reg = <0x0 0x700008d4 0x0 0x29c>, /* Pad control registers */ 465742af7e7SThierry Reding <0x0 0x70003000 0x0 0x294>; /* Mux registers */ 466742af7e7SThierry Reding }; 467742af7e7SThierry Reding 468742af7e7SThierry Reding /* 469742af7e7SThierry Reding * There are two serial driver i.e. 8250 based simple serial 470742af7e7SThierry Reding * driver and APB DMA based serial driver for higher baudrate 471ef769e32SAdam Buchbinder * and performance. To enable the 8250 based driver, the compatible 472742af7e7SThierry Reding * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable 47368cd8b2eSThierry Reding * the APB DMA based serial driver, the compatible is 474742af7e7SThierry Reding * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart". 475742af7e7SThierry Reding */ 476be70771dSThierry Reding uarta: serial@70006000 { 477742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 478742af7e7SThierry Reding reg = <0x0 0x70006000 0x0 0x40>; 479742af7e7SThierry Reding reg-shift = <2>; 480742af7e7SThierry Reding interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 481742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTA>; 482742af7e7SThierry Reding clock-names = "serial"; 483742af7e7SThierry Reding resets = <&tegra_car 6>; 484742af7e7SThierry Reding reset-names = "serial"; 485742af7e7SThierry Reding dmas = <&apbdma 8>, <&apbdma 8>; 486742af7e7SThierry Reding dma-names = "rx", "tx"; 487742af7e7SThierry Reding status = "disabled"; 488742af7e7SThierry Reding }; 489742af7e7SThierry Reding 490be70771dSThierry Reding uartb: serial@70006040 { 491742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 492742af7e7SThierry Reding reg = <0x0 0x70006040 0x0 0x40>; 493742af7e7SThierry Reding reg-shift = <2>; 494742af7e7SThierry Reding interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 495742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTB>; 496742af7e7SThierry Reding clock-names = "serial"; 497742af7e7SThierry Reding resets = <&tegra_car 7>; 498742af7e7SThierry Reding reset-names = "serial"; 499742af7e7SThierry Reding dmas = <&apbdma 9>, <&apbdma 9>; 500742af7e7SThierry Reding dma-names = "rx", "tx"; 501742af7e7SThierry Reding status = "disabled"; 502742af7e7SThierry Reding }; 503742af7e7SThierry Reding 504be70771dSThierry Reding uartc: serial@70006200 { 505742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 506742af7e7SThierry Reding reg = <0x0 0x70006200 0x0 0x40>; 507742af7e7SThierry Reding reg-shift = <2>; 508742af7e7SThierry Reding interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 509742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTC>; 510742af7e7SThierry Reding clock-names = "serial"; 511742af7e7SThierry Reding resets = <&tegra_car 55>; 512742af7e7SThierry Reding reset-names = "serial"; 513742af7e7SThierry Reding dmas = <&apbdma 10>, <&apbdma 10>; 514742af7e7SThierry Reding dma-names = "rx", "tx"; 515742af7e7SThierry Reding status = "disabled"; 516742af7e7SThierry Reding }; 517742af7e7SThierry Reding 518be70771dSThierry Reding uartd: serial@70006300 { 519742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 520742af7e7SThierry Reding reg = <0x0 0x70006300 0x0 0x40>; 521742af7e7SThierry Reding reg-shift = <2>; 522742af7e7SThierry Reding interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 523742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTD>; 524742af7e7SThierry Reding clock-names = "serial"; 525742af7e7SThierry Reding resets = <&tegra_car 65>; 526742af7e7SThierry Reding reset-names = "serial"; 527742af7e7SThierry Reding dmas = <&apbdma 19>, <&apbdma 19>; 528742af7e7SThierry Reding dma-names = "rx", "tx"; 529742af7e7SThierry Reding status = "disabled"; 530742af7e7SThierry Reding }; 531742af7e7SThierry Reding 532be70771dSThierry Reding pwm: pwm@7000a000 { 533742af7e7SThierry Reding compatible = "nvidia,tegra210-pwm", "nvidia,tegra20-pwm"; 534742af7e7SThierry Reding reg = <0x0 0x7000a000 0x0 0x100>; 535742af7e7SThierry Reding #pwm-cells = <2>; 536742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PWM>; 537742af7e7SThierry Reding clock-names = "pwm"; 538742af7e7SThierry Reding resets = <&tegra_car 17>; 539742af7e7SThierry Reding reset-names = "pwm"; 540742af7e7SThierry Reding status = "disabled"; 541742af7e7SThierry Reding }; 542742af7e7SThierry Reding 543be70771dSThierry Reding i2c@7000c000 { 544742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 545742af7e7SThierry Reding reg = <0x0 0x7000c000 0x0 0x100>; 546742af7e7SThierry Reding interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 547742af7e7SThierry Reding #address-cells = <1>; 548742af7e7SThierry Reding #size-cells = <0>; 549742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C1>; 550742af7e7SThierry Reding clock-names = "div-clk"; 551742af7e7SThierry Reding resets = <&tegra_car 12>; 552742af7e7SThierry Reding reset-names = "i2c"; 553742af7e7SThierry Reding dmas = <&apbdma 21>, <&apbdma 21>; 554742af7e7SThierry Reding dma-names = "rx", "tx"; 555742af7e7SThierry Reding status = "disabled"; 556742af7e7SThierry Reding }; 557742af7e7SThierry Reding 558be70771dSThierry Reding i2c@7000c400 { 559742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 560742af7e7SThierry Reding reg = <0x0 0x7000c400 0x0 0x100>; 561742af7e7SThierry Reding interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 562742af7e7SThierry Reding #address-cells = <1>; 563742af7e7SThierry Reding #size-cells = <0>; 564742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C2>; 565742af7e7SThierry Reding clock-names = "div-clk"; 566742af7e7SThierry Reding resets = <&tegra_car 54>; 567742af7e7SThierry Reding reset-names = "i2c"; 568742af7e7SThierry Reding dmas = <&apbdma 22>, <&apbdma 22>; 569742af7e7SThierry Reding dma-names = "rx", "tx"; 570742af7e7SThierry Reding status = "disabled"; 571742af7e7SThierry Reding }; 572742af7e7SThierry Reding 573be70771dSThierry Reding i2c@7000c500 { 574742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 575742af7e7SThierry Reding reg = <0x0 0x7000c500 0x0 0x100>; 576742af7e7SThierry Reding interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 577742af7e7SThierry Reding #address-cells = <1>; 578742af7e7SThierry Reding #size-cells = <0>; 579742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C3>; 580742af7e7SThierry Reding clock-names = "div-clk"; 581742af7e7SThierry Reding resets = <&tegra_car 67>; 582742af7e7SThierry Reding reset-names = "i2c"; 583742af7e7SThierry Reding dmas = <&apbdma 23>, <&apbdma 23>; 584742af7e7SThierry Reding dma-names = "rx", "tx"; 585742af7e7SThierry Reding status = "disabled"; 586742af7e7SThierry Reding }; 587742af7e7SThierry Reding 588be70771dSThierry Reding i2c@7000c700 { 589742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 590742af7e7SThierry Reding reg = <0x0 0x7000c700 0x0 0x100>; 591742af7e7SThierry Reding interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 592742af7e7SThierry Reding #address-cells = <1>; 593742af7e7SThierry Reding #size-cells = <0>; 594742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C4>; 595742af7e7SThierry Reding clock-names = "div-clk"; 596742af7e7SThierry Reding resets = <&tegra_car 103>; 597742af7e7SThierry Reding reset-names = "i2c"; 598742af7e7SThierry Reding dmas = <&apbdma 26>, <&apbdma 26>; 599742af7e7SThierry Reding dma-names = "rx", "tx"; 60066b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_i2c>; 60166b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_off>; 60266b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 603742af7e7SThierry Reding status = "disabled"; 604742af7e7SThierry Reding }; 605742af7e7SThierry Reding 606be70771dSThierry Reding i2c@7000d000 { 607742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 608742af7e7SThierry Reding reg = <0x0 0x7000d000 0x0 0x100>; 609742af7e7SThierry Reding interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 610742af7e7SThierry Reding #address-cells = <1>; 611742af7e7SThierry Reding #size-cells = <0>; 612742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C5>; 613742af7e7SThierry Reding clock-names = "div-clk"; 614742af7e7SThierry Reding resets = <&tegra_car 47>; 615742af7e7SThierry Reding reset-names = "i2c"; 616742af7e7SThierry Reding dmas = <&apbdma 24>, <&apbdma 24>; 617742af7e7SThierry Reding dma-names = "rx", "tx"; 618742af7e7SThierry Reding status = "disabled"; 619742af7e7SThierry Reding }; 620742af7e7SThierry Reding 621be70771dSThierry Reding i2c@7000d100 { 622742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 623742af7e7SThierry Reding reg = <0x0 0x7000d100 0x0 0x100>; 624742af7e7SThierry Reding interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 625742af7e7SThierry Reding #address-cells = <1>; 626742af7e7SThierry Reding #size-cells = <0>; 627742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C6>; 628742af7e7SThierry Reding clock-names = "div-clk"; 629742af7e7SThierry Reding resets = <&tegra_car 166>; 630742af7e7SThierry Reding reset-names = "i2c"; 631742af7e7SThierry Reding dmas = <&apbdma 30>, <&apbdma 30>; 632742af7e7SThierry Reding dma-names = "rx", "tx"; 63366b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_i2c>; 63466b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_off>; 63566b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 636742af7e7SThierry Reding status = "disabled"; 637742af7e7SThierry Reding }; 638742af7e7SThierry Reding 639be70771dSThierry Reding spi@7000d400 { 640742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 641742af7e7SThierry Reding reg = <0x0 0x7000d400 0x0 0x200>; 642742af7e7SThierry Reding interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 643742af7e7SThierry Reding #address-cells = <1>; 644742af7e7SThierry Reding #size-cells = <0>; 645742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC1>; 646742af7e7SThierry Reding clock-names = "spi"; 647742af7e7SThierry Reding resets = <&tegra_car 41>; 648742af7e7SThierry Reding reset-names = "spi"; 649742af7e7SThierry Reding dmas = <&apbdma 15>, <&apbdma 15>; 650742af7e7SThierry Reding dma-names = "rx", "tx"; 651742af7e7SThierry Reding status = "disabled"; 652742af7e7SThierry Reding }; 653742af7e7SThierry Reding 654be70771dSThierry Reding spi@7000d600 { 655742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 656742af7e7SThierry Reding reg = <0x0 0x7000d600 0x0 0x200>; 657742af7e7SThierry Reding interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 658742af7e7SThierry Reding #address-cells = <1>; 659742af7e7SThierry Reding #size-cells = <0>; 660742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC2>; 661742af7e7SThierry Reding clock-names = "spi"; 662742af7e7SThierry Reding resets = <&tegra_car 44>; 663742af7e7SThierry Reding reset-names = "spi"; 664742af7e7SThierry Reding dmas = <&apbdma 16>, <&apbdma 16>; 665742af7e7SThierry Reding dma-names = "rx", "tx"; 666742af7e7SThierry Reding status = "disabled"; 667742af7e7SThierry Reding }; 668742af7e7SThierry Reding 669be70771dSThierry Reding spi@7000d800 { 670742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 671742af7e7SThierry Reding reg = <0x0 0x7000d800 0x0 0x200>; 672742af7e7SThierry Reding interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 673742af7e7SThierry Reding #address-cells = <1>; 674742af7e7SThierry Reding #size-cells = <0>; 675742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC3>; 676742af7e7SThierry Reding clock-names = "spi"; 677742af7e7SThierry Reding resets = <&tegra_car 46>; 678742af7e7SThierry Reding reset-names = "spi"; 679742af7e7SThierry Reding dmas = <&apbdma 17>, <&apbdma 17>; 680742af7e7SThierry Reding dma-names = "rx", "tx"; 681742af7e7SThierry Reding status = "disabled"; 682742af7e7SThierry Reding }; 683742af7e7SThierry Reding 684be70771dSThierry Reding spi@7000da00 { 685742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 686742af7e7SThierry Reding reg = <0x0 0x7000da00 0x0 0x200>; 687742af7e7SThierry Reding interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 688742af7e7SThierry Reding #address-cells = <1>; 689742af7e7SThierry Reding #size-cells = <0>; 690742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC4>; 691742af7e7SThierry Reding clock-names = "spi"; 692742af7e7SThierry Reding resets = <&tegra_car 68>; 693742af7e7SThierry Reding reset-names = "spi"; 694742af7e7SThierry Reding dmas = <&apbdma 18>, <&apbdma 18>; 695742af7e7SThierry Reding dma-names = "rx", "tx"; 696742af7e7SThierry Reding status = "disabled"; 697742af7e7SThierry Reding }; 698742af7e7SThierry Reding 699be70771dSThierry Reding rtc@7000e000 { 700742af7e7SThierry Reding compatible = "nvidia,tegra210-rtc", "nvidia,tegra20-rtc"; 701742af7e7SThierry Reding reg = <0x0 0x7000e000 0x0 0x100>; 702742af7e7SThierry Reding interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 703742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_RTC>; 704742af7e7SThierry Reding clock-names = "rtc"; 705742af7e7SThierry Reding }; 706742af7e7SThierry Reding 707be70771dSThierry Reding pmc: pmc@7000e400 { 708742af7e7SThierry Reding compatible = "nvidia,tegra210-pmc"; 709742af7e7SThierry Reding reg = <0x0 0x7000e400 0x0 0x400>; 710742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; 711742af7e7SThierry Reding clock-names = "pclk", "clk32k_in"; 712c2b82445SJon Hunter 713c2b82445SJon Hunter powergates { 714c2b82445SJon Hunter pd_audio: aud { 715c2b82445SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 716c2b82445SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 717c2b82445SJon Hunter resets = <&tegra_car 198>; 718c2b82445SJon Hunter #power-domain-cells = <0>; 719c2b82445SJon Hunter }; 720241f02baSJon Hunter 72196d1f078SJon Hunter pd_sor: sor { 72296d1f078SJon Hunter clocks = <&tegra_car TEGRA210_CLK_SOR0>, 72396d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 72496d1f078SJon Hunter <&tegra_car TEGRA210_CLK_CSI>, 72596d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 72696d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 72796d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 72896d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 72996d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 73096d1f078SJon Hunter resets = <&tegra_car TEGRA210_CLK_SOR0>, 73196d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 73296d1f078SJon Hunter <&tegra_car TEGRA210_CLK_CSI>, 73396d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 73496d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 73596d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 73696d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 73796d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 73896d1f078SJon Hunter #power-domain-cells = <0>; 73996d1f078SJon Hunter }; 74096d1f078SJon Hunter 741241f02baSJon Hunter pd_xusbss: xusba { 742241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>; 743241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_SS>; 744241f02baSJon Hunter #power-domain-cells = <0>; 745241f02baSJon Hunter }; 746241f02baSJon Hunter 747241f02baSJon Hunter pd_xusbdev: xusbb { 748241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>; 749241f02baSJon Hunter resets = <&tegra_car 95>; 750241f02baSJon Hunter #power-domain-cells = <0>; 751241f02baSJon Hunter }; 752241f02baSJon Hunter 753241f02baSJon Hunter pd_xusbhost: xusbc { 754241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 755241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 756241f02baSJon Hunter #power-domain-cells = <0>; 757241f02baSJon Hunter }; 758c2b82445SJon Hunter }; 759742af7e7SThierry Reding }; 760742af7e7SThierry Reding 761be70771dSThierry Reding fuse@7000f800 { 762742af7e7SThierry Reding compatible = "nvidia,tegra210-efuse"; 763742af7e7SThierry Reding reg = <0x0 0x7000f800 0x0 0x400>; 764742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_FUSE>; 765742af7e7SThierry Reding clock-names = "fuse"; 766742af7e7SThierry Reding resets = <&tegra_car 39>; 767742af7e7SThierry Reding reset-names = "fuse"; 768742af7e7SThierry Reding }; 769742af7e7SThierry Reding 770be70771dSThierry Reding mc: memory-controller@70019000 { 771742af7e7SThierry Reding compatible = "nvidia,tegra210-mc"; 772742af7e7SThierry Reding reg = <0x0 0x70019000 0x0 0x1000>; 773742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MC>; 774742af7e7SThierry Reding clock-names = "mc"; 775742af7e7SThierry Reding 776742af7e7SThierry Reding interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 777742af7e7SThierry Reding 778742af7e7SThierry Reding #iommu-cells = <1>; 779742af7e7SThierry Reding }; 780742af7e7SThierry Reding 781be70771dSThierry Reding hda@70030000 { 782742af7e7SThierry Reding compatible = "nvidia,tegra210-hda", "nvidia,tegra30-hda"; 783742af7e7SThierry Reding reg = <0x0 0x70030000 0x0 0x10000>; 784742af7e7SThierry Reding interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 785742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HDA>, 786742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2HDMI>, 787742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2CODEC_2X>; 788742af7e7SThierry Reding clock-names = "hda", "hda2hdmi", "hda2codec_2x"; 789742af7e7SThierry Reding resets = <&tegra_car 125>, /* hda */ 790742af7e7SThierry Reding <&tegra_car 128>, /* hda2hdmi */ 791742af7e7SThierry Reding <&tegra_car 111>; /* hda2codec_2x */ 792742af7e7SThierry Reding reset-names = "hda", "hda2hdmi", "hda2codec_2x"; 793742af7e7SThierry Reding status = "disabled"; 794742af7e7SThierry Reding }; 795742af7e7SThierry Reding 796e7a99ac2SThierry Reding usb@70090000 { 797e7a99ac2SThierry Reding compatible = "nvidia,tegra210-xusb"; 798e7a99ac2SThierry Reding reg = <0x0 0x70090000 0x0 0x8000>, 799e7a99ac2SThierry Reding <0x0 0x70098000 0x0 0x1000>, 800e7a99ac2SThierry Reding <0x0 0x70099000 0x0 0x1000>; 801e7a99ac2SThierry Reding reg-names = "hcd", "fpci", "ipfs"; 802e7a99ac2SThierry Reding 803e7a99ac2SThierry Reding interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 8049168e1dbSJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 805e7a99ac2SThierry Reding 806e7a99ac2SThierry Reding clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>, 807e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>, 808e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>, 809e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS>, 810e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>, 811e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>, 812e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, 813e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, 814e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U_480M>, 815e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_CLK_M>, 816e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>; 817e7a99ac2SThierry Reding clock-names = "xusb_host", "xusb_host_src", 818e7a99ac2SThierry Reding "xusb_falcon_src", "xusb_ss", 819e7a99ac2SThierry Reding "xusb_ss_div2", "xusb_ss_src", 820e7a99ac2SThierry Reding "xusb_hs_src", "xusb_fs_src", 821e7a99ac2SThierry Reding "pll_u_480m", "clk_m", "pll_e"; 822e7a99ac2SThierry Reding resets = <&tegra_car 89>, <&tegra_car 156>, 823e7a99ac2SThierry Reding <&tegra_car 143>; 824e7a99ac2SThierry Reding reset-names = "xusb_host", "xusb_ss", "xusb_src"; 825e7a99ac2SThierry Reding 826e7a99ac2SThierry Reding nvidia,xusb-padctl = <&padctl>; 827e7a99ac2SThierry Reding 828e7a99ac2SThierry Reding status = "disabled"; 829e7a99ac2SThierry Reding }; 830e7a99ac2SThierry Reding 8314e07ac90SThierry Reding padctl: padctl@7009f000 { 8324e07ac90SThierry Reding compatible = "nvidia,tegra210-xusb-padctl"; 8334e07ac90SThierry Reding reg = <0x0 0x7009f000 0x0 0x1000>; 8344e07ac90SThierry Reding resets = <&tegra_car 142>; 8354e07ac90SThierry Reding reset-names = "padctl"; 8364e07ac90SThierry Reding 8374e07ac90SThierry Reding status = "disabled"; 8384e07ac90SThierry Reding 8394e07ac90SThierry Reding pads { 8404e07ac90SThierry Reding usb2 { 8414e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>; 8424e07ac90SThierry Reding clock-names = "trk"; 8434e07ac90SThierry Reding status = "disabled"; 8444e07ac90SThierry Reding 8454e07ac90SThierry Reding lanes { 8464e07ac90SThierry Reding usb2-0 { 8474e07ac90SThierry Reding status = "disabled"; 8484e07ac90SThierry Reding #phy-cells = <0>; 8494e07ac90SThierry Reding }; 8504e07ac90SThierry Reding 8514e07ac90SThierry Reding usb2-1 { 8524e07ac90SThierry Reding status = "disabled"; 8534e07ac90SThierry Reding #phy-cells = <0>; 8544e07ac90SThierry Reding }; 8554e07ac90SThierry Reding 8564e07ac90SThierry Reding usb2-2 { 8574e07ac90SThierry Reding status = "disabled"; 8584e07ac90SThierry Reding #phy-cells = <0>; 8594e07ac90SThierry Reding }; 8604e07ac90SThierry Reding 8614e07ac90SThierry Reding usb2-3 { 8624e07ac90SThierry Reding status = "disabled"; 8634e07ac90SThierry Reding #phy-cells = <0>; 8644e07ac90SThierry Reding }; 8654e07ac90SThierry Reding }; 8664e07ac90SThierry Reding }; 8674e07ac90SThierry Reding 8684e07ac90SThierry Reding hsic { 8694e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>; 8704e07ac90SThierry Reding clock-names = "trk"; 8714e07ac90SThierry Reding status = "disabled"; 8724e07ac90SThierry Reding 8734e07ac90SThierry Reding lanes { 8744e07ac90SThierry Reding hsic-0 { 8754e07ac90SThierry Reding status = "disabled"; 8764e07ac90SThierry Reding #phy-cells = <0>; 8774e07ac90SThierry Reding }; 8784e07ac90SThierry Reding 8794e07ac90SThierry Reding hsic-1 { 8804e07ac90SThierry Reding status = "disabled"; 8814e07ac90SThierry Reding #phy-cells = <0>; 8824e07ac90SThierry Reding }; 8834e07ac90SThierry Reding }; 8844e07ac90SThierry Reding }; 8854e07ac90SThierry Reding 8864e07ac90SThierry Reding pcie { 8874e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 8884e07ac90SThierry Reding clock-names = "pll"; 8894e07ac90SThierry Reding resets = <&tegra_car 205>; 8904e07ac90SThierry Reding reset-names = "phy"; 8914e07ac90SThierry Reding status = "disabled"; 8924e07ac90SThierry Reding 8934e07ac90SThierry Reding lanes { 8944e07ac90SThierry Reding pcie-0 { 8954e07ac90SThierry Reding status = "disabled"; 8964e07ac90SThierry Reding #phy-cells = <0>; 8974e07ac90SThierry Reding }; 8984e07ac90SThierry Reding 8994e07ac90SThierry Reding pcie-1 { 9004e07ac90SThierry Reding status = "disabled"; 9014e07ac90SThierry Reding #phy-cells = <0>; 9024e07ac90SThierry Reding }; 9034e07ac90SThierry Reding 9044e07ac90SThierry Reding pcie-2 { 9054e07ac90SThierry Reding status = "disabled"; 9064e07ac90SThierry Reding #phy-cells = <0>; 9074e07ac90SThierry Reding }; 9084e07ac90SThierry Reding 9094e07ac90SThierry Reding pcie-3 { 9104e07ac90SThierry Reding status = "disabled"; 9114e07ac90SThierry Reding #phy-cells = <0>; 9124e07ac90SThierry Reding }; 9134e07ac90SThierry Reding 9144e07ac90SThierry Reding pcie-4 { 9154e07ac90SThierry Reding status = "disabled"; 9164e07ac90SThierry Reding #phy-cells = <0>; 9174e07ac90SThierry Reding }; 9184e07ac90SThierry Reding 9194e07ac90SThierry Reding pcie-5 { 9204e07ac90SThierry Reding status = "disabled"; 9214e07ac90SThierry Reding #phy-cells = <0>; 9224e07ac90SThierry Reding }; 9234e07ac90SThierry Reding 9244e07ac90SThierry Reding pcie-6 { 9254e07ac90SThierry Reding status = "disabled"; 9264e07ac90SThierry Reding #phy-cells = <0>; 9274e07ac90SThierry Reding }; 9284e07ac90SThierry Reding }; 9294e07ac90SThierry Reding }; 9304e07ac90SThierry Reding 9314e07ac90SThierry Reding sata { 9324e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 9334e07ac90SThierry Reding clock-names = "pll"; 9344e07ac90SThierry Reding resets = <&tegra_car 204>; 9354e07ac90SThierry Reding reset-names = "phy"; 9364e07ac90SThierry Reding status = "disabled"; 9374e07ac90SThierry Reding 9384e07ac90SThierry Reding lanes { 9394e07ac90SThierry Reding sata-0 { 9404e07ac90SThierry Reding status = "disabled"; 9414e07ac90SThierry Reding #phy-cells = <0>; 9424e07ac90SThierry Reding }; 9434e07ac90SThierry Reding }; 9444e07ac90SThierry Reding }; 9454e07ac90SThierry Reding }; 9464e07ac90SThierry Reding 9474e07ac90SThierry Reding ports { 9484e07ac90SThierry Reding usb2-0 { 9494e07ac90SThierry Reding status = "disabled"; 9504e07ac90SThierry Reding }; 9514e07ac90SThierry Reding 9524e07ac90SThierry Reding usb2-1 { 9534e07ac90SThierry Reding status = "disabled"; 9544e07ac90SThierry Reding }; 9554e07ac90SThierry Reding 9564e07ac90SThierry Reding usb2-2 { 9574e07ac90SThierry Reding status = "disabled"; 9584e07ac90SThierry Reding }; 9594e07ac90SThierry Reding 9604e07ac90SThierry Reding usb2-3 { 9614e07ac90SThierry Reding status = "disabled"; 9624e07ac90SThierry Reding }; 9634e07ac90SThierry Reding 9644e07ac90SThierry Reding hsic-0 { 9654e07ac90SThierry Reding status = "disabled"; 9664e07ac90SThierry Reding }; 9674e07ac90SThierry Reding 9684e07ac90SThierry Reding usb3-0 { 9694e07ac90SThierry Reding status = "disabled"; 9704e07ac90SThierry Reding }; 9714e07ac90SThierry Reding 9724e07ac90SThierry Reding usb3-1 { 9734e07ac90SThierry Reding status = "disabled"; 9744e07ac90SThierry Reding }; 9754e07ac90SThierry Reding 9764e07ac90SThierry Reding usb3-2 { 9774e07ac90SThierry Reding status = "disabled"; 9784e07ac90SThierry Reding }; 9794e07ac90SThierry Reding 9804e07ac90SThierry Reding usb3-3 { 9814e07ac90SThierry Reding status = "disabled"; 9824e07ac90SThierry Reding }; 9834e07ac90SThierry Reding }; 9844e07ac90SThierry Reding }; 9854e07ac90SThierry Reding 986be70771dSThierry Reding sdhci@700b0000 { 987742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 988742af7e7SThierry Reding reg = <0x0 0x700b0000 0x0 0x200>; 989742af7e7SThierry Reding interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 990742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC1>; 991742af7e7SThierry Reding clock-names = "sdhci"; 992742af7e7SThierry Reding resets = <&tegra_car 14>; 993742af7e7SThierry Reding reset-names = "sdhci"; 994742af7e7SThierry Reding status = "disabled"; 995742af7e7SThierry Reding }; 996742af7e7SThierry Reding 997be70771dSThierry Reding sdhci@700b0200 { 998742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 999742af7e7SThierry Reding reg = <0x0 0x700b0200 0x0 0x200>; 1000742af7e7SThierry Reding interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1001742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC2>; 1002742af7e7SThierry Reding clock-names = "sdhci"; 1003742af7e7SThierry Reding resets = <&tegra_car 9>; 1004742af7e7SThierry Reding reset-names = "sdhci"; 1005742af7e7SThierry Reding status = "disabled"; 1006742af7e7SThierry Reding }; 1007742af7e7SThierry Reding 1008be70771dSThierry Reding sdhci@700b0400 { 1009742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1010742af7e7SThierry Reding reg = <0x0 0x700b0400 0x0 0x200>; 1011742af7e7SThierry Reding interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 1012742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC3>; 1013742af7e7SThierry Reding clock-names = "sdhci"; 1014742af7e7SThierry Reding resets = <&tegra_car 69>; 1015742af7e7SThierry Reding reset-names = "sdhci"; 1016742af7e7SThierry Reding status = "disabled"; 1017742af7e7SThierry Reding }; 1018742af7e7SThierry Reding 1019be70771dSThierry Reding sdhci@700b0600 { 1020742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1021742af7e7SThierry Reding reg = <0x0 0x700b0600 0x0 0x200>; 1022742af7e7SThierry Reding interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 1023742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC4>; 1024742af7e7SThierry Reding clock-names = "sdhci"; 1025742af7e7SThierry Reding resets = <&tegra_car 15>; 1026742af7e7SThierry Reding reset-names = "sdhci"; 1027742af7e7SThierry Reding status = "disabled"; 1028742af7e7SThierry Reding }; 1029742af7e7SThierry Reding 1030be70771dSThierry Reding mipi: mipi@700e3000 { 1031742af7e7SThierry Reding compatible = "nvidia,tegra210-mipi"; 1032742af7e7SThierry Reding reg = <0x0 0x700e3000 0x0 0x100>; 1033742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MIPI_CAL>; 1034742af7e7SThierry Reding clock-names = "mipi-cal"; 103596d1f078SJon Hunter power-domains = <&pd_sor>; 1036742af7e7SThierry Reding #nvidia,mipi-calibrate-cells = <1>; 1037742af7e7SThierry Reding }; 1038742af7e7SThierry Reding 10390f133090SJon Hunter aconnect@702c0000 { 10400f133090SJon Hunter compatible = "nvidia,tegra210-aconnect"; 10410f133090SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 10420f133090SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 10430f133090SJon Hunter clock-names = "ape", "apb2ape"; 10440f133090SJon Hunter power-domains = <&pd_audio>; 10450f133090SJon Hunter #address-cells = <1>; 10460f133090SJon Hunter #size-cells = <1>; 10470f133090SJon Hunter ranges = <0x702c0000 0x0 0x702c0000 0x00040000>; 10480f133090SJon Hunter status = "disabled"; 1049bcdbde43SJon Hunter 105019e61213SJon Hunter adma: dma@702e2000 { 105119e61213SJon Hunter compatible = "nvidia,tegra210-adma"; 105219e61213SJon Hunter reg = <0x702e2000 0x2000>; 105319e61213SJon Hunter interrupt-parent = <&agic>; 105419e61213SJon Hunter interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, 105519e61213SJon Hunter <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, 105619e61213SJon Hunter <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, 105719e61213SJon Hunter <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, 105819e61213SJon Hunter <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, 105919e61213SJon Hunter <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 106019e61213SJon Hunter <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, 106119e61213SJon Hunter <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, 106219e61213SJon Hunter <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 106319e61213SJon Hunter <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 106419e61213SJon Hunter <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 106519e61213SJon Hunter <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 106619e61213SJon Hunter <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 106719e61213SJon Hunter <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 106819e61213SJon Hunter <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 106919e61213SJon Hunter <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 107019e61213SJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 107119e61213SJon Hunter <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 107219e61213SJon Hunter <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 107319e61213SJon Hunter <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 107419e61213SJon Hunter <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 107519e61213SJon Hunter <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 107619e61213SJon Hunter #dma-cells = <1>; 107719e61213SJon Hunter clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; 107819e61213SJon Hunter clock-names = "d_audio"; 107919e61213SJon Hunter status = "disabled"; 108019e61213SJon Hunter }; 108119e61213SJon Hunter 1082bcdbde43SJon Hunter agic: agic@702f9000 { 1083bcdbde43SJon Hunter compatible = "nvidia,tegra210-agic"; 1084bcdbde43SJon Hunter #interrupt-cells = <3>; 1085bcdbde43SJon Hunter interrupt-controller; 1086bcdbde43SJon Hunter reg = <0x702f9000 0x2000>, 1087bcdbde43SJon Hunter <0x702fa000 0x2000>; 1088bcdbde43SJon Hunter interrupts = <GIC_SPI 102 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 1089bcdbde43SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>; 1090bcdbde43SJon Hunter clock-names = "clk"; 1091bcdbde43SJon Hunter status = "disabled"; 1092bcdbde43SJon Hunter }; 10930f133090SJon Hunter }; 10940f133090SJon Hunter 1095be70771dSThierry Reding spi@70410000 { 1096742af7e7SThierry Reding compatible = "nvidia,tegra210-qspi"; 1097742af7e7SThierry Reding reg = <0x0 0x70410000 0x0 0x1000>; 1098742af7e7SThierry Reding interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 1099742af7e7SThierry Reding #address-cells = <1>; 1100742af7e7SThierry Reding #size-cells = <0>; 1101742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_QSPI>; 1102742af7e7SThierry Reding clock-names = "qspi"; 1103742af7e7SThierry Reding resets = <&tegra_car 211>; 1104742af7e7SThierry Reding reset-names = "qspi"; 1105742af7e7SThierry Reding dmas = <&apbdma 5>, <&apbdma 5>; 1106742af7e7SThierry Reding dma-names = "rx", "tx"; 1107742af7e7SThierry Reding status = "disabled"; 1108742af7e7SThierry Reding }; 1109742af7e7SThierry Reding 1110be70771dSThierry Reding usb@7d000000 { 1111742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1112742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>; 1113742af7e7SThierry Reding interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 1114742af7e7SThierry Reding phy_type = "utmi"; 1115742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>; 1116742af7e7SThierry Reding clock-names = "usb"; 1117742af7e7SThierry Reding resets = <&tegra_car 22>; 1118742af7e7SThierry Reding reset-names = "usb"; 1119742af7e7SThierry Reding nvidia,phy = <&phy1>; 1120742af7e7SThierry Reding status = "disabled"; 1121742af7e7SThierry Reding }; 1122742af7e7SThierry Reding 1123be70771dSThierry Reding phy1: usb-phy@7d000000 { 1124742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1125742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>, 1126742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1127742af7e7SThierry Reding phy_type = "utmi"; 1128742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>, 1129742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1130742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1131742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1132742af7e7SThierry Reding resets = <&tegra_car 22>, <&tegra_car 22>; 1133742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1134742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1135742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1136742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1137742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1138742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1139742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1140742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1141742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1142742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1143742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1144742af7e7SThierry Reding nvidia,has-utmi-pad-registers; 1145742af7e7SThierry Reding status = "disabled"; 1146742af7e7SThierry Reding }; 1147742af7e7SThierry Reding 1148be70771dSThierry Reding usb@7d004000 { 1149742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1150742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>; 1151742af7e7SThierry Reding interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1152742af7e7SThierry Reding phy_type = "utmi"; 1153742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>; 1154742af7e7SThierry Reding clock-names = "usb"; 1155742af7e7SThierry Reding resets = <&tegra_car 58>; 1156742af7e7SThierry Reding reset-names = "usb"; 1157742af7e7SThierry Reding nvidia,phy = <&phy2>; 1158742af7e7SThierry Reding status = "disabled"; 1159742af7e7SThierry Reding }; 1160742af7e7SThierry Reding 1161be70771dSThierry Reding phy2: usb-phy@7d004000 { 1162742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1163742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>, 1164742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1165742af7e7SThierry Reding phy_type = "utmi"; 1166742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>, 1167742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1168742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1169742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1170742af7e7SThierry Reding resets = <&tegra_car 58>, <&tegra_car 22>; 1171742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1172742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1173742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1174742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1175742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1176742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1177742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1178742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1179742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1180742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1181742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1182742af7e7SThierry Reding status = "disabled"; 1183742af7e7SThierry Reding }; 1184742af7e7SThierry Reding 1185742af7e7SThierry Reding cpus { 1186742af7e7SThierry Reding #address-cells = <1>; 1187742af7e7SThierry Reding #size-cells = <0>; 1188742af7e7SThierry Reding 1189742af7e7SThierry Reding cpu@0 { 1190742af7e7SThierry Reding device_type = "cpu"; 1191742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1192742af7e7SThierry Reding reg = <0>; 1193742af7e7SThierry Reding }; 1194742af7e7SThierry Reding 1195742af7e7SThierry Reding cpu@1 { 1196742af7e7SThierry Reding device_type = "cpu"; 1197742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1198742af7e7SThierry Reding reg = <1>; 1199742af7e7SThierry Reding }; 1200742af7e7SThierry Reding 1201742af7e7SThierry Reding cpu@2 { 1202742af7e7SThierry Reding device_type = "cpu"; 1203742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1204742af7e7SThierry Reding reg = <2>; 1205742af7e7SThierry Reding }; 1206742af7e7SThierry Reding 1207742af7e7SThierry Reding cpu@3 { 1208742af7e7SThierry Reding device_type = "cpu"; 1209742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1210742af7e7SThierry Reding reg = <3>; 1211742af7e7SThierry Reding }; 1212742af7e7SThierry Reding }; 1213742af7e7SThierry Reding 1214742af7e7SThierry Reding timer { 1215742af7e7SThierry Reding compatible = "arm,armv8-timer"; 1216742af7e7SThierry Reding interrupts = <GIC_PPI 13 1217742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1218742af7e7SThierry Reding <GIC_PPI 14 1219742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1220742af7e7SThierry Reding <GIC_PPI 11 1221742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1222742af7e7SThierry Reding <GIC_PPI 10 1223742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 1224742af7e7SThierry Reding interrupt-parent = <&gic>; 1225742af7e7SThierry Reding }; 1226e2bed1ebSWei Ni 1227e2bed1ebSWei Ni soctherm: thermal-sensor@700e2000 { 1228e2bed1ebSWei Ni compatible = "nvidia,tegra210-soctherm"; 1229cbd0f000SWei Ni reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */ 1230cbd0f000SWei Ni 0x0 0x60006000 0x0 0x400>; /* CAR reg_base */ 1231cbd0f000SWei Ni reg-names = "soctherm-reg", "car-reg"; 1232e2bed1ebSWei Ni interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 1233e2bed1ebSWei Ni clocks = <&tegra_car TEGRA210_CLK_TSENSOR>, 1234e2bed1ebSWei Ni <&tegra_car TEGRA210_CLK_SOC_THERM>; 1235e2bed1ebSWei Ni clock-names = "tsensor", "soctherm"; 1236e2bed1ebSWei Ni resets = <&tegra_car 78>; 1237e2bed1ebSWei Ni reset-names = "soctherm"; 1238e2bed1ebSWei Ni #thermal-sensor-cells = <1>; 1239cbd0f000SWei Ni 1240cbd0f000SWei Ni throttle-cfgs { 1241cbd0f000SWei Ni throttle_heavy: heavy { 1242cbd0f000SWei Ni nvidia,priority = <100>; 1243cbd0f000SWei Ni nvidia,cpu-throt-percent = <85>; 1244cbd0f000SWei Ni 1245cbd0f000SWei Ni #cooling-cells = <2>; 1246cbd0f000SWei Ni }; 1247cbd0f000SWei Ni }; 1248e2bed1ebSWei Ni }; 1249e2bed1ebSWei Ni 1250e2bed1ebSWei Ni thermal-zones { 1251e2bed1ebSWei Ni cpu { 1252e2bed1ebSWei Ni polling-delay-passive = <1000>; 1253e2bed1ebSWei Ni polling-delay = <0>; 1254e2bed1ebSWei Ni 1255e2bed1ebSWei Ni thermal-sensors = 1256e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; 12575e03f663SWei Ni 12585e03f663SWei Ni trips { 12595e03f663SWei Ni cpu-shutdown-trip { 12605e03f663SWei Ni temperature = <102500>; 12615e03f663SWei Ni hysteresis = <0>; 12625e03f663SWei Ni type = "critical"; 12635e03f663SWei Ni }; 1264cbd0f000SWei Ni 1265cbd0f000SWei Ni cpu_throttle_trip: throttle-trip { 1266cbd0f000SWei Ni temperature = <98500>; 1267cbd0f000SWei Ni hysteresis = <1000>; 1268cbd0f000SWei Ni type = "hot"; 1269cbd0f000SWei Ni }; 12705e03f663SWei Ni }; 12715e03f663SWei Ni 12725e03f663SWei Ni cooling-maps { 1273cbd0f000SWei Ni map0 { 1274cbd0f000SWei Ni trip = <&cpu_throttle_trip>; 1275cbd0f000SWei Ni cooling-device = <&throttle_heavy 1 1>; 1276cbd0f000SWei Ni }; 12775e03f663SWei Ni }; 1278e2bed1ebSWei Ni }; 1279e2bed1ebSWei Ni mem { 1280e2bed1ebSWei Ni polling-delay-passive = <0>; 1281e2bed1ebSWei Ni polling-delay = <0>; 1282e2bed1ebSWei Ni 1283e2bed1ebSWei Ni thermal-sensors = 1284e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; 12855e03f663SWei Ni 12865e03f663SWei Ni trips { 12875e03f663SWei Ni mem-shutdown-trip { 12885e03f663SWei Ni temperature = <103000>; 12895e03f663SWei Ni hysteresis = <0>; 12905e03f663SWei Ni type = "critical"; 12915e03f663SWei Ni }; 12925e03f663SWei Ni }; 12935e03f663SWei Ni 12945e03f663SWei Ni cooling-maps { 12955e03f663SWei Ni /* 12965e03f663SWei Ni * There are currently no cooling maps, 12975e03f663SWei Ni * because there are no cooling devices. 12985e03f663SWei Ni */ 12995e03f663SWei Ni }; 1300e2bed1ebSWei Ni }; 1301e2bed1ebSWei Ni gpu { 1302e2bed1ebSWei Ni polling-delay-passive = <1000>; 1303e2bed1ebSWei Ni polling-delay = <0>; 1304e2bed1ebSWei Ni 1305e2bed1ebSWei Ni thermal-sensors = 1306e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; 13075e03f663SWei Ni 13085e03f663SWei Ni trips { 13095e03f663SWei Ni gpu-shutdown-trip { 13105e03f663SWei Ni temperature = <103000>; 13115e03f663SWei Ni hysteresis = <0>; 13125e03f663SWei Ni type = "critical"; 13135e03f663SWei Ni }; 1314cbd0f000SWei Ni 1315cbd0f000SWei Ni gpu_throttle_trip: throttle-trip { 1316cbd0f000SWei Ni temperature = <100000>; 1317cbd0f000SWei Ni hysteresis = <1000>; 1318cbd0f000SWei Ni type = "hot"; 1319cbd0f000SWei Ni }; 13205e03f663SWei Ni }; 13215e03f663SWei Ni 13225e03f663SWei Ni cooling-maps { 1323cbd0f000SWei Ni map0 { 1324cbd0f000SWei Ni trip = <&gpu_throttle_trip>; 1325cbd0f000SWei Ni cooling-device = <&throttle_heavy 1 1>; 1326cbd0f000SWei Ni }; 13275e03f663SWei Ni }; 1328e2bed1ebSWei Ni }; 1329e2bed1ebSWei Ni pllx { 1330e2bed1ebSWei Ni polling-delay-passive = <0>; 1331e2bed1ebSWei Ni polling-delay = <0>; 1332e2bed1ebSWei Ni 1333e2bed1ebSWei Ni thermal-sensors = 1334e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; 13355e03f663SWei Ni 13365e03f663SWei Ni trips { 13375e03f663SWei Ni pllx-shutdown-trip { 13385e03f663SWei Ni temperature = <103000>; 13395e03f663SWei Ni hysteresis = <0>; 13405e03f663SWei Ni type = "critical"; 13415e03f663SWei Ni }; 13425e03f663SWei Ni }; 13435e03f663SWei Ni 13445e03f663SWei Ni cooling-maps { 13455e03f663SWei Ni /* 13465e03f663SWei Ni * There are currently no cooling maps, 13475e03f663SWei Ni * because there are no cooling devices. 13485e03f663SWei Ni */ 13495e03f663SWei Ni }; 1350e2bed1ebSWei Ni }; 1351e2bed1ebSWei Ni }; 1352742af7e7SThierry Reding}; 1353