1b2441318SGreg Kroah-Hartman// SPDX-License-Identifier: GPL-2.0 2742af7e7SThierry Reding#include <dt-bindings/clock/tegra210-car.h> 3742af7e7SThierry Reding#include <dt-bindings/gpio/tegra-gpio.h> 4742af7e7SThierry Reding#include <dt-bindings/memory/tegra210-mc.h> 5742af7e7SThierry Reding#include <dt-bindings/pinctrl/pinctrl-tegra.h> 66641af7eSAapo Vienamo#include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 72ceed593SJoseph Lo#include <dt-bindings/reset/tegra210-car.h> 8742af7e7SThierry Reding#include <dt-bindings/interrupt-controller/arm-gic.h> 9e2bed1ebSWei Ni#include <dt-bindings/thermal/tegra124-soctherm.h> 10742af7e7SThierry Reding 11742af7e7SThierry Reding/ { 12742af7e7SThierry Reding compatible = "nvidia,tegra210"; 13742af7e7SThierry Reding interrupt-parent = <&lic>; 14742af7e7SThierry Reding #address-cells = <2>; 15742af7e7SThierry Reding #size-cells = <2>; 16742af7e7SThierry Reding 17475d99fcSRob Herring pcie@1003000 { 18589a2d3fSThierry Reding compatible = "nvidia,tegra210-pcie"; 19589a2d3fSThierry Reding device_type = "pci"; 20589a2d3fSThierry Reding reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ 21589a2d3fSThierry Reding 0x0 0x01003800 0x0 0x00000800 /* AFI registers */ 22589a2d3fSThierry Reding 0x0 0x02000000 0x0 0x10000000>; /* configuration space */ 23589a2d3fSThierry Reding reg-names = "pads", "afi", "cs"; 24589a2d3fSThierry Reding interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */ 25589a2d3fSThierry Reding <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */ 26589a2d3fSThierry Reding interrupt-names = "intr", "msi"; 27589a2d3fSThierry Reding 28589a2d3fSThierry Reding #interrupt-cells = <1>; 29589a2d3fSThierry Reding interrupt-map-mask = <0 0 0 0>; 30589a2d3fSThierry Reding interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 31589a2d3fSThierry Reding 32589a2d3fSThierry Reding bus-range = <0x00 0xff>; 33589a2d3fSThierry Reding #address-cells = <3>; 34589a2d3fSThierry Reding #size-cells = <2>; 35589a2d3fSThierry Reding 36589a2d3fSThierry Reding ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */ 37589a2d3fSThierry Reding 0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */ 38589a2d3fSThierry Reding 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */ 39589a2d3fSThierry Reding 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */ 40589a2d3fSThierry Reding 0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */ 41589a2d3fSThierry Reding 42589a2d3fSThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCIE>, 43589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_AFI>, 44589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>, 45589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_CML0>; 46589a2d3fSThierry Reding clock-names = "pex", "afi", "pll_e", "cml"; 47589a2d3fSThierry Reding resets = <&tegra_car 70>, 48589a2d3fSThierry Reding <&tegra_car 72>, 49589a2d3fSThierry Reding <&tegra_car 74>; 50589a2d3fSThierry Reding reset-names = "pex", "afi", "pcie_x"; 51871be845SManikanta Maddireddy 52871be845SManikanta Maddireddy pinctrl-names = "default", "idle"; 53871be845SManikanta Maddireddy pinctrl-0 = <&pex_dpd_disable>; 54871be845SManikanta Maddireddy pinctrl-1 = <&pex_dpd_enable>; 55871be845SManikanta Maddireddy 56589a2d3fSThierry Reding status = "disabled"; 57589a2d3fSThierry Reding 58589a2d3fSThierry Reding pci@1,0 { 59589a2d3fSThierry Reding device_type = "pci"; 60589a2d3fSThierry Reding assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; 61589a2d3fSThierry Reding reg = <0x000800 0 0 0 0>; 62475d99fcSRob Herring bus-range = <0x00 0xff>; 63589a2d3fSThierry Reding status = "disabled"; 64589a2d3fSThierry Reding 65589a2d3fSThierry Reding #address-cells = <3>; 66589a2d3fSThierry Reding #size-cells = <2>; 67589a2d3fSThierry Reding ranges; 68589a2d3fSThierry Reding 69589a2d3fSThierry Reding nvidia,num-lanes = <4>; 70589a2d3fSThierry Reding }; 71589a2d3fSThierry Reding 72589a2d3fSThierry Reding pci@2,0 { 73589a2d3fSThierry Reding device_type = "pci"; 74589a2d3fSThierry Reding assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; 75589a2d3fSThierry Reding reg = <0x001000 0 0 0 0>; 76475d99fcSRob Herring bus-range = <0x00 0xff>; 77589a2d3fSThierry Reding status = "disabled"; 78589a2d3fSThierry Reding 79589a2d3fSThierry Reding #address-cells = <3>; 80589a2d3fSThierry Reding #size-cells = <2>; 81589a2d3fSThierry Reding ranges; 82589a2d3fSThierry Reding 83589a2d3fSThierry Reding nvidia,num-lanes = <1>; 84589a2d3fSThierry Reding }; 85589a2d3fSThierry Reding }; 86589a2d3fSThierry Reding 87be70771dSThierry Reding host1x@50000000 { 88742af7e7SThierry Reding compatible = "nvidia,tegra210-host1x", "simple-bus"; 89742af7e7SThierry Reding reg = <0x0 0x50000000 0x0 0x00034000>; 90742af7e7SThierry Reding interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */ 91742af7e7SThierry Reding <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */ 92742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HOST1X>; 93742af7e7SThierry Reding clock-names = "host1x"; 94742af7e7SThierry Reding resets = <&tegra_car 28>; 95742af7e7SThierry Reding reset-names = "host1x"; 96742af7e7SThierry Reding 97742af7e7SThierry Reding #address-cells = <2>; 98742af7e7SThierry Reding #size-cells = <2>; 99742af7e7SThierry Reding 100742af7e7SThierry Reding ranges = <0x0 0x54000000 0x0 0x54000000 0x0 0x01000000>; 101742af7e7SThierry Reding 102116503a6SMikko Perttunen iommus = <&mc TEGRA_SWGROUP_HC>; 103116503a6SMikko Perttunen 104be70771dSThierry Reding dpaux1: dpaux@54040000 { 105742af7e7SThierry Reding compatible = "nvidia,tegra210-dpaux"; 106742af7e7SThierry Reding reg = <0x0 0x54040000 0x0 0x00040000>; 107742af7e7SThierry Reding interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 108742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX1>, 109742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 110742af7e7SThierry Reding clock-names = "dpaux", "parent"; 111742af7e7SThierry Reding resets = <&tegra_car 207>; 112742af7e7SThierry Reding reset-names = "dpaux"; 11396d1f078SJon Hunter power-domains = <&pd_sor>; 114742af7e7SThierry Reding status = "disabled"; 11566b2d6e9SJon Hunter 11666b2d6e9SJon Hunter state_dpaux1_aux: pinmux-aux { 11766b2d6e9SJon Hunter groups = "dpaux-io"; 11866b2d6e9SJon Hunter function = "aux"; 11966b2d6e9SJon Hunter }; 12066b2d6e9SJon Hunter 12166b2d6e9SJon Hunter state_dpaux1_i2c: pinmux-i2c { 12266b2d6e9SJon Hunter groups = "dpaux-io"; 12366b2d6e9SJon Hunter function = "i2c"; 12466b2d6e9SJon Hunter }; 12566b2d6e9SJon Hunter 12666b2d6e9SJon Hunter state_dpaux1_off: pinmux-off { 12766b2d6e9SJon Hunter groups = "dpaux-io"; 12866b2d6e9SJon Hunter function = "off"; 12966b2d6e9SJon Hunter }; 13066b2d6e9SJon Hunter 13166b2d6e9SJon Hunter i2c-bus { 13266b2d6e9SJon Hunter #address-cells = <1>; 13366b2d6e9SJon Hunter #size-cells = <0>; 13466b2d6e9SJon Hunter }; 135742af7e7SThierry Reding }; 136742af7e7SThierry Reding 137be70771dSThierry Reding vi@54080000 { 138742af7e7SThierry Reding compatible = "nvidia,tegra210-vi"; 139742af7e7SThierry Reding reg = <0x0 0x54080000 0x0 0x00040000>; 140742af7e7SThierry Reding interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 141742af7e7SThierry Reding status = "disabled"; 142742af7e7SThierry Reding }; 143742af7e7SThierry Reding 144be70771dSThierry Reding tsec@54100000 { 145742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 146742af7e7SThierry Reding reg = <0x0 0x54100000 0x0 0x00040000>; 147742af7e7SThierry Reding }; 148742af7e7SThierry Reding 149be70771dSThierry Reding dc@54200000 { 150742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 151742af7e7SThierry Reding reg = <0x0 0x54200000 0x0 0x00040000>; 152742af7e7SThierry Reding interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 153742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP1>, 154742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 155742af7e7SThierry Reding clock-names = "dc", "parent"; 156742af7e7SThierry Reding resets = <&tegra_car 27>; 157742af7e7SThierry Reding reset-names = "dc"; 158742af7e7SThierry Reding 159742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DC>; 160742af7e7SThierry Reding 161742af7e7SThierry Reding nvidia,head = <0>; 162742af7e7SThierry Reding }; 163742af7e7SThierry Reding 164be70771dSThierry Reding dc@54240000 { 165742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 166742af7e7SThierry Reding reg = <0x0 0x54240000 0x0 0x00040000>; 167742af7e7SThierry Reding interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 168742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP2>, 169742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 170742af7e7SThierry Reding clock-names = "dc", "parent"; 171742af7e7SThierry Reding resets = <&tegra_car 26>; 172742af7e7SThierry Reding reset-names = "dc"; 173742af7e7SThierry Reding 174742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DCB>; 175742af7e7SThierry Reding 176742af7e7SThierry Reding nvidia,head = <1>; 177742af7e7SThierry Reding }; 178742af7e7SThierry Reding 179be70771dSThierry Reding dsi@54300000 { 180742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 181742af7e7SThierry Reding reg = <0x0 0x54300000 0x0 0x00040000>; 182742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIA>, 183742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIALP>, 184742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 185742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 186742af7e7SThierry Reding resets = <&tegra_car 48>; 187742af7e7SThierry Reding reset-names = "dsi"; 18896d1f078SJon Hunter power-domains = <&pd_sor>; 189742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x0c0>; /* DSIA & DSIB pads */ 190742af7e7SThierry Reding 191742af7e7SThierry Reding status = "disabled"; 192742af7e7SThierry Reding 193742af7e7SThierry Reding #address-cells = <1>; 194742af7e7SThierry Reding #size-cells = <0>; 195742af7e7SThierry Reding }; 196742af7e7SThierry Reding 197be70771dSThierry Reding vic@54340000 { 198742af7e7SThierry Reding compatible = "nvidia,tegra210-vic"; 199742af7e7SThierry Reding reg = <0x0 0x54340000 0x0 0x00040000>; 20024963d1bSMikko Perttunen interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 20124963d1bSMikko Perttunen clocks = <&tegra_car TEGRA210_CLK_VIC03>; 20224963d1bSMikko Perttunen clock-names = "vic"; 20324963d1bSMikko Perttunen resets = <&tegra_car 178>; 20424963d1bSMikko Perttunen reset-names = "vic"; 20524963d1bSMikko Perttunen 20624963d1bSMikko Perttunen iommus = <&mc TEGRA_SWGROUP_VIC>; 20724963d1bSMikko Perttunen power-domains = <&pd_vic>; 208742af7e7SThierry Reding }; 209742af7e7SThierry Reding 210be70771dSThierry Reding nvjpg@54380000 { 211742af7e7SThierry Reding compatible = "nvidia,tegra210-nvjpg"; 212742af7e7SThierry Reding reg = <0x0 0x54380000 0x0 0x00040000>; 213742af7e7SThierry Reding status = "disabled"; 214742af7e7SThierry Reding }; 215742af7e7SThierry Reding 216be70771dSThierry Reding dsi@54400000 { 217742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 218742af7e7SThierry Reding reg = <0x0 0x54400000 0x0 0x00040000>; 219742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIB>, 220742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIBLP>, 221742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 222742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 223742af7e7SThierry Reding resets = <&tegra_car 82>; 224742af7e7SThierry Reding reset-names = "dsi"; 22596d1f078SJon Hunter power-domains = <&pd_sor>; 226742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x300>; /* DSIC & DSID pads */ 227742af7e7SThierry Reding 228742af7e7SThierry Reding status = "disabled"; 229742af7e7SThierry Reding 230742af7e7SThierry Reding #address-cells = <1>; 231742af7e7SThierry Reding #size-cells = <0>; 232742af7e7SThierry Reding }; 233742af7e7SThierry Reding 234be70771dSThierry Reding nvdec@54480000 { 235742af7e7SThierry Reding compatible = "nvidia,tegra210-nvdec"; 236742af7e7SThierry Reding reg = <0x0 0x54480000 0x0 0x00040000>; 237742af7e7SThierry Reding status = "disabled"; 238742af7e7SThierry Reding }; 239742af7e7SThierry Reding 240be70771dSThierry Reding nvenc@544c0000 { 241742af7e7SThierry Reding compatible = "nvidia,tegra210-nvenc"; 242742af7e7SThierry Reding reg = <0x0 0x544c0000 0x0 0x00040000>; 243742af7e7SThierry Reding status = "disabled"; 244742af7e7SThierry Reding }; 245742af7e7SThierry Reding 246be70771dSThierry Reding tsec@54500000 { 247742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 248742af7e7SThierry Reding reg = <0x0 0x54500000 0x0 0x00040000>; 249742af7e7SThierry Reding status = "disabled"; 250742af7e7SThierry Reding }; 251742af7e7SThierry Reding 252be70771dSThierry Reding sor@54540000 { 253742af7e7SThierry Reding compatible = "nvidia,tegra210-sor"; 254742af7e7SThierry Reding reg = <0x0 0x54540000 0x0 0x00040000>; 255742af7e7SThierry Reding interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 256742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR0>, 257742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>, 258742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 259742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 260742af7e7SThierry Reding clock-names = "sor", "parent", "dp", "safe"; 261742af7e7SThierry Reding resets = <&tegra_car 182>; 262742af7e7SThierry Reding reset-names = "sor"; 26366b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_aux>; 26466b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_i2c>; 26566b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux_off>; 26666b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 26796d1f078SJon Hunter power-domains = <&pd_sor>; 268742af7e7SThierry Reding status = "disabled"; 269742af7e7SThierry Reding }; 270742af7e7SThierry Reding 271be70771dSThierry Reding sor@54580000 { 272742af7e7SThierry Reding compatible = "nvidia,tegra210-sor1"; 273742af7e7SThierry Reding reg = <0x0 0x54580000 0x0 0x00040000>; 274742af7e7SThierry Reding interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 275742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR1>, 27650f5b841SThierry Reding <&tegra_car TEGRA210_CLK_SOR1_OUT>, 277742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D2_OUT0>, 278742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 279742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 28050f5b841SThierry Reding clock-names = "sor", "out", "parent", "dp", "safe"; 281742af7e7SThierry Reding resets = <&tegra_car 183>; 282742af7e7SThierry Reding reset-names = "sor"; 28366b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_aux>; 28466b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_i2c>; 28566b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux1_off>; 28666b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 28796d1f078SJon Hunter power-domains = <&pd_sor>; 288742af7e7SThierry Reding status = "disabled"; 289742af7e7SThierry Reding }; 290742af7e7SThierry Reding 291be70771dSThierry Reding dpaux: dpaux@545c0000 { 292742af7e7SThierry Reding compatible = "nvidia,tegra124-dpaux"; 293742af7e7SThierry Reding reg = <0x0 0x545c0000 0x0 0x00040000>; 294742af7e7SThierry Reding interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 295742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX>, 296742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 297742af7e7SThierry Reding clock-names = "dpaux", "parent"; 298742af7e7SThierry Reding resets = <&tegra_car 181>; 299742af7e7SThierry Reding reset-names = "dpaux"; 30096d1f078SJon Hunter power-domains = <&pd_sor>; 301742af7e7SThierry Reding status = "disabled"; 30266b2d6e9SJon Hunter 30366b2d6e9SJon Hunter state_dpaux_aux: pinmux-aux { 30466b2d6e9SJon Hunter groups = "dpaux-io"; 30566b2d6e9SJon Hunter function = "aux"; 30666b2d6e9SJon Hunter }; 30766b2d6e9SJon Hunter 30866b2d6e9SJon Hunter state_dpaux_i2c: pinmux-i2c { 30966b2d6e9SJon Hunter groups = "dpaux-io"; 31066b2d6e9SJon Hunter function = "i2c"; 31166b2d6e9SJon Hunter }; 31266b2d6e9SJon Hunter 31366b2d6e9SJon Hunter state_dpaux_off: pinmux-off { 31466b2d6e9SJon Hunter groups = "dpaux-io"; 31566b2d6e9SJon Hunter function = "off"; 31666b2d6e9SJon Hunter }; 31766b2d6e9SJon Hunter 31866b2d6e9SJon Hunter i2c-bus { 31966b2d6e9SJon Hunter #address-cells = <1>; 32066b2d6e9SJon Hunter #size-cells = <0>; 32166b2d6e9SJon Hunter }; 322742af7e7SThierry Reding }; 323742af7e7SThierry Reding 324be70771dSThierry Reding isp@54600000 { 325742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 326742af7e7SThierry Reding reg = <0x0 0x54600000 0x0 0x00040000>; 327742af7e7SThierry Reding interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 328742af7e7SThierry Reding status = "disabled"; 329742af7e7SThierry Reding }; 330742af7e7SThierry Reding 331be70771dSThierry Reding isp@54680000 { 332742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 333742af7e7SThierry Reding reg = <0x0 0x54680000 0x0 0x00040000>; 334742af7e7SThierry Reding interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 335742af7e7SThierry Reding status = "disabled"; 336742af7e7SThierry Reding }; 337742af7e7SThierry Reding 338be70771dSThierry Reding i2c@546c0000 { 339742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c-vi"; 340742af7e7SThierry Reding reg = <0x0 0x546c0000 0x0 0x00040000>; 341742af7e7SThierry Reding interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 342742af7e7SThierry Reding status = "disabled"; 343742af7e7SThierry Reding }; 344742af7e7SThierry Reding }; 345742af7e7SThierry Reding 346be70771dSThierry Reding gic: interrupt-controller@50041000 { 347742af7e7SThierry Reding compatible = "arm,gic-400"; 348742af7e7SThierry Reding #interrupt-cells = <3>; 349742af7e7SThierry Reding interrupt-controller; 350742af7e7SThierry Reding reg = <0x0 0x50041000 0x0 0x1000>, 351742af7e7SThierry Reding <0x0 0x50042000 0x0 0x2000>, 352742af7e7SThierry Reding <0x0 0x50044000 0x0 0x2000>, 353742af7e7SThierry Reding <0x0 0x50046000 0x0 0x2000>; 354742af7e7SThierry Reding interrupts = <GIC_PPI 9 355742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 356742af7e7SThierry Reding interrupt-parent = <&gic>; 357742af7e7SThierry Reding }; 358742af7e7SThierry Reding 359be70771dSThierry Reding gpu@57000000 { 360742af7e7SThierry Reding compatible = "nvidia,gm20b"; 361742af7e7SThierry Reding reg = <0x0 0x57000000 0x0 0x01000000>, 362742af7e7SThierry Reding <0x0 0x58000000 0x0 0x01000000>; 363742af7e7SThierry Reding interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 364742af7e7SThierry Reding <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 365742af7e7SThierry Reding interrupt-names = "stall", "nonstall"; 366742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_GPU>, 3674a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_P_OUT5>, 3684a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_G_REF>; 3694a0778e9SAlexandre Courbot clock-names = "gpu", "pwr", "ref"; 370742af7e7SThierry Reding resets = <&tegra_car 184>; 371742af7e7SThierry Reding reset-names = "gpu"; 37230f949bcSAlexandre Courbot 37330f949bcSAlexandre Courbot iommus = <&mc TEGRA_SWGROUP_GPU>; 37430f949bcSAlexandre Courbot 375742af7e7SThierry Reding status = "disabled"; 376742af7e7SThierry Reding }; 377742af7e7SThierry Reding 378be70771dSThierry Reding lic: interrupt-controller@60004000 { 379742af7e7SThierry Reding compatible = "nvidia,tegra210-ictlr"; 380742af7e7SThierry Reding reg = <0x0 0x60004000 0x0 0x40>, /* primary controller */ 381742af7e7SThierry Reding <0x0 0x60004100 0x0 0x40>, /* secondary controller */ 382742af7e7SThierry Reding <0x0 0x60004200 0x0 0x40>, /* tertiary controller */ 383742af7e7SThierry Reding <0x0 0x60004300 0x0 0x40>, /* quaternary controller */ 384742af7e7SThierry Reding <0x0 0x60004400 0x0 0x40>, /* quinary controller */ 385742af7e7SThierry Reding <0x0 0x60004500 0x0 0x40>; /* senary controller */ 386742af7e7SThierry Reding interrupt-controller; 387742af7e7SThierry Reding #interrupt-cells = <3>; 388742af7e7SThierry Reding interrupt-parent = <&gic>; 389742af7e7SThierry Reding }; 390742af7e7SThierry Reding 391be70771dSThierry Reding timer@60005000 { 392d9931a18SJoseph Lo compatible = "nvidia,tegra210-timer"; 393742af7e7SThierry Reding reg = <0x0 0x60005000 0x0 0x400>; 394d9931a18SJoseph Lo interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>, 395d9931a18SJoseph Lo <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 396742af7e7SThierry Reding <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 397742af7e7SThierry Reding <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 398742af7e7SThierry Reding <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 399742af7e7SThierry Reding <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 400d9931a18SJoseph Lo <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, 401d9931a18SJoseph Lo <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, 402d9931a18SJoseph Lo <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, 403d9931a18SJoseph Lo <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 404d9931a18SJoseph Lo <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>, 405d9931a18SJoseph Lo <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>, 406d9931a18SJoseph Lo <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>, 407d9931a18SJoseph Lo <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; 408742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_TIMER>; 409742af7e7SThierry Reding clock-names = "timer"; 410742af7e7SThierry Reding }; 411742af7e7SThierry Reding 412be70771dSThierry Reding tegra_car: clock@60006000 { 413742af7e7SThierry Reding compatible = "nvidia,tegra210-car"; 414742af7e7SThierry Reding reg = <0x0 0x60006000 0x0 0x1000>; 415742af7e7SThierry Reding #clock-cells = <1>; 416742af7e7SThierry Reding #reset-cells = <1>; 417742af7e7SThierry Reding }; 418742af7e7SThierry Reding 419be70771dSThierry Reding flow-controller@60007000 { 420742af7e7SThierry Reding compatible = "nvidia,tegra210-flowctrl"; 421742af7e7SThierry Reding reg = <0x0 0x60007000 0x0 0x1000>; 422742af7e7SThierry Reding }; 423742af7e7SThierry Reding 424be70771dSThierry Reding gpio: gpio@6000d000 { 42501665512SStephen Warren compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio"; 426742af7e7SThierry Reding reg = <0x0 0x6000d000 0x0 0x1000>; 427742af7e7SThierry Reding interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 428742af7e7SThierry Reding <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 429742af7e7SThierry Reding <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 430742af7e7SThierry Reding <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 431742af7e7SThierry Reding <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 432742af7e7SThierry Reding <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 433742af7e7SThierry Reding <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 434742af7e7SThierry Reding <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 435742af7e7SThierry Reding #gpio-cells = <2>; 436742af7e7SThierry Reding gpio-controller; 437742af7e7SThierry Reding #interrupt-cells = <2>; 438742af7e7SThierry Reding interrupt-controller; 439742af7e7SThierry Reding }; 440742af7e7SThierry Reding 441be70771dSThierry Reding apbdma: dma@60020000 { 442742af7e7SThierry Reding compatible = "nvidia,tegra210-apbdma", "nvidia,tegra148-apbdma"; 443742af7e7SThierry Reding reg = <0x0 0x60020000 0x0 0x1400>; 444742af7e7SThierry Reding interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 445742af7e7SThierry Reding <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 446742af7e7SThierry Reding <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 447742af7e7SThierry Reding <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 448742af7e7SThierry Reding <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 449742af7e7SThierry Reding <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 450742af7e7SThierry Reding <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 451742af7e7SThierry Reding <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 452742af7e7SThierry Reding <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 453742af7e7SThierry Reding <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 454742af7e7SThierry Reding <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 455742af7e7SThierry Reding <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 456742af7e7SThierry Reding <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 457742af7e7SThierry Reding <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 458742af7e7SThierry Reding <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 459742af7e7SThierry Reding <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, 460742af7e7SThierry Reding <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 461742af7e7SThierry Reding <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 462742af7e7SThierry Reding <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 463742af7e7SThierry Reding <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 464742af7e7SThierry Reding <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 465742af7e7SThierry Reding <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, 466742af7e7SThierry Reding <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, 467742af7e7SThierry Reding <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 468742af7e7SThierry Reding <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 469742af7e7SThierry Reding <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 470742af7e7SThierry Reding <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 471742af7e7SThierry Reding <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>, 472742af7e7SThierry Reding <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, 473742af7e7SThierry Reding <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, 474742af7e7SThierry Reding <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 475742af7e7SThierry Reding <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 476742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_APBDMA>; 477742af7e7SThierry Reding clock-names = "dma"; 478742af7e7SThierry Reding resets = <&tegra_car 34>; 479742af7e7SThierry Reding reset-names = "dma"; 480742af7e7SThierry Reding #dma-cells = <1>; 481742af7e7SThierry Reding }; 482742af7e7SThierry Reding 483be70771dSThierry Reding apbmisc@70000800 { 484742af7e7SThierry Reding compatible = "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc"; 485742af7e7SThierry Reding reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */ 48646e4b227SJoseph Lo <0x0 0x70000008 0x0 0x04>; /* Strapping options */ 487742af7e7SThierry Reding }; 488742af7e7SThierry Reding 489be70771dSThierry Reding pinmux: pinmux@700008d4 { 490742af7e7SThierry Reding compatible = "nvidia,tegra210-pinmux"; 491742af7e7SThierry Reding reg = <0x0 0x700008d4 0x0 0x29c>, /* Pad control registers */ 492742af7e7SThierry Reding <0x0 0x70003000 0x0 0x294>; /* Mux registers */ 4934e0f1229SSowjanya Komatineni sdmmc1_3v3_drv: sdmmc1-3v3-drv { 4944e0f1229SSowjanya Komatineni sdmmc1 { 4954e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc1"; 4964e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x8>; 4974e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x8>; 4984e0f1229SSowjanya Komatineni }; 4994e0f1229SSowjanya Komatineni }; 5004e0f1229SSowjanya Komatineni sdmmc1_1v8_drv: sdmmc1-1v8-drv { 5014e0f1229SSowjanya Komatineni sdmmc1 { 5024e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc1"; 5034e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x4>; 5044e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x3>; 5054e0f1229SSowjanya Komatineni }; 5064e0f1229SSowjanya Komatineni }; 5074e0f1229SSowjanya Komatineni sdmmc2_1v8_drv: sdmmc2-1v8-drv { 5084e0f1229SSowjanya Komatineni sdmmc2 { 5094e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc2"; 5104e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x10>; 5114e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x10>; 5124e0f1229SSowjanya Komatineni }; 5134e0f1229SSowjanya Komatineni }; 5144e0f1229SSowjanya Komatineni sdmmc3_3v3_drv: sdmmc3-3v3-drv { 5154e0f1229SSowjanya Komatineni sdmmc3 { 5164e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc3"; 5174e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x8>; 5184e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x8>; 5194e0f1229SSowjanya Komatineni }; 5204e0f1229SSowjanya Komatineni }; 5214e0f1229SSowjanya Komatineni sdmmc3_1v8_drv: sdmmc3-1v8-drv { 5224e0f1229SSowjanya Komatineni sdmmc3 { 5234e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc3"; 5244e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x4>; 5254e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x3>; 5264e0f1229SSowjanya Komatineni }; 5274e0f1229SSowjanya Komatineni }; 5284e0f1229SSowjanya Komatineni sdmmc4_1v8_drv: sdmmc4-1v8-drv { 5294e0f1229SSowjanya Komatineni sdmmc4 { 5304e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc4"; 5314e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x10>; 5324e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x10>; 5334e0f1229SSowjanya Komatineni }; 5344e0f1229SSowjanya Komatineni }; 535742af7e7SThierry Reding }; 536742af7e7SThierry Reding 537742af7e7SThierry Reding /* 538742af7e7SThierry Reding * There are two serial driver i.e. 8250 based simple serial 539742af7e7SThierry Reding * driver and APB DMA based serial driver for higher baudrate 540ef769e32SAdam Buchbinder * and performance. To enable the 8250 based driver, the compatible 541742af7e7SThierry Reding * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable 54268cd8b2eSThierry Reding * the APB DMA based serial driver, the compatible is 543742af7e7SThierry Reding * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart". 544742af7e7SThierry Reding */ 545be70771dSThierry Reding uarta: serial@70006000 { 546742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 547742af7e7SThierry Reding reg = <0x0 0x70006000 0x0 0x40>; 548742af7e7SThierry Reding reg-shift = <2>; 549742af7e7SThierry Reding interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 550742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTA>; 551742af7e7SThierry Reding clock-names = "serial"; 552742af7e7SThierry Reding resets = <&tegra_car 6>; 553742af7e7SThierry Reding reset-names = "serial"; 554742af7e7SThierry Reding dmas = <&apbdma 8>, <&apbdma 8>; 555742af7e7SThierry Reding dma-names = "rx", "tx"; 556742af7e7SThierry Reding status = "disabled"; 557742af7e7SThierry Reding }; 558742af7e7SThierry Reding 559be70771dSThierry Reding uartb: serial@70006040 { 560742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 561742af7e7SThierry Reding reg = <0x0 0x70006040 0x0 0x40>; 562742af7e7SThierry Reding reg-shift = <2>; 563742af7e7SThierry Reding interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 564742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTB>; 565742af7e7SThierry Reding clock-names = "serial"; 566742af7e7SThierry Reding resets = <&tegra_car 7>; 567742af7e7SThierry Reding reset-names = "serial"; 568742af7e7SThierry Reding dmas = <&apbdma 9>, <&apbdma 9>; 569742af7e7SThierry Reding dma-names = "rx", "tx"; 570742af7e7SThierry Reding status = "disabled"; 571742af7e7SThierry Reding }; 572742af7e7SThierry Reding 573be70771dSThierry Reding uartc: serial@70006200 { 574742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 575742af7e7SThierry Reding reg = <0x0 0x70006200 0x0 0x40>; 576742af7e7SThierry Reding reg-shift = <2>; 577742af7e7SThierry Reding interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 578742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTC>; 579742af7e7SThierry Reding clock-names = "serial"; 580742af7e7SThierry Reding resets = <&tegra_car 55>; 581742af7e7SThierry Reding reset-names = "serial"; 582742af7e7SThierry Reding dmas = <&apbdma 10>, <&apbdma 10>; 583742af7e7SThierry Reding dma-names = "rx", "tx"; 584742af7e7SThierry Reding status = "disabled"; 585742af7e7SThierry Reding }; 586742af7e7SThierry Reding 587be70771dSThierry Reding uartd: serial@70006300 { 588742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 589742af7e7SThierry Reding reg = <0x0 0x70006300 0x0 0x40>; 590742af7e7SThierry Reding reg-shift = <2>; 591742af7e7SThierry Reding interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 592742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTD>; 593742af7e7SThierry Reding clock-names = "serial"; 594742af7e7SThierry Reding resets = <&tegra_car 65>; 595742af7e7SThierry Reding reset-names = "serial"; 596742af7e7SThierry Reding dmas = <&apbdma 19>, <&apbdma 19>; 597742af7e7SThierry Reding dma-names = "rx", "tx"; 598742af7e7SThierry Reding status = "disabled"; 599742af7e7SThierry Reding }; 600742af7e7SThierry Reding 601be70771dSThierry Reding pwm: pwm@7000a000 { 602742af7e7SThierry Reding compatible = "nvidia,tegra210-pwm", "nvidia,tegra20-pwm"; 603742af7e7SThierry Reding reg = <0x0 0x7000a000 0x0 0x100>; 604742af7e7SThierry Reding #pwm-cells = <2>; 605742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PWM>; 606742af7e7SThierry Reding clock-names = "pwm"; 607742af7e7SThierry Reding resets = <&tegra_car 17>; 608742af7e7SThierry Reding reset-names = "pwm"; 609742af7e7SThierry Reding status = "disabled"; 610742af7e7SThierry Reding }; 611742af7e7SThierry Reding 612be70771dSThierry Reding i2c@7000c000 { 613140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 614742af7e7SThierry Reding reg = <0x0 0x7000c000 0x0 0x100>; 615742af7e7SThierry Reding interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 616742af7e7SThierry Reding #address-cells = <1>; 617742af7e7SThierry Reding #size-cells = <0>; 618742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C1>; 619742af7e7SThierry Reding clock-names = "div-clk"; 620742af7e7SThierry Reding resets = <&tegra_car 12>; 621742af7e7SThierry Reding reset-names = "i2c"; 622742af7e7SThierry Reding dmas = <&apbdma 21>, <&apbdma 21>; 623742af7e7SThierry Reding dma-names = "rx", "tx"; 624742af7e7SThierry Reding status = "disabled"; 625742af7e7SThierry Reding }; 626742af7e7SThierry Reding 627be70771dSThierry Reding i2c@7000c400 { 628140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 629742af7e7SThierry Reding reg = <0x0 0x7000c400 0x0 0x100>; 630742af7e7SThierry Reding interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 631742af7e7SThierry Reding #address-cells = <1>; 632742af7e7SThierry Reding #size-cells = <0>; 633742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C2>; 634742af7e7SThierry Reding clock-names = "div-clk"; 635742af7e7SThierry Reding resets = <&tegra_car 54>; 636742af7e7SThierry Reding reset-names = "i2c"; 637742af7e7SThierry Reding dmas = <&apbdma 22>, <&apbdma 22>; 638742af7e7SThierry Reding dma-names = "rx", "tx"; 639742af7e7SThierry Reding status = "disabled"; 640742af7e7SThierry Reding }; 641742af7e7SThierry Reding 642be70771dSThierry Reding i2c@7000c500 { 643140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 644742af7e7SThierry Reding reg = <0x0 0x7000c500 0x0 0x100>; 645742af7e7SThierry Reding interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 646742af7e7SThierry Reding #address-cells = <1>; 647742af7e7SThierry Reding #size-cells = <0>; 648742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C3>; 649742af7e7SThierry Reding clock-names = "div-clk"; 650742af7e7SThierry Reding resets = <&tegra_car 67>; 651742af7e7SThierry Reding reset-names = "i2c"; 652742af7e7SThierry Reding dmas = <&apbdma 23>, <&apbdma 23>; 653742af7e7SThierry Reding dma-names = "rx", "tx"; 654742af7e7SThierry Reding status = "disabled"; 655742af7e7SThierry Reding }; 656742af7e7SThierry Reding 657be70771dSThierry Reding i2c@7000c700 { 658140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 659742af7e7SThierry Reding reg = <0x0 0x7000c700 0x0 0x100>; 660742af7e7SThierry Reding interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 661742af7e7SThierry Reding #address-cells = <1>; 662742af7e7SThierry Reding #size-cells = <0>; 663742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C4>; 664742af7e7SThierry Reding clock-names = "div-clk"; 665742af7e7SThierry Reding resets = <&tegra_car 103>; 666742af7e7SThierry Reding reset-names = "i2c"; 667742af7e7SThierry Reding dmas = <&apbdma 26>, <&apbdma 26>; 668742af7e7SThierry Reding dma-names = "rx", "tx"; 66966b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_i2c>; 67066b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_off>; 67166b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 672742af7e7SThierry Reding status = "disabled"; 673742af7e7SThierry Reding }; 674742af7e7SThierry Reding 675be70771dSThierry Reding i2c@7000d000 { 676140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 677742af7e7SThierry Reding reg = <0x0 0x7000d000 0x0 0x100>; 678742af7e7SThierry Reding interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 679742af7e7SThierry Reding #address-cells = <1>; 680742af7e7SThierry Reding #size-cells = <0>; 681742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C5>; 682742af7e7SThierry Reding clock-names = "div-clk"; 683742af7e7SThierry Reding resets = <&tegra_car 47>; 684742af7e7SThierry Reding reset-names = "i2c"; 685742af7e7SThierry Reding dmas = <&apbdma 24>, <&apbdma 24>; 686742af7e7SThierry Reding dma-names = "rx", "tx"; 687742af7e7SThierry Reding status = "disabled"; 688742af7e7SThierry Reding }; 689742af7e7SThierry Reding 690be70771dSThierry Reding i2c@7000d100 { 691140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 692742af7e7SThierry Reding reg = <0x0 0x7000d100 0x0 0x100>; 693742af7e7SThierry Reding interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 694742af7e7SThierry Reding #address-cells = <1>; 695742af7e7SThierry Reding #size-cells = <0>; 696742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C6>; 697742af7e7SThierry Reding clock-names = "div-clk"; 698742af7e7SThierry Reding resets = <&tegra_car 166>; 699742af7e7SThierry Reding reset-names = "i2c"; 700742af7e7SThierry Reding dmas = <&apbdma 30>, <&apbdma 30>; 701742af7e7SThierry Reding dma-names = "rx", "tx"; 70266b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_i2c>; 70366b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_off>; 70466b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 705742af7e7SThierry Reding status = "disabled"; 706742af7e7SThierry Reding }; 707742af7e7SThierry Reding 708be70771dSThierry Reding spi@7000d400 { 709742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 710742af7e7SThierry Reding reg = <0x0 0x7000d400 0x0 0x200>; 711742af7e7SThierry Reding interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 712742af7e7SThierry Reding #address-cells = <1>; 713742af7e7SThierry Reding #size-cells = <0>; 714742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC1>; 715742af7e7SThierry Reding clock-names = "spi"; 716742af7e7SThierry Reding resets = <&tegra_car 41>; 717742af7e7SThierry Reding reset-names = "spi"; 718742af7e7SThierry Reding dmas = <&apbdma 15>, <&apbdma 15>; 719742af7e7SThierry Reding dma-names = "rx", "tx"; 720742af7e7SThierry Reding status = "disabled"; 721742af7e7SThierry Reding }; 722742af7e7SThierry Reding 723be70771dSThierry Reding spi@7000d600 { 724742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 725742af7e7SThierry Reding reg = <0x0 0x7000d600 0x0 0x200>; 726742af7e7SThierry Reding interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 727742af7e7SThierry Reding #address-cells = <1>; 728742af7e7SThierry Reding #size-cells = <0>; 729742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC2>; 730742af7e7SThierry Reding clock-names = "spi"; 731742af7e7SThierry Reding resets = <&tegra_car 44>; 732742af7e7SThierry Reding reset-names = "spi"; 733742af7e7SThierry Reding dmas = <&apbdma 16>, <&apbdma 16>; 734742af7e7SThierry Reding dma-names = "rx", "tx"; 735742af7e7SThierry Reding status = "disabled"; 736742af7e7SThierry Reding }; 737742af7e7SThierry Reding 738be70771dSThierry Reding spi@7000d800 { 739742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 740742af7e7SThierry Reding reg = <0x0 0x7000d800 0x0 0x200>; 741742af7e7SThierry Reding interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 742742af7e7SThierry Reding #address-cells = <1>; 743742af7e7SThierry Reding #size-cells = <0>; 744742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC3>; 745742af7e7SThierry Reding clock-names = "spi"; 746742af7e7SThierry Reding resets = <&tegra_car 46>; 747742af7e7SThierry Reding reset-names = "spi"; 748742af7e7SThierry Reding dmas = <&apbdma 17>, <&apbdma 17>; 749742af7e7SThierry Reding dma-names = "rx", "tx"; 750742af7e7SThierry Reding status = "disabled"; 751742af7e7SThierry Reding }; 752742af7e7SThierry Reding 753be70771dSThierry Reding spi@7000da00 { 754742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 755742af7e7SThierry Reding reg = <0x0 0x7000da00 0x0 0x200>; 756742af7e7SThierry Reding interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 757742af7e7SThierry Reding #address-cells = <1>; 758742af7e7SThierry Reding #size-cells = <0>; 759742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC4>; 760742af7e7SThierry Reding clock-names = "spi"; 761742af7e7SThierry Reding resets = <&tegra_car 68>; 762742af7e7SThierry Reding reset-names = "spi"; 763742af7e7SThierry Reding dmas = <&apbdma 18>, <&apbdma 18>; 764742af7e7SThierry Reding dma-names = "rx", "tx"; 765742af7e7SThierry Reding status = "disabled"; 766742af7e7SThierry Reding }; 767742af7e7SThierry Reding 768be70771dSThierry Reding rtc@7000e000 { 769742af7e7SThierry Reding compatible = "nvidia,tegra210-rtc", "nvidia,tegra20-rtc"; 770742af7e7SThierry Reding reg = <0x0 0x7000e000 0x0 0x100>; 771742af7e7SThierry Reding interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 772742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_RTC>; 773742af7e7SThierry Reding clock-names = "rtc"; 774742af7e7SThierry Reding }; 775742af7e7SThierry Reding 776be70771dSThierry Reding pmc: pmc@7000e400 { 777742af7e7SThierry Reding compatible = "nvidia,tegra210-pmc"; 778742af7e7SThierry Reding reg = <0x0 0x7000e400 0x0 0x400>; 779742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; 780742af7e7SThierry Reding clock-names = "pclk", "clk32k_in"; 781c2b82445SJon Hunter 782c2b82445SJon Hunter powergates { 783c2b82445SJon Hunter pd_audio: aud { 784c2b82445SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 785c2b82445SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 786c2b82445SJon Hunter resets = <&tegra_car 198>; 787c2b82445SJon Hunter #power-domain-cells = <0>; 788c2b82445SJon Hunter }; 789241f02baSJon Hunter 79096d1f078SJon Hunter pd_sor: sor { 79196d1f078SJon Hunter clocks = <&tegra_car TEGRA210_CLK_SOR0>, 79296d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 79396d1f078SJon Hunter <&tegra_car TEGRA210_CLK_CSI>, 79496d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 79596d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 79696d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 79796d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 79896d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 79996d1f078SJon Hunter resets = <&tegra_car TEGRA210_CLK_SOR0>, 80096d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 80196d1f078SJon Hunter <&tegra_car TEGRA210_CLK_CSI>, 80296d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 80396d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 80496d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 80596d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 80696d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 80796d1f078SJon Hunter #power-domain-cells = <0>; 80896d1f078SJon Hunter }; 80996d1f078SJon Hunter 810241f02baSJon Hunter pd_xusbss: xusba { 811241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>; 812241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_SS>; 813241f02baSJon Hunter #power-domain-cells = <0>; 814241f02baSJon Hunter }; 815241f02baSJon Hunter 816241f02baSJon Hunter pd_xusbdev: xusbb { 817241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>; 818241f02baSJon Hunter resets = <&tegra_car 95>; 819241f02baSJon Hunter #power-domain-cells = <0>; 820241f02baSJon Hunter }; 821241f02baSJon Hunter 822241f02baSJon Hunter pd_xusbhost: xusbc { 823241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 824241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 825241f02baSJon Hunter #power-domain-cells = <0>; 826241f02baSJon Hunter }; 82724963d1bSMikko Perttunen 82824963d1bSMikko Perttunen pd_vic: vic { 82924963d1bSMikko Perttunen clocks = <&tegra_car TEGRA210_CLK_VIC03>; 83024963d1bSMikko Perttunen clock-names = "vic"; 83124963d1bSMikko Perttunen resets = <&tegra_car 178>; 83224963d1bSMikko Perttunen reset-names = "vic"; 83324963d1bSMikko Perttunen #power-domain-cells = <0>; 83424963d1bSMikko Perttunen }; 835c2b82445SJon Hunter }; 8366641af7eSAapo Vienamo 8376641af7eSAapo Vienamo sdmmc1_3v3: sdmmc1-3v3 { 8386641af7eSAapo Vienamo pins = "sdmmc1"; 8396641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>; 8406641af7eSAapo Vienamo }; 8416641af7eSAapo Vienamo 8426641af7eSAapo Vienamo sdmmc1_1v8: sdmmc1-1v8 { 8436641af7eSAapo Vienamo pins = "sdmmc1"; 8446641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>; 8456641af7eSAapo Vienamo }; 8466641af7eSAapo Vienamo 8476641af7eSAapo Vienamo sdmmc3_3v3: sdmmc3-3v3 { 8486641af7eSAapo Vienamo pins = "sdmmc3"; 8496641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>; 8506641af7eSAapo Vienamo }; 8516641af7eSAapo Vienamo 8526641af7eSAapo Vienamo sdmmc3_1v8: sdmmc3-1v8 { 8536641af7eSAapo Vienamo pins = "sdmmc3"; 8546641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>; 8556641af7eSAapo Vienamo }; 856871be845SManikanta Maddireddy 857871be845SManikanta Maddireddy pex_dpd_disable: pex_en { 858871be845SManikanta Maddireddy pex-dpd-disable { 859871be845SManikanta Maddireddy pins = "pex-bias", "pex-clk1", "pex-clk2"; 860871be845SManikanta Maddireddy low-power-disable; 861871be845SManikanta Maddireddy }; 862871be845SManikanta Maddireddy }; 863871be845SManikanta Maddireddy 864871be845SManikanta Maddireddy pex_dpd_enable: pex_dis { 865871be845SManikanta Maddireddy pex-dpd-enable { 866871be845SManikanta Maddireddy pins = "pex-bias", "pex-clk1", "pex-clk2"; 867871be845SManikanta Maddireddy low-power-enable; 868871be845SManikanta Maddireddy }; 869871be845SManikanta Maddireddy }; 870742af7e7SThierry Reding }; 871742af7e7SThierry Reding 872be70771dSThierry Reding fuse@7000f800 { 873742af7e7SThierry Reding compatible = "nvidia,tegra210-efuse"; 874742af7e7SThierry Reding reg = <0x0 0x7000f800 0x0 0x400>; 875742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_FUSE>; 876742af7e7SThierry Reding clock-names = "fuse"; 877742af7e7SThierry Reding resets = <&tegra_car 39>; 878742af7e7SThierry Reding reset-names = "fuse"; 879742af7e7SThierry Reding }; 880742af7e7SThierry Reding 881be70771dSThierry Reding mc: memory-controller@70019000 { 882742af7e7SThierry Reding compatible = "nvidia,tegra210-mc"; 883742af7e7SThierry Reding reg = <0x0 0x70019000 0x0 0x1000>; 884742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MC>; 885742af7e7SThierry Reding clock-names = "mc"; 886742af7e7SThierry Reding 887742af7e7SThierry Reding interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 888742af7e7SThierry Reding 889742af7e7SThierry Reding #iommu-cells = <1>; 890742af7e7SThierry Reding }; 891742af7e7SThierry Reding 8926cb60ec4SPreetham Ramchandra sata@70020000 { 8936cb60ec4SPreetham Ramchandra compatible = "nvidia,tegra210-ahci"; 8946cb60ec4SPreetham Ramchandra reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */ 8956cb60ec4SPreetham Ramchandra <0x0 0x70020000 0x0 0x7000>, /* SATA */ 8966cb60ec4SPreetham Ramchandra <0x0 0x70001100 0x0 0x1000>; /* SATA AUX */ 8976cb60ec4SPreetham Ramchandra interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 8986cb60ec4SPreetham Ramchandra clocks = <&tegra_car TEGRA210_CLK_SATA>, 8996cb60ec4SPreetham Ramchandra <&tegra_car TEGRA210_CLK_SATA_OOB>; 9006cb60ec4SPreetham Ramchandra clock-names = "sata", "sata-oob"; 9016cb60ec4SPreetham Ramchandra resets = <&tegra_car 124>, 9026cb60ec4SPreetham Ramchandra <&tegra_car 123>, 9036cb60ec4SPreetham Ramchandra <&tegra_car 129>; 9046cb60ec4SPreetham Ramchandra reset-names = "sata", "sata-oob", "sata-cold"; 9056cb60ec4SPreetham Ramchandra status = "disabled"; 9066cb60ec4SPreetham Ramchandra }; 9076cb60ec4SPreetham Ramchandra 908be70771dSThierry Reding hda@70030000 { 909742af7e7SThierry Reding compatible = "nvidia,tegra210-hda", "nvidia,tegra30-hda"; 910742af7e7SThierry Reding reg = <0x0 0x70030000 0x0 0x10000>; 911742af7e7SThierry Reding interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 912742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HDA>, 913742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2HDMI>, 914742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2CODEC_2X>; 915742af7e7SThierry Reding clock-names = "hda", "hda2hdmi", "hda2codec_2x"; 916742af7e7SThierry Reding resets = <&tegra_car 125>, /* hda */ 917742af7e7SThierry Reding <&tegra_car 128>, /* hda2hdmi */ 918742af7e7SThierry Reding <&tegra_car 111>; /* hda2codec_2x */ 919742af7e7SThierry Reding reset-names = "hda", "hda2hdmi", "hda2codec_2x"; 920742af7e7SThierry Reding status = "disabled"; 921742af7e7SThierry Reding }; 922742af7e7SThierry Reding 923e7a99ac2SThierry Reding usb@70090000 { 924e7a99ac2SThierry Reding compatible = "nvidia,tegra210-xusb"; 925e7a99ac2SThierry Reding reg = <0x0 0x70090000 0x0 0x8000>, 926e7a99ac2SThierry Reding <0x0 0x70098000 0x0 0x1000>, 927e7a99ac2SThierry Reding <0x0 0x70099000 0x0 0x1000>; 928e7a99ac2SThierry Reding reg-names = "hcd", "fpci", "ipfs"; 929e7a99ac2SThierry Reding 930e7a99ac2SThierry Reding interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 9319168e1dbSJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 932e7a99ac2SThierry Reding 933e7a99ac2SThierry Reding clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>, 934e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>, 935e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>, 936e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS>, 937e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>, 938e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>, 939e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, 940e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, 941e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U_480M>, 942e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_CLK_M>, 943e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>; 944e7a99ac2SThierry Reding clock-names = "xusb_host", "xusb_host_src", 945e7a99ac2SThierry Reding "xusb_falcon_src", "xusb_ss", 946e7a99ac2SThierry Reding "xusb_ss_div2", "xusb_ss_src", 947e7a99ac2SThierry Reding "xusb_hs_src", "xusb_fs_src", 948e7a99ac2SThierry Reding "pll_u_480m", "clk_m", "pll_e"; 949e7a99ac2SThierry Reding resets = <&tegra_car 89>, <&tegra_car 156>, 950e7a99ac2SThierry Reding <&tegra_car 143>; 951e7a99ac2SThierry Reding reset-names = "xusb_host", "xusb_ss", "xusb_src"; 95236ec29f7SJon Hunter power-domains = <&pd_xusbhost>, <&pd_xusbss>; 95336ec29f7SJon Hunter power-domain-names = "xusb_host", "xusb_ss"; 954e7a99ac2SThierry Reding 955e7a99ac2SThierry Reding nvidia,xusb-padctl = <&padctl>; 956e7a99ac2SThierry Reding 957e7a99ac2SThierry Reding status = "disabled"; 958e7a99ac2SThierry Reding }; 959e7a99ac2SThierry Reding 9604e07ac90SThierry Reding padctl: padctl@7009f000 { 9614e07ac90SThierry Reding compatible = "nvidia,tegra210-xusb-padctl"; 9624e07ac90SThierry Reding reg = <0x0 0x7009f000 0x0 0x1000>; 9634e07ac90SThierry Reding resets = <&tegra_car 142>; 9644e07ac90SThierry Reding reset-names = "padctl"; 9654e07ac90SThierry Reding 9664e07ac90SThierry Reding status = "disabled"; 9674e07ac90SThierry Reding 9684e07ac90SThierry Reding pads { 9694e07ac90SThierry Reding usb2 { 9704e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>; 9714e07ac90SThierry Reding clock-names = "trk"; 9724e07ac90SThierry Reding status = "disabled"; 9734e07ac90SThierry Reding 9744e07ac90SThierry Reding lanes { 9754e07ac90SThierry Reding usb2-0 { 9764e07ac90SThierry Reding status = "disabled"; 9774e07ac90SThierry Reding #phy-cells = <0>; 9784e07ac90SThierry Reding }; 9794e07ac90SThierry Reding 9804e07ac90SThierry Reding usb2-1 { 9814e07ac90SThierry Reding status = "disabled"; 9824e07ac90SThierry Reding #phy-cells = <0>; 9834e07ac90SThierry Reding }; 9844e07ac90SThierry Reding 9854e07ac90SThierry Reding usb2-2 { 9864e07ac90SThierry Reding status = "disabled"; 9874e07ac90SThierry Reding #phy-cells = <0>; 9884e07ac90SThierry Reding }; 9894e07ac90SThierry Reding 9904e07ac90SThierry Reding usb2-3 { 9914e07ac90SThierry Reding status = "disabled"; 9924e07ac90SThierry Reding #phy-cells = <0>; 9934e07ac90SThierry Reding }; 9944e07ac90SThierry Reding }; 9954e07ac90SThierry Reding }; 9964e07ac90SThierry Reding 9974e07ac90SThierry Reding hsic { 9984e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>; 9994e07ac90SThierry Reding clock-names = "trk"; 10004e07ac90SThierry Reding status = "disabled"; 10014e07ac90SThierry Reding 10024e07ac90SThierry Reding lanes { 10034e07ac90SThierry Reding hsic-0 { 10044e07ac90SThierry Reding status = "disabled"; 10054e07ac90SThierry Reding #phy-cells = <0>; 10064e07ac90SThierry Reding }; 10074e07ac90SThierry Reding 10084e07ac90SThierry Reding hsic-1 { 10094e07ac90SThierry Reding status = "disabled"; 10104e07ac90SThierry Reding #phy-cells = <0>; 10114e07ac90SThierry Reding }; 10124e07ac90SThierry Reding }; 10134e07ac90SThierry Reding }; 10144e07ac90SThierry Reding 10154e07ac90SThierry Reding pcie { 10164e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 10174e07ac90SThierry Reding clock-names = "pll"; 10184e07ac90SThierry Reding resets = <&tegra_car 205>; 10194e07ac90SThierry Reding reset-names = "phy"; 10204e07ac90SThierry Reding status = "disabled"; 10214e07ac90SThierry Reding 10224e07ac90SThierry Reding lanes { 10234e07ac90SThierry Reding pcie-0 { 10244e07ac90SThierry Reding status = "disabled"; 10254e07ac90SThierry Reding #phy-cells = <0>; 10264e07ac90SThierry Reding }; 10274e07ac90SThierry Reding 10284e07ac90SThierry Reding pcie-1 { 10294e07ac90SThierry Reding status = "disabled"; 10304e07ac90SThierry Reding #phy-cells = <0>; 10314e07ac90SThierry Reding }; 10324e07ac90SThierry Reding 10334e07ac90SThierry Reding pcie-2 { 10344e07ac90SThierry Reding status = "disabled"; 10354e07ac90SThierry Reding #phy-cells = <0>; 10364e07ac90SThierry Reding }; 10374e07ac90SThierry Reding 10384e07ac90SThierry Reding pcie-3 { 10394e07ac90SThierry Reding status = "disabled"; 10404e07ac90SThierry Reding #phy-cells = <0>; 10414e07ac90SThierry Reding }; 10424e07ac90SThierry Reding 10434e07ac90SThierry Reding pcie-4 { 10444e07ac90SThierry Reding status = "disabled"; 10454e07ac90SThierry Reding #phy-cells = <0>; 10464e07ac90SThierry Reding }; 10474e07ac90SThierry Reding 10484e07ac90SThierry Reding pcie-5 { 10494e07ac90SThierry Reding status = "disabled"; 10504e07ac90SThierry Reding #phy-cells = <0>; 10514e07ac90SThierry Reding }; 10524e07ac90SThierry Reding 10534e07ac90SThierry Reding pcie-6 { 10544e07ac90SThierry Reding status = "disabled"; 10554e07ac90SThierry Reding #phy-cells = <0>; 10564e07ac90SThierry Reding }; 10574e07ac90SThierry Reding }; 10584e07ac90SThierry Reding }; 10594e07ac90SThierry Reding 10604e07ac90SThierry Reding sata { 10614e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 10624e07ac90SThierry Reding clock-names = "pll"; 10634e07ac90SThierry Reding resets = <&tegra_car 204>; 10644e07ac90SThierry Reding reset-names = "phy"; 10654e07ac90SThierry Reding status = "disabled"; 10664e07ac90SThierry Reding 10674e07ac90SThierry Reding lanes { 10684e07ac90SThierry Reding sata-0 { 10694e07ac90SThierry Reding status = "disabled"; 10704e07ac90SThierry Reding #phy-cells = <0>; 10714e07ac90SThierry Reding }; 10724e07ac90SThierry Reding }; 10734e07ac90SThierry Reding }; 10744e07ac90SThierry Reding }; 10754e07ac90SThierry Reding 10764e07ac90SThierry Reding ports { 10774e07ac90SThierry Reding usb2-0 { 10784e07ac90SThierry Reding status = "disabled"; 10794e07ac90SThierry Reding }; 10804e07ac90SThierry Reding 10814e07ac90SThierry Reding usb2-1 { 10824e07ac90SThierry Reding status = "disabled"; 10834e07ac90SThierry Reding }; 10844e07ac90SThierry Reding 10854e07ac90SThierry Reding usb2-2 { 10864e07ac90SThierry Reding status = "disabled"; 10874e07ac90SThierry Reding }; 10884e07ac90SThierry Reding 10894e07ac90SThierry Reding usb2-3 { 10904e07ac90SThierry Reding status = "disabled"; 10914e07ac90SThierry Reding }; 10924e07ac90SThierry Reding 10934e07ac90SThierry Reding hsic-0 { 10944e07ac90SThierry Reding status = "disabled"; 10954e07ac90SThierry Reding }; 10964e07ac90SThierry Reding 10974e07ac90SThierry Reding usb3-0 { 10984e07ac90SThierry Reding status = "disabled"; 10994e07ac90SThierry Reding }; 11004e07ac90SThierry Reding 11014e07ac90SThierry Reding usb3-1 { 11024e07ac90SThierry Reding status = "disabled"; 11034e07ac90SThierry Reding }; 11044e07ac90SThierry Reding 11054e07ac90SThierry Reding usb3-2 { 11064e07ac90SThierry Reding status = "disabled"; 11074e07ac90SThierry Reding }; 11084e07ac90SThierry Reding 11094e07ac90SThierry Reding usb3-3 { 11104e07ac90SThierry Reding status = "disabled"; 11114e07ac90SThierry Reding }; 11124e07ac90SThierry Reding }; 11134e07ac90SThierry Reding }; 11144e07ac90SThierry Reding 1115be70771dSThierry Reding sdhci@700b0000 { 1116742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1117742af7e7SThierry Reding reg = <0x0 0x700b0000 0x0 0x200>; 1118742af7e7SThierry Reding interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1119742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC1>; 1120742af7e7SThierry Reding clock-names = "sdhci"; 1121742af7e7SThierry Reding resets = <&tegra_car 14>; 1122742af7e7SThierry Reding reset-names = "sdhci"; 11234e0f1229SSowjanya Komatineni pinctrl-names = "sdmmc-3v3", "sdmmc-1v8", 11244e0f1229SSowjanya Komatineni "sdmmc-3v3-drv", "sdmmc-1v8-drv"; 11256641af7eSAapo Vienamo pinctrl-0 = <&sdmmc1_3v3>; 11266641af7eSAapo Vienamo pinctrl-1 = <&sdmmc1_1v8>; 11274e0f1229SSowjanya Komatineni pinctrl-2 = <&sdmmc1_3v3_drv>; 11284e0f1229SSowjanya Komatineni pinctrl-3 = <&sdmmc1_1v8_drv>; 11291ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>; 11301ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>; 11311ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>; 11321ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>; 113363af8bcdSAapo Vienamo nvidia,default-tap = <0x2>; 113463af8bcdSAapo Vienamo nvidia,default-trim = <0x4>; 1135918f9671SAapo Vienamo assigned-clocks = <&tegra_car TEGRA210_CLK_SDMMC4>, 1136918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>, 1137918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4>; 1138918f9671SAapo Vienamo assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 1139918f9671SAapo Vienamo assigned-clock-rates = <200000000>, <1000000000>, <1000000000>; 1140742af7e7SThierry Reding status = "disabled"; 1141742af7e7SThierry Reding }; 1142742af7e7SThierry Reding 1143be70771dSThierry Reding sdhci@700b0200 { 1144742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1145742af7e7SThierry Reding reg = <0x0 0x700b0200 0x0 0x200>; 1146742af7e7SThierry Reding interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1147742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC2>; 1148742af7e7SThierry Reding clock-names = "sdhci"; 1149742af7e7SThierry Reding resets = <&tegra_car 9>; 1150742af7e7SThierry Reding reset-names = "sdhci"; 11514e0f1229SSowjanya Komatineni pinctrl-names = "sdmmc-1v8-drv"; 11524e0f1229SSowjanya Komatineni pinctrl-0 = <&sdmmc2_1v8_drv>; 11531ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x05>; 11541ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x05>; 115563af8bcdSAapo Vienamo nvidia,default-tap = <0x8>; 115663af8bcdSAapo Vienamo nvidia,default-trim = <0x0>; 1157742af7e7SThierry Reding status = "disabled"; 1158742af7e7SThierry Reding }; 1159742af7e7SThierry Reding 1160be70771dSThierry Reding sdhci@700b0400 { 1161742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1162742af7e7SThierry Reding reg = <0x0 0x700b0400 0x0 0x200>; 1163742af7e7SThierry Reding interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 1164742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC3>; 1165742af7e7SThierry Reding clock-names = "sdhci"; 1166742af7e7SThierry Reding resets = <&tegra_car 69>; 1167742af7e7SThierry Reding reset-names = "sdhci"; 11684e0f1229SSowjanya Komatineni pinctrl-names = "sdmmc-3v3", "sdmmc-1v8", 11694e0f1229SSowjanya Komatineni "sdmmc-3v3-drv", "sdmmc-1v8-drv"; 11706641af7eSAapo Vienamo pinctrl-0 = <&sdmmc3_3v3>; 11716641af7eSAapo Vienamo pinctrl-1 = <&sdmmc3_1v8>; 11724e0f1229SSowjanya Komatineni pinctrl-2 = <&sdmmc3_3v3_drv>; 11734e0f1229SSowjanya Komatineni pinctrl-3 = <&sdmmc3_1v8_drv>; 11741ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>; 11751ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>; 11761ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>; 11771ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>; 117863af8bcdSAapo Vienamo nvidia,default-tap = <0x3>; 117963af8bcdSAapo Vienamo nvidia,default-trim = <0x3>; 1180742af7e7SThierry Reding status = "disabled"; 1181742af7e7SThierry Reding }; 1182742af7e7SThierry Reding 1183be70771dSThierry Reding sdhci@700b0600 { 1184742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1185742af7e7SThierry Reding reg = <0x0 0x700b0600 0x0 0x200>; 1186742af7e7SThierry Reding interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 1187742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC4>; 1188742af7e7SThierry Reding clock-names = "sdhci"; 1189742af7e7SThierry Reding resets = <&tegra_car 15>; 1190742af7e7SThierry Reding reset-names = "sdhci"; 11914e0f1229SSowjanya Komatineni pinctrl-names = "sdmmc-3v3-drv", "sdmmc-1v8-drv"; 11924e0f1229SSowjanya Komatineni pinctrl-0 = <&sdmmc4_1v8_drv>; 11934e0f1229SSowjanya Komatineni pinctrl-1 = <&sdmmc4_1v8_drv>; 11941ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x05>; 11951ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x05>; 119663af8bcdSAapo Vienamo nvidia,default-tap = <0x8>; 119763af8bcdSAapo Vienamo nvidia,default-trim = <0x0>; 1198918f9671SAapo Vienamo assigned-clocks = <&tegra_car TEGRA210_CLK_SDMMC4>, 1199918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 1200918f9671SAapo Vienamo assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 12015879600aSAapo Vienamo nvidia,dqs-trim = <40>; 1202d5d6b468SAapo Vienamo mmc-hs400-1_8v; 1203742af7e7SThierry Reding status = "disabled"; 1204742af7e7SThierry Reding }; 1205742af7e7SThierry Reding 1206be70771dSThierry Reding mipi: mipi@700e3000 { 1207742af7e7SThierry Reding compatible = "nvidia,tegra210-mipi"; 1208742af7e7SThierry Reding reg = <0x0 0x700e3000 0x0 0x100>; 1209742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MIPI_CAL>; 1210742af7e7SThierry Reding clock-names = "mipi-cal"; 121196d1f078SJon Hunter power-domains = <&pd_sor>; 1212742af7e7SThierry Reding #nvidia,mipi-calibrate-cells = <1>; 1213742af7e7SThierry Reding }; 1214742af7e7SThierry Reding 12152ceed593SJoseph Lo dfll: clock@70110000 { 12162ceed593SJoseph Lo compatible = "nvidia,tegra210-dfll"; 12172ceed593SJoseph Lo reg = <0 0x70110000 0 0x100>, /* DFLL control */ 12182ceed593SJoseph Lo <0 0x70110000 0 0x100>, /* I2C output control */ 12192ceed593SJoseph Lo <0 0x70110100 0 0x100>, /* Integrated I2C controller */ 12202ceed593SJoseph Lo <0 0x70110200 0 0x100>; /* Look-up table RAM */ 12212ceed593SJoseph Lo interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 12222ceed593SJoseph Lo clocks = <&tegra_car TEGRA210_CLK_DFLL_SOC>, 12232ceed593SJoseph Lo <&tegra_car TEGRA210_CLK_DFLL_REF>, 12242ceed593SJoseph Lo <&tegra_car TEGRA210_CLK_I2C5>; 12252ceed593SJoseph Lo clock-names = "soc", "ref", "i2c"; 12262ceed593SJoseph Lo resets = <&tegra_car TEGRA210_RST_DFLL_DVCO>; 12272ceed593SJoseph Lo reset-names = "dvco"; 12282ceed593SJoseph Lo #clock-cells = <0>; 12292ceed593SJoseph Lo clock-output-names = "dfllCPU_out"; 12302ceed593SJoseph Lo status = "disabled"; 12312ceed593SJoseph Lo }; 12322ceed593SJoseph Lo 12330f133090SJon Hunter aconnect@702c0000 { 12340f133090SJon Hunter compatible = "nvidia,tegra210-aconnect"; 12350f133090SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 12360f133090SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 12370f133090SJon Hunter clock-names = "ape", "apb2ape"; 12380f133090SJon Hunter power-domains = <&pd_audio>; 12390f133090SJon Hunter #address-cells = <1>; 12400f133090SJon Hunter #size-cells = <1>; 12410f133090SJon Hunter ranges = <0x702c0000 0x0 0x702c0000 0x00040000>; 12420f133090SJon Hunter status = "disabled"; 1243bcdbde43SJon Hunter 124419e61213SJon Hunter adma: dma@702e2000 { 124519e61213SJon Hunter compatible = "nvidia,tegra210-adma"; 124619e61213SJon Hunter reg = <0x702e2000 0x2000>; 124719e61213SJon Hunter interrupt-parent = <&agic>; 124819e61213SJon Hunter interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, 124919e61213SJon Hunter <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, 125019e61213SJon Hunter <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, 125119e61213SJon Hunter <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, 125219e61213SJon Hunter <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, 125319e61213SJon Hunter <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 125419e61213SJon Hunter <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, 125519e61213SJon Hunter <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, 125619e61213SJon Hunter <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 125719e61213SJon Hunter <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 125819e61213SJon Hunter <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 125919e61213SJon Hunter <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 126019e61213SJon Hunter <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 126119e61213SJon Hunter <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 126219e61213SJon Hunter <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 126319e61213SJon Hunter <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 126419e61213SJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 126519e61213SJon Hunter <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 126619e61213SJon Hunter <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 126719e61213SJon Hunter <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 126819e61213SJon Hunter <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 126919e61213SJon Hunter <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 127019e61213SJon Hunter #dma-cells = <1>; 127119e61213SJon Hunter clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; 127219e61213SJon Hunter clock-names = "d_audio"; 127319e61213SJon Hunter status = "disabled"; 127419e61213SJon Hunter }; 127519e61213SJon Hunter 1276bcdbde43SJon Hunter agic: agic@702f9000 { 1277bcdbde43SJon Hunter compatible = "nvidia,tegra210-agic"; 1278bcdbde43SJon Hunter #interrupt-cells = <3>; 1279bcdbde43SJon Hunter interrupt-controller; 1280ba24eee6SJon Hunter reg = <0x702f9000 0x1000>, 1281bcdbde43SJon Hunter <0x702fa000 0x2000>; 1282bcdbde43SJon Hunter interrupts = <GIC_SPI 102 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 1283bcdbde43SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>; 1284bcdbde43SJon Hunter clock-names = "clk"; 1285bcdbde43SJon Hunter status = "disabled"; 1286bcdbde43SJon Hunter }; 12870f133090SJon Hunter }; 12880f133090SJon Hunter 1289be70771dSThierry Reding spi@70410000 { 1290742af7e7SThierry Reding compatible = "nvidia,tegra210-qspi"; 1291742af7e7SThierry Reding reg = <0x0 0x70410000 0x0 0x1000>; 1292742af7e7SThierry Reding interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 1293742af7e7SThierry Reding #address-cells = <1>; 1294742af7e7SThierry Reding #size-cells = <0>; 1295742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_QSPI>; 1296742af7e7SThierry Reding clock-names = "qspi"; 1297742af7e7SThierry Reding resets = <&tegra_car 211>; 1298742af7e7SThierry Reding reset-names = "qspi"; 1299742af7e7SThierry Reding dmas = <&apbdma 5>, <&apbdma 5>; 1300742af7e7SThierry Reding dma-names = "rx", "tx"; 1301742af7e7SThierry Reding status = "disabled"; 1302742af7e7SThierry Reding }; 1303742af7e7SThierry Reding 1304be70771dSThierry Reding usb@7d000000 { 1305742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1306742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>; 1307742af7e7SThierry Reding interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 1308742af7e7SThierry Reding phy_type = "utmi"; 1309742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>; 1310742af7e7SThierry Reding clock-names = "usb"; 1311742af7e7SThierry Reding resets = <&tegra_car 22>; 1312742af7e7SThierry Reding reset-names = "usb"; 1313742af7e7SThierry Reding nvidia,phy = <&phy1>; 1314742af7e7SThierry Reding status = "disabled"; 1315742af7e7SThierry Reding }; 1316742af7e7SThierry Reding 1317be70771dSThierry Reding phy1: usb-phy@7d000000 { 1318742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1319742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>, 1320742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1321742af7e7SThierry Reding phy_type = "utmi"; 1322742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>, 1323742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1324742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1325742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1326742af7e7SThierry Reding resets = <&tegra_car 22>, <&tegra_car 22>; 1327742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1328742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1329742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1330742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1331742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1332742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1333742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1334742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1335742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1336742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1337742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1338742af7e7SThierry Reding nvidia,has-utmi-pad-registers; 1339742af7e7SThierry Reding status = "disabled"; 1340742af7e7SThierry Reding }; 1341742af7e7SThierry Reding 1342be70771dSThierry Reding usb@7d004000 { 1343742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1344742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>; 1345742af7e7SThierry Reding interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1346742af7e7SThierry Reding phy_type = "utmi"; 1347742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>; 1348742af7e7SThierry Reding clock-names = "usb"; 1349742af7e7SThierry Reding resets = <&tegra_car 58>; 1350742af7e7SThierry Reding reset-names = "usb"; 1351742af7e7SThierry Reding nvidia,phy = <&phy2>; 1352742af7e7SThierry Reding status = "disabled"; 1353742af7e7SThierry Reding }; 1354742af7e7SThierry Reding 1355be70771dSThierry Reding phy2: usb-phy@7d004000 { 1356742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1357742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>, 1358742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1359742af7e7SThierry Reding phy_type = "utmi"; 1360742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>, 1361742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1362742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1363742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1364742af7e7SThierry Reding resets = <&tegra_car 58>, <&tegra_car 22>; 1365742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1366742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1367742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1368742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1369742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1370742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1371742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1372742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1373742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1374742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1375742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1376742af7e7SThierry Reding status = "disabled"; 1377742af7e7SThierry Reding }; 1378742af7e7SThierry Reding 1379742af7e7SThierry Reding cpus { 1380742af7e7SThierry Reding #address-cells = <1>; 1381742af7e7SThierry Reding #size-cells = <0>; 1382742af7e7SThierry Reding 1383742af7e7SThierry Reding cpu@0 { 1384742af7e7SThierry Reding device_type = "cpu"; 1385742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1386742af7e7SThierry Reding reg = <0>; 138743b9b402SJoseph Lo clocks = <&tegra_car TEGRA210_CLK_CCLK_G>, 138843b9b402SJoseph Lo <&tegra_car TEGRA210_CLK_PLL_X>, 138943b9b402SJoseph Lo <&tegra_car TEGRA210_CLK_PLL_P_OUT4>, 139043b9b402SJoseph Lo <&dfll>; 139143b9b402SJoseph Lo clock-names = "cpu_g", "pll_x", "pll_p", "dfll"; 139243b9b402SJoseph Lo clock-latency = <300000>; 1393da77c6d9SJoseph Lo cpu-idle-states = <&CPU_SLEEP>; 13946c00cac1SJoseph Lo next-level-cache = <&L2>; 1395742af7e7SThierry Reding }; 1396742af7e7SThierry Reding 1397742af7e7SThierry Reding cpu@1 { 1398742af7e7SThierry Reding device_type = "cpu"; 1399742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1400742af7e7SThierry Reding reg = <1>; 1401da77c6d9SJoseph Lo cpu-idle-states = <&CPU_SLEEP>; 14026c00cac1SJoseph Lo next-level-cache = <&L2>; 1403742af7e7SThierry Reding }; 1404742af7e7SThierry Reding 1405742af7e7SThierry Reding cpu@2 { 1406742af7e7SThierry Reding device_type = "cpu"; 1407742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1408742af7e7SThierry Reding reg = <2>; 1409da77c6d9SJoseph Lo cpu-idle-states = <&CPU_SLEEP>; 14106c00cac1SJoseph Lo next-level-cache = <&L2>; 1411742af7e7SThierry Reding }; 1412742af7e7SThierry Reding 1413742af7e7SThierry Reding cpu@3 { 1414742af7e7SThierry Reding device_type = "cpu"; 1415742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1416742af7e7SThierry Reding reg = <3>; 1417da77c6d9SJoseph Lo cpu-idle-states = <&CPU_SLEEP>; 14186c00cac1SJoseph Lo next-level-cache = <&L2>; 1419da77c6d9SJoseph Lo }; 1420da77c6d9SJoseph Lo 1421da77c6d9SJoseph Lo idle-states { 1422da77c6d9SJoseph Lo entry-method = "psci"; 1423da77c6d9SJoseph Lo 1424da77c6d9SJoseph Lo CPU_SLEEP: cpu-sleep { 1425da77c6d9SJoseph Lo compatible = "arm,idle-state"; 1426da77c6d9SJoseph Lo arm,psci-suspend-param = <0x40000007>; 1427da77c6d9SJoseph Lo entry-latency-us = <100>; 1428da77c6d9SJoseph Lo exit-latency-us = <30>; 1429da77c6d9SJoseph Lo min-residency-us = <1000>; 1430da77c6d9SJoseph Lo wakeup-latency-us = <130>; 1431da77c6d9SJoseph Lo idle-state-name = "cpu-sleep"; 1432da77c6d9SJoseph Lo status = "disabled"; 1433da77c6d9SJoseph Lo }; 1434742af7e7SThierry Reding }; 14356c00cac1SJoseph Lo 14366c00cac1SJoseph Lo L2: l2-cache { 14376c00cac1SJoseph Lo compatible = "cache"; 14386c00cac1SJoseph Lo }; 1439742af7e7SThierry Reding }; 1440742af7e7SThierry Reding 1441742af7e7SThierry Reding timer { 1442742af7e7SThierry Reding compatible = "arm,armv8-timer"; 1443742af7e7SThierry Reding interrupts = <GIC_PPI 13 1444742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1445742af7e7SThierry Reding <GIC_PPI 14 1446742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1447742af7e7SThierry Reding <GIC_PPI 11 1448742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1449742af7e7SThierry Reding <GIC_PPI 10 1450742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 1451742af7e7SThierry Reding interrupt-parent = <&gic>; 14526b9e263bSThierry Reding arm,no-tick-in-suspend; 1453742af7e7SThierry Reding }; 1454e2bed1ebSWei Ni 1455e2bed1ebSWei Ni soctherm: thermal-sensor@700e2000 { 1456e2bed1ebSWei Ni compatible = "nvidia,tegra210-soctherm"; 1457cbd0f000SWei Ni reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */ 1458cbd0f000SWei Ni 0x0 0x60006000 0x0 0x400>; /* CAR reg_base */ 1459cbd0f000SWei Ni reg-names = "soctherm-reg", "car-reg"; 146044ff822cSThierry Reding interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 146144ff822cSThierry Reding <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 146244ff822cSThierry Reding interrupt-names = "thermal", "edp"; 1463e2bed1ebSWei Ni clocks = <&tegra_car TEGRA210_CLK_TSENSOR>, 1464e2bed1ebSWei Ni <&tegra_car TEGRA210_CLK_SOC_THERM>; 1465e2bed1ebSWei Ni clock-names = "tsensor", "soctherm"; 1466e2bed1ebSWei Ni resets = <&tegra_car 78>; 1467e2bed1ebSWei Ni reset-names = "soctherm"; 1468e2bed1ebSWei Ni #thermal-sensor-cells = <1>; 1469cbd0f000SWei Ni 1470cbd0f000SWei Ni throttle-cfgs { 1471cbd0f000SWei Ni throttle_heavy: heavy { 1472cbd0f000SWei Ni nvidia,priority = <100>; 1473cbd0f000SWei Ni nvidia,cpu-throt-percent = <85>; 1474cbd0f000SWei Ni 1475cbd0f000SWei Ni #cooling-cells = <2>; 1476cbd0f000SWei Ni }; 1477cbd0f000SWei Ni }; 1478e2bed1ebSWei Ni }; 1479e2bed1ebSWei Ni 1480e2bed1ebSWei Ni thermal-zones { 1481e2bed1ebSWei Ni cpu { 1482e2bed1ebSWei Ni polling-delay-passive = <1000>; 1483e2bed1ebSWei Ni polling-delay = <0>; 1484e2bed1ebSWei Ni 1485e2bed1ebSWei Ni thermal-sensors = 1486e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; 14875e03f663SWei Ni 14885e03f663SWei Ni trips { 14895e03f663SWei Ni cpu-shutdown-trip { 14905e03f663SWei Ni temperature = <102500>; 14915e03f663SWei Ni hysteresis = <0>; 14925e03f663SWei Ni type = "critical"; 14935e03f663SWei Ni }; 1494cbd0f000SWei Ni 1495cbd0f000SWei Ni cpu_throttle_trip: throttle-trip { 1496cbd0f000SWei Ni temperature = <98500>; 1497cbd0f000SWei Ni hysteresis = <1000>; 1498cbd0f000SWei Ni type = "hot"; 1499cbd0f000SWei Ni }; 15005e03f663SWei Ni }; 15015e03f663SWei Ni 15025e03f663SWei Ni cooling-maps { 1503cbd0f000SWei Ni map0 { 1504cbd0f000SWei Ni trip = <&cpu_throttle_trip>; 1505cbd0f000SWei Ni cooling-device = <&throttle_heavy 1 1>; 1506cbd0f000SWei Ni }; 15075e03f663SWei Ni }; 1508e2bed1ebSWei Ni }; 1509e2bed1ebSWei Ni mem { 1510e2bed1ebSWei Ni polling-delay-passive = <0>; 1511e2bed1ebSWei Ni polling-delay = <0>; 1512e2bed1ebSWei Ni 1513e2bed1ebSWei Ni thermal-sensors = 1514e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; 15155e03f663SWei Ni 15165e03f663SWei Ni trips { 15175e03f663SWei Ni mem-shutdown-trip { 15185e03f663SWei Ni temperature = <103000>; 15195e03f663SWei Ni hysteresis = <0>; 15205e03f663SWei Ni type = "critical"; 15215e03f663SWei Ni }; 15225e03f663SWei Ni }; 15235e03f663SWei Ni 15245e03f663SWei Ni cooling-maps { 15255e03f663SWei Ni /* 15265e03f663SWei Ni * There are currently no cooling maps, 15275e03f663SWei Ni * because there are no cooling devices. 15285e03f663SWei Ni */ 15295e03f663SWei Ni }; 1530e2bed1ebSWei Ni }; 1531e2bed1ebSWei Ni gpu { 1532e2bed1ebSWei Ni polling-delay-passive = <1000>; 1533e2bed1ebSWei Ni polling-delay = <0>; 1534e2bed1ebSWei Ni 1535e2bed1ebSWei Ni thermal-sensors = 1536e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; 15375e03f663SWei Ni 15385e03f663SWei Ni trips { 15395e03f663SWei Ni gpu-shutdown-trip { 15405e03f663SWei Ni temperature = <103000>; 15415e03f663SWei Ni hysteresis = <0>; 15425e03f663SWei Ni type = "critical"; 15435e03f663SWei Ni }; 1544cbd0f000SWei Ni 1545cbd0f000SWei Ni gpu_throttle_trip: throttle-trip { 1546cbd0f000SWei Ni temperature = <100000>; 1547cbd0f000SWei Ni hysteresis = <1000>; 1548cbd0f000SWei Ni type = "hot"; 1549cbd0f000SWei Ni }; 15505e03f663SWei Ni }; 15515e03f663SWei Ni 15525e03f663SWei Ni cooling-maps { 1553cbd0f000SWei Ni map0 { 1554cbd0f000SWei Ni trip = <&gpu_throttle_trip>; 1555cbd0f000SWei Ni cooling-device = <&throttle_heavy 1 1>; 1556cbd0f000SWei Ni }; 15575e03f663SWei Ni }; 1558e2bed1ebSWei Ni }; 1559e2bed1ebSWei Ni pllx { 1560e2bed1ebSWei Ni polling-delay-passive = <0>; 1561e2bed1ebSWei Ni polling-delay = <0>; 1562e2bed1ebSWei Ni 1563e2bed1ebSWei Ni thermal-sensors = 1564e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; 15655e03f663SWei Ni 15665e03f663SWei Ni trips { 15675e03f663SWei Ni pllx-shutdown-trip { 15685e03f663SWei Ni temperature = <103000>; 15695e03f663SWei Ni hysteresis = <0>; 15705e03f663SWei Ni type = "critical"; 15715e03f663SWei Ni }; 15725e03f663SWei Ni }; 15735e03f663SWei Ni 15745e03f663SWei Ni cooling-maps { 15755e03f663SWei Ni /* 15765e03f663SWei Ni * There are currently no cooling maps, 15775e03f663SWei Ni * because there are no cooling devices. 15785e03f663SWei Ni */ 15795e03f663SWei Ni }; 1580e2bed1ebSWei Ni }; 1581e2bed1ebSWei Ni }; 1582742af7e7SThierry Reding}; 1583