1b2441318SGreg Kroah-Hartman// SPDX-License-Identifier: GPL-2.0 2742af7e7SThierry Reding#include <dt-bindings/clock/tegra210-car.h> 3742af7e7SThierry Reding#include <dt-bindings/gpio/tegra-gpio.h> 4742af7e7SThierry Reding#include <dt-bindings/memory/tegra210-mc.h> 5742af7e7SThierry Reding#include <dt-bindings/pinctrl/pinctrl-tegra.h> 66641af7eSAapo Vienamo#include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 72ceed593SJoseph Lo#include <dt-bindings/reset/tegra210-car.h> 8742af7e7SThierry Reding#include <dt-bindings/interrupt-controller/arm-gic.h> 9e2bed1ebSWei Ni#include <dt-bindings/thermal/tegra124-soctherm.h> 10742af7e7SThierry Reding 11742af7e7SThierry Reding/ { 12742af7e7SThierry Reding compatible = "nvidia,tegra210"; 13742af7e7SThierry Reding interrupt-parent = <&lic>; 14742af7e7SThierry Reding #address-cells = <2>; 15742af7e7SThierry Reding #size-cells = <2>; 16742af7e7SThierry Reding 17475d99fcSRob Herring pcie@1003000 { 18589a2d3fSThierry Reding compatible = "nvidia,tegra210-pcie"; 19589a2d3fSThierry Reding device_type = "pci"; 20589a2d3fSThierry Reding reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ 21589a2d3fSThierry Reding 0x0 0x01003800 0x0 0x00000800 /* AFI registers */ 22589a2d3fSThierry Reding 0x0 0x02000000 0x0 0x10000000>; /* configuration space */ 23589a2d3fSThierry Reding reg-names = "pads", "afi", "cs"; 24589a2d3fSThierry Reding interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */ 25589a2d3fSThierry Reding <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */ 26589a2d3fSThierry Reding interrupt-names = "intr", "msi"; 27589a2d3fSThierry Reding 28589a2d3fSThierry Reding #interrupt-cells = <1>; 29589a2d3fSThierry Reding interrupt-map-mask = <0 0 0 0>; 30589a2d3fSThierry Reding interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 31589a2d3fSThierry Reding 32589a2d3fSThierry Reding bus-range = <0x00 0xff>; 33589a2d3fSThierry Reding #address-cells = <3>; 34589a2d3fSThierry Reding #size-cells = <2>; 35589a2d3fSThierry Reding 36589a2d3fSThierry Reding ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */ 37589a2d3fSThierry Reding 0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */ 38589a2d3fSThierry Reding 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */ 39589a2d3fSThierry Reding 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */ 40589a2d3fSThierry Reding 0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */ 41589a2d3fSThierry Reding 42589a2d3fSThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCIE>, 43589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_AFI>, 44589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>, 45589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_CML0>; 46589a2d3fSThierry Reding clock-names = "pex", "afi", "pll_e", "cml"; 47589a2d3fSThierry Reding resets = <&tegra_car 70>, 48589a2d3fSThierry Reding <&tegra_car 72>, 49589a2d3fSThierry Reding <&tegra_car 74>; 50589a2d3fSThierry Reding reset-names = "pex", "afi", "pcie_x"; 51589a2d3fSThierry Reding status = "disabled"; 52589a2d3fSThierry Reding 53589a2d3fSThierry Reding pci@1,0 { 54589a2d3fSThierry Reding device_type = "pci"; 55589a2d3fSThierry Reding assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; 56589a2d3fSThierry Reding reg = <0x000800 0 0 0 0>; 57475d99fcSRob Herring bus-range = <0x00 0xff>; 58589a2d3fSThierry Reding status = "disabled"; 59589a2d3fSThierry Reding 60589a2d3fSThierry Reding #address-cells = <3>; 61589a2d3fSThierry Reding #size-cells = <2>; 62589a2d3fSThierry Reding ranges; 63589a2d3fSThierry Reding 64589a2d3fSThierry Reding nvidia,num-lanes = <4>; 65589a2d3fSThierry Reding }; 66589a2d3fSThierry Reding 67589a2d3fSThierry Reding pci@2,0 { 68589a2d3fSThierry Reding device_type = "pci"; 69589a2d3fSThierry Reding assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; 70589a2d3fSThierry Reding reg = <0x001000 0 0 0 0>; 71475d99fcSRob Herring bus-range = <0x00 0xff>; 72589a2d3fSThierry Reding status = "disabled"; 73589a2d3fSThierry Reding 74589a2d3fSThierry Reding #address-cells = <3>; 75589a2d3fSThierry Reding #size-cells = <2>; 76589a2d3fSThierry Reding ranges; 77589a2d3fSThierry Reding 78589a2d3fSThierry Reding nvidia,num-lanes = <1>; 79589a2d3fSThierry Reding }; 80589a2d3fSThierry Reding }; 81589a2d3fSThierry Reding 82be70771dSThierry Reding host1x@50000000 { 83742af7e7SThierry Reding compatible = "nvidia,tegra210-host1x", "simple-bus"; 84742af7e7SThierry Reding reg = <0x0 0x50000000 0x0 0x00034000>; 85742af7e7SThierry Reding interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */ 86742af7e7SThierry Reding <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */ 87742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HOST1X>; 88742af7e7SThierry Reding clock-names = "host1x"; 89742af7e7SThierry Reding resets = <&tegra_car 28>; 90742af7e7SThierry Reding reset-names = "host1x"; 91742af7e7SThierry Reding 92742af7e7SThierry Reding #address-cells = <2>; 93742af7e7SThierry Reding #size-cells = <2>; 94742af7e7SThierry Reding 95742af7e7SThierry Reding ranges = <0x0 0x54000000 0x0 0x54000000 0x0 0x01000000>; 96742af7e7SThierry Reding 97116503a6SMikko Perttunen iommus = <&mc TEGRA_SWGROUP_HC>; 98116503a6SMikko Perttunen 99be70771dSThierry Reding dpaux1: dpaux@54040000 { 100742af7e7SThierry Reding compatible = "nvidia,tegra210-dpaux"; 101742af7e7SThierry Reding reg = <0x0 0x54040000 0x0 0x00040000>; 102742af7e7SThierry Reding interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 103742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX1>, 104742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 105742af7e7SThierry Reding clock-names = "dpaux", "parent"; 106742af7e7SThierry Reding resets = <&tegra_car 207>; 107742af7e7SThierry Reding reset-names = "dpaux"; 10896d1f078SJon Hunter power-domains = <&pd_sor>; 109742af7e7SThierry Reding status = "disabled"; 11066b2d6e9SJon Hunter 11166b2d6e9SJon Hunter state_dpaux1_aux: pinmux-aux { 11266b2d6e9SJon Hunter groups = "dpaux-io"; 11366b2d6e9SJon Hunter function = "aux"; 11466b2d6e9SJon Hunter }; 11566b2d6e9SJon Hunter 11666b2d6e9SJon Hunter state_dpaux1_i2c: pinmux-i2c { 11766b2d6e9SJon Hunter groups = "dpaux-io"; 11866b2d6e9SJon Hunter function = "i2c"; 11966b2d6e9SJon Hunter }; 12066b2d6e9SJon Hunter 12166b2d6e9SJon Hunter state_dpaux1_off: pinmux-off { 12266b2d6e9SJon Hunter groups = "dpaux-io"; 12366b2d6e9SJon Hunter function = "off"; 12466b2d6e9SJon Hunter }; 12566b2d6e9SJon Hunter 12666b2d6e9SJon Hunter i2c-bus { 12766b2d6e9SJon Hunter #address-cells = <1>; 12866b2d6e9SJon Hunter #size-cells = <0>; 12966b2d6e9SJon Hunter }; 130742af7e7SThierry Reding }; 131742af7e7SThierry Reding 132be70771dSThierry Reding vi@54080000 { 133742af7e7SThierry Reding compatible = "nvidia,tegra210-vi"; 134742af7e7SThierry Reding reg = <0x0 0x54080000 0x0 0x00040000>; 135742af7e7SThierry Reding interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 136742af7e7SThierry Reding status = "disabled"; 137742af7e7SThierry Reding }; 138742af7e7SThierry Reding 139be70771dSThierry Reding tsec@54100000 { 140742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 141742af7e7SThierry Reding reg = <0x0 0x54100000 0x0 0x00040000>; 142742af7e7SThierry Reding }; 143742af7e7SThierry Reding 144be70771dSThierry Reding dc@54200000 { 145742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 146742af7e7SThierry Reding reg = <0x0 0x54200000 0x0 0x00040000>; 147742af7e7SThierry Reding interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 148742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP1>, 149742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 150742af7e7SThierry Reding clock-names = "dc", "parent"; 151742af7e7SThierry Reding resets = <&tegra_car 27>; 152742af7e7SThierry Reding reset-names = "dc"; 153742af7e7SThierry Reding 154742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DC>; 155742af7e7SThierry Reding 156742af7e7SThierry Reding nvidia,head = <0>; 157742af7e7SThierry Reding }; 158742af7e7SThierry Reding 159be70771dSThierry Reding dc@54240000 { 160742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 161742af7e7SThierry Reding reg = <0x0 0x54240000 0x0 0x00040000>; 162742af7e7SThierry Reding interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 163742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP2>, 164742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 165742af7e7SThierry Reding clock-names = "dc", "parent"; 166742af7e7SThierry Reding resets = <&tegra_car 26>; 167742af7e7SThierry Reding reset-names = "dc"; 168742af7e7SThierry Reding 169742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DCB>; 170742af7e7SThierry Reding 171742af7e7SThierry Reding nvidia,head = <1>; 172742af7e7SThierry Reding }; 173742af7e7SThierry Reding 174be70771dSThierry Reding dsi@54300000 { 175742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 176742af7e7SThierry Reding reg = <0x0 0x54300000 0x0 0x00040000>; 177742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIA>, 178742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIALP>, 179742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 180742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 181742af7e7SThierry Reding resets = <&tegra_car 48>; 182742af7e7SThierry Reding reset-names = "dsi"; 18396d1f078SJon Hunter power-domains = <&pd_sor>; 184742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x0c0>; /* DSIA & DSIB pads */ 185742af7e7SThierry Reding 186742af7e7SThierry Reding status = "disabled"; 187742af7e7SThierry Reding 188742af7e7SThierry Reding #address-cells = <1>; 189742af7e7SThierry Reding #size-cells = <0>; 190742af7e7SThierry Reding }; 191742af7e7SThierry Reding 192be70771dSThierry Reding vic@54340000 { 193742af7e7SThierry Reding compatible = "nvidia,tegra210-vic"; 194742af7e7SThierry Reding reg = <0x0 0x54340000 0x0 0x00040000>; 19524963d1bSMikko Perttunen interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 19624963d1bSMikko Perttunen clocks = <&tegra_car TEGRA210_CLK_VIC03>; 19724963d1bSMikko Perttunen clock-names = "vic"; 19824963d1bSMikko Perttunen resets = <&tegra_car 178>; 19924963d1bSMikko Perttunen reset-names = "vic"; 20024963d1bSMikko Perttunen 20124963d1bSMikko Perttunen iommus = <&mc TEGRA_SWGROUP_VIC>; 20224963d1bSMikko Perttunen power-domains = <&pd_vic>; 203742af7e7SThierry Reding }; 204742af7e7SThierry Reding 205be70771dSThierry Reding nvjpg@54380000 { 206742af7e7SThierry Reding compatible = "nvidia,tegra210-nvjpg"; 207742af7e7SThierry Reding reg = <0x0 0x54380000 0x0 0x00040000>; 208742af7e7SThierry Reding status = "disabled"; 209742af7e7SThierry Reding }; 210742af7e7SThierry Reding 211be70771dSThierry Reding dsi@54400000 { 212742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 213742af7e7SThierry Reding reg = <0x0 0x54400000 0x0 0x00040000>; 214742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIB>, 215742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIBLP>, 216742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 217742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 218742af7e7SThierry Reding resets = <&tegra_car 82>; 219742af7e7SThierry Reding reset-names = "dsi"; 22096d1f078SJon Hunter power-domains = <&pd_sor>; 221742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x300>; /* DSIC & DSID pads */ 222742af7e7SThierry Reding 223742af7e7SThierry Reding status = "disabled"; 224742af7e7SThierry Reding 225742af7e7SThierry Reding #address-cells = <1>; 226742af7e7SThierry Reding #size-cells = <0>; 227742af7e7SThierry Reding }; 228742af7e7SThierry Reding 229be70771dSThierry Reding nvdec@54480000 { 230742af7e7SThierry Reding compatible = "nvidia,tegra210-nvdec"; 231742af7e7SThierry Reding reg = <0x0 0x54480000 0x0 0x00040000>; 232742af7e7SThierry Reding status = "disabled"; 233742af7e7SThierry Reding }; 234742af7e7SThierry Reding 235be70771dSThierry Reding nvenc@544c0000 { 236742af7e7SThierry Reding compatible = "nvidia,tegra210-nvenc"; 237742af7e7SThierry Reding reg = <0x0 0x544c0000 0x0 0x00040000>; 238742af7e7SThierry Reding status = "disabled"; 239742af7e7SThierry Reding }; 240742af7e7SThierry Reding 241be70771dSThierry Reding tsec@54500000 { 242742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 243742af7e7SThierry Reding reg = <0x0 0x54500000 0x0 0x00040000>; 244742af7e7SThierry Reding status = "disabled"; 245742af7e7SThierry Reding }; 246742af7e7SThierry Reding 247be70771dSThierry Reding sor@54540000 { 248742af7e7SThierry Reding compatible = "nvidia,tegra210-sor"; 249742af7e7SThierry Reding reg = <0x0 0x54540000 0x0 0x00040000>; 250742af7e7SThierry Reding interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 251742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR0>, 252742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>, 253742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 254742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 255742af7e7SThierry Reding clock-names = "sor", "parent", "dp", "safe"; 256742af7e7SThierry Reding resets = <&tegra_car 182>; 257742af7e7SThierry Reding reset-names = "sor"; 25866b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_aux>; 25966b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_i2c>; 26066b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux_off>; 26166b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 26296d1f078SJon Hunter power-domains = <&pd_sor>; 263742af7e7SThierry Reding status = "disabled"; 264742af7e7SThierry Reding }; 265742af7e7SThierry Reding 266be70771dSThierry Reding sor@54580000 { 267742af7e7SThierry Reding compatible = "nvidia,tegra210-sor1"; 268742af7e7SThierry Reding reg = <0x0 0x54580000 0x0 0x00040000>; 269742af7e7SThierry Reding interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 270742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR1>, 27150f5b841SThierry Reding <&tegra_car TEGRA210_CLK_SOR1_OUT>, 272742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D2_OUT0>, 273742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 274742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 27550f5b841SThierry Reding clock-names = "sor", "out", "parent", "dp", "safe"; 276742af7e7SThierry Reding resets = <&tegra_car 183>; 277742af7e7SThierry Reding reset-names = "sor"; 27866b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_aux>; 27966b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_i2c>; 28066b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux1_off>; 28166b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 28296d1f078SJon Hunter power-domains = <&pd_sor>; 283742af7e7SThierry Reding status = "disabled"; 284742af7e7SThierry Reding }; 285742af7e7SThierry Reding 286be70771dSThierry Reding dpaux: dpaux@545c0000 { 287742af7e7SThierry Reding compatible = "nvidia,tegra124-dpaux"; 288742af7e7SThierry Reding reg = <0x0 0x545c0000 0x0 0x00040000>; 289742af7e7SThierry Reding interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 290742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX>, 291742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 292742af7e7SThierry Reding clock-names = "dpaux", "parent"; 293742af7e7SThierry Reding resets = <&tegra_car 181>; 294742af7e7SThierry Reding reset-names = "dpaux"; 29596d1f078SJon Hunter power-domains = <&pd_sor>; 296742af7e7SThierry Reding status = "disabled"; 29766b2d6e9SJon Hunter 29866b2d6e9SJon Hunter state_dpaux_aux: pinmux-aux { 29966b2d6e9SJon Hunter groups = "dpaux-io"; 30066b2d6e9SJon Hunter function = "aux"; 30166b2d6e9SJon Hunter }; 30266b2d6e9SJon Hunter 30366b2d6e9SJon Hunter state_dpaux_i2c: pinmux-i2c { 30466b2d6e9SJon Hunter groups = "dpaux-io"; 30566b2d6e9SJon Hunter function = "i2c"; 30666b2d6e9SJon Hunter }; 30766b2d6e9SJon Hunter 30866b2d6e9SJon Hunter state_dpaux_off: pinmux-off { 30966b2d6e9SJon Hunter groups = "dpaux-io"; 31066b2d6e9SJon Hunter function = "off"; 31166b2d6e9SJon Hunter }; 31266b2d6e9SJon Hunter 31366b2d6e9SJon Hunter i2c-bus { 31466b2d6e9SJon Hunter #address-cells = <1>; 31566b2d6e9SJon Hunter #size-cells = <0>; 31666b2d6e9SJon Hunter }; 317742af7e7SThierry Reding }; 318742af7e7SThierry Reding 319be70771dSThierry Reding isp@54600000 { 320742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 321742af7e7SThierry Reding reg = <0x0 0x54600000 0x0 0x00040000>; 322742af7e7SThierry Reding interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 323742af7e7SThierry Reding status = "disabled"; 324742af7e7SThierry Reding }; 325742af7e7SThierry Reding 326be70771dSThierry Reding isp@54680000 { 327742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 328742af7e7SThierry Reding reg = <0x0 0x54680000 0x0 0x00040000>; 329742af7e7SThierry Reding interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 330742af7e7SThierry Reding status = "disabled"; 331742af7e7SThierry Reding }; 332742af7e7SThierry Reding 333be70771dSThierry Reding i2c@546c0000 { 334742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c-vi"; 335742af7e7SThierry Reding reg = <0x0 0x546c0000 0x0 0x00040000>; 336742af7e7SThierry Reding interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 337742af7e7SThierry Reding status = "disabled"; 338742af7e7SThierry Reding }; 339742af7e7SThierry Reding }; 340742af7e7SThierry Reding 341be70771dSThierry Reding gic: interrupt-controller@50041000 { 342742af7e7SThierry Reding compatible = "arm,gic-400"; 343742af7e7SThierry Reding #interrupt-cells = <3>; 344742af7e7SThierry Reding interrupt-controller; 345742af7e7SThierry Reding reg = <0x0 0x50041000 0x0 0x1000>, 346742af7e7SThierry Reding <0x0 0x50042000 0x0 0x2000>, 347742af7e7SThierry Reding <0x0 0x50044000 0x0 0x2000>, 348742af7e7SThierry Reding <0x0 0x50046000 0x0 0x2000>; 349742af7e7SThierry Reding interrupts = <GIC_PPI 9 350742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 351742af7e7SThierry Reding interrupt-parent = <&gic>; 352742af7e7SThierry Reding }; 353742af7e7SThierry Reding 354be70771dSThierry Reding gpu@57000000 { 355742af7e7SThierry Reding compatible = "nvidia,gm20b"; 356742af7e7SThierry Reding reg = <0x0 0x57000000 0x0 0x01000000>, 357742af7e7SThierry Reding <0x0 0x58000000 0x0 0x01000000>; 358742af7e7SThierry Reding interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 359742af7e7SThierry Reding <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 360742af7e7SThierry Reding interrupt-names = "stall", "nonstall"; 361742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_GPU>, 3624a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_P_OUT5>, 3634a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_G_REF>; 3644a0778e9SAlexandre Courbot clock-names = "gpu", "pwr", "ref"; 365742af7e7SThierry Reding resets = <&tegra_car 184>; 366742af7e7SThierry Reding reset-names = "gpu"; 36730f949bcSAlexandre Courbot 36830f949bcSAlexandre Courbot iommus = <&mc TEGRA_SWGROUP_GPU>; 36930f949bcSAlexandre Courbot 370742af7e7SThierry Reding status = "disabled"; 371742af7e7SThierry Reding }; 372742af7e7SThierry Reding 373be70771dSThierry Reding lic: interrupt-controller@60004000 { 374742af7e7SThierry Reding compatible = "nvidia,tegra210-ictlr"; 375742af7e7SThierry Reding reg = <0x0 0x60004000 0x0 0x40>, /* primary controller */ 376742af7e7SThierry Reding <0x0 0x60004100 0x0 0x40>, /* secondary controller */ 377742af7e7SThierry Reding <0x0 0x60004200 0x0 0x40>, /* tertiary controller */ 378742af7e7SThierry Reding <0x0 0x60004300 0x0 0x40>, /* quaternary controller */ 379742af7e7SThierry Reding <0x0 0x60004400 0x0 0x40>, /* quinary controller */ 380742af7e7SThierry Reding <0x0 0x60004500 0x0 0x40>; /* senary controller */ 381742af7e7SThierry Reding interrupt-controller; 382742af7e7SThierry Reding #interrupt-cells = <3>; 383742af7e7SThierry Reding interrupt-parent = <&gic>; 384742af7e7SThierry Reding }; 385742af7e7SThierry Reding 386be70771dSThierry Reding timer@60005000 { 387742af7e7SThierry Reding compatible = "nvidia,tegra210-timer", "nvidia,tegra20-timer"; 388742af7e7SThierry Reding reg = <0x0 0x60005000 0x0 0x400>; 389742af7e7SThierry Reding interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 390742af7e7SThierry Reding <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 391742af7e7SThierry Reding <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 392742af7e7SThierry Reding <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 393742af7e7SThierry Reding <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 394742af7e7SThierry Reding <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 395742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_TIMER>; 396742af7e7SThierry Reding clock-names = "timer"; 397742af7e7SThierry Reding }; 398742af7e7SThierry Reding 399be70771dSThierry Reding tegra_car: clock@60006000 { 400742af7e7SThierry Reding compatible = "nvidia,tegra210-car"; 401742af7e7SThierry Reding reg = <0x0 0x60006000 0x0 0x1000>; 402742af7e7SThierry Reding #clock-cells = <1>; 403742af7e7SThierry Reding #reset-cells = <1>; 404742af7e7SThierry Reding }; 405742af7e7SThierry Reding 406be70771dSThierry Reding flow-controller@60007000 { 407742af7e7SThierry Reding compatible = "nvidia,tegra210-flowctrl"; 408742af7e7SThierry Reding reg = <0x0 0x60007000 0x0 0x1000>; 409742af7e7SThierry Reding }; 410742af7e7SThierry Reding 411be70771dSThierry Reding gpio: gpio@6000d000 { 41201665512SStephen Warren compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio"; 413742af7e7SThierry Reding reg = <0x0 0x6000d000 0x0 0x1000>; 414742af7e7SThierry Reding interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 415742af7e7SThierry Reding <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 416742af7e7SThierry Reding <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 417742af7e7SThierry Reding <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 418742af7e7SThierry Reding <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 419742af7e7SThierry Reding <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 420742af7e7SThierry Reding <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 421742af7e7SThierry Reding <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 422742af7e7SThierry Reding #gpio-cells = <2>; 423742af7e7SThierry Reding gpio-controller; 424742af7e7SThierry Reding #interrupt-cells = <2>; 425742af7e7SThierry Reding interrupt-controller; 426742af7e7SThierry Reding }; 427742af7e7SThierry Reding 428be70771dSThierry Reding apbdma: dma@60020000 { 429742af7e7SThierry Reding compatible = "nvidia,tegra210-apbdma", "nvidia,tegra148-apbdma"; 430742af7e7SThierry Reding reg = <0x0 0x60020000 0x0 0x1400>; 431742af7e7SThierry Reding interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 432742af7e7SThierry Reding <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 433742af7e7SThierry Reding <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 434742af7e7SThierry Reding <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 435742af7e7SThierry Reding <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 436742af7e7SThierry Reding <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 437742af7e7SThierry Reding <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 438742af7e7SThierry Reding <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 439742af7e7SThierry Reding <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 440742af7e7SThierry Reding <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 441742af7e7SThierry Reding <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 442742af7e7SThierry Reding <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 443742af7e7SThierry Reding <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 444742af7e7SThierry Reding <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 445742af7e7SThierry Reding <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 446742af7e7SThierry Reding <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, 447742af7e7SThierry Reding <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 448742af7e7SThierry Reding <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 449742af7e7SThierry Reding <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 450742af7e7SThierry Reding <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 451742af7e7SThierry Reding <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 452742af7e7SThierry Reding <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, 453742af7e7SThierry Reding <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, 454742af7e7SThierry Reding <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 455742af7e7SThierry Reding <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 456742af7e7SThierry Reding <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 457742af7e7SThierry Reding <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 458742af7e7SThierry Reding <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>, 459742af7e7SThierry Reding <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, 460742af7e7SThierry Reding <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, 461742af7e7SThierry Reding <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 462742af7e7SThierry Reding <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 463742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_APBDMA>; 464742af7e7SThierry Reding clock-names = "dma"; 465742af7e7SThierry Reding resets = <&tegra_car 34>; 466742af7e7SThierry Reding reset-names = "dma"; 467742af7e7SThierry Reding #dma-cells = <1>; 468742af7e7SThierry Reding }; 469742af7e7SThierry Reding 470be70771dSThierry Reding apbmisc@70000800 { 471742af7e7SThierry Reding compatible = "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc"; 472742af7e7SThierry Reding reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */ 47346e4b227SJoseph Lo <0x0 0x70000008 0x0 0x04>; /* Strapping options */ 474742af7e7SThierry Reding }; 475742af7e7SThierry Reding 476be70771dSThierry Reding pinmux: pinmux@700008d4 { 477742af7e7SThierry Reding compatible = "nvidia,tegra210-pinmux"; 478742af7e7SThierry Reding reg = <0x0 0x700008d4 0x0 0x29c>, /* Pad control registers */ 479742af7e7SThierry Reding <0x0 0x70003000 0x0 0x294>; /* Mux registers */ 480742af7e7SThierry Reding }; 481742af7e7SThierry Reding 482742af7e7SThierry Reding /* 483742af7e7SThierry Reding * There are two serial driver i.e. 8250 based simple serial 484742af7e7SThierry Reding * driver and APB DMA based serial driver for higher baudrate 485ef769e32SAdam Buchbinder * and performance. To enable the 8250 based driver, the compatible 486742af7e7SThierry Reding * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable 48768cd8b2eSThierry Reding * the APB DMA based serial driver, the compatible is 488742af7e7SThierry Reding * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart". 489742af7e7SThierry Reding */ 490be70771dSThierry Reding uarta: serial@70006000 { 491742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 492742af7e7SThierry Reding reg = <0x0 0x70006000 0x0 0x40>; 493742af7e7SThierry Reding reg-shift = <2>; 494742af7e7SThierry Reding interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 495742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTA>; 496742af7e7SThierry Reding clock-names = "serial"; 497742af7e7SThierry Reding resets = <&tegra_car 6>; 498742af7e7SThierry Reding reset-names = "serial"; 499742af7e7SThierry Reding dmas = <&apbdma 8>, <&apbdma 8>; 500742af7e7SThierry Reding dma-names = "rx", "tx"; 501742af7e7SThierry Reding status = "disabled"; 502742af7e7SThierry Reding }; 503742af7e7SThierry Reding 504be70771dSThierry Reding uartb: serial@70006040 { 505742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 506742af7e7SThierry Reding reg = <0x0 0x70006040 0x0 0x40>; 507742af7e7SThierry Reding reg-shift = <2>; 508742af7e7SThierry Reding interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 509742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTB>; 510742af7e7SThierry Reding clock-names = "serial"; 511742af7e7SThierry Reding resets = <&tegra_car 7>; 512742af7e7SThierry Reding reset-names = "serial"; 513742af7e7SThierry Reding dmas = <&apbdma 9>, <&apbdma 9>; 514742af7e7SThierry Reding dma-names = "rx", "tx"; 515742af7e7SThierry Reding status = "disabled"; 516742af7e7SThierry Reding }; 517742af7e7SThierry Reding 518be70771dSThierry Reding uartc: serial@70006200 { 519742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 520742af7e7SThierry Reding reg = <0x0 0x70006200 0x0 0x40>; 521742af7e7SThierry Reding reg-shift = <2>; 522742af7e7SThierry Reding interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 523742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTC>; 524742af7e7SThierry Reding clock-names = "serial"; 525742af7e7SThierry Reding resets = <&tegra_car 55>; 526742af7e7SThierry Reding reset-names = "serial"; 527742af7e7SThierry Reding dmas = <&apbdma 10>, <&apbdma 10>; 528742af7e7SThierry Reding dma-names = "rx", "tx"; 529742af7e7SThierry Reding status = "disabled"; 530742af7e7SThierry Reding }; 531742af7e7SThierry Reding 532be70771dSThierry Reding uartd: serial@70006300 { 533742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 534742af7e7SThierry Reding reg = <0x0 0x70006300 0x0 0x40>; 535742af7e7SThierry Reding reg-shift = <2>; 536742af7e7SThierry Reding interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 537742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTD>; 538742af7e7SThierry Reding clock-names = "serial"; 539742af7e7SThierry Reding resets = <&tegra_car 65>; 540742af7e7SThierry Reding reset-names = "serial"; 541742af7e7SThierry Reding dmas = <&apbdma 19>, <&apbdma 19>; 542742af7e7SThierry Reding dma-names = "rx", "tx"; 543742af7e7SThierry Reding status = "disabled"; 544742af7e7SThierry Reding }; 545742af7e7SThierry Reding 546be70771dSThierry Reding pwm: pwm@7000a000 { 547742af7e7SThierry Reding compatible = "nvidia,tegra210-pwm", "nvidia,tegra20-pwm"; 548742af7e7SThierry Reding reg = <0x0 0x7000a000 0x0 0x100>; 549742af7e7SThierry Reding #pwm-cells = <2>; 550742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PWM>; 551742af7e7SThierry Reding clock-names = "pwm"; 552742af7e7SThierry Reding resets = <&tegra_car 17>; 553742af7e7SThierry Reding reset-names = "pwm"; 554742af7e7SThierry Reding status = "disabled"; 555742af7e7SThierry Reding }; 556742af7e7SThierry Reding 557be70771dSThierry Reding i2c@7000c000 { 558742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 559742af7e7SThierry Reding reg = <0x0 0x7000c000 0x0 0x100>; 560742af7e7SThierry Reding interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 561742af7e7SThierry Reding #address-cells = <1>; 562742af7e7SThierry Reding #size-cells = <0>; 563742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C1>; 564742af7e7SThierry Reding clock-names = "div-clk"; 565742af7e7SThierry Reding resets = <&tegra_car 12>; 566742af7e7SThierry Reding reset-names = "i2c"; 567742af7e7SThierry Reding dmas = <&apbdma 21>, <&apbdma 21>; 568742af7e7SThierry Reding dma-names = "rx", "tx"; 569742af7e7SThierry Reding status = "disabled"; 570742af7e7SThierry Reding }; 571742af7e7SThierry Reding 572be70771dSThierry Reding i2c@7000c400 { 573742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 574742af7e7SThierry Reding reg = <0x0 0x7000c400 0x0 0x100>; 575742af7e7SThierry Reding interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 576742af7e7SThierry Reding #address-cells = <1>; 577742af7e7SThierry Reding #size-cells = <0>; 578742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C2>; 579742af7e7SThierry Reding clock-names = "div-clk"; 580742af7e7SThierry Reding resets = <&tegra_car 54>; 581742af7e7SThierry Reding reset-names = "i2c"; 582742af7e7SThierry Reding dmas = <&apbdma 22>, <&apbdma 22>; 583742af7e7SThierry Reding dma-names = "rx", "tx"; 584742af7e7SThierry Reding status = "disabled"; 585742af7e7SThierry Reding }; 586742af7e7SThierry Reding 587be70771dSThierry Reding i2c@7000c500 { 588742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 589742af7e7SThierry Reding reg = <0x0 0x7000c500 0x0 0x100>; 590742af7e7SThierry Reding interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 591742af7e7SThierry Reding #address-cells = <1>; 592742af7e7SThierry Reding #size-cells = <0>; 593742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C3>; 594742af7e7SThierry Reding clock-names = "div-clk"; 595742af7e7SThierry Reding resets = <&tegra_car 67>; 596742af7e7SThierry Reding reset-names = "i2c"; 597742af7e7SThierry Reding dmas = <&apbdma 23>, <&apbdma 23>; 598742af7e7SThierry Reding dma-names = "rx", "tx"; 599742af7e7SThierry Reding status = "disabled"; 600742af7e7SThierry Reding }; 601742af7e7SThierry Reding 602be70771dSThierry Reding i2c@7000c700 { 603742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 604742af7e7SThierry Reding reg = <0x0 0x7000c700 0x0 0x100>; 605742af7e7SThierry Reding interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 606742af7e7SThierry Reding #address-cells = <1>; 607742af7e7SThierry Reding #size-cells = <0>; 608742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C4>; 609742af7e7SThierry Reding clock-names = "div-clk"; 610742af7e7SThierry Reding resets = <&tegra_car 103>; 611742af7e7SThierry Reding reset-names = "i2c"; 612742af7e7SThierry Reding dmas = <&apbdma 26>, <&apbdma 26>; 613742af7e7SThierry Reding dma-names = "rx", "tx"; 61466b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_i2c>; 61566b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_off>; 61666b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 617742af7e7SThierry Reding status = "disabled"; 618742af7e7SThierry Reding }; 619742af7e7SThierry Reding 620be70771dSThierry Reding i2c@7000d000 { 621742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 622742af7e7SThierry Reding reg = <0x0 0x7000d000 0x0 0x100>; 623742af7e7SThierry Reding interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 624742af7e7SThierry Reding #address-cells = <1>; 625742af7e7SThierry Reding #size-cells = <0>; 626742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C5>; 627742af7e7SThierry Reding clock-names = "div-clk"; 628742af7e7SThierry Reding resets = <&tegra_car 47>; 629742af7e7SThierry Reding reset-names = "i2c"; 630742af7e7SThierry Reding dmas = <&apbdma 24>, <&apbdma 24>; 631742af7e7SThierry Reding dma-names = "rx", "tx"; 632742af7e7SThierry Reding status = "disabled"; 633742af7e7SThierry Reding }; 634742af7e7SThierry Reding 635be70771dSThierry Reding i2c@7000d100 { 636742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 637742af7e7SThierry Reding reg = <0x0 0x7000d100 0x0 0x100>; 638742af7e7SThierry Reding interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 639742af7e7SThierry Reding #address-cells = <1>; 640742af7e7SThierry Reding #size-cells = <0>; 641742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C6>; 642742af7e7SThierry Reding clock-names = "div-clk"; 643742af7e7SThierry Reding resets = <&tegra_car 166>; 644742af7e7SThierry Reding reset-names = "i2c"; 645742af7e7SThierry Reding dmas = <&apbdma 30>, <&apbdma 30>; 646742af7e7SThierry Reding dma-names = "rx", "tx"; 64766b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_i2c>; 64866b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_off>; 64966b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 650742af7e7SThierry Reding status = "disabled"; 651742af7e7SThierry Reding }; 652742af7e7SThierry Reding 653be70771dSThierry Reding spi@7000d400 { 654742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 655742af7e7SThierry Reding reg = <0x0 0x7000d400 0x0 0x200>; 656742af7e7SThierry Reding interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 657742af7e7SThierry Reding #address-cells = <1>; 658742af7e7SThierry Reding #size-cells = <0>; 659742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC1>; 660742af7e7SThierry Reding clock-names = "spi"; 661742af7e7SThierry Reding resets = <&tegra_car 41>; 662742af7e7SThierry Reding reset-names = "spi"; 663742af7e7SThierry Reding dmas = <&apbdma 15>, <&apbdma 15>; 664742af7e7SThierry Reding dma-names = "rx", "tx"; 665742af7e7SThierry Reding status = "disabled"; 666742af7e7SThierry Reding }; 667742af7e7SThierry Reding 668be70771dSThierry Reding spi@7000d600 { 669742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 670742af7e7SThierry Reding reg = <0x0 0x7000d600 0x0 0x200>; 671742af7e7SThierry Reding interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 672742af7e7SThierry Reding #address-cells = <1>; 673742af7e7SThierry Reding #size-cells = <0>; 674742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC2>; 675742af7e7SThierry Reding clock-names = "spi"; 676742af7e7SThierry Reding resets = <&tegra_car 44>; 677742af7e7SThierry Reding reset-names = "spi"; 678742af7e7SThierry Reding dmas = <&apbdma 16>, <&apbdma 16>; 679742af7e7SThierry Reding dma-names = "rx", "tx"; 680742af7e7SThierry Reding status = "disabled"; 681742af7e7SThierry Reding }; 682742af7e7SThierry Reding 683be70771dSThierry Reding spi@7000d800 { 684742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 685742af7e7SThierry Reding reg = <0x0 0x7000d800 0x0 0x200>; 686742af7e7SThierry Reding interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 687742af7e7SThierry Reding #address-cells = <1>; 688742af7e7SThierry Reding #size-cells = <0>; 689742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC3>; 690742af7e7SThierry Reding clock-names = "spi"; 691742af7e7SThierry Reding resets = <&tegra_car 46>; 692742af7e7SThierry Reding reset-names = "spi"; 693742af7e7SThierry Reding dmas = <&apbdma 17>, <&apbdma 17>; 694742af7e7SThierry Reding dma-names = "rx", "tx"; 695742af7e7SThierry Reding status = "disabled"; 696742af7e7SThierry Reding }; 697742af7e7SThierry Reding 698be70771dSThierry Reding spi@7000da00 { 699742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 700742af7e7SThierry Reding reg = <0x0 0x7000da00 0x0 0x200>; 701742af7e7SThierry Reding interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 702742af7e7SThierry Reding #address-cells = <1>; 703742af7e7SThierry Reding #size-cells = <0>; 704742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC4>; 705742af7e7SThierry Reding clock-names = "spi"; 706742af7e7SThierry Reding resets = <&tegra_car 68>; 707742af7e7SThierry Reding reset-names = "spi"; 708742af7e7SThierry Reding dmas = <&apbdma 18>, <&apbdma 18>; 709742af7e7SThierry Reding dma-names = "rx", "tx"; 710742af7e7SThierry Reding status = "disabled"; 711742af7e7SThierry Reding }; 712742af7e7SThierry Reding 713be70771dSThierry Reding rtc@7000e000 { 714742af7e7SThierry Reding compatible = "nvidia,tegra210-rtc", "nvidia,tegra20-rtc"; 715742af7e7SThierry Reding reg = <0x0 0x7000e000 0x0 0x100>; 716742af7e7SThierry Reding interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 717742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_RTC>; 718742af7e7SThierry Reding clock-names = "rtc"; 719742af7e7SThierry Reding }; 720742af7e7SThierry Reding 721be70771dSThierry Reding pmc: pmc@7000e400 { 722742af7e7SThierry Reding compatible = "nvidia,tegra210-pmc"; 723742af7e7SThierry Reding reg = <0x0 0x7000e400 0x0 0x400>; 724742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; 725742af7e7SThierry Reding clock-names = "pclk", "clk32k_in"; 726c2b82445SJon Hunter 727c2b82445SJon Hunter powergates { 728c2b82445SJon Hunter pd_audio: aud { 729c2b82445SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 730c2b82445SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 731c2b82445SJon Hunter resets = <&tegra_car 198>; 732c2b82445SJon Hunter #power-domain-cells = <0>; 733c2b82445SJon Hunter }; 734241f02baSJon Hunter 73596d1f078SJon Hunter pd_sor: sor { 73696d1f078SJon Hunter clocks = <&tegra_car TEGRA210_CLK_SOR0>, 73796d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 73896d1f078SJon Hunter <&tegra_car TEGRA210_CLK_CSI>, 73996d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 74096d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 74196d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 74296d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 74396d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 74496d1f078SJon Hunter resets = <&tegra_car TEGRA210_CLK_SOR0>, 74596d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 74696d1f078SJon Hunter <&tegra_car TEGRA210_CLK_CSI>, 74796d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 74896d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 74996d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 75096d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 75196d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 75296d1f078SJon Hunter #power-domain-cells = <0>; 75396d1f078SJon Hunter }; 75496d1f078SJon Hunter 755241f02baSJon Hunter pd_xusbss: xusba { 756241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>; 757241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_SS>; 758241f02baSJon Hunter #power-domain-cells = <0>; 759241f02baSJon Hunter }; 760241f02baSJon Hunter 761241f02baSJon Hunter pd_xusbdev: xusbb { 762241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>; 763241f02baSJon Hunter resets = <&tegra_car 95>; 764241f02baSJon Hunter #power-domain-cells = <0>; 765241f02baSJon Hunter }; 766241f02baSJon Hunter 767241f02baSJon Hunter pd_xusbhost: xusbc { 768241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 769241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 770241f02baSJon Hunter #power-domain-cells = <0>; 771241f02baSJon Hunter }; 77224963d1bSMikko Perttunen 77324963d1bSMikko Perttunen pd_vic: vic { 77424963d1bSMikko Perttunen clocks = <&tegra_car TEGRA210_CLK_VIC03>; 77524963d1bSMikko Perttunen clock-names = "vic"; 77624963d1bSMikko Perttunen resets = <&tegra_car 178>; 77724963d1bSMikko Perttunen reset-names = "vic"; 77824963d1bSMikko Perttunen #power-domain-cells = <0>; 77924963d1bSMikko Perttunen }; 780c2b82445SJon Hunter }; 7816641af7eSAapo Vienamo 7826641af7eSAapo Vienamo sdmmc1_3v3: sdmmc1-3v3 { 7836641af7eSAapo Vienamo pins = "sdmmc1"; 7846641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>; 7856641af7eSAapo Vienamo }; 7866641af7eSAapo Vienamo 7876641af7eSAapo Vienamo sdmmc1_1v8: sdmmc1-1v8 { 7886641af7eSAapo Vienamo pins = "sdmmc1"; 7896641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>; 7906641af7eSAapo Vienamo }; 7916641af7eSAapo Vienamo 7926641af7eSAapo Vienamo sdmmc3_3v3: sdmmc3-3v3 { 7936641af7eSAapo Vienamo pins = "sdmmc3"; 7946641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>; 7956641af7eSAapo Vienamo }; 7966641af7eSAapo Vienamo 7976641af7eSAapo Vienamo sdmmc3_1v8: sdmmc3-1v8 { 7986641af7eSAapo Vienamo pins = "sdmmc3"; 7996641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>; 8006641af7eSAapo Vienamo }; 801742af7e7SThierry Reding }; 802742af7e7SThierry Reding 803be70771dSThierry Reding fuse@7000f800 { 804742af7e7SThierry Reding compatible = "nvidia,tegra210-efuse"; 805742af7e7SThierry Reding reg = <0x0 0x7000f800 0x0 0x400>; 806742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_FUSE>; 807742af7e7SThierry Reding clock-names = "fuse"; 808742af7e7SThierry Reding resets = <&tegra_car 39>; 809742af7e7SThierry Reding reset-names = "fuse"; 810742af7e7SThierry Reding }; 811742af7e7SThierry Reding 812be70771dSThierry Reding mc: memory-controller@70019000 { 813742af7e7SThierry Reding compatible = "nvidia,tegra210-mc"; 814742af7e7SThierry Reding reg = <0x0 0x70019000 0x0 0x1000>; 815742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MC>; 816742af7e7SThierry Reding clock-names = "mc"; 817742af7e7SThierry Reding 818742af7e7SThierry Reding interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 819742af7e7SThierry Reding 820742af7e7SThierry Reding #iommu-cells = <1>; 821742af7e7SThierry Reding }; 822742af7e7SThierry Reding 8236cb60ec4SPreetham Ramchandra sata@70020000 { 8246cb60ec4SPreetham Ramchandra compatible = "nvidia,tegra210-ahci"; 8256cb60ec4SPreetham Ramchandra reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */ 8266cb60ec4SPreetham Ramchandra <0x0 0x70020000 0x0 0x7000>, /* SATA */ 8276cb60ec4SPreetham Ramchandra <0x0 0x70001100 0x0 0x1000>; /* SATA AUX */ 8286cb60ec4SPreetham Ramchandra interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 8296cb60ec4SPreetham Ramchandra clocks = <&tegra_car TEGRA210_CLK_SATA>, 8306cb60ec4SPreetham Ramchandra <&tegra_car TEGRA210_CLK_SATA_OOB>; 8316cb60ec4SPreetham Ramchandra clock-names = "sata", "sata-oob"; 8326cb60ec4SPreetham Ramchandra resets = <&tegra_car 124>, 8336cb60ec4SPreetham Ramchandra <&tegra_car 123>, 8346cb60ec4SPreetham Ramchandra <&tegra_car 129>; 8356cb60ec4SPreetham Ramchandra reset-names = "sata", "sata-oob", "sata-cold"; 8366cb60ec4SPreetham Ramchandra status = "disabled"; 8376cb60ec4SPreetham Ramchandra }; 8386cb60ec4SPreetham Ramchandra 839be70771dSThierry Reding hda@70030000 { 840742af7e7SThierry Reding compatible = "nvidia,tegra210-hda", "nvidia,tegra30-hda"; 841742af7e7SThierry Reding reg = <0x0 0x70030000 0x0 0x10000>; 842742af7e7SThierry Reding interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 843742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HDA>, 844742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2HDMI>, 845742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2CODEC_2X>; 846742af7e7SThierry Reding clock-names = "hda", "hda2hdmi", "hda2codec_2x"; 847742af7e7SThierry Reding resets = <&tegra_car 125>, /* hda */ 848742af7e7SThierry Reding <&tegra_car 128>, /* hda2hdmi */ 849742af7e7SThierry Reding <&tegra_car 111>; /* hda2codec_2x */ 850742af7e7SThierry Reding reset-names = "hda", "hda2hdmi", "hda2codec_2x"; 851742af7e7SThierry Reding status = "disabled"; 852742af7e7SThierry Reding }; 853742af7e7SThierry Reding 854e7a99ac2SThierry Reding usb@70090000 { 855e7a99ac2SThierry Reding compatible = "nvidia,tegra210-xusb"; 856e7a99ac2SThierry Reding reg = <0x0 0x70090000 0x0 0x8000>, 857e7a99ac2SThierry Reding <0x0 0x70098000 0x0 0x1000>, 858e7a99ac2SThierry Reding <0x0 0x70099000 0x0 0x1000>; 859e7a99ac2SThierry Reding reg-names = "hcd", "fpci", "ipfs"; 860e7a99ac2SThierry Reding 861e7a99ac2SThierry Reding interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 8629168e1dbSJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 863e7a99ac2SThierry Reding 864e7a99ac2SThierry Reding clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>, 865e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>, 866e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>, 867e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS>, 868e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>, 869e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>, 870e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, 871e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, 872e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U_480M>, 873e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_CLK_M>, 874e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>; 875e7a99ac2SThierry Reding clock-names = "xusb_host", "xusb_host_src", 876e7a99ac2SThierry Reding "xusb_falcon_src", "xusb_ss", 877e7a99ac2SThierry Reding "xusb_ss_div2", "xusb_ss_src", 878e7a99ac2SThierry Reding "xusb_hs_src", "xusb_fs_src", 879e7a99ac2SThierry Reding "pll_u_480m", "clk_m", "pll_e"; 880e7a99ac2SThierry Reding resets = <&tegra_car 89>, <&tegra_car 156>, 881e7a99ac2SThierry Reding <&tegra_car 143>; 882e7a99ac2SThierry Reding reset-names = "xusb_host", "xusb_ss", "xusb_src"; 88336ec29f7SJon Hunter power-domains = <&pd_xusbhost>, <&pd_xusbss>; 88436ec29f7SJon Hunter power-domain-names = "xusb_host", "xusb_ss"; 885e7a99ac2SThierry Reding 886e7a99ac2SThierry Reding nvidia,xusb-padctl = <&padctl>; 887e7a99ac2SThierry Reding 888e7a99ac2SThierry Reding status = "disabled"; 889e7a99ac2SThierry Reding }; 890e7a99ac2SThierry Reding 8914e07ac90SThierry Reding padctl: padctl@7009f000 { 8924e07ac90SThierry Reding compatible = "nvidia,tegra210-xusb-padctl"; 8934e07ac90SThierry Reding reg = <0x0 0x7009f000 0x0 0x1000>; 8944e07ac90SThierry Reding resets = <&tegra_car 142>; 8954e07ac90SThierry Reding reset-names = "padctl"; 8964e07ac90SThierry Reding 8974e07ac90SThierry Reding status = "disabled"; 8984e07ac90SThierry Reding 8994e07ac90SThierry Reding pads { 9004e07ac90SThierry Reding usb2 { 9014e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>; 9024e07ac90SThierry Reding clock-names = "trk"; 9034e07ac90SThierry Reding status = "disabled"; 9044e07ac90SThierry Reding 9054e07ac90SThierry Reding lanes { 9064e07ac90SThierry Reding usb2-0 { 9074e07ac90SThierry Reding status = "disabled"; 9084e07ac90SThierry Reding #phy-cells = <0>; 9094e07ac90SThierry Reding }; 9104e07ac90SThierry Reding 9114e07ac90SThierry Reding usb2-1 { 9124e07ac90SThierry Reding status = "disabled"; 9134e07ac90SThierry Reding #phy-cells = <0>; 9144e07ac90SThierry Reding }; 9154e07ac90SThierry Reding 9164e07ac90SThierry Reding usb2-2 { 9174e07ac90SThierry Reding status = "disabled"; 9184e07ac90SThierry Reding #phy-cells = <0>; 9194e07ac90SThierry Reding }; 9204e07ac90SThierry Reding 9214e07ac90SThierry Reding usb2-3 { 9224e07ac90SThierry Reding status = "disabled"; 9234e07ac90SThierry Reding #phy-cells = <0>; 9244e07ac90SThierry Reding }; 9254e07ac90SThierry Reding }; 9264e07ac90SThierry Reding }; 9274e07ac90SThierry Reding 9284e07ac90SThierry Reding hsic { 9294e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>; 9304e07ac90SThierry Reding clock-names = "trk"; 9314e07ac90SThierry Reding status = "disabled"; 9324e07ac90SThierry Reding 9334e07ac90SThierry Reding lanes { 9344e07ac90SThierry Reding hsic-0 { 9354e07ac90SThierry Reding status = "disabled"; 9364e07ac90SThierry Reding #phy-cells = <0>; 9374e07ac90SThierry Reding }; 9384e07ac90SThierry Reding 9394e07ac90SThierry Reding hsic-1 { 9404e07ac90SThierry Reding status = "disabled"; 9414e07ac90SThierry Reding #phy-cells = <0>; 9424e07ac90SThierry Reding }; 9434e07ac90SThierry Reding }; 9444e07ac90SThierry Reding }; 9454e07ac90SThierry Reding 9464e07ac90SThierry Reding pcie { 9474e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 9484e07ac90SThierry Reding clock-names = "pll"; 9494e07ac90SThierry Reding resets = <&tegra_car 205>; 9504e07ac90SThierry Reding reset-names = "phy"; 9514e07ac90SThierry Reding status = "disabled"; 9524e07ac90SThierry Reding 9534e07ac90SThierry Reding lanes { 9544e07ac90SThierry Reding pcie-0 { 9554e07ac90SThierry Reding status = "disabled"; 9564e07ac90SThierry Reding #phy-cells = <0>; 9574e07ac90SThierry Reding }; 9584e07ac90SThierry Reding 9594e07ac90SThierry Reding pcie-1 { 9604e07ac90SThierry Reding status = "disabled"; 9614e07ac90SThierry Reding #phy-cells = <0>; 9624e07ac90SThierry Reding }; 9634e07ac90SThierry Reding 9644e07ac90SThierry Reding pcie-2 { 9654e07ac90SThierry Reding status = "disabled"; 9664e07ac90SThierry Reding #phy-cells = <0>; 9674e07ac90SThierry Reding }; 9684e07ac90SThierry Reding 9694e07ac90SThierry Reding pcie-3 { 9704e07ac90SThierry Reding status = "disabled"; 9714e07ac90SThierry Reding #phy-cells = <0>; 9724e07ac90SThierry Reding }; 9734e07ac90SThierry Reding 9744e07ac90SThierry Reding pcie-4 { 9754e07ac90SThierry Reding status = "disabled"; 9764e07ac90SThierry Reding #phy-cells = <0>; 9774e07ac90SThierry Reding }; 9784e07ac90SThierry Reding 9794e07ac90SThierry Reding pcie-5 { 9804e07ac90SThierry Reding status = "disabled"; 9814e07ac90SThierry Reding #phy-cells = <0>; 9824e07ac90SThierry Reding }; 9834e07ac90SThierry Reding 9844e07ac90SThierry Reding pcie-6 { 9854e07ac90SThierry Reding status = "disabled"; 9864e07ac90SThierry Reding #phy-cells = <0>; 9874e07ac90SThierry Reding }; 9884e07ac90SThierry Reding }; 9894e07ac90SThierry Reding }; 9904e07ac90SThierry Reding 9914e07ac90SThierry Reding sata { 9924e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 9934e07ac90SThierry Reding clock-names = "pll"; 9944e07ac90SThierry Reding resets = <&tegra_car 204>; 9954e07ac90SThierry Reding reset-names = "phy"; 9964e07ac90SThierry Reding status = "disabled"; 9974e07ac90SThierry Reding 9984e07ac90SThierry Reding lanes { 9994e07ac90SThierry Reding sata-0 { 10004e07ac90SThierry Reding status = "disabled"; 10014e07ac90SThierry Reding #phy-cells = <0>; 10024e07ac90SThierry Reding }; 10034e07ac90SThierry Reding }; 10044e07ac90SThierry Reding }; 10054e07ac90SThierry Reding }; 10064e07ac90SThierry Reding 10074e07ac90SThierry Reding ports { 10084e07ac90SThierry Reding usb2-0 { 10094e07ac90SThierry Reding status = "disabled"; 10104e07ac90SThierry Reding }; 10114e07ac90SThierry Reding 10124e07ac90SThierry Reding usb2-1 { 10134e07ac90SThierry Reding status = "disabled"; 10144e07ac90SThierry Reding }; 10154e07ac90SThierry Reding 10164e07ac90SThierry Reding usb2-2 { 10174e07ac90SThierry Reding status = "disabled"; 10184e07ac90SThierry Reding }; 10194e07ac90SThierry Reding 10204e07ac90SThierry Reding usb2-3 { 10214e07ac90SThierry Reding status = "disabled"; 10224e07ac90SThierry Reding }; 10234e07ac90SThierry Reding 10244e07ac90SThierry Reding hsic-0 { 10254e07ac90SThierry Reding status = "disabled"; 10264e07ac90SThierry Reding }; 10274e07ac90SThierry Reding 10284e07ac90SThierry Reding usb3-0 { 10294e07ac90SThierry Reding status = "disabled"; 10304e07ac90SThierry Reding }; 10314e07ac90SThierry Reding 10324e07ac90SThierry Reding usb3-1 { 10334e07ac90SThierry Reding status = "disabled"; 10344e07ac90SThierry Reding }; 10354e07ac90SThierry Reding 10364e07ac90SThierry Reding usb3-2 { 10374e07ac90SThierry Reding status = "disabled"; 10384e07ac90SThierry Reding }; 10394e07ac90SThierry Reding 10404e07ac90SThierry Reding usb3-3 { 10414e07ac90SThierry Reding status = "disabled"; 10424e07ac90SThierry Reding }; 10434e07ac90SThierry Reding }; 10444e07ac90SThierry Reding }; 10454e07ac90SThierry Reding 1046be70771dSThierry Reding sdhci@700b0000 { 1047742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1048742af7e7SThierry Reding reg = <0x0 0x700b0000 0x0 0x200>; 1049742af7e7SThierry Reding interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1050742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC1>; 1051742af7e7SThierry Reding clock-names = "sdhci"; 1052742af7e7SThierry Reding resets = <&tegra_car 14>; 1053742af7e7SThierry Reding reset-names = "sdhci"; 10546641af7eSAapo Vienamo pinctrl-names = "sdmmc-3v3", "sdmmc-1v8"; 10556641af7eSAapo Vienamo pinctrl-0 = <&sdmmc1_3v3>; 10566641af7eSAapo Vienamo pinctrl-1 = <&sdmmc1_1v8>; 10571ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>; 10581ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>; 10591ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>; 10601ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>; 106163af8bcdSAapo Vienamo nvidia,default-tap = <0x2>; 106263af8bcdSAapo Vienamo nvidia,default-trim = <0x4>; 1063918f9671SAapo Vienamo assigned-clocks = <&tegra_car TEGRA210_CLK_SDMMC4>, 1064918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>, 1065918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4>; 1066918f9671SAapo Vienamo assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 1067918f9671SAapo Vienamo assigned-clock-rates = <200000000>, <1000000000>, <1000000000>; 1068742af7e7SThierry Reding status = "disabled"; 1069742af7e7SThierry Reding }; 1070742af7e7SThierry Reding 1071be70771dSThierry Reding sdhci@700b0200 { 1072742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1073742af7e7SThierry Reding reg = <0x0 0x700b0200 0x0 0x200>; 1074742af7e7SThierry Reding interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1075742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC2>; 1076742af7e7SThierry Reding clock-names = "sdhci"; 1077742af7e7SThierry Reding resets = <&tegra_car 9>; 1078742af7e7SThierry Reding reset-names = "sdhci"; 10791ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x05>; 10801ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x05>; 108163af8bcdSAapo Vienamo nvidia,default-tap = <0x8>; 108263af8bcdSAapo Vienamo nvidia,default-trim = <0x0>; 1083742af7e7SThierry Reding status = "disabled"; 1084742af7e7SThierry Reding }; 1085742af7e7SThierry Reding 1086be70771dSThierry Reding sdhci@700b0400 { 1087742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1088742af7e7SThierry Reding reg = <0x0 0x700b0400 0x0 0x200>; 1089742af7e7SThierry Reding interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 1090742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC3>; 1091742af7e7SThierry Reding clock-names = "sdhci"; 1092742af7e7SThierry Reding resets = <&tegra_car 69>; 1093742af7e7SThierry Reding reset-names = "sdhci"; 10946641af7eSAapo Vienamo pinctrl-names = "sdmmc-3v3", "sdmmc-1v8"; 10956641af7eSAapo Vienamo pinctrl-0 = <&sdmmc3_3v3>; 10966641af7eSAapo Vienamo pinctrl-1 = <&sdmmc3_1v8>; 10971ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>; 10981ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>; 10991ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>; 11001ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>; 110163af8bcdSAapo Vienamo nvidia,default-tap = <0x3>; 110263af8bcdSAapo Vienamo nvidia,default-trim = <0x3>; 1103742af7e7SThierry Reding status = "disabled"; 1104742af7e7SThierry Reding }; 1105742af7e7SThierry Reding 1106be70771dSThierry Reding sdhci@700b0600 { 1107742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1108742af7e7SThierry Reding reg = <0x0 0x700b0600 0x0 0x200>; 1109742af7e7SThierry Reding interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 1110742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC4>; 1111742af7e7SThierry Reding clock-names = "sdhci"; 1112742af7e7SThierry Reding resets = <&tegra_car 15>; 1113742af7e7SThierry Reding reset-names = "sdhci"; 11141ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x05>; 11151ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x05>; 111663af8bcdSAapo Vienamo nvidia,default-tap = <0x8>; 111763af8bcdSAapo Vienamo nvidia,default-trim = <0x0>; 1118918f9671SAapo Vienamo assigned-clocks = <&tegra_car TEGRA210_CLK_SDMMC4>, 1119918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 1120918f9671SAapo Vienamo assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 11215879600aSAapo Vienamo nvidia,dqs-trim = <40>; 1122d5d6b468SAapo Vienamo mmc-hs400-1_8v; 1123742af7e7SThierry Reding status = "disabled"; 1124742af7e7SThierry Reding }; 1125742af7e7SThierry Reding 1126be70771dSThierry Reding mipi: mipi@700e3000 { 1127742af7e7SThierry Reding compatible = "nvidia,tegra210-mipi"; 1128742af7e7SThierry Reding reg = <0x0 0x700e3000 0x0 0x100>; 1129742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MIPI_CAL>; 1130742af7e7SThierry Reding clock-names = "mipi-cal"; 113196d1f078SJon Hunter power-domains = <&pd_sor>; 1132742af7e7SThierry Reding #nvidia,mipi-calibrate-cells = <1>; 1133742af7e7SThierry Reding }; 1134742af7e7SThierry Reding 11352ceed593SJoseph Lo dfll: clock@70110000 { 11362ceed593SJoseph Lo compatible = "nvidia,tegra210-dfll"; 11372ceed593SJoseph Lo reg = <0 0x70110000 0 0x100>, /* DFLL control */ 11382ceed593SJoseph Lo <0 0x70110000 0 0x100>, /* I2C output control */ 11392ceed593SJoseph Lo <0 0x70110100 0 0x100>, /* Integrated I2C controller */ 11402ceed593SJoseph Lo <0 0x70110200 0 0x100>; /* Look-up table RAM */ 11412ceed593SJoseph Lo interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 11422ceed593SJoseph Lo clocks = <&tegra_car TEGRA210_CLK_DFLL_SOC>, 11432ceed593SJoseph Lo <&tegra_car TEGRA210_CLK_DFLL_REF>, 11442ceed593SJoseph Lo <&tegra_car TEGRA210_CLK_I2C5>; 11452ceed593SJoseph Lo clock-names = "soc", "ref", "i2c"; 11462ceed593SJoseph Lo resets = <&tegra_car TEGRA210_RST_DFLL_DVCO>; 11472ceed593SJoseph Lo reset-names = "dvco"; 11482ceed593SJoseph Lo #clock-cells = <0>; 11492ceed593SJoseph Lo clock-output-names = "dfllCPU_out"; 11502ceed593SJoseph Lo status = "disabled"; 11512ceed593SJoseph Lo }; 11522ceed593SJoseph Lo 11530f133090SJon Hunter aconnect@702c0000 { 11540f133090SJon Hunter compatible = "nvidia,tegra210-aconnect"; 11550f133090SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 11560f133090SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 11570f133090SJon Hunter clock-names = "ape", "apb2ape"; 11580f133090SJon Hunter power-domains = <&pd_audio>; 11590f133090SJon Hunter #address-cells = <1>; 11600f133090SJon Hunter #size-cells = <1>; 11610f133090SJon Hunter ranges = <0x702c0000 0x0 0x702c0000 0x00040000>; 11620f133090SJon Hunter status = "disabled"; 1163bcdbde43SJon Hunter 116419e61213SJon Hunter adma: dma@702e2000 { 116519e61213SJon Hunter compatible = "nvidia,tegra210-adma"; 116619e61213SJon Hunter reg = <0x702e2000 0x2000>; 116719e61213SJon Hunter interrupt-parent = <&agic>; 116819e61213SJon Hunter interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, 116919e61213SJon Hunter <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, 117019e61213SJon Hunter <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, 117119e61213SJon Hunter <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, 117219e61213SJon Hunter <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, 117319e61213SJon Hunter <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 117419e61213SJon Hunter <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, 117519e61213SJon Hunter <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, 117619e61213SJon Hunter <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 117719e61213SJon Hunter <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 117819e61213SJon Hunter <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 117919e61213SJon Hunter <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 118019e61213SJon Hunter <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 118119e61213SJon Hunter <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 118219e61213SJon Hunter <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 118319e61213SJon Hunter <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 118419e61213SJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 118519e61213SJon Hunter <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 118619e61213SJon Hunter <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 118719e61213SJon Hunter <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 118819e61213SJon Hunter <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 118919e61213SJon Hunter <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 119019e61213SJon Hunter #dma-cells = <1>; 119119e61213SJon Hunter clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; 119219e61213SJon Hunter clock-names = "d_audio"; 119319e61213SJon Hunter status = "disabled"; 119419e61213SJon Hunter }; 119519e61213SJon Hunter 1196bcdbde43SJon Hunter agic: agic@702f9000 { 1197bcdbde43SJon Hunter compatible = "nvidia,tegra210-agic"; 1198bcdbde43SJon Hunter #interrupt-cells = <3>; 1199bcdbde43SJon Hunter interrupt-controller; 1200bcdbde43SJon Hunter reg = <0x702f9000 0x2000>, 1201bcdbde43SJon Hunter <0x702fa000 0x2000>; 1202bcdbde43SJon Hunter interrupts = <GIC_SPI 102 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 1203bcdbde43SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>; 1204bcdbde43SJon Hunter clock-names = "clk"; 1205bcdbde43SJon Hunter status = "disabled"; 1206bcdbde43SJon Hunter }; 12070f133090SJon Hunter }; 12080f133090SJon Hunter 1209be70771dSThierry Reding spi@70410000 { 1210742af7e7SThierry Reding compatible = "nvidia,tegra210-qspi"; 1211742af7e7SThierry Reding reg = <0x0 0x70410000 0x0 0x1000>; 1212742af7e7SThierry Reding interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 1213742af7e7SThierry Reding #address-cells = <1>; 1214742af7e7SThierry Reding #size-cells = <0>; 1215742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_QSPI>; 1216742af7e7SThierry Reding clock-names = "qspi"; 1217742af7e7SThierry Reding resets = <&tegra_car 211>; 1218742af7e7SThierry Reding reset-names = "qspi"; 1219742af7e7SThierry Reding dmas = <&apbdma 5>, <&apbdma 5>; 1220742af7e7SThierry Reding dma-names = "rx", "tx"; 1221742af7e7SThierry Reding status = "disabled"; 1222742af7e7SThierry Reding }; 1223742af7e7SThierry Reding 1224be70771dSThierry Reding usb@7d000000 { 1225742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1226742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>; 1227742af7e7SThierry Reding interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 1228742af7e7SThierry Reding phy_type = "utmi"; 1229742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>; 1230742af7e7SThierry Reding clock-names = "usb"; 1231742af7e7SThierry Reding resets = <&tegra_car 22>; 1232742af7e7SThierry Reding reset-names = "usb"; 1233742af7e7SThierry Reding nvidia,phy = <&phy1>; 1234742af7e7SThierry Reding status = "disabled"; 1235742af7e7SThierry Reding }; 1236742af7e7SThierry Reding 1237be70771dSThierry Reding phy1: usb-phy@7d000000 { 1238742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1239742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>, 1240742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1241742af7e7SThierry Reding phy_type = "utmi"; 1242742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>, 1243742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1244742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1245742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1246742af7e7SThierry Reding resets = <&tegra_car 22>, <&tegra_car 22>; 1247742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1248742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1249742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1250742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1251742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1252742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1253742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1254742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1255742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1256742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1257742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1258742af7e7SThierry Reding nvidia,has-utmi-pad-registers; 1259742af7e7SThierry Reding status = "disabled"; 1260742af7e7SThierry Reding }; 1261742af7e7SThierry Reding 1262be70771dSThierry Reding usb@7d004000 { 1263742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1264742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>; 1265742af7e7SThierry Reding interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1266742af7e7SThierry Reding phy_type = "utmi"; 1267742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>; 1268742af7e7SThierry Reding clock-names = "usb"; 1269742af7e7SThierry Reding resets = <&tegra_car 58>; 1270742af7e7SThierry Reding reset-names = "usb"; 1271742af7e7SThierry Reding nvidia,phy = <&phy2>; 1272742af7e7SThierry Reding status = "disabled"; 1273742af7e7SThierry Reding }; 1274742af7e7SThierry Reding 1275be70771dSThierry Reding phy2: usb-phy@7d004000 { 1276742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1277742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>, 1278742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1279742af7e7SThierry Reding phy_type = "utmi"; 1280742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>, 1281742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1282742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1283742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1284742af7e7SThierry Reding resets = <&tegra_car 58>, <&tegra_car 22>; 1285742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1286742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1287742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1288742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1289742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1290742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1291742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1292742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1293742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1294742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1295742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1296742af7e7SThierry Reding status = "disabled"; 1297742af7e7SThierry Reding }; 1298742af7e7SThierry Reding 1299742af7e7SThierry Reding cpus { 1300742af7e7SThierry Reding #address-cells = <1>; 1301742af7e7SThierry Reding #size-cells = <0>; 1302742af7e7SThierry Reding 1303742af7e7SThierry Reding cpu@0 { 1304742af7e7SThierry Reding device_type = "cpu"; 1305742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1306742af7e7SThierry Reding reg = <0>; 130743b9b402SJoseph Lo clocks = <&tegra_car TEGRA210_CLK_CCLK_G>, 130843b9b402SJoseph Lo <&tegra_car TEGRA210_CLK_PLL_X>, 130943b9b402SJoseph Lo <&tegra_car TEGRA210_CLK_PLL_P_OUT4>, 131043b9b402SJoseph Lo <&dfll>; 131143b9b402SJoseph Lo clock-names = "cpu_g", "pll_x", "pll_p", "dfll"; 131243b9b402SJoseph Lo clock-latency = <300000>; 1313742af7e7SThierry Reding }; 1314742af7e7SThierry Reding 1315742af7e7SThierry Reding cpu@1 { 1316742af7e7SThierry Reding device_type = "cpu"; 1317742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1318742af7e7SThierry Reding reg = <1>; 1319742af7e7SThierry Reding }; 1320742af7e7SThierry Reding 1321742af7e7SThierry Reding cpu@2 { 1322742af7e7SThierry Reding device_type = "cpu"; 1323742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1324742af7e7SThierry Reding reg = <2>; 1325742af7e7SThierry Reding }; 1326742af7e7SThierry Reding 1327742af7e7SThierry Reding cpu@3 { 1328742af7e7SThierry Reding device_type = "cpu"; 1329742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1330742af7e7SThierry Reding reg = <3>; 1331742af7e7SThierry Reding }; 1332742af7e7SThierry Reding }; 1333742af7e7SThierry Reding 1334742af7e7SThierry Reding timer { 1335742af7e7SThierry Reding compatible = "arm,armv8-timer"; 1336742af7e7SThierry Reding interrupts = <GIC_PPI 13 1337742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1338742af7e7SThierry Reding <GIC_PPI 14 1339742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1340742af7e7SThierry Reding <GIC_PPI 11 1341742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1342742af7e7SThierry Reding <GIC_PPI 10 1343742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 1344742af7e7SThierry Reding interrupt-parent = <&gic>; 1345742af7e7SThierry Reding }; 1346e2bed1ebSWei Ni 1347e2bed1ebSWei Ni soctherm: thermal-sensor@700e2000 { 1348e2bed1ebSWei Ni compatible = "nvidia,tegra210-soctherm"; 1349cbd0f000SWei Ni reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */ 1350cbd0f000SWei Ni 0x0 0x60006000 0x0 0x400>; /* CAR reg_base */ 1351cbd0f000SWei Ni reg-names = "soctherm-reg", "car-reg"; 1352e2bed1ebSWei Ni interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 1353e2bed1ebSWei Ni clocks = <&tegra_car TEGRA210_CLK_TSENSOR>, 1354e2bed1ebSWei Ni <&tegra_car TEGRA210_CLK_SOC_THERM>; 1355e2bed1ebSWei Ni clock-names = "tsensor", "soctherm"; 1356e2bed1ebSWei Ni resets = <&tegra_car 78>; 1357e2bed1ebSWei Ni reset-names = "soctherm"; 1358e2bed1ebSWei Ni #thermal-sensor-cells = <1>; 1359cbd0f000SWei Ni 1360cbd0f000SWei Ni throttle-cfgs { 1361cbd0f000SWei Ni throttle_heavy: heavy { 1362cbd0f000SWei Ni nvidia,priority = <100>; 1363cbd0f000SWei Ni nvidia,cpu-throt-percent = <85>; 1364cbd0f000SWei Ni 1365cbd0f000SWei Ni #cooling-cells = <2>; 1366cbd0f000SWei Ni }; 1367cbd0f000SWei Ni }; 1368e2bed1ebSWei Ni }; 1369e2bed1ebSWei Ni 1370e2bed1ebSWei Ni thermal-zones { 1371e2bed1ebSWei Ni cpu { 1372e2bed1ebSWei Ni polling-delay-passive = <1000>; 1373e2bed1ebSWei Ni polling-delay = <0>; 1374e2bed1ebSWei Ni 1375e2bed1ebSWei Ni thermal-sensors = 1376e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; 13775e03f663SWei Ni 13785e03f663SWei Ni trips { 13795e03f663SWei Ni cpu-shutdown-trip { 13805e03f663SWei Ni temperature = <102500>; 13815e03f663SWei Ni hysteresis = <0>; 13825e03f663SWei Ni type = "critical"; 13835e03f663SWei Ni }; 1384cbd0f000SWei Ni 1385cbd0f000SWei Ni cpu_throttle_trip: throttle-trip { 1386cbd0f000SWei Ni temperature = <98500>; 1387cbd0f000SWei Ni hysteresis = <1000>; 1388cbd0f000SWei Ni type = "hot"; 1389cbd0f000SWei Ni }; 13905e03f663SWei Ni }; 13915e03f663SWei Ni 13925e03f663SWei Ni cooling-maps { 1393cbd0f000SWei Ni map0 { 1394cbd0f000SWei Ni trip = <&cpu_throttle_trip>; 1395cbd0f000SWei Ni cooling-device = <&throttle_heavy 1 1>; 1396cbd0f000SWei Ni }; 13975e03f663SWei Ni }; 1398e2bed1ebSWei Ni }; 1399e2bed1ebSWei Ni mem { 1400e2bed1ebSWei Ni polling-delay-passive = <0>; 1401e2bed1ebSWei Ni polling-delay = <0>; 1402e2bed1ebSWei Ni 1403e2bed1ebSWei Ni thermal-sensors = 1404e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; 14055e03f663SWei Ni 14065e03f663SWei Ni trips { 14075e03f663SWei Ni mem-shutdown-trip { 14085e03f663SWei Ni temperature = <103000>; 14095e03f663SWei Ni hysteresis = <0>; 14105e03f663SWei Ni type = "critical"; 14115e03f663SWei Ni }; 14125e03f663SWei Ni }; 14135e03f663SWei Ni 14145e03f663SWei Ni cooling-maps { 14155e03f663SWei Ni /* 14165e03f663SWei Ni * There are currently no cooling maps, 14175e03f663SWei Ni * because there are no cooling devices. 14185e03f663SWei Ni */ 14195e03f663SWei Ni }; 1420e2bed1ebSWei Ni }; 1421e2bed1ebSWei Ni gpu { 1422e2bed1ebSWei Ni polling-delay-passive = <1000>; 1423e2bed1ebSWei Ni polling-delay = <0>; 1424e2bed1ebSWei Ni 1425e2bed1ebSWei Ni thermal-sensors = 1426e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; 14275e03f663SWei Ni 14285e03f663SWei Ni trips { 14295e03f663SWei Ni gpu-shutdown-trip { 14305e03f663SWei Ni temperature = <103000>; 14315e03f663SWei Ni hysteresis = <0>; 14325e03f663SWei Ni type = "critical"; 14335e03f663SWei Ni }; 1434cbd0f000SWei Ni 1435cbd0f000SWei Ni gpu_throttle_trip: throttle-trip { 1436cbd0f000SWei Ni temperature = <100000>; 1437cbd0f000SWei Ni hysteresis = <1000>; 1438cbd0f000SWei Ni type = "hot"; 1439cbd0f000SWei Ni }; 14405e03f663SWei Ni }; 14415e03f663SWei Ni 14425e03f663SWei Ni cooling-maps { 1443cbd0f000SWei Ni map0 { 1444cbd0f000SWei Ni trip = <&gpu_throttle_trip>; 1445cbd0f000SWei Ni cooling-device = <&throttle_heavy 1 1>; 1446cbd0f000SWei Ni }; 14475e03f663SWei Ni }; 1448e2bed1ebSWei Ni }; 1449e2bed1ebSWei Ni pllx { 1450e2bed1ebSWei Ni polling-delay-passive = <0>; 1451e2bed1ebSWei Ni polling-delay = <0>; 1452e2bed1ebSWei Ni 1453e2bed1ebSWei Ni thermal-sensors = 1454e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; 14555e03f663SWei Ni 14565e03f663SWei Ni trips { 14575e03f663SWei Ni pllx-shutdown-trip { 14585e03f663SWei Ni temperature = <103000>; 14595e03f663SWei Ni hysteresis = <0>; 14605e03f663SWei Ni type = "critical"; 14615e03f663SWei Ni }; 14625e03f663SWei Ni }; 14635e03f663SWei Ni 14645e03f663SWei Ni cooling-maps { 14655e03f663SWei Ni /* 14665e03f663SWei Ni * There are currently no cooling maps, 14675e03f663SWei Ni * because there are no cooling devices. 14685e03f663SWei Ni */ 14695e03f663SWei Ni }; 1470e2bed1ebSWei Ni }; 1471e2bed1ebSWei Ni }; 1472742af7e7SThierry Reding}; 1473