1b2441318SGreg Kroah-Hartman// SPDX-License-Identifier: GPL-2.0 2742af7e7SThierry Reding#include <dt-bindings/clock/tegra210-car.h> 3742af7e7SThierry Reding#include <dt-bindings/gpio/tegra-gpio.h> 4742af7e7SThierry Reding#include <dt-bindings/memory/tegra210-mc.h> 5742af7e7SThierry Reding#include <dt-bindings/pinctrl/pinctrl-tegra.h> 66641af7eSAapo Vienamo#include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 72ceed593SJoseph Lo#include <dt-bindings/reset/tegra210-car.h> 8742af7e7SThierry Reding#include <dt-bindings/interrupt-controller/arm-gic.h> 9e2bed1ebSWei Ni#include <dt-bindings/thermal/tegra124-soctherm.h> 10359ae651SSowjanya Komatineni#include <dt-bindings/soc/tegra-pmc.h> 11742af7e7SThierry Reding 12742af7e7SThierry Reding/ { 13742af7e7SThierry Reding compatible = "nvidia,tegra210"; 14742af7e7SThierry Reding interrupt-parent = <&lic>; 15742af7e7SThierry Reding #address-cells = <2>; 16742af7e7SThierry Reding #size-cells = <2>; 17742af7e7SThierry Reding 18475d99fcSRob Herring pcie@1003000 { 19589a2d3fSThierry Reding compatible = "nvidia,tegra210-pcie"; 20589a2d3fSThierry Reding device_type = "pci"; 21589a2d3fSThierry Reding reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ 22589a2d3fSThierry Reding 0x0 0x01003800 0x0 0x00000800 /* AFI registers */ 23589a2d3fSThierry Reding 0x0 0x02000000 0x0 0x10000000>; /* configuration space */ 24589a2d3fSThierry Reding reg-names = "pads", "afi", "cs"; 25589a2d3fSThierry Reding interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */ 26589a2d3fSThierry Reding <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */ 27589a2d3fSThierry Reding interrupt-names = "intr", "msi"; 28589a2d3fSThierry Reding 29589a2d3fSThierry Reding #interrupt-cells = <1>; 30589a2d3fSThierry Reding interrupt-map-mask = <0 0 0 0>; 31589a2d3fSThierry Reding interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 32589a2d3fSThierry Reding 33589a2d3fSThierry Reding bus-range = <0x00 0xff>; 34589a2d3fSThierry Reding #address-cells = <3>; 35589a2d3fSThierry Reding #size-cells = <2>; 36589a2d3fSThierry Reding 37589a2d3fSThierry Reding ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */ 38589a2d3fSThierry Reding 0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */ 39589a2d3fSThierry Reding 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */ 40589a2d3fSThierry Reding 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */ 41589a2d3fSThierry Reding 0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */ 42589a2d3fSThierry Reding 43589a2d3fSThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCIE>, 44589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_AFI>, 45589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>, 46589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_CML0>; 47589a2d3fSThierry Reding clock-names = "pex", "afi", "pll_e", "cml"; 48589a2d3fSThierry Reding resets = <&tegra_car 70>, 49589a2d3fSThierry Reding <&tegra_car 72>, 50589a2d3fSThierry Reding <&tegra_car 74>; 51589a2d3fSThierry Reding reset-names = "pex", "afi", "pcie_x"; 52871be845SManikanta Maddireddy 53871be845SManikanta Maddireddy pinctrl-names = "default", "idle"; 54871be845SManikanta Maddireddy pinctrl-0 = <&pex_dpd_disable>; 55871be845SManikanta Maddireddy pinctrl-1 = <&pex_dpd_enable>; 56871be845SManikanta Maddireddy 57589a2d3fSThierry Reding status = "disabled"; 58589a2d3fSThierry Reding 59589a2d3fSThierry Reding pci@1,0 { 60589a2d3fSThierry Reding device_type = "pci"; 61589a2d3fSThierry Reding assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; 62589a2d3fSThierry Reding reg = <0x000800 0 0 0 0>; 63475d99fcSRob Herring bus-range = <0x00 0xff>; 64589a2d3fSThierry Reding status = "disabled"; 65589a2d3fSThierry Reding 66589a2d3fSThierry Reding #address-cells = <3>; 67589a2d3fSThierry Reding #size-cells = <2>; 68589a2d3fSThierry Reding ranges; 69589a2d3fSThierry Reding 70589a2d3fSThierry Reding nvidia,num-lanes = <4>; 71589a2d3fSThierry Reding }; 72589a2d3fSThierry Reding 73589a2d3fSThierry Reding pci@2,0 { 74589a2d3fSThierry Reding device_type = "pci"; 75589a2d3fSThierry Reding assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; 76589a2d3fSThierry Reding reg = <0x001000 0 0 0 0>; 77475d99fcSRob Herring bus-range = <0x00 0xff>; 78589a2d3fSThierry Reding status = "disabled"; 79589a2d3fSThierry Reding 80589a2d3fSThierry Reding #address-cells = <3>; 81589a2d3fSThierry Reding #size-cells = <2>; 82589a2d3fSThierry Reding ranges; 83589a2d3fSThierry Reding 84589a2d3fSThierry Reding nvidia,num-lanes = <1>; 85589a2d3fSThierry Reding }; 86589a2d3fSThierry Reding }; 87589a2d3fSThierry Reding 88be70771dSThierry Reding host1x@50000000 { 89742af7e7SThierry Reding compatible = "nvidia,tegra210-host1x", "simple-bus"; 90742af7e7SThierry Reding reg = <0x0 0x50000000 0x0 0x00034000>; 91742af7e7SThierry Reding interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */ 92742af7e7SThierry Reding <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */ 93742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HOST1X>; 94742af7e7SThierry Reding clock-names = "host1x"; 95742af7e7SThierry Reding resets = <&tegra_car 28>; 96742af7e7SThierry Reding reset-names = "host1x"; 97742af7e7SThierry Reding 98742af7e7SThierry Reding #address-cells = <2>; 99742af7e7SThierry Reding #size-cells = <2>; 100742af7e7SThierry Reding 101742af7e7SThierry Reding ranges = <0x0 0x54000000 0x0 0x54000000 0x0 0x01000000>; 102742af7e7SThierry Reding 103116503a6SMikko Perttunen iommus = <&mc TEGRA_SWGROUP_HC>; 104116503a6SMikko Perttunen 105be70771dSThierry Reding dpaux1: dpaux@54040000 { 106742af7e7SThierry Reding compatible = "nvidia,tegra210-dpaux"; 107742af7e7SThierry Reding reg = <0x0 0x54040000 0x0 0x00040000>; 108742af7e7SThierry Reding interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 109742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX1>, 110742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 111742af7e7SThierry Reding clock-names = "dpaux", "parent"; 112742af7e7SThierry Reding resets = <&tegra_car 207>; 113742af7e7SThierry Reding reset-names = "dpaux"; 11496d1f078SJon Hunter power-domains = <&pd_sor>; 115742af7e7SThierry Reding status = "disabled"; 11666b2d6e9SJon Hunter 11766b2d6e9SJon Hunter state_dpaux1_aux: pinmux-aux { 11866b2d6e9SJon Hunter groups = "dpaux-io"; 11966b2d6e9SJon Hunter function = "aux"; 12066b2d6e9SJon Hunter }; 12166b2d6e9SJon Hunter 12266b2d6e9SJon Hunter state_dpaux1_i2c: pinmux-i2c { 12366b2d6e9SJon Hunter groups = "dpaux-io"; 12466b2d6e9SJon Hunter function = "i2c"; 12566b2d6e9SJon Hunter }; 12666b2d6e9SJon Hunter 12766b2d6e9SJon Hunter state_dpaux1_off: pinmux-off { 12866b2d6e9SJon Hunter groups = "dpaux-io"; 12966b2d6e9SJon Hunter function = "off"; 13066b2d6e9SJon Hunter }; 13166b2d6e9SJon Hunter 13266b2d6e9SJon Hunter i2c-bus { 13366b2d6e9SJon Hunter #address-cells = <1>; 13466b2d6e9SJon Hunter #size-cells = <0>; 13566b2d6e9SJon Hunter }; 136742af7e7SThierry Reding }; 137742af7e7SThierry Reding 138be70771dSThierry Reding vi@54080000 { 139742af7e7SThierry Reding compatible = "nvidia,tegra210-vi"; 140742af7e7SThierry Reding reg = <0x0 0x54080000 0x0 0x00040000>; 141742af7e7SThierry Reding interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 142742af7e7SThierry Reding status = "disabled"; 143742af7e7SThierry Reding }; 144742af7e7SThierry Reding 145be70771dSThierry Reding tsec@54100000 { 146742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 147742af7e7SThierry Reding reg = <0x0 0x54100000 0x0 0x00040000>; 148742af7e7SThierry Reding }; 149742af7e7SThierry Reding 150be70771dSThierry Reding dc@54200000 { 151742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 152742af7e7SThierry Reding reg = <0x0 0x54200000 0x0 0x00040000>; 153742af7e7SThierry Reding interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 154742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP1>, 155742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 156742af7e7SThierry Reding clock-names = "dc", "parent"; 157742af7e7SThierry Reding resets = <&tegra_car 27>; 158742af7e7SThierry Reding reset-names = "dc"; 159742af7e7SThierry Reding 160742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DC>; 161742af7e7SThierry Reding 162742af7e7SThierry Reding nvidia,head = <0>; 163742af7e7SThierry Reding }; 164742af7e7SThierry Reding 165be70771dSThierry Reding dc@54240000 { 166742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 167742af7e7SThierry Reding reg = <0x0 0x54240000 0x0 0x00040000>; 168742af7e7SThierry Reding interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 169742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP2>, 170742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 171742af7e7SThierry Reding clock-names = "dc", "parent"; 172742af7e7SThierry Reding resets = <&tegra_car 26>; 173742af7e7SThierry Reding reset-names = "dc"; 174742af7e7SThierry Reding 175742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DCB>; 176742af7e7SThierry Reding 177742af7e7SThierry Reding nvidia,head = <1>; 178742af7e7SThierry Reding }; 179742af7e7SThierry Reding 180be70771dSThierry Reding dsi@54300000 { 181742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 182742af7e7SThierry Reding reg = <0x0 0x54300000 0x0 0x00040000>; 183742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIA>, 184742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIALP>, 185742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 186742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 187742af7e7SThierry Reding resets = <&tegra_car 48>; 188742af7e7SThierry Reding reset-names = "dsi"; 18996d1f078SJon Hunter power-domains = <&pd_sor>; 190742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x0c0>; /* DSIA & DSIB pads */ 191742af7e7SThierry Reding 192742af7e7SThierry Reding status = "disabled"; 193742af7e7SThierry Reding 194742af7e7SThierry Reding #address-cells = <1>; 195742af7e7SThierry Reding #size-cells = <0>; 196742af7e7SThierry Reding }; 197742af7e7SThierry Reding 198be70771dSThierry Reding vic@54340000 { 199742af7e7SThierry Reding compatible = "nvidia,tegra210-vic"; 200742af7e7SThierry Reding reg = <0x0 0x54340000 0x0 0x00040000>; 20124963d1bSMikko Perttunen interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 20224963d1bSMikko Perttunen clocks = <&tegra_car TEGRA210_CLK_VIC03>; 20324963d1bSMikko Perttunen clock-names = "vic"; 20424963d1bSMikko Perttunen resets = <&tegra_car 178>; 20524963d1bSMikko Perttunen reset-names = "vic"; 20624963d1bSMikko Perttunen 20724963d1bSMikko Perttunen iommus = <&mc TEGRA_SWGROUP_VIC>; 20824963d1bSMikko Perttunen power-domains = <&pd_vic>; 209742af7e7SThierry Reding }; 210742af7e7SThierry Reding 211be70771dSThierry Reding nvjpg@54380000 { 212742af7e7SThierry Reding compatible = "nvidia,tegra210-nvjpg"; 213742af7e7SThierry Reding reg = <0x0 0x54380000 0x0 0x00040000>; 214742af7e7SThierry Reding status = "disabled"; 215742af7e7SThierry Reding }; 216742af7e7SThierry Reding 217be70771dSThierry Reding dsi@54400000 { 218742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 219742af7e7SThierry Reding reg = <0x0 0x54400000 0x0 0x00040000>; 220742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIB>, 221742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIBLP>, 222742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 223742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 224742af7e7SThierry Reding resets = <&tegra_car 82>; 225742af7e7SThierry Reding reset-names = "dsi"; 22696d1f078SJon Hunter power-domains = <&pd_sor>; 227742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x300>; /* DSIC & DSID pads */ 228742af7e7SThierry Reding 229742af7e7SThierry Reding status = "disabled"; 230742af7e7SThierry Reding 231742af7e7SThierry Reding #address-cells = <1>; 232742af7e7SThierry Reding #size-cells = <0>; 233742af7e7SThierry Reding }; 234742af7e7SThierry Reding 235be70771dSThierry Reding nvdec@54480000 { 236742af7e7SThierry Reding compatible = "nvidia,tegra210-nvdec"; 237742af7e7SThierry Reding reg = <0x0 0x54480000 0x0 0x00040000>; 238742af7e7SThierry Reding status = "disabled"; 239742af7e7SThierry Reding }; 240742af7e7SThierry Reding 241be70771dSThierry Reding nvenc@544c0000 { 242742af7e7SThierry Reding compatible = "nvidia,tegra210-nvenc"; 243742af7e7SThierry Reding reg = <0x0 0x544c0000 0x0 0x00040000>; 244742af7e7SThierry Reding status = "disabled"; 245742af7e7SThierry Reding }; 246742af7e7SThierry Reding 247be70771dSThierry Reding tsec@54500000 { 248742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 249742af7e7SThierry Reding reg = <0x0 0x54500000 0x0 0x00040000>; 250742af7e7SThierry Reding status = "disabled"; 251742af7e7SThierry Reding }; 252742af7e7SThierry Reding 253be70771dSThierry Reding sor@54540000 { 254742af7e7SThierry Reding compatible = "nvidia,tegra210-sor"; 255742af7e7SThierry Reding reg = <0x0 0x54540000 0x0 0x00040000>; 256742af7e7SThierry Reding interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 257742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR0>, 258ed93a666SThierry Reding <&tegra_car TEGRA210_CLK_SOR0_OUT>, 259742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>, 260742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 261742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 262ed93a666SThierry Reding clock-names = "sor", "out", "parent", "dp", "safe"; 263742af7e7SThierry Reding resets = <&tegra_car 182>; 264742af7e7SThierry Reding reset-names = "sor"; 26566b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_aux>; 26666b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_i2c>; 26766b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux_off>; 26866b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 26996d1f078SJon Hunter power-domains = <&pd_sor>; 270742af7e7SThierry Reding status = "disabled"; 271742af7e7SThierry Reding }; 272742af7e7SThierry Reding 273be70771dSThierry Reding sor@54580000 { 274742af7e7SThierry Reding compatible = "nvidia,tegra210-sor1"; 275742af7e7SThierry Reding reg = <0x0 0x54580000 0x0 0x00040000>; 276742af7e7SThierry Reding interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 277742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR1>, 27850f5b841SThierry Reding <&tegra_car TEGRA210_CLK_SOR1_OUT>, 279742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D2_OUT0>, 280742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 281742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 28250f5b841SThierry Reding clock-names = "sor", "out", "parent", "dp", "safe"; 283742af7e7SThierry Reding resets = <&tegra_car 183>; 284742af7e7SThierry Reding reset-names = "sor"; 28566b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_aux>; 28666b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_i2c>; 28766b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux1_off>; 28866b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 28996d1f078SJon Hunter power-domains = <&pd_sor>; 290742af7e7SThierry Reding status = "disabled"; 291742af7e7SThierry Reding }; 292742af7e7SThierry Reding 293be70771dSThierry Reding dpaux: dpaux@545c0000 { 294742af7e7SThierry Reding compatible = "nvidia,tegra124-dpaux"; 295742af7e7SThierry Reding reg = <0x0 0x545c0000 0x0 0x00040000>; 296742af7e7SThierry Reding interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 297742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX>, 298742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 299742af7e7SThierry Reding clock-names = "dpaux", "parent"; 300742af7e7SThierry Reding resets = <&tegra_car 181>; 301742af7e7SThierry Reding reset-names = "dpaux"; 30296d1f078SJon Hunter power-domains = <&pd_sor>; 303742af7e7SThierry Reding status = "disabled"; 30466b2d6e9SJon Hunter 30566b2d6e9SJon Hunter state_dpaux_aux: pinmux-aux { 30666b2d6e9SJon Hunter groups = "dpaux-io"; 30766b2d6e9SJon Hunter function = "aux"; 30866b2d6e9SJon Hunter }; 30966b2d6e9SJon Hunter 31066b2d6e9SJon Hunter state_dpaux_i2c: pinmux-i2c { 31166b2d6e9SJon Hunter groups = "dpaux-io"; 31266b2d6e9SJon Hunter function = "i2c"; 31366b2d6e9SJon Hunter }; 31466b2d6e9SJon Hunter 31566b2d6e9SJon Hunter state_dpaux_off: pinmux-off { 31666b2d6e9SJon Hunter groups = "dpaux-io"; 31766b2d6e9SJon Hunter function = "off"; 31866b2d6e9SJon Hunter }; 31966b2d6e9SJon Hunter 32066b2d6e9SJon Hunter i2c-bus { 32166b2d6e9SJon Hunter #address-cells = <1>; 32266b2d6e9SJon Hunter #size-cells = <0>; 32366b2d6e9SJon Hunter }; 324742af7e7SThierry Reding }; 325742af7e7SThierry Reding 326be70771dSThierry Reding isp@54600000 { 327742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 328742af7e7SThierry Reding reg = <0x0 0x54600000 0x0 0x00040000>; 329742af7e7SThierry Reding interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 330742af7e7SThierry Reding status = "disabled"; 331742af7e7SThierry Reding }; 332742af7e7SThierry Reding 333be70771dSThierry Reding isp@54680000 { 334742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 335742af7e7SThierry Reding reg = <0x0 0x54680000 0x0 0x00040000>; 336742af7e7SThierry Reding interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 337742af7e7SThierry Reding status = "disabled"; 338742af7e7SThierry Reding }; 339742af7e7SThierry Reding 340be70771dSThierry Reding i2c@546c0000 { 341742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c-vi"; 342742af7e7SThierry Reding reg = <0x0 0x546c0000 0x0 0x00040000>; 343742af7e7SThierry Reding interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 344742af7e7SThierry Reding status = "disabled"; 345742af7e7SThierry Reding }; 346742af7e7SThierry Reding }; 347742af7e7SThierry Reding 348be70771dSThierry Reding gic: interrupt-controller@50041000 { 349742af7e7SThierry Reding compatible = "arm,gic-400"; 350742af7e7SThierry Reding #interrupt-cells = <3>; 351742af7e7SThierry Reding interrupt-controller; 352742af7e7SThierry Reding reg = <0x0 0x50041000 0x0 0x1000>, 353742af7e7SThierry Reding <0x0 0x50042000 0x0 0x2000>, 354742af7e7SThierry Reding <0x0 0x50044000 0x0 0x2000>, 355742af7e7SThierry Reding <0x0 0x50046000 0x0 0x2000>; 356742af7e7SThierry Reding interrupts = <GIC_PPI 9 357742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 358742af7e7SThierry Reding interrupt-parent = <&gic>; 359742af7e7SThierry Reding }; 360742af7e7SThierry Reding 361be70771dSThierry Reding gpu@57000000 { 362742af7e7SThierry Reding compatible = "nvidia,gm20b"; 363742af7e7SThierry Reding reg = <0x0 0x57000000 0x0 0x01000000>, 364742af7e7SThierry Reding <0x0 0x58000000 0x0 0x01000000>; 365742af7e7SThierry Reding interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 366742af7e7SThierry Reding <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 367742af7e7SThierry Reding interrupt-names = "stall", "nonstall"; 368742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_GPU>, 3694a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_P_OUT5>, 3704a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_G_REF>; 3714a0778e9SAlexandre Courbot clock-names = "gpu", "pwr", "ref"; 372742af7e7SThierry Reding resets = <&tegra_car 184>; 373742af7e7SThierry Reding reset-names = "gpu"; 37430f949bcSAlexandre Courbot 37530f949bcSAlexandre Courbot iommus = <&mc TEGRA_SWGROUP_GPU>; 37630f949bcSAlexandre Courbot 377742af7e7SThierry Reding status = "disabled"; 378742af7e7SThierry Reding }; 379742af7e7SThierry Reding 380be70771dSThierry Reding lic: interrupt-controller@60004000 { 381742af7e7SThierry Reding compatible = "nvidia,tegra210-ictlr"; 382742af7e7SThierry Reding reg = <0x0 0x60004000 0x0 0x40>, /* primary controller */ 383742af7e7SThierry Reding <0x0 0x60004100 0x0 0x40>, /* secondary controller */ 384742af7e7SThierry Reding <0x0 0x60004200 0x0 0x40>, /* tertiary controller */ 385742af7e7SThierry Reding <0x0 0x60004300 0x0 0x40>, /* quaternary controller */ 386742af7e7SThierry Reding <0x0 0x60004400 0x0 0x40>, /* quinary controller */ 387742af7e7SThierry Reding <0x0 0x60004500 0x0 0x40>; /* senary controller */ 388742af7e7SThierry Reding interrupt-controller; 389742af7e7SThierry Reding #interrupt-cells = <3>; 390742af7e7SThierry Reding interrupt-parent = <&gic>; 391742af7e7SThierry Reding }; 392742af7e7SThierry Reding 393be70771dSThierry Reding timer@60005000 { 394d9931a18SJoseph Lo compatible = "nvidia,tegra210-timer"; 395742af7e7SThierry Reding reg = <0x0 0x60005000 0x0 0x400>; 396d9931a18SJoseph Lo interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>, 397d9931a18SJoseph Lo <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 398742af7e7SThierry Reding <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 399742af7e7SThierry Reding <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 400742af7e7SThierry Reding <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 401742af7e7SThierry Reding <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 402d9931a18SJoseph Lo <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, 403d9931a18SJoseph Lo <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, 404d9931a18SJoseph Lo <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, 405d9931a18SJoseph Lo <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 406d9931a18SJoseph Lo <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>, 407d9931a18SJoseph Lo <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>, 408d9931a18SJoseph Lo <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>, 409d9931a18SJoseph Lo <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; 410742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_TIMER>; 411742af7e7SThierry Reding clock-names = "timer"; 412742af7e7SThierry Reding }; 413742af7e7SThierry Reding 414be70771dSThierry Reding tegra_car: clock@60006000 { 415742af7e7SThierry Reding compatible = "nvidia,tegra210-car"; 416742af7e7SThierry Reding reg = <0x0 0x60006000 0x0 0x1000>; 417742af7e7SThierry Reding #clock-cells = <1>; 418742af7e7SThierry Reding #reset-cells = <1>; 419742af7e7SThierry Reding }; 420742af7e7SThierry Reding 421be70771dSThierry Reding flow-controller@60007000 { 422742af7e7SThierry Reding compatible = "nvidia,tegra210-flowctrl"; 423742af7e7SThierry Reding reg = <0x0 0x60007000 0x0 0x1000>; 424742af7e7SThierry Reding }; 425742af7e7SThierry Reding 426be70771dSThierry Reding gpio: gpio@6000d000 { 42701665512SStephen Warren compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio"; 428742af7e7SThierry Reding reg = <0x0 0x6000d000 0x0 0x1000>; 429742af7e7SThierry Reding interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 430742af7e7SThierry Reding <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 431742af7e7SThierry Reding <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 432742af7e7SThierry Reding <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 433742af7e7SThierry Reding <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 434742af7e7SThierry Reding <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 435742af7e7SThierry Reding <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 436742af7e7SThierry Reding <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 437742af7e7SThierry Reding #gpio-cells = <2>; 438742af7e7SThierry Reding gpio-controller; 439742af7e7SThierry Reding #interrupt-cells = <2>; 440742af7e7SThierry Reding interrupt-controller; 441742af7e7SThierry Reding }; 442742af7e7SThierry Reding 443be70771dSThierry Reding apbdma: dma@60020000 { 444742af7e7SThierry Reding compatible = "nvidia,tegra210-apbdma", "nvidia,tegra148-apbdma"; 445742af7e7SThierry Reding reg = <0x0 0x60020000 0x0 0x1400>; 446742af7e7SThierry Reding interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 447742af7e7SThierry Reding <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 448742af7e7SThierry Reding <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 449742af7e7SThierry Reding <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 450742af7e7SThierry Reding <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 451742af7e7SThierry Reding <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 452742af7e7SThierry Reding <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 453742af7e7SThierry Reding <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 454742af7e7SThierry Reding <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 455742af7e7SThierry Reding <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 456742af7e7SThierry Reding <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 457742af7e7SThierry Reding <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 458742af7e7SThierry Reding <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 459742af7e7SThierry Reding <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 460742af7e7SThierry Reding <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 461742af7e7SThierry Reding <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, 462742af7e7SThierry Reding <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 463742af7e7SThierry Reding <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 464742af7e7SThierry Reding <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 465742af7e7SThierry Reding <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 466742af7e7SThierry Reding <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 467742af7e7SThierry Reding <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, 468742af7e7SThierry Reding <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, 469742af7e7SThierry Reding <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 470742af7e7SThierry Reding <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 471742af7e7SThierry Reding <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 472742af7e7SThierry Reding <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 473742af7e7SThierry Reding <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>, 474742af7e7SThierry Reding <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, 475742af7e7SThierry Reding <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, 476742af7e7SThierry Reding <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 477742af7e7SThierry Reding <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 478742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_APBDMA>; 479742af7e7SThierry Reding clock-names = "dma"; 480742af7e7SThierry Reding resets = <&tegra_car 34>; 481742af7e7SThierry Reding reset-names = "dma"; 482742af7e7SThierry Reding #dma-cells = <1>; 483742af7e7SThierry Reding }; 484742af7e7SThierry Reding 485be70771dSThierry Reding apbmisc@70000800 { 486742af7e7SThierry Reding compatible = "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc"; 487742af7e7SThierry Reding reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */ 48846e4b227SJoseph Lo <0x0 0x70000008 0x0 0x04>; /* Strapping options */ 489742af7e7SThierry Reding }; 490742af7e7SThierry Reding 491be70771dSThierry Reding pinmux: pinmux@700008d4 { 492742af7e7SThierry Reding compatible = "nvidia,tegra210-pinmux"; 493742af7e7SThierry Reding reg = <0x0 0x700008d4 0x0 0x29c>, /* Pad control registers */ 494742af7e7SThierry Reding <0x0 0x70003000 0x0 0x294>; /* Mux registers */ 4954e0f1229SSowjanya Komatineni sdmmc1_3v3_drv: sdmmc1-3v3-drv { 4964e0f1229SSowjanya Komatineni sdmmc1 { 4974e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc1"; 4984e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x8>; 4994e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x8>; 5004e0f1229SSowjanya Komatineni }; 5014e0f1229SSowjanya Komatineni }; 5024e0f1229SSowjanya Komatineni sdmmc1_1v8_drv: sdmmc1-1v8-drv { 5034e0f1229SSowjanya Komatineni sdmmc1 { 5044e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc1"; 5054e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x4>; 5064e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x3>; 5074e0f1229SSowjanya Komatineni }; 5084e0f1229SSowjanya Komatineni }; 5094e0f1229SSowjanya Komatineni sdmmc2_1v8_drv: sdmmc2-1v8-drv { 5104e0f1229SSowjanya Komatineni sdmmc2 { 5114e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc2"; 5124e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x10>; 5134e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x10>; 5144e0f1229SSowjanya Komatineni }; 5154e0f1229SSowjanya Komatineni }; 5164e0f1229SSowjanya Komatineni sdmmc3_3v3_drv: sdmmc3-3v3-drv { 5174e0f1229SSowjanya Komatineni sdmmc3 { 5184e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc3"; 5194e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x8>; 5204e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x8>; 5214e0f1229SSowjanya Komatineni }; 5224e0f1229SSowjanya Komatineni }; 5234e0f1229SSowjanya Komatineni sdmmc3_1v8_drv: sdmmc3-1v8-drv { 5244e0f1229SSowjanya Komatineni sdmmc3 { 5254e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc3"; 5264e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x4>; 5274e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x3>; 5284e0f1229SSowjanya Komatineni }; 5294e0f1229SSowjanya Komatineni }; 5304e0f1229SSowjanya Komatineni sdmmc4_1v8_drv: sdmmc4-1v8-drv { 5314e0f1229SSowjanya Komatineni sdmmc4 { 5324e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc4"; 5334e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x10>; 5344e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x10>; 5354e0f1229SSowjanya Komatineni }; 5364e0f1229SSowjanya Komatineni }; 537742af7e7SThierry Reding }; 538742af7e7SThierry Reding 539742af7e7SThierry Reding /* 540742af7e7SThierry Reding * There are two serial driver i.e. 8250 based simple serial 541742af7e7SThierry Reding * driver and APB DMA based serial driver for higher baudrate 542ef769e32SAdam Buchbinder * and performance. To enable the 8250 based driver, the compatible 543742af7e7SThierry Reding * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable 54468cd8b2eSThierry Reding * the APB DMA based serial driver, the compatible is 545742af7e7SThierry Reding * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart". 546742af7e7SThierry Reding */ 547be70771dSThierry Reding uarta: serial@70006000 { 548742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 549742af7e7SThierry Reding reg = <0x0 0x70006000 0x0 0x40>; 550742af7e7SThierry Reding reg-shift = <2>; 551742af7e7SThierry Reding interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 552742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTA>; 553742af7e7SThierry Reding clock-names = "serial"; 554742af7e7SThierry Reding resets = <&tegra_car 6>; 555742af7e7SThierry Reding reset-names = "serial"; 556742af7e7SThierry Reding dmas = <&apbdma 8>, <&apbdma 8>; 557742af7e7SThierry Reding dma-names = "rx", "tx"; 558742af7e7SThierry Reding status = "disabled"; 559742af7e7SThierry Reding }; 560742af7e7SThierry Reding 561be70771dSThierry Reding uartb: serial@70006040 { 562742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 563742af7e7SThierry Reding reg = <0x0 0x70006040 0x0 0x40>; 564742af7e7SThierry Reding reg-shift = <2>; 565742af7e7SThierry Reding interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 566742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTB>; 567742af7e7SThierry Reding clock-names = "serial"; 568742af7e7SThierry Reding resets = <&tegra_car 7>; 569742af7e7SThierry Reding reset-names = "serial"; 570742af7e7SThierry Reding dmas = <&apbdma 9>, <&apbdma 9>; 571742af7e7SThierry Reding dma-names = "rx", "tx"; 572742af7e7SThierry Reding status = "disabled"; 573742af7e7SThierry Reding }; 574742af7e7SThierry Reding 575be70771dSThierry Reding uartc: serial@70006200 { 576742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 577742af7e7SThierry Reding reg = <0x0 0x70006200 0x0 0x40>; 578742af7e7SThierry Reding reg-shift = <2>; 579742af7e7SThierry Reding interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 580742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTC>; 581742af7e7SThierry Reding clock-names = "serial"; 582742af7e7SThierry Reding resets = <&tegra_car 55>; 583742af7e7SThierry Reding reset-names = "serial"; 584742af7e7SThierry Reding dmas = <&apbdma 10>, <&apbdma 10>; 585742af7e7SThierry Reding dma-names = "rx", "tx"; 586742af7e7SThierry Reding status = "disabled"; 587742af7e7SThierry Reding }; 588742af7e7SThierry Reding 589be70771dSThierry Reding uartd: serial@70006300 { 590742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 591742af7e7SThierry Reding reg = <0x0 0x70006300 0x0 0x40>; 592742af7e7SThierry Reding reg-shift = <2>; 593742af7e7SThierry Reding interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 594742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTD>; 595742af7e7SThierry Reding clock-names = "serial"; 596742af7e7SThierry Reding resets = <&tegra_car 65>; 597742af7e7SThierry Reding reset-names = "serial"; 598742af7e7SThierry Reding dmas = <&apbdma 19>, <&apbdma 19>; 599742af7e7SThierry Reding dma-names = "rx", "tx"; 600742af7e7SThierry Reding status = "disabled"; 601742af7e7SThierry Reding }; 602742af7e7SThierry Reding 603be70771dSThierry Reding pwm: pwm@7000a000 { 604742af7e7SThierry Reding compatible = "nvidia,tegra210-pwm", "nvidia,tegra20-pwm"; 605742af7e7SThierry Reding reg = <0x0 0x7000a000 0x0 0x100>; 606742af7e7SThierry Reding #pwm-cells = <2>; 607742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PWM>; 608742af7e7SThierry Reding clock-names = "pwm"; 609742af7e7SThierry Reding resets = <&tegra_car 17>; 610742af7e7SThierry Reding reset-names = "pwm"; 611742af7e7SThierry Reding status = "disabled"; 612742af7e7SThierry Reding }; 613742af7e7SThierry Reding 614be70771dSThierry Reding i2c@7000c000 { 615140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 616742af7e7SThierry Reding reg = <0x0 0x7000c000 0x0 0x100>; 617742af7e7SThierry Reding interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 618742af7e7SThierry Reding #address-cells = <1>; 619742af7e7SThierry Reding #size-cells = <0>; 620742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C1>; 621742af7e7SThierry Reding clock-names = "div-clk"; 622742af7e7SThierry Reding resets = <&tegra_car 12>; 623742af7e7SThierry Reding reset-names = "i2c"; 624742af7e7SThierry Reding dmas = <&apbdma 21>, <&apbdma 21>; 625742af7e7SThierry Reding dma-names = "rx", "tx"; 626742af7e7SThierry Reding status = "disabled"; 627742af7e7SThierry Reding }; 628742af7e7SThierry Reding 629be70771dSThierry Reding i2c@7000c400 { 630140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 631742af7e7SThierry Reding reg = <0x0 0x7000c400 0x0 0x100>; 632742af7e7SThierry Reding interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 633742af7e7SThierry Reding #address-cells = <1>; 634742af7e7SThierry Reding #size-cells = <0>; 635742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C2>; 636742af7e7SThierry Reding clock-names = "div-clk"; 637742af7e7SThierry Reding resets = <&tegra_car 54>; 638742af7e7SThierry Reding reset-names = "i2c"; 639742af7e7SThierry Reding dmas = <&apbdma 22>, <&apbdma 22>; 640742af7e7SThierry Reding dma-names = "rx", "tx"; 641742af7e7SThierry Reding status = "disabled"; 642742af7e7SThierry Reding }; 643742af7e7SThierry Reding 644be70771dSThierry Reding i2c@7000c500 { 645140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 646742af7e7SThierry Reding reg = <0x0 0x7000c500 0x0 0x100>; 647742af7e7SThierry Reding interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 648742af7e7SThierry Reding #address-cells = <1>; 649742af7e7SThierry Reding #size-cells = <0>; 650742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C3>; 651742af7e7SThierry Reding clock-names = "div-clk"; 652742af7e7SThierry Reding resets = <&tegra_car 67>; 653742af7e7SThierry Reding reset-names = "i2c"; 654742af7e7SThierry Reding dmas = <&apbdma 23>, <&apbdma 23>; 655742af7e7SThierry Reding dma-names = "rx", "tx"; 656742af7e7SThierry Reding status = "disabled"; 657742af7e7SThierry Reding }; 658742af7e7SThierry Reding 659be70771dSThierry Reding i2c@7000c700 { 660140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 661742af7e7SThierry Reding reg = <0x0 0x7000c700 0x0 0x100>; 662742af7e7SThierry Reding interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 663742af7e7SThierry Reding #address-cells = <1>; 664742af7e7SThierry Reding #size-cells = <0>; 665742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C4>; 666742af7e7SThierry Reding clock-names = "div-clk"; 667742af7e7SThierry Reding resets = <&tegra_car 103>; 668742af7e7SThierry Reding reset-names = "i2c"; 669742af7e7SThierry Reding dmas = <&apbdma 26>, <&apbdma 26>; 670742af7e7SThierry Reding dma-names = "rx", "tx"; 67166b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_i2c>; 67266b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_off>; 67366b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 674742af7e7SThierry Reding status = "disabled"; 675742af7e7SThierry Reding }; 676742af7e7SThierry Reding 677be70771dSThierry Reding i2c@7000d000 { 678140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 679742af7e7SThierry Reding reg = <0x0 0x7000d000 0x0 0x100>; 680742af7e7SThierry Reding interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 681742af7e7SThierry Reding #address-cells = <1>; 682742af7e7SThierry Reding #size-cells = <0>; 683742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C5>; 684742af7e7SThierry Reding clock-names = "div-clk"; 685742af7e7SThierry Reding resets = <&tegra_car 47>; 686742af7e7SThierry Reding reset-names = "i2c"; 687742af7e7SThierry Reding dmas = <&apbdma 24>, <&apbdma 24>; 688742af7e7SThierry Reding dma-names = "rx", "tx"; 689742af7e7SThierry Reding status = "disabled"; 690742af7e7SThierry Reding }; 691742af7e7SThierry Reding 692be70771dSThierry Reding i2c@7000d100 { 693140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 694742af7e7SThierry Reding reg = <0x0 0x7000d100 0x0 0x100>; 695742af7e7SThierry Reding interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 696742af7e7SThierry Reding #address-cells = <1>; 697742af7e7SThierry Reding #size-cells = <0>; 698742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C6>; 699742af7e7SThierry Reding clock-names = "div-clk"; 700742af7e7SThierry Reding resets = <&tegra_car 166>; 701742af7e7SThierry Reding reset-names = "i2c"; 702742af7e7SThierry Reding dmas = <&apbdma 30>, <&apbdma 30>; 703742af7e7SThierry Reding dma-names = "rx", "tx"; 70466b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_i2c>; 70566b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_off>; 70666b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 707742af7e7SThierry Reding status = "disabled"; 708742af7e7SThierry Reding }; 709742af7e7SThierry Reding 710be70771dSThierry Reding spi@7000d400 { 711742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 712742af7e7SThierry Reding reg = <0x0 0x7000d400 0x0 0x200>; 713742af7e7SThierry Reding interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 714742af7e7SThierry Reding #address-cells = <1>; 715742af7e7SThierry Reding #size-cells = <0>; 716742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC1>; 717742af7e7SThierry Reding clock-names = "spi"; 718742af7e7SThierry Reding resets = <&tegra_car 41>; 719742af7e7SThierry Reding reset-names = "spi"; 720742af7e7SThierry Reding dmas = <&apbdma 15>, <&apbdma 15>; 721742af7e7SThierry Reding dma-names = "rx", "tx"; 722742af7e7SThierry Reding status = "disabled"; 723742af7e7SThierry Reding }; 724742af7e7SThierry Reding 725be70771dSThierry Reding spi@7000d600 { 726742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 727742af7e7SThierry Reding reg = <0x0 0x7000d600 0x0 0x200>; 728742af7e7SThierry Reding interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 729742af7e7SThierry Reding #address-cells = <1>; 730742af7e7SThierry Reding #size-cells = <0>; 731742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC2>; 732742af7e7SThierry Reding clock-names = "spi"; 733742af7e7SThierry Reding resets = <&tegra_car 44>; 734742af7e7SThierry Reding reset-names = "spi"; 735742af7e7SThierry Reding dmas = <&apbdma 16>, <&apbdma 16>; 736742af7e7SThierry Reding dma-names = "rx", "tx"; 737742af7e7SThierry Reding status = "disabled"; 738742af7e7SThierry Reding }; 739742af7e7SThierry Reding 740be70771dSThierry Reding spi@7000d800 { 741742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 742742af7e7SThierry Reding reg = <0x0 0x7000d800 0x0 0x200>; 743742af7e7SThierry Reding interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 744742af7e7SThierry Reding #address-cells = <1>; 745742af7e7SThierry Reding #size-cells = <0>; 746742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC3>; 747742af7e7SThierry Reding clock-names = "spi"; 748742af7e7SThierry Reding resets = <&tegra_car 46>; 749742af7e7SThierry Reding reset-names = "spi"; 750742af7e7SThierry Reding dmas = <&apbdma 17>, <&apbdma 17>; 751742af7e7SThierry Reding dma-names = "rx", "tx"; 752742af7e7SThierry Reding status = "disabled"; 753742af7e7SThierry Reding }; 754742af7e7SThierry Reding 755be70771dSThierry Reding spi@7000da00 { 756742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 757742af7e7SThierry Reding reg = <0x0 0x7000da00 0x0 0x200>; 758742af7e7SThierry Reding interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 759742af7e7SThierry Reding #address-cells = <1>; 760742af7e7SThierry Reding #size-cells = <0>; 761742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC4>; 762742af7e7SThierry Reding clock-names = "spi"; 763742af7e7SThierry Reding resets = <&tegra_car 68>; 764742af7e7SThierry Reding reset-names = "spi"; 765742af7e7SThierry Reding dmas = <&apbdma 18>, <&apbdma 18>; 766742af7e7SThierry Reding dma-names = "rx", "tx"; 767742af7e7SThierry Reding status = "disabled"; 768742af7e7SThierry Reding }; 769742af7e7SThierry Reding 770be70771dSThierry Reding rtc@7000e000 { 771742af7e7SThierry Reding compatible = "nvidia,tegra210-rtc", "nvidia,tegra20-rtc"; 772742af7e7SThierry Reding reg = <0x0 0x7000e000 0x0 0x100>; 773d13c13f4SSowjanya Komatineni interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; 774359ae651SSowjanya Komatineni interrupt-parent = <&tegra_pmc>; 775742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_RTC>; 776742af7e7SThierry Reding clock-names = "rtc"; 777742af7e7SThierry Reding }; 778742af7e7SThierry Reding 779359ae651SSowjanya Komatineni tegra_pmc: pmc@7000e400 { 780742af7e7SThierry Reding compatible = "nvidia,tegra210-pmc"; 781742af7e7SThierry Reding reg = <0x0 0x7000e400 0x0 0x400>; 782742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; 783742af7e7SThierry Reding clock-names = "pclk", "clk32k_in"; 784359ae651SSowjanya Komatineni #clock-cells = <1>; 785d13c13f4SSowjanya Komatineni #interrupt-cells = <2>; 786d13c13f4SSowjanya Komatineni interrupt-controller; 787c2b82445SJon Hunter 788c2b82445SJon Hunter powergates { 789c2b82445SJon Hunter pd_audio: aud { 790c2b82445SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 791c2b82445SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 792c2b82445SJon Hunter resets = <&tegra_car 198>; 793c2b82445SJon Hunter #power-domain-cells = <0>; 794c2b82445SJon Hunter }; 795241f02baSJon Hunter 79696d1f078SJon Hunter pd_sor: sor { 79796d1f078SJon Hunter clocks = <&tegra_car TEGRA210_CLK_SOR0>, 79896d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 79996d1f078SJon Hunter <&tegra_car TEGRA210_CLK_CSI>, 80096d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 80196d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 80296d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 80396d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 80496d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 80596d1f078SJon Hunter resets = <&tegra_car TEGRA210_CLK_SOR0>, 80696d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 80796d1f078SJon Hunter <&tegra_car TEGRA210_CLK_CSI>, 80896d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 80996d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 81096d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 81196d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 81296d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 81396d1f078SJon Hunter #power-domain-cells = <0>; 81496d1f078SJon Hunter }; 81596d1f078SJon Hunter 816241f02baSJon Hunter pd_xusbss: xusba { 817241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>; 818241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_SS>; 819241f02baSJon Hunter #power-domain-cells = <0>; 820241f02baSJon Hunter }; 821241f02baSJon Hunter 822241f02baSJon Hunter pd_xusbdev: xusbb { 823241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>; 824241f02baSJon Hunter resets = <&tegra_car 95>; 825241f02baSJon Hunter #power-domain-cells = <0>; 826241f02baSJon Hunter }; 827241f02baSJon Hunter 828241f02baSJon Hunter pd_xusbhost: xusbc { 829241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 830241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 831241f02baSJon Hunter #power-domain-cells = <0>; 832241f02baSJon Hunter }; 83324963d1bSMikko Perttunen 83424963d1bSMikko Perttunen pd_vic: vic { 83524963d1bSMikko Perttunen clocks = <&tegra_car TEGRA210_CLK_VIC03>; 83624963d1bSMikko Perttunen clock-names = "vic"; 83724963d1bSMikko Perttunen resets = <&tegra_car 178>; 83824963d1bSMikko Perttunen reset-names = "vic"; 83924963d1bSMikko Perttunen #power-domain-cells = <0>; 84024963d1bSMikko Perttunen }; 841c2b82445SJon Hunter }; 8426641af7eSAapo Vienamo 8436641af7eSAapo Vienamo sdmmc1_3v3: sdmmc1-3v3 { 8446641af7eSAapo Vienamo pins = "sdmmc1"; 8456641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>; 8466641af7eSAapo Vienamo }; 8476641af7eSAapo Vienamo 8486641af7eSAapo Vienamo sdmmc1_1v8: sdmmc1-1v8 { 8496641af7eSAapo Vienamo pins = "sdmmc1"; 8506641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>; 8516641af7eSAapo Vienamo }; 8526641af7eSAapo Vienamo 8536641af7eSAapo Vienamo sdmmc3_3v3: sdmmc3-3v3 { 8546641af7eSAapo Vienamo pins = "sdmmc3"; 8556641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>; 8566641af7eSAapo Vienamo }; 8576641af7eSAapo Vienamo 8586641af7eSAapo Vienamo sdmmc3_1v8: sdmmc3-1v8 { 8596641af7eSAapo Vienamo pins = "sdmmc3"; 8606641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>; 8616641af7eSAapo Vienamo }; 862871be845SManikanta Maddireddy 863871be845SManikanta Maddireddy pex_dpd_disable: pex_en { 864871be845SManikanta Maddireddy pex-dpd-disable { 865871be845SManikanta Maddireddy pins = "pex-bias", "pex-clk1", "pex-clk2"; 866871be845SManikanta Maddireddy low-power-disable; 867871be845SManikanta Maddireddy }; 868871be845SManikanta Maddireddy }; 869871be845SManikanta Maddireddy 870871be845SManikanta Maddireddy pex_dpd_enable: pex_dis { 871871be845SManikanta Maddireddy pex-dpd-enable { 872871be845SManikanta Maddireddy pins = "pex-bias", "pex-clk1", "pex-clk2"; 873871be845SManikanta Maddireddy low-power-enable; 874871be845SManikanta Maddireddy }; 875871be845SManikanta Maddireddy }; 876742af7e7SThierry Reding }; 877742af7e7SThierry Reding 878be70771dSThierry Reding fuse@7000f800 { 879742af7e7SThierry Reding compatible = "nvidia,tegra210-efuse"; 880742af7e7SThierry Reding reg = <0x0 0x7000f800 0x0 0x400>; 881742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_FUSE>; 882742af7e7SThierry Reding clock-names = "fuse"; 883742af7e7SThierry Reding resets = <&tegra_car 39>; 884742af7e7SThierry Reding reset-names = "fuse"; 885742af7e7SThierry Reding }; 886742af7e7SThierry Reding 887be70771dSThierry Reding mc: memory-controller@70019000 { 888742af7e7SThierry Reding compatible = "nvidia,tegra210-mc"; 889742af7e7SThierry Reding reg = <0x0 0x70019000 0x0 0x1000>; 890742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MC>; 891742af7e7SThierry Reding clock-names = "mc"; 892742af7e7SThierry Reding 893742af7e7SThierry Reding interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 894742af7e7SThierry Reding 895742af7e7SThierry Reding #iommu-cells = <1>; 896742af7e7SThierry Reding }; 897742af7e7SThierry Reding 8986cb60ec4SPreetham Ramchandra sata@70020000 { 8996cb60ec4SPreetham Ramchandra compatible = "nvidia,tegra210-ahci"; 9006cb60ec4SPreetham Ramchandra reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */ 9016cb60ec4SPreetham Ramchandra <0x0 0x70020000 0x0 0x7000>, /* SATA */ 9026cb60ec4SPreetham Ramchandra <0x0 0x70001100 0x0 0x1000>; /* SATA AUX */ 9036cb60ec4SPreetham Ramchandra interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 9046cb60ec4SPreetham Ramchandra clocks = <&tegra_car TEGRA210_CLK_SATA>, 9056cb60ec4SPreetham Ramchandra <&tegra_car TEGRA210_CLK_SATA_OOB>; 9066cb60ec4SPreetham Ramchandra clock-names = "sata", "sata-oob"; 9076cb60ec4SPreetham Ramchandra resets = <&tegra_car 124>, 9086cb60ec4SPreetham Ramchandra <&tegra_car 123>, 9096cb60ec4SPreetham Ramchandra <&tegra_car 129>; 9106cb60ec4SPreetham Ramchandra reset-names = "sata", "sata-oob", "sata-cold"; 9116cb60ec4SPreetham Ramchandra status = "disabled"; 9126cb60ec4SPreetham Ramchandra }; 9136cb60ec4SPreetham Ramchandra 914be70771dSThierry Reding hda@70030000 { 915742af7e7SThierry Reding compatible = "nvidia,tegra210-hda", "nvidia,tegra30-hda"; 916742af7e7SThierry Reding reg = <0x0 0x70030000 0x0 0x10000>; 917742af7e7SThierry Reding interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 918742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HDA>, 919742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2HDMI>, 920742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2CODEC_2X>; 921742af7e7SThierry Reding clock-names = "hda", "hda2hdmi", "hda2codec_2x"; 922742af7e7SThierry Reding resets = <&tegra_car 125>, /* hda */ 923742af7e7SThierry Reding <&tegra_car 128>, /* hda2hdmi */ 924742af7e7SThierry Reding <&tegra_car 111>; /* hda2codec_2x */ 925742af7e7SThierry Reding reset-names = "hda", "hda2hdmi", "hda2codec_2x"; 926742af7e7SThierry Reding status = "disabled"; 927742af7e7SThierry Reding }; 928742af7e7SThierry Reding 929e7a99ac2SThierry Reding usb@70090000 { 930e7a99ac2SThierry Reding compatible = "nvidia,tegra210-xusb"; 931e7a99ac2SThierry Reding reg = <0x0 0x70090000 0x0 0x8000>, 932e7a99ac2SThierry Reding <0x0 0x70098000 0x0 0x1000>, 933e7a99ac2SThierry Reding <0x0 0x70099000 0x0 0x1000>; 934e7a99ac2SThierry Reding reg-names = "hcd", "fpci", "ipfs"; 935e7a99ac2SThierry Reding 936e7a99ac2SThierry Reding interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 9379168e1dbSJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 938e7a99ac2SThierry Reding 939e7a99ac2SThierry Reding clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>, 940e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>, 941e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>, 942e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS>, 943e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>, 944e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>, 945e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, 946e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, 947e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U_480M>, 948e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_CLK_M>, 949e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>; 950e7a99ac2SThierry Reding clock-names = "xusb_host", "xusb_host_src", 951e7a99ac2SThierry Reding "xusb_falcon_src", "xusb_ss", 952e7a99ac2SThierry Reding "xusb_ss_div2", "xusb_ss_src", 953e7a99ac2SThierry Reding "xusb_hs_src", "xusb_fs_src", 954e7a99ac2SThierry Reding "pll_u_480m", "clk_m", "pll_e"; 955e7a99ac2SThierry Reding resets = <&tegra_car 89>, <&tegra_car 156>, 956e7a99ac2SThierry Reding <&tegra_car 143>; 957e7a99ac2SThierry Reding reset-names = "xusb_host", "xusb_ss", "xusb_src"; 95836ec29f7SJon Hunter power-domains = <&pd_xusbhost>, <&pd_xusbss>; 95936ec29f7SJon Hunter power-domain-names = "xusb_host", "xusb_ss"; 960e7a99ac2SThierry Reding 961e7a99ac2SThierry Reding nvidia,xusb-padctl = <&padctl>; 962e7a99ac2SThierry Reding 963e7a99ac2SThierry Reding status = "disabled"; 964e7a99ac2SThierry Reding }; 965e7a99ac2SThierry Reding 9664e07ac90SThierry Reding padctl: padctl@7009f000 { 9674e07ac90SThierry Reding compatible = "nvidia,tegra210-xusb-padctl"; 9684e07ac90SThierry Reding reg = <0x0 0x7009f000 0x0 0x1000>; 9694e07ac90SThierry Reding resets = <&tegra_car 142>; 9704e07ac90SThierry Reding reset-names = "padctl"; 9714e07ac90SThierry Reding 9724e07ac90SThierry Reding status = "disabled"; 9734e07ac90SThierry Reding 9744e07ac90SThierry Reding pads { 9754e07ac90SThierry Reding usb2 { 9764e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>; 9774e07ac90SThierry Reding clock-names = "trk"; 9784e07ac90SThierry Reding status = "disabled"; 9794e07ac90SThierry Reding 9804e07ac90SThierry Reding lanes { 9814e07ac90SThierry Reding usb2-0 { 9824e07ac90SThierry Reding status = "disabled"; 9834e07ac90SThierry Reding #phy-cells = <0>; 9844e07ac90SThierry Reding }; 9854e07ac90SThierry Reding 9864e07ac90SThierry Reding usb2-1 { 9874e07ac90SThierry Reding status = "disabled"; 9884e07ac90SThierry Reding #phy-cells = <0>; 9894e07ac90SThierry Reding }; 9904e07ac90SThierry Reding 9914e07ac90SThierry Reding usb2-2 { 9924e07ac90SThierry Reding status = "disabled"; 9934e07ac90SThierry Reding #phy-cells = <0>; 9944e07ac90SThierry Reding }; 9954e07ac90SThierry Reding 9964e07ac90SThierry Reding usb2-3 { 9974e07ac90SThierry Reding status = "disabled"; 9984e07ac90SThierry Reding #phy-cells = <0>; 9994e07ac90SThierry Reding }; 10004e07ac90SThierry Reding }; 10014e07ac90SThierry Reding }; 10024e07ac90SThierry Reding 10034e07ac90SThierry Reding hsic { 10044e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>; 10054e07ac90SThierry Reding clock-names = "trk"; 10064e07ac90SThierry Reding status = "disabled"; 10074e07ac90SThierry Reding 10084e07ac90SThierry Reding lanes { 10094e07ac90SThierry Reding hsic-0 { 10104e07ac90SThierry Reding status = "disabled"; 10114e07ac90SThierry Reding #phy-cells = <0>; 10124e07ac90SThierry Reding }; 10134e07ac90SThierry Reding 10144e07ac90SThierry Reding hsic-1 { 10154e07ac90SThierry Reding status = "disabled"; 10164e07ac90SThierry Reding #phy-cells = <0>; 10174e07ac90SThierry Reding }; 10184e07ac90SThierry Reding }; 10194e07ac90SThierry Reding }; 10204e07ac90SThierry Reding 10214e07ac90SThierry Reding pcie { 10224e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 10234e07ac90SThierry Reding clock-names = "pll"; 10244e07ac90SThierry Reding resets = <&tegra_car 205>; 10254e07ac90SThierry Reding reset-names = "phy"; 10264e07ac90SThierry Reding status = "disabled"; 10274e07ac90SThierry Reding 10284e07ac90SThierry Reding lanes { 10294e07ac90SThierry Reding pcie-0 { 10304e07ac90SThierry Reding status = "disabled"; 10314e07ac90SThierry Reding #phy-cells = <0>; 10324e07ac90SThierry Reding }; 10334e07ac90SThierry Reding 10344e07ac90SThierry Reding pcie-1 { 10354e07ac90SThierry Reding status = "disabled"; 10364e07ac90SThierry Reding #phy-cells = <0>; 10374e07ac90SThierry Reding }; 10384e07ac90SThierry Reding 10394e07ac90SThierry Reding pcie-2 { 10404e07ac90SThierry Reding status = "disabled"; 10414e07ac90SThierry Reding #phy-cells = <0>; 10424e07ac90SThierry Reding }; 10434e07ac90SThierry Reding 10444e07ac90SThierry Reding pcie-3 { 10454e07ac90SThierry Reding status = "disabled"; 10464e07ac90SThierry Reding #phy-cells = <0>; 10474e07ac90SThierry Reding }; 10484e07ac90SThierry Reding 10494e07ac90SThierry Reding pcie-4 { 10504e07ac90SThierry Reding status = "disabled"; 10514e07ac90SThierry Reding #phy-cells = <0>; 10524e07ac90SThierry Reding }; 10534e07ac90SThierry Reding 10544e07ac90SThierry Reding pcie-5 { 10554e07ac90SThierry Reding status = "disabled"; 10564e07ac90SThierry Reding #phy-cells = <0>; 10574e07ac90SThierry Reding }; 10584e07ac90SThierry Reding 10594e07ac90SThierry Reding pcie-6 { 10604e07ac90SThierry Reding status = "disabled"; 10614e07ac90SThierry Reding #phy-cells = <0>; 10624e07ac90SThierry Reding }; 10634e07ac90SThierry Reding }; 10644e07ac90SThierry Reding }; 10654e07ac90SThierry Reding 10664e07ac90SThierry Reding sata { 10674e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 10684e07ac90SThierry Reding clock-names = "pll"; 10694e07ac90SThierry Reding resets = <&tegra_car 204>; 10704e07ac90SThierry Reding reset-names = "phy"; 10714e07ac90SThierry Reding status = "disabled"; 10724e07ac90SThierry Reding 10734e07ac90SThierry Reding lanes { 10744e07ac90SThierry Reding sata-0 { 10754e07ac90SThierry Reding status = "disabled"; 10764e07ac90SThierry Reding #phy-cells = <0>; 10774e07ac90SThierry Reding }; 10784e07ac90SThierry Reding }; 10794e07ac90SThierry Reding }; 10804e07ac90SThierry Reding }; 10814e07ac90SThierry Reding 10824e07ac90SThierry Reding ports { 10834e07ac90SThierry Reding usb2-0 { 10844e07ac90SThierry Reding status = "disabled"; 10854e07ac90SThierry Reding }; 10864e07ac90SThierry Reding 10874e07ac90SThierry Reding usb2-1 { 10884e07ac90SThierry Reding status = "disabled"; 10894e07ac90SThierry Reding }; 10904e07ac90SThierry Reding 10914e07ac90SThierry Reding usb2-2 { 10924e07ac90SThierry Reding status = "disabled"; 10934e07ac90SThierry Reding }; 10944e07ac90SThierry Reding 10954e07ac90SThierry Reding usb2-3 { 10964e07ac90SThierry Reding status = "disabled"; 10974e07ac90SThierry Reding }; 10984e07ac90SThierry Reding 10994e07ac90SThierry Reding hsic-0 { 11004e07ac90SThierry Reding status = "disabled"; 11014e07ac90SThierry Reding }; 11024e07ac90SThierry Reding 11034e07ac90SThierry Reding usb3-0 { 11044e07ac90SThierry Reding status = "disabled"; 11054e07ac90SThierry Reding }; 11064e07ac90SThierry Reding 11074e07ac90SThierry Reding usb3-1 { 11084e07ac90SThierry Reding status = "disabled"; 11094e07ac90SThierry Reding }; 11104e07ac90SThierry Reding 11114e07ac90SThierry Reding usb3-2 { 11124e07ac90SThierry Reding status = "disabled"; 11134e07ac90SThierry Reding }; 11144e07ac90SThierry Reding 11154e07ac90SThierry Reding usb3-3 { 11164e07ac90SThierry Reding status = "disabled"; 11174e07ac90SThierry Reding }; 11184e07ac90SThierry Reding }; 11194e07ac90SThierry Reding }; 11204e07ac90SThierry Reding 1121be70771dSThierry Reding sdhci@700b0000 { 1122742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1123742af7e7SThierry Reding reg = <0x0 0x700b0000 0x0 0x200>; 1124742af7e7SThierry Reding interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1125742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC1>; 1126742af7e7SThierry Reding clock-names = "sdhci"; 1127742af7e7SThierry Reding resets = <&tegra_car 14>; 1128742af7e7SThierry Reding reset-names = "sdhci"; 11294e0f1229SSowjanya Komatineni pinctrl-names = "sdmmc-3v3", "sdmmc-1v8", 11304e0f1229SSowjanya Komatineni "sdmmc-3v3-drv", "sdmmc-1v8-drv"; 11316641af7eSAapo Vienamo pinctrl-0 = <&sdmmc1_3v3>; 11326641af7eSAapo Vienamo pinctrl-1 = <&sdmmc1_1v8>; 11334e0f1229SSowjanya Komatineni pinctrl-2 = <&sdmmc1_3v3_drv>; 11344e0f1229SSowjanya Komatineni pinctrl-3 = <&sdmmc1_1v8_drv>; 11351ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>; 11361ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>; 11371ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>; 11381ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>; 113963af8bcdSAapo Vienamo nvidia,default-tap = <0x2>; 114063af8bcdSAapo Vienamo nvidia,default-trim = <0x4>; 1141918f9671SAapo Vienamo assigned-clocks = <&tegra_car TEGRA210_CLK_SDMMC4>, 1142918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>, 1143918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4>; 1144918f9671SAapo Vienamo assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 1145918f9671SAapo Vienamo assigned-clock-rates = <200000000>, <1000000000>, <1000000000>; 1146742af7e7SThierry Reding status = "disabled"; 1147742af7e7SThierry Reding }; 1148742af7e7SThierry Reding 1149be70771dSThierry Reding sdhci@700b0200 { 1150742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1151742af7e7SThierry Reding reg = <0x0 0x700b0200 0x0 0x200>; 1152742af7e7SThierry Reding interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1153742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC2>; 1154742af7e7SThierry Reding clock-names = "sdhci"; 1155742af7e7SThierry Reding resets = <&tegra_car 9>; 1156742af7e7SThierry Reding reset-names = "sdhci"; 11574e0f1229SSowjanya Komatineni pinctrl-names = "sdmmc-1v8-drv"; 11584e0f1229SSowjanya Komatineni pinctrl-0 = <&sdmmc2_1v8_drv>; 11591ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x05>; 11601ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x05>; 116163af8bcdSAapo Vienamo nvidia,default-tap = <0x8>; 116263af8bcdSAapo Vienamo nvidia,default-trim = <0x0>; 1163742af7e7SThierry Reding status = "disabled"; 1164742af7e7SThierry Reding }; 1165742af7e7SThierry Reding 1166be70771dSThierry Reding sdhci@700b0400 { 1167742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1168742af7e7SThierry Reding reg = <0x0 0x700b0400 0x0 0x200>; 1169742af7e7SThierry Reding interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 1170742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC3>; 1171742af7e7SThierry Reding clock-names = "sdhci"; 1172742af7e7SThierry Reding resets = <&tegra_car 69>; 1173742af7e7SThierry Reding reset-names = "sdhci"; 11744e0f1229SSowjanya Komatineni pinctrl-names = "sdmmc-3v3", "sdmmc-1v8", 11754e0f1229SSowjanya Komatineni "sdmmc-3v3-drv", "sdmmc-1v8-drv"; 11766641af7eSAapo Vienamo pinctrl-0 = <&sdmmc3_3v3>; 11776641af7eSAapo Vienamo pinctrl-1 = <&sdmmc3_1v8>; 11784e0f1229SSowjanya Komatineni pinctrl-2 = <&sdmmc3_3v3_drv>; 11794e0f1229SSowjanya Komatineni pinctrl-3 = <&sdmmc3_1v8_drv>; 11801ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>; 11811ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>; 11821ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>; 11831ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>; 118463af8bcdSAapo Vienamo nvidia,default-tap = <0x3>; 118563af8bcdSAapo Vienamo nvidia,default-trim = <0x3>; 1186742af7e7SThierry Reding status = "disabled"; 1187742af7e7SThierry Reding }; 1188742af7e7SThierry Reding 1189be70771dSThierry Reding sdhci@700b0600 { 1190742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1191742af7e7SThierry Reding reg = <0x0 0x700b0600 0x0 0x200>; 1192742af7e7SThierry Reding interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 1193742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC4>; 1194742af7e7SThierry Reding clock-names = "sdhci"; 1195742af7e7SThierry Reding resets = <&tegra_car 15>; 1196742af7e7SThierry Reding reset-names = "sdhci"; 11974e0f1229SSowjanya Komatineni pinctrl-names = "sdmmc-3v3-drv", "sdmmc-1v8-drv"; 11984e0f1229SSowjanya Komatineni pinctrl-0 = <&sdmmc4_1v8_drv>; 11994e0f1229SSowjanya Komatineni pinctrl-1 = <&sdmmc4_1v8_drv>; 12001ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x05>; 12011ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x05>; 120263af8bcdSAapo Vienamo nvidia,default-tap = <0x8>; 120363af8bcdSAapo Vienamo nvidia,default-trim = <0x0>; 1204918f9671SAapo Vienamo assigned-clocks = <&tegra_car TEGRA210_CLK_SDMMC4>, 1205918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 1206918f9671SAapo Vienamo assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 12075879600aSAapo Vienamo nvidia,dqs-trim = <40>; 1208d5d6b468SAapo Vienamo mmc-hs400-1_8v; 1209742af7e7SThierry Reding status = "disabled"; 1210742af7e7SThierry Reding }; 1211742af7e7SThierry Reding 1212e74db5a5SNagarjuna Kristam usb@700d0000 { 1213e74db5a5SNagarjuna Kristam compatible = "nvidia,tegra210-xudc"; 1214e74db5a5SNagarjuna Kristam reg = <0x0 0x700d0000 0x0 0x8000>, 1215e74db5a5SNagarjuna Kristam <0x0 0x700d8000 0x0 0x1000>, 1216e74db5a5SNagarjuna Kristam <0x0 0x700d9000 0x0 0x1000>; 1217e74db5a5SNagarjuna Kristam reg-names = "base", "fpci", "ipfs"; 1218e74db5a5SNagarjuna Kristam interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 1219e74db5a5SNagarjuna Kristam clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>, 1220e74db5a5SNagarjuna Kristam <&tegra_car TEGRA210_CLK_XUSB_SS>, 1221e74db5a5SNagarjuna Kristam <&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>, 1222e74db5a5SNagarjuna Kristam <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, 1223e74db5a5SNagarjuna Kristam <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>; 1224e74db5a5SNagarjuna Kristam clock-names = "dev", "ss", "ss_src", "fs_src", "hs_src"; 1225e74db5a5SNagarjuna Kristam power-domains = <&pd_xusbdev>, <&pd_xusbss>; 1226e74db5a5SNagarjuna Kristam power-domain-names = "dev", "ss"; 1227e74db5a5SNagarjuna Kristam nvidia,xusb-padctl = <&padctl>; 1228e74db5a5SNagarjuna Kristam status = "disabled"; 1229e74db5a5SNagarjuna Kristam }; 1230e74db5a5SNagarjuna Kristam 1231be70771dSThierry Reding mipi: mipi@700e3000 { 1232742af7e7SThierry Reding compatible = "nvidia,tegra210-mipi"; 1233742af7e7SThierry Reding reg = <0x0 0x700e3000 0x0 0x100>; 1234742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MIPI_CAL>; 1235742af7e7SThierry Reding clock-names = "mipi-cal"; 123696d1f078SJon Hunter power-domains = <&pd_sor>; 1237742af7e7SThierry Reding #nvidia,mipi-calibrate-cells = <1>; 1238742af7e7SThierry Reding }; 1239742af7e7SThierry Reding 12402ceed593SJoseph Lo dfll: clock@70110000 { 12412ceed593SJoseph Lo compatible = "nvidia,tegra210-dfll"; 12422ceed593SJoseph Lo reg = <0 0x70110000 0 0x100>, /* DFLL control */ 12432ceed593SJoseph Lo <0 0x70110000 0 0x100>, /* I2C output control */ 12442ceed593SJoseph Lo <0 0x70110100 0 0x100>, /* Integrated I2C controller */ 12452ceed593SJoseph Lo <0 0x70110200 0 0x100>; /* Look-up table RAM */ 12462ceed593SJoseph Lo interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 12472ceed593SJoseph Lo clocks = <&tegra_car TEGRA210_CLK_DFLL_SOC>, 12482ceed593SJoseph Lo <&tegra_car TEGRA210_CLK_DFLL_REF>, 12492ceed593SJoseph Lo <&tegra_car TEGRA210_CLK_I2C5>; 12502ceed593SJoseph Lo clock-names = "soc", "ref", "i2c"; 12512ceed593SJoseph Lo resets = <&tegra_car TEGRA210_RST_DFLL_DVCO>; 12522ceed593SJoseph Lo reset-names = "dvco"; 12532ceed593SJoseph Lo #clock-cells = <0>; 12542ceed593SJoseph Lo clock-output-names = "dfllCPU_out"; 12552ceed593SJoseph Lo status = "disabled"; 12562ceed593SJoseph Lo }; 12572ceed593SJoseph Lo 12580f133090SJon Hunter aconnect@702c0000 { 12590f133090SJon Hunter compatible = "nvidia,tegra210-aconnect"; 12600f133090SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 12610f133090SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 12620f133090SJon Hunter clock-names = "ape", "apb2ape"; 12630f133090SJon Hunter power-domains = <&pd_audio>; 12640f133090SJon Hunter #address-cells = <1>; 12650f133090SJon Hunter #size-cells = <1>; 12660f133090SJon Hunter ranges = <0x702c0000 0x0 0x702c0000 0x00040000>; 12670f133090SJon Hunter status = "disabled"; 1268bcdbde43SJon Hunter 126919e61213SJon Hunter adma: dma@702e2000 { 127019e61213SJon Hunter compatible = "nvidia,tegra210-adma"; 127119e61213SJon Hunter reg = <0x702e2000 0x2000>; 127219e61213SJon Hunter interrupt-parent = <&agic>; 127319e61213SJon Hunter interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, 127419e61213SJon Hunter <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, 127519e61213SJon Hunter <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, 127619e61213SJon Hunter <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, 127719e61213SJon Hunter <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, 127819e61213SJon Hunter <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 127919e61213SJon Hunter <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, 128019e61213SJon Hunter <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, 128119e61213SJon Hunter <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 128219e61213SJon Hunter <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 128319e61213SJon Hunter <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 128419e61213SJon Hunter <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 128519e61213SJon Hunter <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 128619e61213SJon Hunter <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 128719e61213SJon Hunter <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 128819e61213SJon Hunter <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 128919e61213SJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 129019e61213SJon Hunter <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 129119e61213SJon Hunter <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 129219e61213SJon Hunter <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 129319e61213SJon Hunter <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 129419e61213SJon Hunter <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 129519e61213SJon Hunter #dma-cells = <1>; 129619e61213SJon Hunter clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; 129719e61213SJon Hunter clock-names = "d_audio"; 129819e61213SJon Hunter status = "disabled"; 129919e61213SJon Hunter }; 130019e61213SJon Hunter 1301bcdbde43SJon Hunter agic: agic@702f9000 { 1302bcdbde43SJon Hunter compatible = "nvidia,tegra210-agic"; 1303bcdbde43SJon Hunter #interrupt-cells = <3>; 1304bcdbde43SJon Hunter interrupt-controller; 1305ba24eee6SJon Hunter reg = <0x702f9000 0x1000>, 1306bcdbde43SJon Hunter <0x702fa000 0x2000>; 1307bcdbde43SJon Hunter interrupts = <GIC_SPI 102 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 1308bcdbde43SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>; 1309bcdbde43SJon Hunter clock-names = "clk"; 1310bcdbde43SJon Hunter status = "disabled"; 1311bcdbde43SJon Hunter }; 13120f133090SJon Hunter }; 13130f133090SJon Hunter 1314be70771dSThierry Reding spi@70410000 { 1315742af7e7SThierry Reding compatible = "nvidia,tegra210-qspi"; 1316742af7e7SThierry Reding reg = <0x0 0x70410000 0x0 0x1000>; 1317742af7e7SThierry Reding interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 1318742af7e7SThierry Reding #address-cells = <1>; 1319742af7e7SThierry Reding #size-cells = <0>; 1320742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_QSPI>; 1321742af7e7SThierry Reding clock-names = "qspi"; 1322742af7e7SThierry Reding resets = <&tegra_car 211>; 1323742af7e7SThierry Reding reset-names = "qspi"; 1324742af7e7SThierry Reding dmas = <&apbdma 5>, <&apbdma 5>; 1325742af7e7SThierry Reding dma-names = "rx", "tx"; 1326742af7e7SThierry Reding status = "disabled"; 1327742af7e7SThierry Reding }; 1328742af7e7SThierry Reding 1329be70771dSThierry Reding usb@7d000000 { 1330742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1331742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>; 1332742af7e7SThierry Reding interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 1333742af7e7SThierry Reding phy_type = "utmi"; 1334742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>; 1335742af7e7SThierry Reding clock-names = "usb"; 1336742af7e7SThierry Reding resets = <&tegra_car 22>; 1337742af7e7SThierry Reding reset-names = "usb"; 1338742af7e7SThierry Reding nvidia,phy = <&phy1>; 1339742af7e7SThierry Reding status = "disabled"; 1340742af7e7SThierry Reding }; 1341742af7e7SThierry Reding 1342be70771dSThierry Reding phy1: usb-phy@7d000000 { 1343742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1344742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>, 1345742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1346742af7e7SThierry Reding phy_type = "utmi"; 1347742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>, 1348742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1349742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1350742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1351742af7e7SThierry Reding resets = <&tegra_car 22>, <&tegra_car 22>; 1352742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1353742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1354742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1355742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1356742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1357742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1358742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1359742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1360742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1361742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1362742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1363742af7e7SThierry Reding nvidia,has-utmi-pad-registers; 1364742af7e7SThierry Reding status = "disabled"; 1365742af7e7SThierry Reding }; 1366742af7e7SThierry Reding 1367be70771dSThierry Reding usb@7d004000 { 1368742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1369742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>; 1370742af7e7SThierry Reding interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1371742af7e7SThierry Reding phy_type = "utmi"; 1372742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>; 1373742af7e7SThierry Reding clock-names = "usb"; 1374742af7e7SThierry Reding resets = <&tegra_car 58>; 1375742af7e7SThierry Reding reset-names = "usb"; 1376742af7e7SThierry Reding nvidia,phy = <&phy2>; 1377742af7e7SThierry Reding status = "disabled"; 1378742af7e7SThierry Reding }; 1379742af7e7SThierry Reding 1380be70771dSThierry Reding phy2: usb-phy@7d004000 { 1381742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1382742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>, 1383742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1384742af7e7SThierry Reding phy_type = "utmi"; 1385742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>, 1386742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1387742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1388742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1389742af7e7SThierry Reding resets = <&tegra_car 58>, <&tegra_car 22>; 1390742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1391742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1392742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1393742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1394742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1395742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1396742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1397742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1398742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1399742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1400742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1401742af7e7SThierry Reding status = "disabled"; 1402742af7e7SThierry Reding }; 1403742af7e7SThierry Reding 1404742af7e7SThierry Reding cpus { 1405742af7e7SThierry Reding #address-cells = <1>; 1406742af7e7SThierry Reding #size-cells = <0>; 1407742af7e7SThierry Reding 1408742af7e7SThierry Reding cpu@0 { 1409742af7e7SThierry Reding device_type = "cpu"; 1410742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1411742af7e7SThierry Reding reg = <0>; 141243b9b402SJoseph Lo clocks = <&tegra_car TEGRA210_CLK_CCLK_G>, 141343b9b402SJoseph Lo <&tegra_car TEGRA210_CLK_PLL_X>, 141443b9b402SJoseph Lo <&tegra_car TEGRA210_CLK_PLL_P_OUT4>, 141543b9b402SJoseph Lo <&dfll>; 141643b9b402SJoseph Lo clock-names = "cpu_g", "pll_x", "pll_p", "dfll"; 141743b9b402SJoseph Lo clock-latency = <300000>; 1418da77c6d9SJoseph Lo cpu-idle-states = <&CPU_SLEEP>; 14196c00cac1SJoseph Lo next-level-cache = <&L2>; 1420742af7e7SThierry Reding }; 1421742af7e7SThierry Reding 1422742af7e7SThierry Reding cpu@1 { 1423742af7e7SThierry Reding device_type = "cpu"; 1424742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1425742af7e7SThierry Reding reg = <1>; 1426da77c6d9SJoseph Lo cpu-idle-states = <&CPU_SLEEP>; 14276c00cac1SJoseph Lo next-level-cache = <&L2>; 1428742af7e7SThierry Reding }; 1429742af7e7SThierry Reding 1430742af7e7SThierry Reding cpu@2 { 1431742af7e7SThierry Reding device_type = "cpu"; 1432742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1433742af7e7SThierry Reding reg = <2>; 1434da77c6d9SJoseph Lo cpu-idle-states = <&CPU_SLEEP>; 14356c00cac1SJoseph Lo next-level-cache = <&L2>; 1436742af7e7SThierry Reding }; 1437742af7e7SThierry Reding 1438742af7e7SThierry Reding cpu@3 { 1439742af7e7SThierry Reding device_type = "cpu"; 1440742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1441742af7e7SThierry Reding reg = <3>; 1442da77c6d9SJoseph Lo cpu-idle-states = <&CPU_SLEEP>; 14436c00cac1SJoseph Lo next-level-cache = <&L2>; 1444da77c6d9SJoseph Lo }; 1445da77c6d9SJoseph Lo 1446da77c6d9SJoseph Lo idle-states { 1447da77c6d9SJoseph Lo entry-method = "psci"; 1448da77c6d9SJoseph Lo 1449da77c6d9SJoseph Lo CPU_SLEEP: cpu-sleep { 1450da77c6d9SJoseph Lo compatible = "arm,idle-state"; 1451da77c6d9SJoseph Lo arm,psci-suspend-param = <0x40000007>; 1452da77c6d9SJoseph Lo entry-latency-us = <100>; 1453da77c6d9SJoseph Lo exit-latency-us = <30>; 1454da77c6d9SJoseph Lo min-residency-us = <1000>; 1455da77c6d9SJoseph Lo wakeup-latency-us = <130>; 1456da77c6d9SJoseph Lo idle-state-name = "cpu-sleep"; 1457da77c6d9SJoseph Lo status = "disabled"; 1458da77c6d9SJoseph Lo }; 1459742af7e7SThierry Reding }; 14606c00cac1SJoseph Lo 14616c00cac1SJoseph Lo L2: l2-cache { 14626c00cac1SJoseph Lo compatible = "cache"; 14636c00cac1SJoseph Lo }; 1464742af7e7SThierry Reding }; 1465742af7e7SThierry Reding 1466264064abSThierry Reding pmu { 1467264064abSThierry Reding compatible = "arm,armv8-pmuv3"; 1468264064abSThierry Reding interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, 1469264064abSThierry Reding <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, 1470264064abSThierry Reding <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>, 1471264064abSThierry Reding <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 1472264064abSThierry Reding interrupt-affinity = <&{/cpus/cpu@0} &{/cpus/cpu@1} 1473264064abSThierry Reding &{/cpus/cpu@2} &{/cpus/cpu@3}>; 1474264064abSThierry Reding }; 1475264064abSThierry Reding 1476742af7e7SThierry Reding timer { 1477742af7e7SThierry Reding compatible = "arm,armv8-timer"; 1478742af7e7SThierry Reding interrupts = <GIC_PPI 13 1479742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1480742af7e7SThierry Reding <GIC_PPI 14 1481742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1482742af7e7SThierry Reding <GIC_PPI 11 1483742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1484742af7e7SThierry Reding <GIC_PPI 10 1485742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 1486742af7e7SThierry Reding interrupt-parent = <&gic>; 14876b9e263bSThierry Reding arm,no-tick-in-suspend; 1488742af7e7SThierry Reding }; 1489e2bed1ebSWei Ni 1490e2bed1ebSWei Ni soctherm: thermal-sensor@700e2000 { 1491e2bed1ebSWei Ni compatible = "nvidia,tegra210-soctherm"; 1492cbd0f000SWei Ni reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */ 1493cbd0f000SWei Ni 0x0 0x60006000 0x0 0x400>; /* CAR reg_base */ 1494cbd0f000SWei Ni reg-names = "soctherm-reg", "car-reg"; 149544ff822cSThierry Reding interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 149644ff822cSThierry Reding <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 149744ff822cSThierry Reding interrupt-names = "thermal", "edp"; 1498e2bed1ebSWei Ni clocks = <&tegra_car TEGRA210_CLK_TSENSOR>, 1499e2bed1ebSWei Ni <&tegra_car TEGRA210_CLK_SOC_THERM>; 1500e2bed1ebSWei Ni clock-names = "tsensor", "soctherm"; 1501e2bed1ebSWei Ni resets = <&tegra_car 78>; 1502e2bed1ebSWei Ni reset-names = "soctherm"; 1503e2bed1ebSWei Ni #thermal-sensor-cells = <1>; 1504cbd0f000SWei Ni 1505cbd0f000SWei Ni throttle-cfgs { 1506cbd0f000SWei Ni throttle_heavy: heavy { 1507cbd0f000SWei Ni nvidia,priority = <100>; 1508cbd0f000SWei Ni nvidia,cpu-throt-percent = <85>; 1509cbd0f000SWei Ni 1510cbd0f000SWei Ni #cooling-cells = <2>; 1511cbd0f000SWei Ni }; 1512cbd0f000SWei Ni }; 1513e2bed1ebSWei Ni }; 1514e2bed1ebSWei Ni 1515e2bed1ebSWei Ni thermal-zones { 1516e2bed1ebSWei Ni cpu { 1517e2bed1ebSWei Ni polling-delay-passive = <1000>; 1518e2bed1ebSWei Ni polling-delay = <0>; 1519e2bed1ebSWei Ni 1520e2bed1ebSWei Ni thermal-sensors = 1521e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; 15225e03f663SWei Ni 15235e03f663SWei Ni trips { 15245e03f663SWei Ni cpu-shutdown-trip { 15255e03f663SWei Ni temperature = <102500>; 15265e03f663SWei Ni hysteresis = <0>; 15275e03f663SWei Ni type = "critical"; 15285e03f663SWei Ni }; 1529cbd0f000SWei Ni 1530cbd0f000SWei Ni cpu_throttle_trip: throttle-trip { 1531cbd0f000SWei Ni temperature = <98500>; 1532cbd0f000SWei Ni hysteresis = <1000>; 1533cbd0f000SWei Ni type = "hot"; 1534cbd0f000SWei Ni }; 15355e03f663SWei Ni }; 15365e03f663SWei Ni 15375e03f663SWei Ni cooling-maps { 1538cbd0f000SWei Ni map0 { 1539cbd0f000SWei Ni trip = <&cpu_throttle_trip>; 1540cbd0f000SWei Ni cooling-device = <&throttle_heavy 1 1>; 1541cbd0f000SWei Ni }; 15425e03f663SWei Ni }; 1543e2bed1ebSWei Ni }; 154424fc3363SThierry Reding 1545e2bed1ebSWei Ni mem { 1546e2bed1ebSWei Ni polling-delay-passive = <0>; 1547e2bed1ebSWei Ni polling-delay = <0>; 1548e2bed1ebSWei Ni 1549e2bed1ebSWei Ni thermal-sensors = 1550e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; 15515e03f663SWei Ni 15525e03f663SWei Ni trips { 15535e03f663SWei Ni mem-shutdown-trip { 15545e03f663SWei Ni temperature = <103000>; 15555e03f663SWei Ni hysteresis = <0>; 15565e03f663SWei Ni type = "critical"; 15575e03f663SWei Ni }; 15585e03f663SWei Ni }; 15595e03f663SWei Ni 15605e03f663SWei Ni cooling-maps { 15615e03f663SWei Ni /* 15625e03f663SWei Ni * There are currently no cooling maps, 15635e03f663SWei Ni * because there are no cooling devices. 15645e03f663SWei Ni */ 15655e03f663SWei Ni }; 1566e2bed1ebSWei Ni }; 156724fc3363SThierry Reding 1568e2bed1ebSWei Ni gpu { 1569e2bed1ebSWei Ni polling-delay-passive = <1000>; 1570e2bed1ebSWei Ni polling-delay = <0>; 1571e2bed1ebSWei Ni 1572e2bed1ebSWei Ni thermal-sensors = 1573e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; 15745e03f663SWei Ni 15755e03f663SWei Ni trips { 15765e03f663SWei Ni gpu-shutdown-trip { 15775e03f663SWei Ni temperature = <103000>; 15785e03f663SWei Ni hysteresis = <0>; 15795e03f663SWei Ni type = "critical"; 15805e03f663SWei Ni }; 1581cbd0f000SWei Ni 1582cbd0f000SWei Ni gpu_throttle_trip: throttle-trip { 1583cbd0f000SWei Ni temperature = <100000>; 1584cbd0f000SWei Ni hysteresis = <1000>; 1585cbd0f000SWei Ni type = "hot"; 1586cbd0f000SWei Ni }; 15875e03f663SWei Ni }; 15885e03f663SWei Ni 15895e03f663SWei Ni cooling-maps { 1590cbd0f000SWei Ni map0 { 1591cbd0f000SWei Ni trip = <&gpu_throttle_trip>; 1592cbd0f000SWei Ni cooling-device = <&throttle_heavy 1 1>; 1593cbd0f000SWei Ni }; 15945e03f663SWei Ni }; 1595e2bed1ebSWei Ni }; 159624fc3363SThierry Reding 1597e2bed1ebSWei Ni pllx { 1598e2bed1ebSWei Ni polling-delay-passive = <0>; 1599e2bed1ebSWei Ni polling-delay = <0>; 1600e2bed1ebSWei Ni 1601e2bed1ebSWei Ni thermal-sensors = 1602e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; 16035e03f663SWei Ni 16045e03f663SWei Ni trips { 16055e03f663SWei Ni pllx-shutdown-trip { 16065e03f663SWei Ni temperature = <103000>; 16075e03f663SWei Ni hysteresis = <0>; 16085e03f663SWei Ni type = "critical"; 16095e03f663SWei Ni }; 16105e03f663SWei Ni }; 16115e03f663SWei Ni 16125e03f663SWei Ni cooling-maps { 16135e03f663SWei Ni /* 16145e03f663SWei Ni * There are currently no cooling maps, 16155e03f663SWei Ni * because there are no cooling devices. 16165e03f663SWei Ni */ 16175e03f663SWei Ni }; 1618e2bed1ebSWei Ni }; 1619e2bed1ebSWei Ni }; 1620742af7e7SThierry Reding}; 1621