1742af7e7SThierry Reding#include <dt-bindings/clock/tegra210-car.h> 2742af7e7SThierry Reding#include <dt-bindings/gpio/tegra-gpio.h> 3742af7e7SThierry Reding#include <dt-bindings/memory/tegra210-mc.h> 4742af7e7SThierry Reding#include <dt-bindings/pinctrl/pinctrl-tegra.h> 5742af7e7SThierry Reding#include <dt-bindings/interrupt-controller/arm-gic.h> 6742af7e7SThierry Reding 7742af7e7SThierry Reding/ { 8742af7e7SThierry Reding compatible = "nvidia,tegra210"; 9742af7e7SThierry Reding interrupt-parent = <&lic>; 10742af7e7SThierry Reding #address-cells = <2>; 11742af7e7SThierry Reding #size-cells = <2>; 12742af7e7SThierry Reding 13be70771dSThierry Reding host1x@50000000 { 14742af7e7SThierry Reding compatible = "nvidia,tegra210-host1x", "simple-bus"; 15742af7e7SThierry Reding reg = <0x0 0x50000000 0x0 0x00034000>; 16742af7e7SThierry Reding interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */ 17742af7e7SThierry Reding <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */ 18742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HOST1X>; 19742af7e7SThierry Reding clock-names = "host1x"; 20742af7e7SThierry Reding resets = <&tegra_car 28>; 21742af7e7SThierry Reding reset-names = "host1x"; 22742af7e7SThierry Reding 23742af7e7SThierry Reding #address-cells = <2>; 24742af7e7SThierry Reding #size-cells = <2>; 25742af7e7SThierry Reding 26742af7e7SThierry Reding ranges = <0x0 0x54000000 0x0 0x54000000 0x0 0x01000000>; 27742af7e7SThierry Reding 28be70771dSThierry Reding dpaux1: dpaux@54040000 { 29742af7e7SThierry Reding compatible = "nvidia,tegra210-dpaux"; 30742af7e7SThierry Reding reg = <0x0 0x54040000 0x0 0x00040000>; 31742af7e7SThierry Reding interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 32742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX1>, 33742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 34742af7e7SThierry Reding clock-names = "dpaux", "parent"; 35742af7e7SThierry Reding resets = <&tegra_car 207>; 36742af7e7SThierry Reding reset-names = "dpaux"; 37742af7e7SThierry Reding status = "disabled"; 3866b2d6e9SJon Hunter 3966b2d6e9SJon Hunter state_dpaux1_aux: pinmux-aux { 4066b2d6e9SJon Hunter groups = "dpaux-io"; 4166b2d6e9SJon Hunter function = "aux"; 4266b2d6e9SJon Hunter }; 4366b2d6e9SJon Hunter 4466b2d6e9SJon Hunter state_dpaux1_i2c: pinmux-i2c { 4566b2d6e9SJon Hunter groups = "dpaux-io"; 4666b2d6e9SJon Hunter function = "i2c"; 4766b2d6e9SJon Hunter }; 4866b2d6e9SJon Hunter 4966b2d6e9SJon Hunter state_dpaux1_off: pinmux-off { 5066b2d6e9SJon Hunter groups = "dpaux-io"; 5166b2d6e9SJon Hunter function = "off"; 5266b2d6e9SJon Hunter }; 5366b2d6e9SJon Hunter 5466b2d6e9SJon Hunter i2c-bus { 5566b2d6e9SJon Hunter #address-cells = <1>; 5666b2d6e9SJon Hunter #size-cells = <0>; 5766b2d6e9SJon Hunter }; 58742af7e7SThierry Reding }; 59742af7e7SThierry Reding 60be70771dSThierry Reding vi@54080000 { 61742af7e7SThierry Reding compatible = "nvidia,tegra210-vi"; 62742af7e7SThierry Reding reg = <0x0 0x54080000 0x0 0x00040000>; 63742af7e7SThierry Reding interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 64742af7e7SThierry Reding status = "disabled"; 65742af7e7SThierry Reding }; 66742af7e7SThierry Reding 67be70771dSThierry Reding tsec@54100000 { 68742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 69742af7e7SThierry Reding reg = <0x0 0x54100000 0x0 0x00040000>; 70742af7e7SThierry Reding }; 71742af7e7SThierry Reding 72be70771dSThierry Reding dc@54200000 { 73742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 74742af7e7SThierry Reding reg = <0x0 0x54200000 0x0 0x00040000>; 75742af7e7SThierry Reding interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 76742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP1>, 77742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 78742af7e7SThierry Reding clock-names = "dc", "parent"; 79742af7e7SThierry Reding resets = <&tegra_car 27>; 80742af7e7SThierry Reding reset-names = "dc"; 81742af7e7SThierry Reding 82742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DC>; 83742af7e7SThierry Reding 84742af7e7SThierry Reding nvidia,head = <0>; 85742af7e7SThierry Reding }; 86742af7e7SThierry Reding 87be70771dSThierry Reding dc@54240000 { 88742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 89742af7e7SThierry Reding reg = <0x0 0x54240000 0x0 0x00040000>; 90742af7e7SThierry Reding interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 91742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP2>, 92742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 93742af7e7SThierry Reding clock-names = "dc", "parent"; 94742af7e7SThierry Reding resets = <&tegra_car 26>; 95742af7e7SThierry Reding reset-names = "dc"; 96742af7e7SThierry Reding 97742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DCB>; 98742af7e7SThierry Reding 99742af7e7SThierry Reding nvidia,head = <1>; 100742af7e7SThierry Reding }; 101742af7e7SThierry Reding 102be70771dSThierry Reding dsi@54300000 { 103742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 104742af7e7SThierry Reding reg = <0x0 0x54300000 0x0 0x00040000>; 105742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIA>, 106742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIALP>, 107742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 108742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 109742af7e7SThierry Reding resets = <&tegra_car 48>; 110742af7e7SThierry Reding reset-names = "dsi"; 111742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x0c0>; /* DSIA & DSIB pads */ 112742af7e7SThierry Reding 113742af7e7SThierry Reding status = "disabled"; 114742af7e7SThierry Reding 115742af7e7SThierry Reding #address-cells = <1>; 116742af7e7SThierry Reding #size-cells = <0>; 117742af7e7SThierry Reding }; 118742af7e7SThierry Reding 119be70771dSThierry Reding vic@54340000 { 120742af7e7SThierry Reding compatible = "nvidia,tegra210-vic"; 121742af7e7SThierry Reding reg = <0x0 0x54340000 0x0 0x00040000>; 122742af7e7SThierry Reding status = "disabled"; 123742af7e7SThierry Reding }; 124742af7e7SThierry Reding 125be70771dSThierry Reding nvjpg@54380000 { 126742af7e7SThierry Reding compatible = "nvidia,tegra210-nvjpg"; 127742af7e7SThierry Reding reg = <0x0 0x54380000 0x0 0x00040000>; 128742af7e7SThierry Reding status = "disabled"; 129742af7e7SThierry Reding }; 130742af7e7SThierry Reding 131be70771dSThierry Reding dsi@54400000 { 132742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 133742af7e7SThierry Reding reg = <0x0 0x54400000 0x0 0x00040000>; 134742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIB>, 135742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIBLP>, 136742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 137742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 138742af7e7SThierry Reding resets = <&tegra_car 82>; 139742af7e7SThierry Reding reset-names = "dsi"; 140742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x300>; /* DSIC & DSID pads */ 141742af7e7SThierry Reding 142742af7e7SThierry Reding status = "disabled"; 143742af7e7SThierry Reding 144742af7e7SThierry Reding #address-cells = <1>; 145742af7e7SThierry Reding #size-cells = <0>; 146742af7e7SThierry Reding }; 147742af7e7SThierry Reding 148be70771dSThierry Reding nvdec@54480000 { 149742af7e7SThierry Reding compatible = "nvidia,tegra210-nvdec"; 150742af7e7SThierry Reding reg = <0x0 0x54480000 0x0 0x00040000>; 151742af7e7SThierry Reding status = "disabled"; 152742af7e7SThierry Reding }; 153742af7e7SThierry Reding 154be70771dSThierry Reding nvenc@544c0000 { 155742af7e7SThierry Reding compatible = "nvidia,tegra210-nvenc"; 156742af7e7SThierry Reding reg = <0x0 0x544c0000 0x0 0x00040000>; 157742af7e7SThierry Reding status = "disabled"; 158742af7e7SThierry Reding }; 159742af7e7SThierry Reding 160be70771dSThierry Reding tsec@54500000 { 161742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 162742af7e7SThierry Reding reg = <0x0 0x54500000 0x0 0x00040000>; 163742af7e7SThierry Reding status = "disabled"; 164742af7e7SThierry Reding }; 165742af7e7SThierry Reding 166be70771dSThierry Reding sor@54540000 { 167742af7e7SThierry Reding compatible = "nvidia,tegra210-sor"; 168742af7e7SThierry Reding reg = <0x0 0x54540000 0x0 0x00040000>; 169742af7e7SThierry Reding interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 170742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR0>, 171742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>, 172742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 173742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 174742af7e7SThierry Reding clock-names = "sor", "parent", "dp", "safe"; 175742af7e7SThierry Reding resets = <&tegra_car 182>; 176742af7e7SThierry Reding reset-names = "sor"; 17766b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_aux>; 17866b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_i2c>; 17966b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux_off>; 18066b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 181742af7e7SThierry Reding status = "disabled"; 182742af7e7SThierry Reding }; 183742af7e7SThierry Reding 184be70771dSThierry Reding sor@54580000 { 185742af7e7SThierry Reding compatible = "nvidia,tegra210-sor1"; 186742af7e7SThierry Reding reg = <0x0 0x54580000 0x0 0x00040000>; 187742af7e7SThierry Reding interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 188742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR1>, 189237d5cc7SThierry Reding <&tegra_car TEGRA210_CLK_SOR1_SRC>, 190742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D2_OUT0>, 191742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 192742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 193237d5cc7SThierry Reding clock-names = "sor", "source", "parent", "dp", "safe"; 194742af7e7SThierry Reding resets = <&tegra_car 183>; 195742af7e7SThierry Reding reset-names = "sor"; 19666b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_aux>; 19766b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_i2c>; 19866b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux1_off>; 19966b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 200742af7e7SThierry Reding status = "disabled"; 201742af7e7SThierry Reding }; 202742af7e7SThierry Reding 203be70771dSThierry Reding dpaux: dpaux@545c0000 { 204742af7e7SThierry Reding compatible = "nvidia,tegra124-dpaux"; 205742af7e7SThierry Reding reg = <0x0 0x545c0000 0x0 0x00040000>; 206742af7e7SThierry Reding interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 207742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX>, 208742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 209742af7e7SThierry Reding clock-names = "dpaux", "parent"; 210742af7e7SThierry Reding resets = <&tegra_car 181>; 211742af7e7SThierry Reding reset-names = "dpaux"; 212742af7e7SThierry Reding status = "disabled"; 21366b2d6e9SJon Hunter 21466b2d6e9SJon Hunter state_dpaux_aux: pinmux-aux { 21566b2d6e9SJon Hunter groups = "dpaux-io"; 21666b2d6e9SJon Hunter function = "aux"; 21766b2d6e9SJon Hunter }; 21866b2d6e9SJon Hunter 21966b2d6e9SJon Hunter state_dpaux_i2c: pinmux-i2c { 22066b2d6e9SJon Hunter groups = "dpaux-io"; 22166b2d6e9SJon Hunter function = "i2c"; 22266b2d6e9SJon Hunter }; 22366b2d6e9SJon Hunter 22466b2d6e9SJon Hunter state_dpaux_off: pinmux-off { 22566b2d6e9SJon Hunter groups = "dpaux-io"; 22666b2d6e9SJon Hunter function = "off"; 22766b2d6e9SJon Hunter }; 22866b2d6e9SJon Hunter 22966b2d6e9SJon Hunter i2c-bus { 23066b2d6e9SJon Hunter #address-cells = <1>; 23166b2d6e9SJon Hunter #size-cells = <0>; 23266b2d6e9SJon Hunter }; 233742af7e7SThierry Reding }; 234742af7e7SThierry Reding 235be70771dSThierry Reding isp@54600000 { 236742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 237742af7e7SThierry Reding reg = <0x0 0x54600000 0x0 0x00040000>; 238742af7e7SThierry Reding interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 239742af7e7SThierry Reding status = "disabled"; 240742af7e7SThierry Reding }; 241742af7e7SThierry Reding 242be70771dSThierry Reding isp@54680000 { 243742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 244742af7e7SThierry Reding reg = <0x0 0x54680000 0x0 0x00040000>; 245742af7e7SThierry Reding interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 246742af7e7SThierry Reding status = "disabled"; 247742af7e7SThierry Reding }; 248742af7e7SThierry Reding 249be70771dSThierry Reding i2c@546c0000 { 250742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c-vi"; 251742af7e7SThierry Reding reg = <0x0 0x546c0000 0x0 0x00040000>; 252742af7e7SThierry Reding interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 253742af7e7SThierry Reding status = "disabled"; 254742af7e7SThierry Reding }; 255742af7e7SThierry Reding }; 256742af7e7SThierry Reding 257be70771dSThierry Reding gic: interrupt-controller@50041000 { 258742af7e7SThierry Reding compatible = "arm,gic-400"; 259742af7e7SThierry Reding #interrupt-cells = <3>; 260742af7e7SThierry Reding interrupt-controller; 261742af7e7SThierry Reding reg = <0x0 0x50041000 0x0 0x1000>, 262742af7e7SThierry Reding <0x0 0x50042000 0x0 0x2000>, 263742af7e7SThierry Reding <0x0 0x50044000 0x0 0x2000>, 264742af7e7SThierry Reding <0x0 0x50046000 0x0 0x2000>; 265742af7e7SThierry Reding interrupts = <GIC_PPI 9 266742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 267742af7e7SThierry Reding interrupt-parent = <&gic>; 268742af7e7SThierry Reding }; 269742af7e7SThierry Reding 270be70771dSThierry Reding gpu@57000000 { 271742af7e7SThierry Reding compatible = "nvidia,gm20b"; 272742af7e7SThierry Reding reg = <0x0 0x57000000 0x0 0x01000000>, 273742af7e7SThierry Reding <0x0 0x58000000 0x0 0x01000000>; 274742af7e7SThierry Reding interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 275742af7e7SThierry Reding <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 276742af7e7SThierry Reding interrupt-names = "stall", "nonstall"; 277742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_GPU>, 2784a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_P_OUT5>, 2794a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_G_REF>; 2804a0778e9SAlexandre Courbot clock-names = "gpu", "pwr", "ref"; 281742af7e7SThierry Reding resets = <&tegra_car 184>; 282742af7e7SThierry Reding reset-names = "gpu"; 28330f949bcSAlexandre Courbot 28430f949bcSAlexandre Courbot iommus = <&mc TEGRA_SWGROUP_GPU>; 28530f949bcSAlexandre Courbot 286742af7e7SThierry Reding status = "disabled"; 287742af7e7SThierry Reding }; 288742af7e7SThierry Reding 289be70771dSThierry Reding lic: interrupt-controller@60004000 { 290742af7e7SThierry Reding compatible = "nvidia,tegra210-ictlr"; 291742af7e7SThierry Reding reg = <0x0 0x60004000 0x0 0x40>, /* primary controller */ 292742af7e7SThierry Reding <0x0 0x60004100 0x0 0x40>, /* secondary controller */ 293742af7e7SThierry Reding <0x0 0x60004200 0x0 0x40>, /* tertiary controller */ 294742af7e7SThierry Reding <0x0 0x60004300 0x0 0x40>, /* quaternary controller */ 295742af7e7SThierry Reding <0x0 0x60004400 0x0 0x40>, /* quinary controller */ 296742af7e7SThierry Reding <0x0 0x60004500 0x0 0x40>; /* senary controller */ 297742af7e7SThierry Reding interrupt-controller; 298742af7e7SThierry Reding #interrupt-cells = <3>; 299742af7e7SThierry Reding interrupt-parent = <&gic>; 300742af7e7SThierry Reding }; 301742af7e7SThierry Reding 302be70771dSThierry Reding timer@60005000 { 303742af7e7SThierry Reding compatible = "nvidia,tegra210-timer", "nvidia,tegra20-timer"; 304742af7e7SThierry Reding reg = <0x0 0x60005000 0x0 0x400>; 305742af7e7SThierry Reding interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 306742af7e7SThierry Reding <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 307742af7e7SThierry Reding <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 308742af7e7SThierry Reding <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 309742af7e7SThierry Reding <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 310742af7e7SThierry Reding <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 311742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_TIMER>; 312742af7e7SThierry Reding clock-names = "timer"; 313742af7e7SThierry Reding }; 314742af7e7SThierry Reding 315be70771dSThierry Reding tegra_car: clock@60006000 { 316742af7e7SThierry Reding compatible = "nvidia,tegra210-car"; 317742af7e7SThierry Reding reg = <0x0 0x60006000 0x0 0x1000>; 318742af7e7SThierry Reding #clock-cells = <1>; 319742af7e7SThierry Reding #reset-cells = <1>; 320742af7e7SThierry Reding }; 321742af7e7SThierry Reding 322be70771dSThierry Reding flow-controller@60007000 { 323742af7e7SThierry Reding compatible = "nvidia,tegra210-flowctrl"; 324742af7e7SThierry Reding reg = <0x0 0x60007000 0x0 0x1000>; 325742af7e7SThierry Reding }; 326742af7e7SThierry Reding 327be70771dSThierry Reding gpio: gpio@6000d000 { 328742af7e7SThierry Reding compatible = "nvidia,tegra210-gpio", "nvidia,tegra124-gpio", "nvidia,tegra30-gpio"; 329742af7e7SThierry Reding reg = <0x0 0x6000d000 0x0 0x1000>; 330742af7e7SThierry Reding interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 331742af7e7SThierry Reding <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 332742af7e7SThierry Reding <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 333742af7e7SThierry Reding <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 334742af7e7SThierry Reding <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 335742af7e7SThierry Reding <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 336742af7e7SThierry Reding <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 337742af7e7SThierry Reding <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 338742af7e7SThierry Reding #gpio-cells = <2>; 339742af7e7SThierry Reding gpio-controller; 340742af7e7SThierry Reding #interrupt-cells = <2>; 341742af7e7SThierry Reding interrupt-controller; 342742af7e7SThierry Reding }; 343742af7e7SThierry Reding 344be70771dSThierry Reding apbdma: dma@60020000 { 345742af7e7SThierry Reding compatible = "nvidia,tegra210-apbdma", "nvidia,tegra148-apbdma"; 346742af7e7SThierry Reding reg = <0x0 0x60020000 0x0 0x1400>; 347742af7e7SThierry Reding interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 348742af7e7SThierry Reding <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 349742af7e7SThierry Reding <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 350742af7e7SThierry Reding <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 351742af7e7SThierry Reding <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 352742af7e7SThierry Reding <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 353742af7e7SThierry Reding <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 354742af7e7SThierry Reding <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 355742af7e7SThierry Reding <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 356742af7e7SThierry Reding <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 357742af7e7SThierry Reding <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 358742af7e7SThierry Reding <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 359742af7e7SThierry Reding <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 360742af7e7SThierry Reding <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 361742af7e7SThierry Reding <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 362742af7e7SThierry Reding <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, 363742af7e7SThierry Reding <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 364742af7e7SThierry Reding <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 365742af7e7SThierry Reding <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 366742af7e7SThierry Reding <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 367742af7e7SThierry Reding <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 368742af7e7SThierry Reding <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, 369742af7e7SThierry Reding <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, 370742af7e7SThierry Reding <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 371742af7e7SThierry Reding <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 372742af7e7SThierry Reding <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 373742af7e7SThierry Reding <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 374742af7e7SThierry Reding <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>, 375742af7e7SThierry Reding <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, 376742af7e7SThierry Reding <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, 377742af7e7SThierry Reding <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 378742af7e7SThierry Reding <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 379742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_APBDMA>; 380742af7e7SThierry Reding clock-names = "dma"; 381742af7e7SThierry Reding resets = <&tegra_car 34>; 382742af7e7SThierry Reding reset-names = "dma"; 383742af7e7SThierry Reding #dma-cells = <1>; 384742af7e7SThierry Reding }; 385742af7e7SThierry Reding 386be70771dSThierry Reding apbmisc@70000800 { 387742af7e7SThierry Reding compatible = "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc"; 388742af7e7SThierry Reding reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */ 389742af7e7SThierry Reding <0x0 0x7000e864 0x0 0x04>; /* Strapping options */ 390742af7e7SThierry Reding }; 391742af7e7SThierry Reding 392be70771dSThierry Reding pinmux: pinmux@700008d4 { 393742af7e7SThierry Reding compatible = "nvidia,tegra210-pinmux"; 394742af7e7SThierry Reding reg = <0x0 0x700008d4 0x0 0x29c>, /* Pad control registers */ 395742af7e7SThierry Reding <0x0 0x70003000 0x0 0x294>; /* Mux registers */ 396742af7e7SThierry Reding }; 397742af7e7SThierry Reding 398742af7e7SThierry Reding /* 399742af7e7SThierry Reding * There are two serial driver i.e. 8250 based simple serial 400742af7e7SThierry Reding * driver and APB DMA based serial driver for higher baudrate 401ef769e32SAdam Buchbinder * and performance. To enable the 8250 based driver, the compatible 402742af7e7SThierry Reding * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable 40368cd8b2eSThierry Reding * the APB DMA based serial driver, the compatible is 404742af7e7SThierry Reding * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart". 405742af7e7SThierry Reding */ 406be70771dSThierry Reding uarta: serial@70006000 { 407742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 408742af7e7SThierry Reding reg = <0x0 0x70006000 0x0 0x40>; 409742af7e7SThierry Reding reg-shift = <2>; 410742af7e7SThierry Reding interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 411742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTA>; 412742af7e7SThierry Reding clock-names = "serial"; 413742af7e7SThierry Reding resets = <&tegra_car 6>; 414742af7e7SThierry Reding reset-names = "serial"; 415742af7e7SThierry Reding dmas = <&apbdma 8>, <&apbdma 8>; 416742af7e7SThierry Reding dma-names = "rx", "tx"; 417742af7e7SThierry Reding status = "disabled"; 418742af7e7SThierry Reding }; 419742af7e7SThierry Reding 420be70771dSThierry Reding uartb: serial@70006040 { 421742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 422742af7e7SThierry Reding reg = <0x0 0x70006040 0x0 0x40>; 423742af7e7SThierry Reding reg-shift = <2>; 424742af7e7SThierry Reding interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 425742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTB>; 426742af7e7SThierry Reding clock-names = "serial"; 427742af7e7SThierry Reding resets = <&tegra_car 7>; 428742af7e7SThierry Reding reset-names = "serial"; 429742af7e7SThierry Reding dmas = <&apbdma 9>, <&apbdma 9>; 430742af7e7SThierry Reding dma-names = "rx", "tx"; 431742af7e7SThierry Reding status = "disabled"; 432742af7e7SThierry Reding }; 433742af7e7SThierry Reding 434be70771dSThierry Reding uartc: serial@70006200 { 435742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 436742af7e7SThierry Reding reg = <0x0 0x70006200 0x0 0x40>; 437742af7e7SThierry Reding reg-shift = <2>; 438742af7e7SThierry Reding interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 439742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTC>; 440742af7e7SThierry Reding clock-names = "serial"; 441742af7e7SThierry Reding resets = <&tegra_car 55>; 442742af7e7SThierry Reding reset-names = "serial"; 443742af7e7SThierry Reding dmas = <&apbdma 10>, <&apbdma 10>; 444742af7e7SThierry Reding dma-names = "rx", "tx"; 445742af7e7SThierry Reding status = "disabled"; 446742af7e7SThierry Reding }; 447742af7e7SThierry Reding 448be70771dSThierry Reding uartd: serial@70006300 { 449742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 450742af7e7SThierry Reding reg = <0x0 0x70006300 0x0 0x40>; 451742af7e7SThierry Reding reg-shift = <2>; 452742af7e7SThierry Reding interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 453742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTD>; 454742af7e7SThierry Reding clock-names = "serial"; 455742af7e7SThierry Reding resets = <&tegra_car 65>; 456742af7e7SThierry Reding reset-names = "serial"; 457742af7e7SThierry Reding dmas = <&apbdma 19>, <&apbdma 19>; 458742af7e7SThierry Reding dma-names = "rx", "tx"; 459742af7e7SThierry Reding status = "disabled"; 460742af7e7SThierry Reding }; 461742af7e7SThierry Reding 462be70771dSThierry Reding pwm: pwm@7000a000 { 463742af7e7SThierry Reding compatible = "nvidia,tegra210-pwm", "nvidia,tegra20-pwm"; 464742af7e7SThierry Reding reg = <0x0 0x7000a000 0x0 0x100>; 465742af7e7SThierry Reding #pwm-cells = <2>; 466742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PWM>; 467742af7e7SThierry Reding clock-names = "pwm"; 468742af7e7SThierry Reding resets = <&tegra_car 17>; 469742af7e7SThierry Reding reset-names = "pwm"; 470742af7e7SThierry Reding status = "disabled"; 471742af7e7SThierry Reding }; 472742af7e7SThierry Reding 473be70771dSThierry Reding i2c@7000c000 { 474742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 475742af7e7SThierry Reding reg = <0x0 0x7000c000 0x0 0x100>; 476742af7e7SThierry Reding interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 477742af7e7SThierry Reding #address-cells = <1>; 478742af7e7SThierry Reding #size-cells = <0>; 479742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C1>; 480742af7e7SThierry Reding clock-names = "div-clk"; 481742af7e7SThierry Reding resets = <&tegra_car 12>; 482742af7e7SThierry Reding reset-names = "i2c"; 483742af7e7SThierry Reding dmas = <&apbdma 21>, <&apbdma 21>; 484742af7e7SThierry Reding dma-names = "rx", "tx"; 485742af7e7SThierry Reding status = "disabled"; 486742af7e7SThierry Reding }; 487742af7e7SThierry Reding 488be70771dSThierry Reding i2c@7000c400 { 489742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 490742af7e7SThierry Reding reg = <0x0 0x7000c400 0x0 0x100>; 491742af7e7SThierry Reding interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 492742af7e7SThierry Reding #address-cells = <1>; 493742af7e7SThierry Reding #size-cells = <0>; 494742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C2>; 495742af7e7SThierry Reding clock-names = "div-clk"; 496742af7e7SThierry Reding resets = <&tegra_car 54>; 497742af7e7SThierry Reding reset-names = "i2c"; 498742af7e7SThierry Reding dmas = <&apbdma 22>, <&apbdma 22>; 499742af7e7SThierry Reding dma-names = "rx", "tx"; 500742af7e7SThierry Reding status = "disabled"; 501742af7e7SThierry Reding }; 502742af7e7SThierry Reding 503be70771dSThierry Reding i2c@7000c500 { 504742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 505742af7e7SThierry Reding reg = <0x0 0x7000c500 0x0 0x100>; 506742af7e7SThierry Reding interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 507742af7e7SThierry Reding #address-cells = <1>; 508742af7e7SThierry Reding #size-cells = <0>; 509742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C3>; 510742af7e7SThierry Reding clock-names = "div-clk"; 511742af7e7SThierry Reding resets = <&tegra_car 67>; 512742af7e7SThierry Reding reset-names = "i2c"; 513742af7e7SThierry Reding dmas = <&apbdma 23>, <&apbdma 23>; 514742af7e7SThierry Reding dma-names = "rx", "tx"; 515742af7e7SThierry Reding status = "disabled"; 516742af7e7SThierry Reding }; 517742af7e7SThierry Reding 518be70771dSThierry Reding i2c@7000c700 { 519742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 520742af7e7SThierry Reding reg = <0x0 0x7000c700 0x0 0x100>; 521742af7e7SThierry Reding interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 522742af7e7SThierry Reding #address-cells = <1>; 523742af7e7SThierry Reding #size-cells = <0>; 524742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C4>; 525742af7e7SThierry Reding clock-names = "div-clk"; 526742af7e7SThierry Reding resets = <&tegra_car 103>; 527742af7e7SThierry Reding reset-names = "i2c"; 528742af7e7SThierry Reding dmas = <&apbdma 26>, <&apbdma 26>; 529742af7e7SThierry Reding dma-names = "rx", "tx"; 53066b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_i2c>; 53166b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_off>; 53266b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 533742af7e7SThierry Reding status = "disabled"; 534742af7e7SThierry Reding }; 535742af7e7SThierry Reding 536be70771dSThierry Reding i2c@7000d000 { 537742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 538742af7e7SThierry Reding reg = <0x0 0x7000d000 0x0 0x100>; 539742af7e7SThierry Reding interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 540742af7e7SThierry Reding #address-cells = <1>; 541742af7e7SThierry Reding #size-cells = <0>; 542742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C5>; 543742af7e7SThierry Reding clock-names = "div-clk"; 544742af7e7SThierry Reding resets = <&tegra_car 47>; 545742af7e7SThierry Reding reset-names = "i2c"; 546742af7e7SThierry Reding dmas = <&apbdma 24>, <&apbdma 24>; 547742af7e7SThierry Reding dma-names = "rx", "tx"; 548742af7e7SThierry Reding status = "disabled"; 549742af7e7SThierry Reding }; 550742af7e7SThierry Reding 551be70771dSThierry Reding i2c@7000d100 { 552742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c"; 553742af7e7SThierry Reding reg = <0x0 0x7000d100 0x0 0x100>; 554742af7e7SThierry Reding interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 555742af7e7SThierry Reding #address-cells = <1>; 556742af7e7SThierry Reding #size-cells = <0>; 557742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C6>; 558742af7e7SThierry Reding clock-names = "div-clk"; 559742af7e7SThierry Reding resets = <&tegra_car 166>; 560742af7e7SThierry Reding reset-names = "i2c"; 561742af7e7SThierry Reding dmas = <&apbdma 30>, <&apbdma 30>; 562742af7e7SThierry Reding dma-names = "rx", "tx"; 56366b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_i2c>; 56466b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_off>; 56566b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 566742af7e7SThierry Reding status = "disabled"; 567742af7e7SThierry Reding }; 568742af7e7SThierry Reding 569be70771dSThierry Reding spi@7000d400 { 570742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 571742af7e7SThierry Reding reg = <0x0 0x7000d400 0x0 0x200>; 572742af7e7SThierry Reding interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 573742af7e7SThierry Reding #address-cells = <1>; 574742af7e7SThierry Reding #size-cells = <0>; 575742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC1>; 576742af7e7SThierry Reding clock-names = "spi"; 577742af7e7SThierry Reding resets = <&tegra_car 41>; 578742af7e7SThierry Reding reset-names = "spi"; 579742af7e7SThierry Reding dmas = <&apbdma 15>, <&apbdma 15>; 580742af7e7SThierry Reding dma-names = "rx", "tx"; 581742af7e7SThierry Reding status = "disabled"; 582742af7e7SThierry Reding }; 583742af7e7SThierry Reding 584be70771dSThierry Reding spi@7000d600 { 585742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 586742af7e7SThierry Reding reg = <0x0 0x7000d600 0x0 0x200>; 587742af7e7SThierry Reding interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 588742af7e7SThierry Reding #address-cells = <1>; 589742af7e7SThierry Reding #size-cells = <0>; 590742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC2>; 591742af7e7SThierry Reding clock-names = "spi"; 592742af7e7SThierry Reding resets = <&tegra_car 44>; 593742af7e7SThierry Reding reset-names = "spi"; 594742af7e7SThierry Reding dmas = <&apbdma 16>, <&apbdma 16>; 595742af7e7SThierry Reding dma-names = "rx", "tx"; 596742af7e7SThierry Reding status = "disabled"; 597742af7e7SThierry Reding }; 598742af7e7SThierry Reding 599be70771dSThierry Reding spi@7000d800 { 600742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 601742af7e7SThierry Reding reg = <0x0 0x7000d800 0x0 0x200>; 602742af7e7SThierry Reding interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 603742af7e7SThierry Reding #address-cells = <1>; 604742af7e7SThierry Reding #size-cells = <0>; 605742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC3>; 606742af7e7SThierry Reding clock-names = "spi"; 607742af7e7SThierry Reding resets = <&tegra_car 46>; 608742af7e7SThierry Reding reset-names = "spi"; 609742af7e7SThierry Reding dmas = <&apbdma 17>, <&apbdma 17>; 610742af7e7SThierry Reding dma-names = "rx", "tx"; 611742af7e7SThierry Reding status = "disabled"; 612742af7e7SThierry Reding }; 613742af7e7SThierry Reding 614be70771dSThierry Reding spi@7000da00 { 615742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 616742af7e7SThierry Reding reg = <0x0 0x7000da00 0x0 0x200>; 617742af7e7SThierry Reding interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 618742af7e7SThierry Reding #address-cells = <1>; 619742af7e7SThierry Reding #size-cells = <0>; 620742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC4>; 621742af7e7SThierry Reding clock-names = "spi"; 622742af7e7SThierry Reding resets = <&tegra_car 68>; 623742af7e7SThierry Reding reset-names = "spi"; 624742af7e7SThierry Reding dmas = <&apbdma 18>, <&apbdma 18>; 625742af7e7SThierry Reding dma-names = "rx", "tx"; 626742af7e7SThierry Reding status = "disabled"; 627742af7e7SThierry Reding }; 628742af7e7SThierry Reding 629be70771dSThierry Reding rtc@7000e000 { 630742af7e7SThierry Reding compatible = "nvidia,tegra210-rtc", "nvidia,tegra20-rtc"; 631742af7e7SThierry Reding reg = <0x0 0x7000e000 0x0 0x100>; 632742af7e7SThierry Reding interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 633742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_RTC>; 634742af7e7SThierry Reding clock-names = "rtc"; 635742af7e7SThierry Reding }; 636742af7e7SThierry Reding 637be70771dSThierry Reding pmc: pmc@7000e400 { 638742af7e7SThierry Reding compatible = "nvidia,tegra210-pmc"; 639742af7e7SThierry Reding reg = <0x0 0x7000e400 0x0 0x400>; 640742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; 641742af7e7SThierry Reding clock-names = "pclk", "clk32k_in"; 642c2b82445SJon Hunter 643c2b82445SJon Hunter powergates { 644c2b82445SJon Hunter pd_audio: aud { 645c2b82445SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 646c2b82445SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 647c2b82445SJon Hunter resets = <&tegra_car 198>; 648c2b82445SJon Hunter #power-domain-cells = <0>; 649c2b82445SJon Hunter }; 650241f02baSJon Hunter 651241f02baSJon Hunter pd_xusbss: xusba { 652241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>; 653241f02baSJon Hunter clock-names = "xusb-ss"; 654241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_SS>; 655241f02baSJon Hunter reset-names = "xusb-ss"; 656241f02baSJon Hunter #power-domain-cells = <0>; 657241f02baSJon Hunter }; 658241f02baSJon Hunter 659241f02baSJon Hunter pd_xusbdev: xusbb { 660241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>; 661241f02baSJon Hunter clock-names = "xusb-dev"; 662241f02baSJon Hunter resets = <&tegra_car 95>; 663241f02baSJon Hunter reset-names = "xusb-dev"; 664241f02baSJon Hunter #power-domain-cells = <0>; 665241f02baSJon Hunter }; 666241f02baSJon Hunter 667241f02baSJon Hunter pd_xusbhost: xusbc { 668241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 669241f02baSJon Hunter clock-names = "xusb-host"; 670241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 671241f02baSJon Hunter reset-names = "xusb-host"; 672241f02baSJon Hunter #power-domain-cells = <0>; 673241f02baSJon Hunter }; 674c2b82445SJon Hunter }; 675742af7e7SThierry Reding }; 676742af7e7SThierry Reding 677be70771dSThierry Reding fuse@7000f800 { 678742af7e7SThierry Reding compatible = "nvidia,tegra210-efuse"; 679742af7e7SThierry Reding reg = <0x0 0x7000f800 0x0 0x400>; 680742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_FUSE>; 681742af7e7SThierry Reding clock-names = "fuse"; 682742af7e7SThierry Reding resets = <&tegra_car 39>; 683742af7e7SThierry Reding reset-names = "fuse"; 684742af7e7SThierry Reding }; 685742af7e7SThierry Reding 686be70771dSThierry Reding mc: memory-controller@70019000 { 687742af7e7SThierry Reding compatible = "nvidia,tegra210-mc"; 688742af7e7SThierry Reding reg = <0x0 0x70019000 0x0 0x1000>; 689742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MC>; 690742af7e7SThierry Reding clock-names = "mc"; 691742af7e7SThierry Reding 692742af7e7SThierry Reding interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 693742af7e7SThierry Reding 694742af7e7SThierry Reding #iommu-cells = <1>; 695742af7e7SThierry Reding }; 696742af7e7SThierry Reding 697be70771dSThierry Reding hda@70030000 { 698742af7e7SThierry Reding compatible = "nvidia,tegra210-hda", "nvidia,tegra30-hda"; 699742af7e7SThierry Reding reg = <0x0 0x70030000 0x0 0x10000>; 700742af7e7SThierry Reding interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 701742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HDA>, 702742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2HDMI>, 703742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2CODEC_2X>; 704742af7e7SThierry Reding clock-names = "hda", "hda2hdmi", "hda2codec_2x"; 705742af7e7SThierry Reding resets = <&tegra_car 125>, /* hda */ 706742af7e7SThierry Reding <&tegra_car 128>, /* hda2hdmi */ 707742af7e7SThierry Reding <&tegra_car 111>; /* hda2codec_2x */ 708742af7e7SThierry Reding reset-names = "hda", "hda2hdmi", "hda2codec_2x"; 709742af7e7SThierry Reding status = "disabled"; 710742af7e7SThierry Reding }; 711742af7e7SThierry Reding 712e7a99ac2SThierry Reding usb@70090000 { 713e7a99ac2SThierry Reding compatible = "nvidia,tegra210-xusb"; 714e7a99ac2SThierry Reding reg = <0x0 0x70090000 0x0 0x8000>, 715e7a99ac2SThierry Reding <0x0 0x70098000 0x0 0x1000>, 716e7a99ac2SThierry Reding <0x0 0x70099000 0x0 0x1000>; 717e7a99ac2SThierry Reding reg-names = "hcd", "fpci", "ipfs"; 718e7a99ac2SThierry Reding 719e7a99ac2SThierry Reding interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 7209168e1dbSJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 721e7a99ac2SThierry Reding 722e7a99ac2SThierry Reding clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>, 723e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>, 724e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>, 725e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS>, 726e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>, 727e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>, 728e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, 729e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, 730e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U_480M>, 731e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_CLK_M>, 732e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>; 733e7a99ac2SThierry Reding clock-names = "xusb_host", "xusb_host_src", 734e7a99ac2SThierry Reding "xusb_falcon_src", "xusb_ss", 735e7a99ac2SThierry Reding "xusb_ss_div2", "xusb_ss_src", 736e7a99ac2SThierry Reding "xusb_hs_src", "xusb_fs_src", 737e7a99ac2SThierry Reding "pll_u_480m", "clk_m", "pll_e"; 738e7a99ac2SThierry Reding resets = <&tegra_car 89>, <&tegra_car 156>, 739e7a99ac2SThierry Reding <&tegra_car 143>; 740e7a99ac2SThierry Reding reset-names = "xusb_host", "xusb_ss", "xusb_src"; 741e7a99ac2SThierry Reding 742e7a99ac2SThierry Reding nvidia,xusb-padctl = <&padctl>; 743e7a99ac2SThierry Reding 744e7a99ac2SThierry Reding status = "disabled"; 745e7a99ac2SThierry Reding }; 746e7a99ac2SThierry Reding 7474e07ac90SThierry Reding padctl: padctl@7009f000 { 7484e07ac90SThierry Reding compatible = "nvidia,tegra210-xusb-padctl"; 7494e07ac90SThierry Reding reg = <0x0 0x7009f000 0x0 0x1000>; 7504e07ac90SThierry Reding resets = <&tegra_car 142>; 7514e07ac90SThierry Reding reset-names = "padctl"; 7524e07ac90SThierry Reding 7534e07ac90SThierry Reding status = "disabled"; 7544e07ac90SThierry Reding 7554e07ac90SThierry Reding pads { 7564e07ac90SThierry Reding usb2 { 7574e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>; 7584e07ac90SThierry Reding clock-names = "trk"; 7594e07ac90SThierry Reding status = "disabled"; 7604e07ac90SThierry Reding 7614e07ac90SThierry Reding lanes { 7624e07ac90SThierry Reding usb2-0 { 7634e07ac90SThierry Reding status = "disabled"; 7644e07ac90SThierry Reding #phy-cells = <0>; 7654e07ac90SThierry Reding }; 7664e07ac90SThierry Reding 7674e07ac90SThierry Reding usb2-1 { 7684e07ac90SThierry Reding status = "disabled"; 7694e07ac90SThierry Reding #phy-cells = <0>; 7704e07ac90SThierry Reding }; 7714e07ac90SThierry Reding 7724e07ac90SThierry Reding usb2-2 { 7734e07ac90SThierry Reding status = "disabled"; 7744e07ac90SThierry Reding #phy-cells = <0>; 7754e07ac90SThierry Reding }; 7764e07ac90SThierry Reding 7774e07ac90SThierry Reding usb2-3 { 7784e07ac90SThierry Reding status = "disabled"; 7794e07ac90SThierry Reding #phy-cells = <0>; 7804e07ac90SThierry Reding }; 7814e07ac90SThierry Reding }; 7824e07ac90SThierry Reding }; 7834e07ac90SThierry Reding 7844e07ac90SThierry Reding hsic { 7854e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>; 7864e07ac90SThierry Reding clock-names = "trk"; 7874e07ac90SThierry Reding status = "disabled"; 7884e07ac90SThierry Reding 7894e07ac90SThierry Reding lanes { 7904e07ac90SThierry Reding hsic-0 { 7914e07ac90SThierry Reding status = "disabled"; 7924e07ac90SThierry Reding #phy-cells = <0>; 7934e07ac90SThierry Reding }; 7944e07ac90SThierry Reding 7954e07ac90SThierry Reding hsic-1 { 7964e07ac90SThierry Reding status = "disabled"; 7974e07ac90SThierry Reding #phy-cells = <0>; 7984e07ac90SThierry Reding }; 7994e07ac90SThierry Reding }; 8004e07ac90SThierry Reding }; 8014e07ac90SThierry Reding 8024e07ac90SThierry Reding pcie { 8034e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 8044e07ac90SThierry Reding clock-names = "pll"; 8054e07ac90SThierry Reding resets = <&tegra_car 205>; 8064e07ac90SThierry Reding reset-names = "phy"; 8074e07ac90SThierry Reding status = "disabled"; 8084e07ac90SThierry Reding 8094e07ac90SThierry Reding lanes { 8104e07ac90SThierry Reding pcie-0 { 8114e07ac90SThierry Reding status = "disabled"; 8124e07ac90SThierry Reding #phy-cells = <0>; 8134e07ac90SThierry Reding }; 8144e07ac90SThierry Reding 8154e07ac90SThierry Reding pcie-1 { 8164e07ac90SThierry Reding status = "disabled"; 8174e07ac90SThierry Reding #phy-cells = <0>; 8184e07ac90SThierry Reding }; 8194e07ac90SThierry Reding 8204e07ac90SThierry Reding pcie-2 { 8214e07ac90SThierry Reding status = "disabled"; 8224e07ac90SThierry Reding #phy-cells = <0>; 8234e07ac90SThierry Reding }; 8244e07ac90SThierry Reding 8254e07ac90SThierry Reding pcie-3 { 8264e07ac90SThierry Reding status = "disabled"; 8274e07ac90SThierry Reding #phy-cells = <0>; 8284e07ac90SThierry Reding }; 8294e07ac90SThierry Reding 8304e07ac90SThierry Reding pcie-4 { 8314e07ac90SThierry Reding status = "disabled"; 8324e07ac90SThierry Reding #phy-cells = <0>; 8334e07ac90SThierry Reding }; 8344e07ac90SThierry Reding 8354e07ac90SThierry Reding pcie-5 { 8364e07ac90SThierry Reding status = "disabled"; 8374e07ac90SThierry Reding #phy-cells = <0>; 8384e07ac90SThierry Reding }; 8394e07ac90SThierry Reding 8404e07ac90SThierry Reding pcie-6 { 8414e07ac90SThierry Reding status = "disabled"; 8424e07ac90SThierry Reding #phy-cells = <0>; 8434e07ac90SThierry Reding }; 8444e07ac90SThierry Reding }; 8454e07ac90SThierry Reding }; 8464e07ac90SThierry Reding 8474e07ac90SThierry Reding sata { 8484e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 8494e07ac90SThierry Reding clock-names = "pll"; 8504e07ac90SThierry Reding resets = <&tegra_car 204>; 8514e07ac90SThierry Reding reset-names = "phy"; 8524e07ac90SThierry Reding status = "disabled"; 8534e07ac90SThierry Reding 8544e07ac90SThierry Reding lanes { 8554e07ac90SThierry Reding sata-0 { 8564e07ac90SThierry Reding status = "disabled"; 8574e07ac90SThierry Reding #phy-cells = <0>; 8584e07ac90SThierry Reding }; 8594e07ac90SThierry Reding }; 8604e07ac90SThierry Reding }; 8614e07ac90SThierry Reding }; 8624e07ac90SThierry Reding 8634e07ac90SThierry Reding ports { 8644e07ac90SThierry Reding usb2-0 { 8654e07ac90SThierry Reding status = "disabled"; 8664e07ac90SThierry Reding }; 8674e07ac90SThierry Reding 8684e07ac90SThierry Reding usb2-1 { 8694e07ac90SThierry Reding status = "disabled"; 8704e07ac90SThierry Reding }; 8714e07ac90SThierry Reding 8724e07ac90SThierry Reding usb2-2 { 8734e07ac90SThierry Reding status = "disabled"; 8744e07ac90SThierry Reding }; 8754e07ac90SThierry Reding 8764e07ac90SThierry Reding usb2-3 { 8774e07ac90SThierry Reding status = "disabled"; 8784e07ac90SThierry Reding }; 8794e07ac90SThierry Reding 8804e07ac90SThierry Reding hsic-0 { 8814e07ac90SThierry Reding status = "disabled"; 8824e07ac90SThierry Reding }; 8834e07ac90SThierry Reding 8844e07ac90SThierry Reding usb3-0 { 8854e07ac90SThierry Reding status = "disabled"; 8864e07ac90SThierry Reding }; 8874e07ac90SThierry Reding 8884e07ac90SThierry Reding usb3-1 { 8894e07ac90SThierry Reding status = "disabled"; 8904e07ac90SThierry Reding }; 8914e07ac90SThierry Reding 8924e07ac90SThierry Reding usb3-2 { 8934e07ac90SThierry Reding status = "disabled"; 8944e07ac90SThierry Reding }; 8954e07ac90SThierry Reding 8964e07ac90SThierry Reding usb3-3 { 8974e07ac90SThierry Reding status = "disabled"; 8984e07ac90SThierry Reding }; 8994e07ac90SThierry Reding }; 9004e07ac90SThierry Reding }; 9014e07ac90SThierry Reding 902be70771dSThierry Reding sdhci@700b0000 { 903742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 904742af7e7SThierry Reding reg = <0x0 0x700b0000 0x0 0x200>; 905742af7e7SThierry Reding interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 906742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC1>; 907742af7e7SThierry Reding clock-names = "sdhci"; 908742af7e7SThierry Reding resets = <&tegra_car 14>; 909742af7e7SThierry Reding reset-names = "sdhci"; 910742af7e7SThierry Reding status = "disabled"; 911742af7e7SThierry Reding }; 912742af7e7SThierry Reding 913be70771dSThierry Reding sdhci@700b0200 { 914742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 915742af7e7SThierry Reding reg = <0x0 0x700b0200 0x0 0x200>; 916742af7e7SThierry Reding interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 917742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC2>; 918742af7e7SThierry Reding clock-names = "sdhci"; 919742af7e7SThierry Reding resets = <&tegra_car 9>; 920742af7e7SThierry Reding reset-names = "sdhci"; 921742af7e7SThierry Reding status = "disabled"; 922742af7e7SThierry Reding }; 923742af7e7SThierry Reding 924be70771dSThierry Reding sdhci@700b0400 { 925742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 926742af7e7SThierry Reding reg = <0x0 0x700b0400 0x0 0x200>; 927742af7e7SThierry Reding interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 928742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC3>; 929742af7e7SThierry Reding clock-names = "sdhci"; 930742af7e7SThierry Reding resets = <&tegra_car 69>; 931742af7e7SThierry Reding reset-names = "sdhci"; 932742af7e7SThierry Reding status = "disabled"; 933742af7e7SThierry Reding }; 934742af7e7SThierry Reding 935be70771dSThierry Reding sdhci@700b0600 { 936742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 937742af7e7SThierry Reding reg = <0x0 0x700b0600 0x0 0x200>; 938742af7e7SThierry Reding interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 939742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC4>; 940742af7e7SThierry Reding clock-names = "sdhci"; 941742af7e7SThierry Reding resets = <&tegra_car 15>; 942742af7e7SThierry Reding reset-names = "sdhci"; 943742af7e7SThierry Reding status = "disabled"; 944742af7e7SThierry Reding }; 945742af7e7SThierry Reding 946be70771dSThierry Reding mipi: mipi@700e3000 { 947742af7e7SThierry Reding compatible = "nvidia,tegra210-mipi"; 948742af7e7SThierry Reding reg = <0x0 0x700e3000 0x0 0x100>; 949742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MIPI_CAL>; 950742af7e7SThierry Reding clock-names = "mipi-cal"; 951742af7e7SThierry Reding #nvidia,mipi-calibrate-cells = <1>; 952742af7e7SThierry Reding }; 953742af7e7SThierry Reding 9540f133090SJon Hunter aconnect@702c0000 { 9550f133090SJon Hunter compatible = "nvidia,tegra210-aconnect"; 9560f133090SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 9570f133090SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 9580f133090SJon Hunter clock-names = "ape", "apb2ape"; 9590f133090SJon Hunter power-domains = <&pd_audio>; 9600f133090SJon Hunter #address-cells = <1>; 9610f133090SJon Hunter #size-cells = <1>; 9620f133090SJon Hunter ranges = <0x702c0000 0x0 0x702c0000 0x00040000>; 9630f133090SJon Hunter status = "disabled"; 9640f133090SJon Hunter }; 9650f133090SJon Hunter 966be70771dSThierry Reding spi@70410000 { 967742af7e7SThierry Reding compatible = "nvidia,tegra210-qspi"; 968742af7e7SThierry Reding reg = <0x0 0x70410000 0x0 0x1000>; 969742af7e7SThierry Reding interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 970742af7e7SThierry Reding #address-cells = <1>; 971742af7e7SThierry Reding #size-cells = <0>; 972742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_QSPI>; 973742af7e7SThierry Reding clock-names = "qspi"; 974742af7e7SThierry Reding resets = <&tegra_car 211>; 975742af7e7SThierry Reding reset-names = "qspi"; 976742af7e7SThierry Reding dmas = <&apbdma 5>, <&apbdma 5>; 977742af7e7SThierry Reding dma-names = "rx", "tx"; 978742af7e7SThierry Reding status = "disabled"; 979742af7e7SThierry Reding }; 980742af7e7SThierry Reding 981be70771dSThierry Reding usb@7d000000 { 982742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 983742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>; 984742af7e7SThierry Reding interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 985742af7e7SThierry Reding phy_type = "utmi"; 986742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>; 987742af7e7SThierry Reding clock-names = "usb"; 988742af7e7SThierry Reding resets = <&tegra_car 22>; 989742af7e7SThierry Reding reset-names = "usb"; 990742af7e7SThierry Reding nvidia,phy = <&phy1>; 991742af7e7SThierry Reding status = "disabled"; 992742af7e7SThierry Reding }; 993742af7e7SThierry Reding 994be70771dSThierry Reding phy1: usb-phy@7d000000 { 995742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 996742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>, 997742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 998742af7e7SThierry Reding phy_type = "utmi"; 999742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>, 1000742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1001742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1002742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1003742af7e7SThierry Reding resets = <&tegra_car 22>, <&tegra_car 22>; 1004742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1005742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1006742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1007742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1008742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1009742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1010742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1011742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1012742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1013742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1014742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1015742af7e7SThierry Reding nvidia,has-utmi-pad-registers; 1016742af7e7SThierry Reding status = "disabled"; 1017742af7e7SThierry Reding }; 1018742af7e7SThierry Reding 1019be70771dSThierry Reding usb@7d004000 { 1020742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1021742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>; 1022742af7e7SThierry Reding interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1023742af7e7SThierry Reding phy_type = "utmi"; 1024742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>; 1025742af7e7SThierry Reding clock-names = "usb"; 1026742af7e7SThierry Reding resets = <&tegra_car 58>; 1027742af7e7SThierry Reding reset-names = "usb"; 1028742af7e7SThierry Reding nvidia,phy = <&phy2>; 1029742af7e7SThierry Reding status = "disabled"; 1030742af7e7SThierry Reding }; 1031742af7e7SThierry Reding 1032be70771dSThierry Reding phy2: usb-phy@7d004000 { 1033742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1034742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>, 1035742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1036742af7e7SThierry Reding phy_type = "utmi"; 1037742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>, 1038742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1039742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1040742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1041742af7e7SThierry Reding resets = <&tegra_car 58>, <&tegra_car 22>; 1042742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1043742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1044742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1045742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1046742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1047742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1048742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1049742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1050742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1051742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1052742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1053742af7e7SThierry Reding status = "disabled"; 1054742af7e7SThierry Reding }; 1055742af7e7SThierry Reding 1056742af7e7SThierry Reding cpus { 1057742af7e7SThierry Reding #address-cells = <1>; 1058742af7e7SThierry Reding #size-cells = <0>; 1059742af7e7SThierry Reding 1060742af7e7SThierry Reding cpu@0 { 1061742af7e7SThierry Reding device_type = "cpu"; 1062742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1063742af7e7SThierry Reding reg = <0>; 1064742af7e7SThierry Reding }; 1065742af7e7SThierry Reding 1066742af7e7SThierry Reding cpu@1 { 1067742af7e7SThierry Reding device_type = "cpu"; 1068742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1069742af7e7SThierry Reding reg = <1>; 1070742af7e7SThierry Reding }; 1071742af7e7SThierry Reding 1072742af7e7SThierry Reding cpu@2 { 1073742af7e7SThierry Reding device_type = "cpu"; 1074742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1075742af7e7SThierry Reding reg = <2>; 1076742af7e7SThierry Reding }; 1077742af7e7SThierry Reding 1078742af7e7SThierry Reding cpu@3 { 1079742af7e7SThierry Reding device_type = "cpu"; 1080742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1081742af7e7SThierry Reding reg = <3>; 1082742af7e7SThierry Reding }; 1083742af7e7SThierry Reding }; 1084742af7e7SThierry Reding 1085742af7e7SThierry Reding timer { 1086742af7e7SThierry Reding compatible = "arm,armv8-timer"; 1087742af7e7SThierry Reding interrupts = <GIC_PPI 13 1088742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1089742af7e7SThierry Reding <GIC_PPI 14 1090742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1091742af7e7SThierry Reding <GIC_PPI 11 1092742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1093742af7e7SThierry Reding <GIC_PPI 10 1094742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 1095742af7e7SThierry Reding interrupt-parent = <&gic>; 1096742af7e7SThierry Reding }; 1097742af7e7SThierry Reding}; 1098