1b2441318SGreg Kroah-Hartman// SPDX-License-Identifier: GPL-2.0 2742af7e7SThierry Reding#include <dt-bindings/clock/tegra210-car.h> 3742af7e7SThierry Reding#include <dt-bindings/gpio/tegra-gpio.h> 4742af7e7SThierry Reding#include <dt-bindings/memory/tegra210-mc.h> 5742af7e7SThierry Reding#include <dt-bindings/pinctrl/pinctrl-tegra.h> 66641af7eSAapo Vienamo#include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 72ceed593SJoseph Lo#include <dt-bindings/reset/tegra210-car.h> 8742af7e7SThierry Reding#include <dt-bindings/interrupt-controller/arm-gic.h> 9e2bed1ebSWei Ni#include <dt-bindings/thermal/tegra124-soctherm.h> 10742af7e7SThierry Reding 11742af7e7SThierry Reding/ { 12742af7e7SThierry Reding compatible = "nvidia,tegra210"; 13742af7e7SThierry Reding interrupt-parent = <&lic>; 14742af7e7SThierry Reding #address-cells = <2>; 15742af7e7SThierry Reding #size-cells = <2>; 16742af7e7SThierry Reding 17475d99fcSRob Herring pcie@1003000 { 18589a2d3fSThierry Reding compatible = "nvidia,tegra210-pcie"; 19589a2d3fSThierry Reding device_type = "pci"; 20589a2d3fSThierry Reding reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ 21589a2d3fSThierry Reding 0x0 0x01003800 0x0 0x00000800 /* AFI registers */ 22589a2d3fSThierry Reding 0x0 0x02000000 0x0 0x10000000>; /* configuration space */ 23589a2d3fSThierry Reding reg-names = "pads", "afi", "cs"; 24589a2d3fSThierry Reding interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */ 25589a2d3fSThierry Reding <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */ 26589a2d3fSThierry Reding interrupt-names = "intr", "msi"; 27589a2d3fSThierry Reding 28589a2d3fSThierry Reding #interrupt-cells = <1>; 29589a2d3fSThierry Reding interrupt-map-mask = <0 0 0 0>; 30589a2d3fSThierry Reding interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 31589a2d3fSThierry Reding 32589a2d3fSThierry Reding bus-range = <0x00 0xff>; 33589a2d3fSThierry Reding #address-cells = <3>; 34589a2d3fSThierry Reding #size-cells = <2>; 35589a2d3fSThierry Reding 36589a2d3fSThierry Reding ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */ 37589a2d3fSThierry Reding 0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */ 38589a2d3fSThierry Reding 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */ 39589a2d3fSThierry Reding 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */ 40589a2d3fSThierry Reding 0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */ 41589a2d3fSThierry Reding 42589a2d3fSThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCIE>, 43589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_AFI>, 44589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>, 45589a2d3fSThierry Reding <&tegra_car TEGRA210_CLK_CML0>; 46589a2d3fSThierry Reding clock-names = "pex", "afi", "pll_e", "cml"; 47589a2d3fSThierry Reding resets = <&tegra_car 70>, 48589a2d3fSThierry Reding <&tegra_car 72>, 49589a2d3fSThierry Reding <&tegra_car 74>; 50589a2d3fSThierry Reding reset-names = "pex", "afi", "pcie_x"; 51589a2d3fSThierry Reding status = "disabled"; 52589a2d3fSThierry Reding 53589a2d3fSThierry Reding pci@1,0 { 54589a2d3fSThierry Reding device_type = "pci"; 55589a2d3fSThierry Reding assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; 56589a2d3fSThierry Reding reg = <0x000800 0 0 0 0>; 57475d99fcSRob Herring bus-range = <0x00 0xff>; 58589a2d3fSThierry Reding status = "disabled"; 59589a2d3fSThierry Reding 60589a2d3fSThierry Reding #address-cells = <3>; 61589a2d3fSThierry Reding #size-cells = <2>; 62589a2d3fSThierry Reding ranges; 63589a2d3fSThierry Reding 64589a2d3fSThierry Reding nvidia,num-lanes = <4>; 65589a2d3fSThierry Reding }; 66589a2d3fSThierry Reding 67589a2d3fSThierry Reding pci@2,0 { 68589a2d3fSThierry Reding device_type = "pci"; 69589a2d3fSThierry Reding assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; 70589a2d3fSThierry Reding reg = <0x001000 0 0 0 0>; 71475d99fcSRob Herring bus-range = <0x00 0xff>; 72589a2d3fSThierry Reding status = "disabled"; 73589a2d3fSThierry Reding 74589a2d3fSThierry Reding #address-cells = <3>; 75589a2d3fSThierry Reding #size-cells = <2>; 76589a2d3fSThierry Reding ranges; 77589a2d3fSThierry Reding 78589a2d3fSThierry Reding nvidia,num-lanes = <1>; 79589a2d3fSThierry Reding }; 80589a2d3fSThierry Reding }; 81589a2d3fSThierry Reding 82be70771dSThierry Reding host1x@50000000 { 83742af7e7SThierry Reding compatible = "nvidia,tegra210-host1x", "simple-bus"; 84742af7e7SThierry Reding reg = <0x0 0x50000000 0x0 0x00034000>; 85742af7e7SThierry Reding interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */ 86742af7e7SThierry Reding <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */ 87742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HOST1X>; 88742af7e7SThierry Reding clock-names = "host1x"; 89742af7e7SThierry Reding resets = <&tegra_car 28>; 90742af7e7SThierry Reding reset-names = "host1x"; 91742af7e7SThierry Reding 92742af7e7SThierry Reding #address-cells = <2>; 93742af7e7SThierry Reding #size-cells = <2>; 94742af7e7SThierry Reding 95742af7e7SThierry Reding ranges = <0x0 0x54000000 0x0 0x54000000 0x0 0x01000000>; 96742af7e7SThierry Reding 97116503a6SMikko Perttunen iommus = <&mc TEGRA_SWGROUP_HC>; 98116503a6SMikko Perttunen 99be70771dSThierry Reding dpaux1: dpaux@54040000 { 100742af7e7SThierry Reding compatible = "nvidia,tegra210-dpaux"; 101742af7e7SThierry Reding reg = <0x0 0x54040000 0x0 0x00040000>; 102742af7e7SThierry Reding interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 103742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX1>, 104742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 105742af7e7SThierry Reding clock-names = "dpaux", "parent"; 106742af7e7SThierry Reding resets = <&tegra_car 207>; 107742af7e7SThierry Reding reset-names = "dpaux"; 10896d1f078SJon Hunter power-domains = <&pd_sor>; 109742af7e7SThierry Reding status = "disabled"; 11066b2d6e9SJon Hunter 11166b2d6e9SJon Hunter state_dpaux1_aux: pinmux-aux { 11266b2d6e9SJon Hunter groups = "dpaux-io"; 11366b2d6e9SJon Hunter function = "aux"; 11466b2d6e9SJon Hunter }; 11566b2d6e9SJon Hunter 11666b2d6e9SJon Hunter state_dpaux1_i2c: pinmux-i2c { 11766b2d6e9SJon Hunter groups = "dpaux-io"; 11866b2d6e9SJon Hunter function = "i2c"; 11966b2d6e9SJon Hunter }; 12066b2d6e9SJon Hunter 12166b2d6e9SJon Hunter state_dpaux1_off: pinmux-off { 12266b2d6e9SJon Hunter groups = "dpaux-io"; 12366b2d6e9SJon Hunter function = "off"; 12466b2d6e9SJon Hunter }; 12566b2d6e9SJon Hunter 12666b2d6e9SJon Hunter i2c-bus { 12766b2d6e9SJon Hunter #address-cells = <1>; 12866b2d6e9SJon Hunter #size-cells = <0>; 12966b2d6e9SJon Hunter }; 130742af7e7SThierry Reding }; 131742af7e7SThierry Reding 132be70771dSThierry Reding vi@54080000 { 133742af7e7SThierry Reding compatible = "nvidia,tegra210-vi"; 134742af7e7SThierry Reding reg = <0x0 0x54080000 0x0 0x00040000>; 135742af7e7SThierry Reding interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 136742af7e7SThierry Reding status = "disabled"; 137742af7e7SThierry Reding }; 138742af7e7SThierry Reding 139be70771dSThierry Reding tsec@54100000 { 140742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 141742af7e7SThierry Reding reg = <0x0 0x54100000 0x0 0x00040000>; 142742af7e7SThierry Reding }; 143742af7e7SThierry Reding 144be70771dSThierry Reding dc@54200000 { 145742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 146742af7e7SThierry Reding reg = <0x0 0x54200000 0x0 0x00040000>; 147742af7e7SThierry Reding interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 148742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP1>, 149742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 150742af7e7SThierry Reding clock-names = "dc", "parent"; 151742af7e7SThierry Reding resets = <&tegra_car 27>; 152742af7e7SThierry Reding reset-names = "dc"; 153742af7e7SThierry Reding 154742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DC>; 155742af7e7SThierry Reding 156742af7e7SThierry Reding nvidia,head = <0>; 157742af7e7SThierry Reding }; 158742af7e7SThierry Reding 159be70771dSThierry Reding dc@54240000 { 160742af7e7SThierry Reding compatible = "nvidia,tegra210-dc"; 161742af7e7SThierry Reding reg = <0x0 0x54240000 0x0 0x00040000>; 162742af7e7SThierry Reding interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 163742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DISP2>, 164742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_P>; 165742af7e7SThierry Reding clock-names = "dc", "parent"; 166742af7e7SThierry Reding resets = <&tegra_car 26>; 167742af7e7SThierry Reding reset-names = "dc"; 168742af7e7SThierry Reding 169742af7e7SThierry Reding iommus = <&mc TEGRA_SWGROUP_DCB>; 170742af7e7SThierry Reding 171742af7e7SThierry Reding nvidia,head = <1>; 172742af7e7SThierry Reding }; 173742af7e7SThierry Reding 174be70771dSThierry Reding dsi@54300000 { 175742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 176742af7e7SThierry Reding reg = <0x0 0x54300000 0x0 0x00040000>; 177742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIA>, 178742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIALP>, 179742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 180742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 181742af7e7SThierry Reding resets = <&tegra_car 48>; 182742af7e7SThierry Reding reset-names = "dsi"; 18396d1f078SJon Hunter power-domains = <&pd_sor>; 184742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x0c0>; /* DSIA & DSIB pads */ 185742af7e7SThierry Reding 186742af7e7SThierry Reding status = "disabled"; 187742af7e7SThierry Reding 188742af7e7SThierry Reding #address-cells = <1>; 189742af7e7SThierry Reding #size-cells = <0>; 190742af7e7SThierry Reding }; 191742af7e7SThierry Reding 192be70771dSThierry Reding vic@54340000 { 193742af7e7SThierry Reding compatible = "nvidia,tegra210-vic"; 194742af7e7SThierry Reding reg = <0x0 0x54340000 0x0 0x00040000>; 19524963d1bSMikko Perttunen interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 19624963d1bSMikko Perttunen clocks = <&tegra_car TEGRA210_CLK_VIC03>; 19724963d1bSMikko Perttunen clock-names = "vic"; 19824963d1bSMikko Perttunen resets = <&tegra_car 178>; 19924963d1bSMikko Perttunen reset-names = "vic"; 20024963d1bSMikko Perttunen 20124963d1bSMikko Perttunen iommus = <&mc TEGRA_SWGROUP_VIC>; 20224963d1bSMikko Perttunen power-domains = <&pd_vic>; 203742af7e7SThierry Reding }; 204742af7e7SThierry Reding 205be70771dSThierry Reding nvjpg@54380000 { 206742af7e7SThierry Reding compatible = "nvidia,tegra210-nvjpg"; 207742af7e7SThierry Reding reg = <0x0 0x54380000 0x0 0x00040000>; 208742af7e7SThierry Reding status = "disabled"; 209742af7e7SThierry Reding }; 210742af7e7SThierry Reding 211be70771dSThierry Reding dsi@54400000 { 212742af7e7SThierry Reding compatible = "nvidia,tegra210-dsi"; 213742af7e7SThierry Reding reg = <0x0 0x54400000 0x0 0x00040000>; 214742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DSIB>, 215742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_DSIBLP>, 216742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>; 217742af7e7SThierry Reding clock-names = "dsi", "lp", "parent"; 218742af7e7SThierry Reding resets = <&tegra_car 82>; 219742af7e7SThierry Reding reset-names = "dsi"; 22096d1f078SJon Hunter power-domains = <&pd_sor>; 221742af7e7SThierry Reding nvidia,mipi-calibrate = <&mipi 0x300>; /* DSIC & DSID pads */ 222742af7e7SThierry Reding 223742af7e7SThierry Reding status = "disabled"; 224742af7e7SThierry Reding 225742af7e7SThierry Reding #address-cells = <1>; 226742af7e7SThierry Reding #size-cells = <0>; 227742af7e7SThierry Reding }; 228742af7e7SThierry Reding 229be70771dSThierry Reding nvdec@54480000 { 230742af7e7SThierry Reding compatible = "nvidia,tegra210-nvdec"; 231742af7e7SThierry Reding reg = <0x0 0x54480000 0x0 0x00040000>; 232742af7e7SThierry Reding status = "disabled"; 233742af7e7SThierry Reding }; 234742af7e7SThierry Reding 235be70771dSThierry Reding nvenc@544c0000 { 236742af7e7SThierry Reding compatible = "nvidia,tegra210-nvenc"; 237742af7e7SThierry Reding reg = <0x0 0x544c0000 0x0 0x00040000>; 238742af7e7SThierry Reding status = "disabled"; 239742af7e7SThierry Reding }; 240742af7e7SThierry Reding 241be70771dSThierry Reding tsec@54500000 { 242742af7e7SThierry Reding compatible = "nvidia,tegra210-tsec"; 243742af7e7SThierry Reding reg = <0x0 0x54500000 0x0 0x00040000>; 244742af7e7SThierry Reding status = "disabled"; 245742af7e7SThierry Reding }; 246742af7e7SThierry Reding 247be70771dSThierry Reding sor@54540000 { 248742af7e7SThierry Reding compatible = "nvidia,tegra210-sor"; 249742af7e7SThierry Reding reg = <0x0 0x54540000 0x0 0x00040000>; 250742af7e7SThierry Reding interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 251742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR0>, 252742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D_OUT0>, 253742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 254742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 255742af7e7SThierry Reding clock-names = "sor", "parent", "dp", "safe"; 256742af7e7SThierry Reding resets = <&tegra_car 182>; 257742af7e7SThierry Reding reset-names = "sor"; 25866b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_aux>; 25966b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_i2c>; 26066b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux_off>; 26166b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 26296d1f078SJon Hunter power-domains = <&pd_sor>; 263742af7e7SThierry Reding status = "disabled"; 264742af7e7SThierry Reding }; 265742af7e7SThierry Reding 266be70771dSThierry Reding sor@54580000 { 267742af7e7SThierry Reding compatible = "nvidia,tegra210-sor1"; 268742af7e7SThierry Reding reg = <0x0 0x54580000 0x0 0x00040000>; 269742af7e7SThierry Reding interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 270742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SOR1>, 27150f5b841SThierry Reding <&tegra_car TEGRA210_CLK_SOR1_OUT>, 272742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_D2_OUT0>, 273742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>, 274742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_SOR_SAFE>; 27550f5b841SThierry Reding clock-names = "sor", "out", "parent", "dp", "safe"; 276742af7e7SThierry Reding resets = <&tegra_car 183>; 277742af7e7SThierry Reding reset-names = "sor"; 27866b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_aux>; 27966b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_i2c>; 28066b2d6e9SJon Hunter pinctrl-2 = <&state_dpaux1_off>; 28166b2d6e9SJon Hunter pinctrl-names = "aux", "i2c", "off"; 28296d1f078SJon Hunter power-domains = <&pd_sor>; 283742af7e7SThierry Reding status = "disabled"; 284742af7e7SThierry Reding }; 285742af7e7SThierry Reding 286be70771dSThierry Reding dpaux: dpaux@545c0000 { 287742af7e7SThierry Reding compatible = "nvidia,tegra124-dpaux"; 288742af7e7SThierry Reding reg = <0x0 0x545c0000 0x0 0x00040000>; 289742af7e7SThierry Reding interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 290742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_DPAUX>, 291742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_DP>; 292742af7e7SThierry Reding clock-names = "dpaux", "parent"; 293742af7e7SThierry Reding resets = <&tegra_car 181>; 294742af7e7SThierry Reding reset-names = "dpaux"; 29596d1f078SJon Hunter power-domains = <&pd_sor>; 296742af7e7SThierry Reding status = "disabled"; 29766b2d6e9SJon Hunter 29866b2d6e9SJon Hunter state_dpaux_aux: pinmux-aux { 29966b2d6e9SJon Hunter groups = "dpaux-io"; 30066b2d6e9SJon Hunter function = "aux"; 30166b2d6e9SJon Hunter }; 30266b2d6e9SJon Hunter 30366b2d6e9SJon Hunter state_dpaux_i2c: pinmux-i2c { 30466b2d6e9SJon Hunter groups = "dpaux-io"; 30566b2d6e9SJon Hunter function = "i2c"; 30666b2d6e9SJon Hunter }; 30766b2d6e9SJon Hunter 30866b2d6e9SJon Hunter state_dpaux_off: pinmux-off { 30966b2d6e9SJon Hunter groups = "dpaux-io"; 31066b2d6e9SJon Hunter function = "off"; 31166b2d6e9SJon Hunter }; 31266b2d6e9SJon Hunter 31366b2d6e9SJon Hunter i2c-bus { 31466b2d6e9SJon Hunter #address-cells = <1>; 31566b2d6e9SJon Hunter #size-cells = <0>; 31666b2d6e9SJon Hunter }; 317742af7e7SThierry Reding }; 318742af7e7SThierry Reding 319be70771dSThierry Reding isp@54600000 { 320742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 321742af7e7SThierry Reding reg = <0x0 0x54600000 0x0 0x00040000>; 322742af7e7SThierry Reding interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 323742af7e7SThierry Reding status = "disabled"; 324742af7e7SThierry Reding }; 325742af7e7SThierry Reding 326be70771dSThierry Reding isp@54680000 { 327742af7e7SThierry Reding compatible = "nvidia,tegra210-isp"; 328742af7e7SThierry Reding reg = <0x0 0x54680000 0x0 0x00040000>; 329742af7e7SThierry Reding interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 330742af7e7SThierry Reding status = "disabled"; 331742af7e7SThierry Reding }; 332742af7e7SThierry Reding 333be70771dSThierry Reding i2c@546c0000 { 334742af7e7SThierry Reding compatible = "nvidia,tegra210-i2c-vi"; 335742af7e7SThierry Reding reg = <0x0 0x546c0000 0x0 0x00040000>; 336742af7e7SThierry Reding interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 337742af7e7SThierry Reding status = "disabled"; 338742af7e7SThierry Reding }; 339742af7e7SThierry Reding }; 340742af7e7SThierry Reding 341be70771dSThierry Reding gic: interrupt-controller@50041000 { 342742af7e7SThierry Reding compatible = "arm,gic-400"; 343742af7e7SThierry Reding #interrupt-cells = <3>; 344742af7e7SThierry Reding interrupt-controller; 345742af7e7SThierry Reding reg = <0x0 0x50041000 0x0 0x1000>, 346742af7e7SThierry Reding <0x0 0x50042000 0x0 0x2000>, 347742af7e7SThierry Reding <0x0 0x50044000 0x0 0x2000>, 348742af7e7SThierry Reding <0x0 0x50046000 0x0 0x2000>; 349742af7e7SThierry Reding interrupts = <GIC_PPI 9 350742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 351742af7e7SThierry Reding interrupt-parent = <&gic>; 352742af7e7SThierry Reding }; 353742af7e7SThierry Reding 354be70771dSThierry Reding gpu@57000000 { 355742af7e7SThierry Reding compatible = "nvidia,gm20b"; 356742af7e7SThierry Reding reg = <0x0 0x57000000 0x0 0x01000000>, 357742af7e7SThierry Reding <0x0 0x58000000 0x0 0x01000000>; 358742af7e7SThierry Reding interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 359742af7e7SThierry Reding <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 360742af7e7SThierry Reding interrupt-names = "stall", "nonstall"; 361742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_GPU>, 3624a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_P_OUT5>, 3634a0778e9SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_G_REF>; 3644a0778e9SAlexandre Courbot clock-names = "gpu", "pwr", "ref"; 365742af7e7SThierry Reding resets = <&tegra_car 184>; 366742af7e7SThierry Reding reset-names = "gpu"; 36730f949bcSAlexandre Courbot 36830f949bcSAlexandre Courbot iommus = <&mc TEGRA_SWGROUP_GPU>; 36930f949bcSAlexandre Courbot 370742af7e7SThierry Reding status = "disabled"; 371742af7e7SThierry Reding }; 372742af7e7SThierry Reding 373be70771dSThierry Reding lic: interrupt-controller@60004000 { 374742af7e7SThierry Reding compatible = "nvidia,tegra210-ictlr"; 375742af7e7SThierry Reding reg = <0x0 0x60004000 0x0 0x40>, /* primary controller */ 376742af7e7SThierry Reding <0x0 0x60004100 0x0 0x40>, /* secondary controller */ 377742af7e7SThierry Reding <0x0 0x60004200 0x0 0x40>, /* tertiary controller */ 378742af7e7SThierry Reding <0x0 0x60004300 0x0 0x40>, /* quaternary controller */ 379742af7e7SThierry Reding <0x0 0x60004400 0x0 0x40>, /* quinary controller */ 380742af7e7SThierry Reding <0x0 0x60004500 0x0 0x40>; /* senary controller */ 381742af7e7SThierry Reding interrupt-controller; 382742af7e7SThierry Reding #interrupt-cells = <3>; 383742af7e7SThierry Reding interrupt-parent = <&gic>; 384742af7e7SThierry Reding }; 385742af7e7SThierry Reding 386be70771dSThierry Reding timer@60005000 { 387742af7e7SThierry Reding compatible = "nvidia,tegra210-timer", "nvidia,tegra20-timer"; 388742af7e7SThierry Reding reg = <0x0 0x60005000 0x0 0x400>; 389742af7e7SThierry Reding interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 390742af7e7SThierry Reding <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 391742af7e7SThierry Reding <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 392742af7e7SThierry Reding <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 393742af7e7SThierry Reding <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 394742af7e7SThierry Reding <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 395742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_TIMER>; 396742af7e7SThierry Reding clock-names = "timer"; 397742af7e7SThierry Reding }; 398742af7e7SThierry Reding 399be70771dSThierry Reding tegra_car: clock@60006000 { 400742af7e7SThierry Reding compatible = "nvidia,tegra210-car"; 401742af7e7SThierry Reding reg = <0x0 0x60006000 0x0 0x1000>; 402742af7e7SThierry Reding #clock-cells = <1>; 403742af7e7SThierry Reding #reset-cells = <1>; 404742af7e7SThierry Reding }; 405742af7e7SThierry Reding 406be70771dSThierry Reding flow-controller@60007000 { 407742af7e7SThierry Reding compatible = "nvidia,tegra210-flowctrl"; 408742af7e7SThierry Reding reg = <0x0 0x60007000 0x0 0x1000>; 409742af7e7SThierry Reding }; 410742af7e7SThierry Reding 411be70771dSThierry Reding gpio: gpio@6000d000 { 41201665512SStephen Warren compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio"; 413742af7e7SThierry Reding reg = <0x0 0x6000d000 0x0 0x1000>; 414742af7e7SThierry Reding interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 415742af7e7SThierry Reding <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 416742af7e7SThierry Reding <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 417742af7e7SThierry Reding <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 418742af7e7SThierry Reding <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 419742af7e7SThierry Reding <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 420742af7e7SThierry Reding <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 421742af7e7SThierry Reding <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 422742af7e7SThierry Reding #gpio-cells = <2>; 423742af7e7SThierry Reding gpio-controller; 424742af7e7SThierry Reding #interrupt-cells = <2>; 425742af7e7SThierry Reding interrupt-controller; 426742af7e7SThierry Reding }; 427742af7e7SThierry Reding 428be70771dSThierry Reding apbdma: dma@60020000 { 429742af7e7SThierry Reding compatible = "nvidia,tegra210-apbdma", "nvidia,tegra148-apbdma"; 430742af7e7SThierry Reding reg = <0x0 0x60020000 0x0 0x1400>; 431742af7e7SThierry Reding interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 432742af7e7SThierry Reding <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 433742af7e7SThierry Reding <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 434742af7e7SThierry Reding <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 435742af7e7SThierry Reding <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 436742af7e7SThierry Reding <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 437742af7e7SThierry Reding <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 438742af7e7SThierry Reding <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 439742af7e7SThierry Reding <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 440742af7e7SThierry Reding <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 441742af7e7SThierry Reding <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 442742af7e7SThierry Reding <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 443742af7e7SThierry Reding <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 444742af7e7SThierry Reding <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 445742af7e7SThierry Reding <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 446742af7e7SThierry Reding <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, 447742af7e7SThierry Reding <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 448742af7e7SThierry Reding <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 449742af7e7SThierry Reding <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 450742af7e7SThierry Reding <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 451742af7e7SThierry Reding <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 452742af7e7SThierry Reding <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, 453742af7e7SThierry Reding <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, 454742af7e7SThierry Reding <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 455742af7e7SThierry Reding <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 456742af7e7SThierry Reding <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 457742af7e7SThierry Reding <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 458742af7e7SThierry Reding <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>, 459742af7e7SThierry Reding <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, 460742af7e7SThierry Reding <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, 461742af7e7SThierry Reding <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 462742af7e7SThierry Reding <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 463742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_APBDMA>; 464742af7e7SThierry Reding clock-names = "dma"; 465742af7e7SThierry Reding resets = <&tegra_car 34>; 466742af7e7SThierry Reding reset-names = "dma"; 467742af7e7SThierry Reding #dma-cells = <1>; 468742af7e7SThierry Reding }; 469742af7e7SThierry Reding 470be70771dSThierry Reding apbmisc@70000800 { 471742af7e7SThierry Reding compatible = "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc"; 472742af7e7SThierry Reding reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */ 47346e4b227SJoseph Lo <0x0 0x70000008 0x0 0x04>; /* Strapping options */ 474742af7e7SThierry Reding }; 475742af7e7SThierry Reding 476be70771dSThierry Reding pinmux: pinmux@700008d4 { 477742af7e7SThierry Reding compatible = "nvidia,tegra210-pinmux"; 478742af7e7SThierry Reding reg = <0x0 0x700008d4 0x0 0x29c>, /* Pad control registers */ 479742af7e7SThierry Reding <0x0 0x70003000 0x0 0x294>; /* Mux registers */ 4804e0f1229SSowjanya Komatineni sdmmc1_3v3_drv: sdmmc1-3v3-drv { 4814e0f1229SSowjanya Komatineni sdmmc1 { 4824e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc1"; 4834e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x8>; 4844e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x8>; 4854e0f1229SSowjanya Komatineni }; 4864e0f1229SSowjanya Komatineni }; 4874e0f1229SSowjanya Komatineni sdmmc1_1v8_drv: sdmmc1-1v8-drv { 4884e0f1229SSowjanya Komatineni sdmmc1 { 4894e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc1"; 4904e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x4>; 4914e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x3>; 4924e0f1229SSowjanya Komatineni }; 4934e0f1229SSowjanya Komatineni }; 4944e0f1229SSowjanya Komatineni sdmmc2_1v8_drv: sdmmc2-1v8-drv { 4954e0f1229SSowjanya Komatineni sdmmc2 { 4964e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc2"; 4974e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x10>; 4984e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x10>; 4994e0f1229SSowjanya Komatineni }; 5004e0f1229SSowjanya Komatineni }; 5014e0f1229SSowjanya Komatineni sdmmc3_3v3_drv: sdmmc3-3v3-drv { 5024e0f1229SSowjanya Komatineni sdmmc3 { 5034e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc3"; 5044e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x8>; 5054e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x8>; 5064e0f1229SSowjanya Komatineni }; 5074e0f1229SSowjanya Komatineni }; 5084e0f1229SSowjanya Komatineni sdmmc3_1v8_drv: sdmmc3-1v8-drv { 5094e0f1229SSowjanya Komatineni sdmmc3 { 5104e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc3"; 5114e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x4>; 5124e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x3>; 5134e0f1229SSowjanya Komatineni }; 5144e0f1229SSowjanya Komatineni }; 5154e0f1229SSowjanya Komatineni sdmmc4_1v8_drv: sdmmc4-1v8-drv { 5164e0f1229SSowjanya Komatineni sdmmc4 { 5174e0f1229SSowjanya Komatineni nvidia,pins = "drive_sdmmc4"; 5184e0f1229SSowjanya Komatineni nvidia,pull-down-strength = <0x10>; 5194e0f1229SSowjanya Komatineni nvidia,pull-up-strength = <0x10>; 5204e0f1229SSowjanya Komatineni }; 5214e0f1229SSowjanya Komatineni }; 522742af7e7SThierry Reding }; 523742af7e7SThierry Reding 524742af7e7SThierry Reding /* 525742af7e7SThierry Reding * There are two serial driver i.e. 8250 based simple serial 526742af7e7SThierry Reding * driver and APB DMA based serial driver for higher baudrate 527ef769e32SAdam Buchbinder * and performance. To enable the 8250 based driver, the compatible 528742af7e7SThierry Reding * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable 52968cd8b2eSThierry Reding * the APB DMA based serial driver, the compatible is 530742af7e7SThierry Reding * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart". 531742af7e7SThierry Reding */ 532be70771dSThierry Reding uarta: serial@70006000 { 533742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 534742af7e7SThierry Reding reg = <0x0 0x70006000 0x0 0x40>; 535742af7e7SThierry Reding reg-shift = <2>; 536742af7e7SThierry Reding interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 537742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTA>; 538742af7e7SThierry Reding clock-names = "serial"; 539742af7e7SThierry Reding resets = <&tegra_car 6>; 540742af7e7SThierry Reding reset-names = "serial"; 541742af7e7SThierry Reding dmas = <&apbdma 8>, <&apbdma 8>; 542742af7e7SThierry Reding dma-names = "rx", "tx"; 543742af7e7SThierry Reding status = "disabled"; 544742af7e7SThierry Reding }; 545742af7e7SThierry Reding 546be70771dSThierry Reding uartb: serial@70006040 { 547742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 548742af7e7SThierry Reding reg = <0x0 0x70006040 0x0 0x40>; 549742af7e7SThierry Reding reg-shift = <2>; 550742af7e7SThierry Reding interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 551742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTB>; 552742af7e7SThierry Reding clock-names = "serial"; 553742af7e7SThierry Reding resets = <&tegra_car 7>; 554742af7e7SThierry Reding reset-names = "serial"; 555742af7e7SThierry Reding dmas = <&apbdma 9>, <&apbdma 9>; 556742af7e7SThierry Reding dma-names = "rx", "tx"; 557742af7e7SThierry Reding status = "disabled"; 558742af7e7SThierry Reding }; 559742af7e7SThierry Reding 560be70771dSThierry Reding uartc: serial@70006200 { 561742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 562742af7e7SThierry Reding reg = <0x0 0x70006200 0x0 0x40>; 563742af7e7SThierry Reding reg-shift = <2>; 564742af7e7SThierry Reding interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 565742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTC>; 566742af7e7SThierry Reding clock-names = "serial"; 567742af7e7SThierry Reding resets = <&tegra_car 55>; 568742af7e7SThierry Reding reset-names = "serial"; 569742af7e7SThierry Reding dmas = <&apbdma 10>, <&apbdma 10>; 570742af7e7SThierry Reding dma-names = "rx", "tx"; 571742af7e7SThierry Reding status = "disabled"; 572742af7e7SThierry Reding }; 573742af7e7SThierry Reding 574be70771dSThierry Reding uartd: serial@70006300 { 575742af7e7SThierry Reding compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart"; 576742af7e7SThierry Reding reg = <0x0 0x70006300 0x0 0x40>; 577742af7e7SThierry Reding reg-shift = <2>; 578742af7e7SThierry Reding interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 579742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_UARTD>; 580742af7e7SThierry Reding clock-names = "serial"; 581742af7e7SThierry Reding resets = <&tegra_car 65>; 582742af7e7SThierry Reding reset-names = "serial"; 583742af7e7SThierry Reding dmas = <&apbdma 19>, <&apbdma 19>; 584742af7e7SThierry Reding dma-names = "rx", "tx"; 585742af7e7SThierry Reding status = "disabled"; 586742af7e7SThierry Reding }; 587742af7e7SThierry Reding 588be70771dSThierry Reding pwm: pwm@7000a000 { 589742af7e7SThierry Reding compatible = "nvidia,tegra210-pwm", "nvidia,tegra20-pwm"; 590742af7e7SThierry Reding reg = <0x0 0x7000a000 0x0 0x100>; 591742af7e7SThierry Reding #pwm-cells = <2>; 592742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PWM>; 593742af7e7SThierry Reding clock-names = "pwm"; 594742af7e7SThierry Reding resets = <&tegra_car 17>; 595742af7e7SThierry Reding reset-names = "pwm"; 596742af7e7SThierry Reding status = "disabled"; 597742af7e7SThierry Reding }; 598742af7e7SThierry Reding 599be70771dSThierry Reding i2c@7000c000 { 600140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 601742af7e7SThierry Reding reg = <0x0 0x7000c000 0x0 0x100>; 602742af7e7SThierry Reding interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 603742af7e7SThierry Reding #address-cells = <1>; 604742af7e7SThierry Reding #size-cells = <0>; 605742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C1>; 606742af7e7SThierry Reding clock-names = "div-clk"; 607742af7e7SThierry Reding resets = <&tegra_car 12>; 608742af7e7SThierry Reding reset-names = "i2c"; 609742af7e7SThierry Reding dmas = <&apbdma 21>, <&apbdma 21>; 610742af7e7SThierry Reding dma-names = "rx", "tx"; 611742af7e7SThierry Reding status = "disabled"; 612742af7e7SThierry Reding }; 613742af7e7SThierry Reding 614be70771dSThierry Reding i2c@7000c400 { 615140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 616742af7e7SThierry Reding reg = <0x0 0x7000c400 0x0 0x100>; 617742af7e7SThierry Reding interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 618742af7e7SThierry Reding #address-cells = <1>; 619742af7e7SThierry Reding #size-cells = <0>; 620742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C2>; 621742af7e7SThierry Reding clock-names = "div-clk"; 622742af7e7SThierry Reding resets = <&tegra_car 54>; 623742af7e7SThierry Reding reset-names = "i2c"; 624742af7e7SThierry Reding dmas = <&apbdma 22>, <&apbdma 22>; 625742af7e7SThierry Reding dma-names = "rx", "tx"; 626742af7e7SThierry Reding status = "disabled"; 627742af7e7SThierry Reding }; 628742af7e7SThierry Reding 629be70771dSThierry Reding i2c@7000c500 { 630140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 631742af7e7SThierry Reding reg = <0x0 0x7000c500 0x0 0x100>; 632742af7e7SThierry Reding interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 633742af7e7SThierry Reding #address-cells = <1>; 634742af7e7SThierry Reding #size-cells = <0>; 635742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C3>; 636742af7e7SThierry Reding clock-names = "div-clk"; 637742af7e7SThierry Reding resets = <&tegra_car 67>; 638742af7e7SThierry Reding reset-names = "i2c"; 639742af7e7SThierry Reding dmas = <&apbdma 23>, <&apbdma 23>; 640742af7e7SThierry Reding dma-names = "rx", "tx"; 641742af7e7SThierry Reding status = "disabled"; 642742af7e7SThierry Reding }; 643742af7e7SThierry Reding 644be70771dSThierry Reding i2c@7000c700 { 645140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 646742af7e7SThierry Reding reg = <0x0 0x7000c700 0x0 0x100>; 647742af7e7SThierry Reding interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 648742af7e7SThierry Reding #address-cells = <1>; 649742af7e7SThierry Reding #size-cells = <0>; 650742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C4>; 651742af7e7SThierry Reding clock-names = "div-clk"; 652742af7e7SThierry Reding resets = <&tegra_car 103>; 653742af7e7SThierry Reding reset-names = "i2c"; 654742af7e7SThierry Reding dmas = <&apbdma 26>, <&apbdma 26>; 655742af7e7SThierry Reding dma-names = "rx", "tx"; 65666b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux1_i2c>; 65766b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux1_off>; 65866b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 659742af7e7SThierry Reding status = "disabled"; 660742af7e7SThierry Reding }; 661742af7e7SThierry Reding 662be70771dSThierry Reding i2c@7000d000 { 663140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 664742af7e7SThierry Reding reg = <0x0 0x7000d000 0x0 0x100>; 665742af7e7SThierry Reding interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 666742af7e7SThierry Reding #address-cells = <1>; 667742af7e7SThierry Reding #size-cells = <0>; 668742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C5>; 669742af7e7SThierry Reding clock-names = "div-clk"; 670742af7e7SThierry Reding resets = <&tegra_car 47>; 671742af7e7SThierry Reding reset-names = "i2c"; 672742af7e7SThierry Reding dmas = <&apbdma 24>, <&apbdma 24>; 673742af7e7SThierry Reding dma-names = "rx", "tx"; 674742af7e7SThierry Reding status = "disabled"; 675742af7e7SThierry Reding }; 676742af7e7SThierry Reding 677be70771dSThierry Reding i2c@7000d100 { 678140723b9SSowjanya Komatineni compatible = "nvidia,tegra210-i2c", "nvidia,tegra124-i2c"; 679742af7e7SThierry Reding reg = <0x0 0x7000d100 0x0 0x100>; 680742af7e7SThierry Reding interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 681742af7e7SThierry Reding #address-cells = <1>; 682742af7e7SThierry Reding #size-cells = <0>; 683742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_I2C6>; 684742af7e7SThierry Reding clock-names = "div-clk"; 685742af7e7SThierry Reding resets = <&tegra_car 166>; 686742af7e7SThierry Reding reset-names = "i2c"; 687742af7e7SThierry Reding dmas = <&apbdma 30>, <&apbdma 30>; 688742af7e7SThierry Reding dma-names = "rx", "tx"; 68966b2d6e9SJon Hunter pinctrl-0 = <&state_dpaux_i2c>; 69066b2d6e9SJon Hunter pinctrl-1 = <&state_dpaux_off>; 69166b2d6e9SJon Hunter pinctrl-names = "default", "idle"; 692742af7e7SThierry Reding status = "disabled"; 693742af7e7SThierry Reding }; 694742af7e7SThierry Reding 695be70771dSThierry Reding spi@7000d400 { 696742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 697742af7e7SThierry Reding reg = <0x0 0x7000d400 0x0 0x200>; 698742af7e7SThierry Reding interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 699742af7e7SThierry Reding #address-cells = <1>; 700742af7e7SThierry Reding #size-cells = <0>; 701742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC1>; 702742af7e7SThierry Reding clock-names = "spi"; 703742af7e7SThierry Reding resets = <&tegra_car 41>; 704742af7e7SThierry Reding reset-names = "spi"; 705742af7e7SThierry Reding dmas = <&apbdma 15>, <&apbdma 15>; 706742af7e7SThierry Reding dma-names = "rx", "tx"; 707742af7e7SThierry Reding status = "disabled"; 708742af7e7SThierry Reding }; 709742af7e7SThierry Reding 710be70771dSThierry Reding spi@7000d600 { 711742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 712742af7e7SThierry Reding reg = <0x0 0x7000d600 0x0 0x200>; 713742af7e7SThierry Reding interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 714742af7e7SThierry Reding #address-cells = <1>; 715742af7e7SThierry Reding #size-cells = <0>; 716742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC2>; 717742af7e7SThierry Reding clock-names = "spi"; 718742af7e7SThierry Reding resets = <&tegra_car 44>; 719742af7e7SThierry Reding reset-names = "spi"; 720742af7e7SThierry Reding dmas = <&apbdma 16>, <&apbdma 16>; 721742af7e7SThierry Reding dma-names = "rx", "tx"; 722742af7e7SThierry Reding status = "disabled"; 723742af7e7SThierry Reding }; 724742af7e7SThierry Reding 725be70771dSThierry Reding spi@7000d800 { 726742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 727742af7e7SThierry Reding reg = <0x0 0x7000d800 0x0 0x200>; 728742af7e7SThierry Reding interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 729742af7e7SThierry Reding #address-cells = <1>; 730742af7e7SThierry Reding #size-cells = <0>; 731742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC3>; 732742af7e7SThierry Reding clock-names = "spi"; 733742af7e7SThierry Reding resets = <&tegra_car 46>; 734742af7e7SThierry Reding reset-names = "spi"; 735742af7e7SThierry Reding dmas = <&apbdma 17>, <&apbdma 17>; 736742af7e7SThierry Reding dma-names = "rx", "tx"; 737742af7e7SThierry Reding status = "disabled"; 738742af7e7SThierry Reding }; 739742af7e7SThierry Reding 740be70771dSThierry Reding spi@7000da00 { 741742af7e7SThierry Reding compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi"; 742742af7e7SThierry Reding reg = <0x0 0x7000da00 0x0 0x200>; 743742af7e7SThierry Reding interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 744742af7e7SThierry Reding #address-cells = <1>; 745742af7e7SThierry Reding #size-cells = <0>; 746742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SBC4>; 747742af7e7SThierry Reding clock-names = "spi"; 748742af7e7SThierry Reding resets = <&tegra_car 68>; 749742af7e7SThierry Reding reset-names = "spi"; 750742af7e7SThierry Reding dmas = <&apbdma 18>, <&apbdma 18>; 751742af7e7SThierry Reding dma-names = "rx", "tx"; 752742af7e7SThierry Reding status = "disabled"; 753742af7e7SThierry Reding }; 754742af7e7SThierry Reding 755be70771dSThierry Reding rtc@7000e000 { 756742af7e7SThierry Reding compatible = "nvidia,tegra210-rtc", "nvidia,tegra20-rtc"; 757742af7e7SThierry Reding reg = <0x0 0x7000e000 0x0 0x100>; 758742af7e7SThierry Reding interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 759742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_RTC>; 760742af7e7SThierry Reding clock-names = "rtc"; 761742af7e7SThierry Reding }; 762742af7e7SThierry Reding 763be70771dSThierry Reding pmc: pmc@7000e400 { 764742af7e7SThierry Reding compatible = "nvidia,tegra210-pmc"; 765742af7e7SThierry Reding reg = <0x0 0x7000e400 0x0 0x400>; 766742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; 767742af7e7SThierry Reding clock-names = "pclk", "clk32k_in"; 768c2b82445SJon Hunter 769c2b82445SJon Hunter powergates { 770c2b82445SJon Hunter pd_audio: aud { 771c2b82445SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 772c2b82445SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 773c2b82445SJon Hunter resets = <&tegra_car 198>; 774c2b82445SJon Hunter #power-domain-cells = <0>; 775c2b82445SJon Hunter }; 776241f02baSJon Hunter 77796d1f078SJon Hunter pd_sor: sor { 77896d1f078SJon Hunter clocks = <&tegra_car TEGRA210_CLK_SOR0>, 77996d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 78096d1f078SJon Hunter <&tegra_car TEGRA210_CLK_CSI>, 78196d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 78296d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 78396d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 78496d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 78596d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 78696d1f078SJon Hunter resets = <&tegra_car TEGRA210_CLK_SOR0>, 78796d1f078SJon Hunter <&tegra_car TEGRA210_CLK_SOR1>, 78896d1f078SJon Hunter <&tegra_car TEGRA210_CLK_CSI>, 78996d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIA>, 79096d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DSIB>, 79196d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX>, 79296d1f078SJon Hunter <&tegra_car TEGRA210_CLK_DPAUX1>, 79396d1f078SJon Hunter <&tegra_car TEGRA210_CLK_MIPI_CAL>; 79496d1f078SJon Hunter #power-domain-cells = <0>; 79596d1f078SJon Hunter }; 79696d1f078SJon Hunter 797241f02baSJon Hunter pd_xusbss: xusba { 798241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>; 799241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_SS>; 800241f02baSJon Hunter #power-domain-cells = <0>; 801241f02baSJon Hunter }; 802241f02baSJon Hunter 803241f02baSJon Hunter pd_xusbdev: xusbb { 804241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>; 805241f02baSJon Hunter resets = <&tegra_car 95>; 806241f02baSJon Hunter #power-domain-cells = <0>; 807241f02baSJon Hunter }; 808241f02baSJon Hunter 809241f02baSJon Hunter pd_xusbhost: xusbc { 810241f02baSJon Hunter clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 811241f02baSJon Hunter resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>; 812241f02baSJon Hunter #power-domain-cells = <0>; 813241f02baSJon Hunter }; 81424963d1bSMikko Perttunen 81524963d1bSMikko Perttunen pd_vic: vic { 81624963d1bSMikko Perttunen clocks = <&tegra_car TEGRA210_CLK_VIC03>; 81724963d1bSMikko Perttunen clock-names = "vic"; 81824963d1bSMikko Perttunen resets = <&tegra_car 178>; 81924963d1bSMikko Perttunen reset-names = "vic"; 82024963d1bSMikko Perttunen #power-domain-cells = <0>; 82124963d1bSMikko Perttunen }; 822c2b82445SJon Hunter }; 8236641af7eSAapo Vienamo 8246641af7eSAapo Vienamo sdmmc1_3v3: sdmmc1-3v3 { 8256641af7eSAapo Vienamo pins = "sdmmc1"; 8266641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>; 8276641af7eSAapo Vienamo }; 8286641af7eSAapo Vienamo 8296641af7eSAapo Vienamo sdmmc1_1v8: sdmmc1-1v8 { 8306641af7eSAapo Vienamo pins = "sdmmc1"; 8316641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>; 8326641af7eSAapo Vienamo }; 8336641af7eSAapo Vienamo 8346641af7eSAapo Vienamo sdmmc3_3v3: sdmmc3-3v3 { 8356641af7eSAapo Vienamo pins = "sdmmc3"; 8366641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>; 8376641af7eSAapo Vienamo }; 8386641af7eSAapo Vienamo 8396641af7eSAapo Vienamo sdmmc3_1v8: sdmmc3-1v8 { 8406641af7eSAapo Vienamo pins = "sdmmc3"; 8416641af7eSAapo Vienamo power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>; 8426641af7eSAapo Vienamo }; 843742af7e7SThierry Reding }; 844742af7e7SThierry Reding 845be70771dSThierry Reding fuse@7000f800 { 846742af7e7SThierry Reding compatible = "nvidia,tegra210-efuse"; 847742af7e7SThierry Reding reg = <0x0 0x7000f800 0x0 0x400>; 848742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_FUSE>; 849742af7e7SThierry Reding clock-names = "fuse"; 850742af7e7SThierry Reding resets = <&tegra_car 39>; 851742af7e7SThierry Reding reset-names = "fuse"; 852742af7e7SThierry Reding }; 853742af7e7SThierry Reding 854be70771dSThierry Reding mc: memory-controller@70019000 { 855742af7e7SThierry Reding compatible = "nvidia,tegra210-mc"; 856742af7e7SThierry Reding reg = <0x0 0x70019000 0x0 0x1000>; 857742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MC>; 858742af7e7SThierry Reding clock-names = "mc"; 859742af7e7SThierry Reding 860742af7e7SThierry Reding interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 861742af7e7SThierry Reding 862742af7e7SThierry Reding #iommu-cells = <1>; 863742af7e7SThierry Reding }; 864742af7e7SThierry Reding 8656cb60ec4SPreetham Ramchandra sata@70020000 { 8666cb60ec4SPreetham Ramchandra compatible = "nvidia,tegra210-ahci"; 8676cb60ec4SPreetham Ramchandra reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */ 8686cb60ec4SPreetham Ramchandra <0x0 0x70020000 0x0 0x7000>, /* SATA */ 8696cb60ec4SPreetham Ramchandra <0x0 0x70001100 0x0 0x1000>; /* SATA AUX */ 8706cb60ec4SPreetham Ramchandra interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 8716cb60ec4SPreetham Ramchandra clocks = <&tegra_car TEGRA210_CLK_SATA>, 8726cb60ec4SPreetham Ramchandra <&tegra_car TEGRA210_CLK_SATA_OOB>; 8736cb60ec4SPreetham Ramchandra clock-names = "sata", "sata-oob"; 8746cb60ec4SPreetham Ramchandra resets = <&tegra_car 124>, 8756cb60ec4SPreetham Ramchandra <&tegra_car 123>, 8766cb60ec4SPreetham Ramchandra <&tegra_car 129>; 8776cb60ec4SPreetham Ramchandra reset-names = "sata", "sata-oob", "sata-cold"; 8786cb60ec4SPreetham Ramchandra status = "disabled"; 8796cb60ec4SPreetham Ramchandra }; 8806cb60ec4SPreetham Ramchandra 881be70771dSThierry Reding hda@70030000 { 882742af7e7SThierry Reding compatible = "nvidia,tegra210-hda", "nvidia,tegra30-hda"; 883742af7e7SThierry Reding reg = <0x0 0x70030000 0x0 0x10000>; 884742af7e7SThierry Reding interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 885742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HDA>, 886742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2HDMI>, 887742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_HDA2CODEC_2X>; 888742af7e7SThierry Reding clock-names = "hda", "hda2hdmi", "hda2codec_2x"; 889742af7e7SThierry Reding resets = <&tegra_car 125>, /* hda */ 890742af7e7SThierry Reding <&tegra_car 128>, /* hda2hdmi */ 891742af7e7SThierry Reding <&tegra_car 111>; /* hda2codec_2x */ 892742af7e7SThierry Reding reset-names = "hda", "hda2hdmi", "hda2codec_2x"; 893742af7e7SThierry Reding status = "disabled"; 894742af7e7SThierry Reding }; 895742af7e7SThierry Reding 896e7a99ac2SThierry Reding usb@70090000 { 897e7a99ac2SThierry Reding compatible = "nvidia,tegra210-xusb"; 898e7a99ac2SThierry Reding reg = <0x0 0x70090000 0x0 0x8000>, 899e7a99ac2SThierry Reding <0x0 0x70098000 0x0 0x1000>, 900e7a99ac2SThierry Reding <0x0 0x70099000 0x0 0x1000>; 901e7a99ac2SThierry Reding reg-names = "hcd", "fpci", "ipfs"; 902e7a99ac2SThierry Reding 903e7a99ac2SThierry Reding interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 9049168e1dbSJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 905e7a99ac2SThierry Reding 906e7a99ac2SThierry Reding clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>, 907e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>, 908e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>, 909e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS>, 910e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>, 911e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>, 912e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, 913e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, 914e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U_480M>, 915e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_CLK_M>, 916e7a99ac2SThierry Reding <&tegra_car TEGRA210_CLK_PLL_E>; 917e7a99ac2SThierry Reding clock-names = "xusb_host", "xusb_host_src", 918e7a99ac2SThierry Reding "xusb_falcon_src", "xusb_ss", 919e7a99ac2SThierry Reding "xusb_ss_div2", "xusb_ss_src", 920e7a99ac2SThierry Reding "xusb_hs_src", "xusb_fs_src", 921e7a99ac2SThierry Reding "pll_u_480m", "clk_m", "pll_e"; 922e7a99ac2SThierry Reding resets = <&tegra_car 89>, <&tegra_car 156>, 923e7a99ac2SThierry Reding <&tegra_car 143>; 924e7a99ac2SThierry Reding reset-names = "xusb_host", "xusb_ss", "xusb_src"; 92536ec29f7SJon Hunter power-domains = <&pd_xusbhost>, <&pd_xusbss>; 92636ec29f7SJon Hunter power-domain-names = "xusb_host", "xusb_ss"; 927e7a99ac2SThierry Reding 928e7a99ac2SThierry Reding nvidia,xusb-padctl = <&padctl>; 929e7a99ac2SThierry Reding 930e7a99ac2SThierry Reding status = "disabled"; 931e7a99ac2SThierry Reding }; 932e7a99ac2SThierry Reding 9334e07ac90SThierry Reding padctl: padctl@7009f000 { 9344e07ac90SThierry Reding compatible = "nvidia,tegra210-xusb-padctl"; 9354e07ac90SThierry Reding reg = <0x0 0x7009f000 0x0 0x1000>; 9364e07ac90SThierry Reding resets = <&tegra_car 142>; 9374e07ac90SThierry Reding reset-names = "padctl"; 9384e07ac90SThierry Reding 9394e07ac90SThierry Reding status = "disabled"; 9404e07ac90SThierry Reding 9414e07ac90SThierry Reding pads { 9424e07ac90SThierry Reding usb2 { 9434e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>; 9444e07ac90SThierry Reding clock-names = "trk"; 9454e07ac90SThierry Reding status = "disabled"; 9464e07ac90SThierry Reding 9474e07ac90SThierry Reding lanes { 9484e07ac90SThierry Reding usb2-0 { 9494e07ac90SThierry Reding status = "disabled"; 9504e07ac90SThierry Reding #phy-cells = <0>; 9514e07ac90SThierry Reding }; 9524e07ac90SThierry Reding 9534e07ac90SThierry Reding usb2-1 { 9544e07ac90SThierry Reding status = "disabled"; 9554e07ac90SThierry Reding #phy-cells = <0>; 9564e07ac90SThierry Reding }; 9574e07ac90SThierry Reding 9584e07ac90SThierry Reding usb2-2 { 9594e07ac90SThierry Reding status = "disabled"; 9604e07ac90SThierry Reding #phy-cells = <0>; 9614e07ac90SThierry Reding }; 9624e07ac90SThierry Reding 9634e07ac90SThierry Reding usb2-3 { 9644e07ac90SThierry Reding status = "disabled"; 9654e07ac90SThierry Reding #phy-cells = <0>; 9664e07ac90SThierry Reding }; 9674e07ac90SThierry Reding }; 9684e07ac90SThierry Reding }; 9694e07ac90SThierry Reding 9704e07ac90SThierry Reding hsic { 9714e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>; 9724e07ac90SThierry Reding clock-names = "trk"; 9734e07ac90SThierry Reding status = "disabled"; 9744e07ac90SThierry Reding 9754e07ac90SThierry Reding lanes { 9764e07ac90SThierry Reding hsic-0 { 9774e07ac90SThierry Reding status = "disabled"; 9784e07ac90SThierry Reding #phy-cells = <0>; 9794e07ac90SThierry Reding }; 9804e07ac90SThierry Reding 9814e07ac90SThierry Reding hsic-1 { 9824e07ac90SThierry Reding status = "disabled"; 9834e07ac90SThierry Reding #phy-cells = <0>; 9844e07ac90SThierry Reding }; 9854e07ac90SThierry Reding }; 9864e07ac90SThierry Reding }; 9874e07ac90SThierry Reding 9884e07ac90SThierry Reding pcie { 9894e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 9904e07ac90SThierry Reding clock-names = "pll"; 9914e07ac90SThierry Reding resets = <&tegra_car 205>; 9924e07ac90SThierry Reding reset-names = "phy"; 9934e07ac90SThierry Reding status = "disabled"; 9944e07ac90SThierry Reding 9954e07ac90SThierry Reding lanes { 9964e07ac90SThierry Reding pcie-0 { 9974e07ac90SThierry Reding status = "disabled"; 9984e07ac90SThierry Reding #phy-cells = <0>; 9994e07ac90SThierry Reding }; 10004e07ac90SThierry Reding 10014e07ac90SThierry Reding pcie-1 { 10024e07ac90SThierry Reding status = "disabled"; 10034e07ac90SThierry Reding #phy-cells = <0>; 10044e07ac90SThierry Reding }; 10054e07ac90SThierry Reding 10064e07ac90SThierry Reding pcie-2 { 10074e07ac90SThierry Reding status = "disabled"; 10084e07ac90SThierry Reding #phy-cells = <0>; 10094e07ac90SThierry Reding }; 10104e07ac90SThierry Reding 10114e07ac90SThierry Reding pcie-3 { 10124e07ac90SThierry Reding status = "disabled"; 10134e07ac90SThierry Reding #phy-cells = <0>; 10144e07ac90SThierry Reding }; 10154e07ac90SThierry Reding 10164e07ac90SThierry Reding pcie-4 { 10174e07ac90SThierry Reding status = "disabled"; 10184e07ac90SThierry Reding #phy-cells = <0>; 10194e07ac90SThierry Reding }; 10204e07ac90SThierry Reding 10214e07ac90SThierry Reding pcie-5 { 10224e07ac90SThierry Reding status = "disabled"; 10234e07ac90SThierry Reding #phy-cells = <0>; 10244e07ac90SThierry Reding }; 10254e07ac90SThierry Reding 10264e07ac90SThierry Reding pcie-6 { 10274e07ac90SThierry Reding status = "disabled"; 10284e07ac90SThierry Reding #phy-cells = <0>; 10294e07ac90SThierry Reding }; 10304e07ac90SThierry Reding }; 10314e07ac90SThierry Reding }; 10324e07ac90SThierry Reding 10334e07ac90SThierry Reding sata { 10344e07ac90SThierry Reding clocks = <&tegra_car TEGRA210_CLK_PLL_E>; 10354e07ac90SThierry Reding clock-names = "pll"; 10364e07ac90SThierry Reding resets = <&tegra_car 204>; 10374e07ac90SThierry Reding reset-names = "phy"; 10384e07ac90SThierry Reding status = "disabled"; 10394e07ac90SThierry Reding 10404e07ac90SThierry Reding lanes { 10414e07ac90SThierry Reding sata-0 { 10424e07ac90SThierry Reding status = "disabled"; 10434e07ac90SThierry Reding #phy-cells = <0>; 10444e07ac90SThierry Reding }; 10454e07ac90SThierry Reding }; 10464e07ac90SThierry Reding }; 10474e07ac90SThierry Reding }; 10484e07ac90SThierry Reding 10494e07ac90SThierry Reding ports { 10504e07ac90SThierry Reding usb2-0 { 10514e07ac90SThierry Reding status = "disabled"; 10524e07ac90SThierry Reding }; 10534e07ac90SThierry Reding 10544e07ac90SThierry Reding usb2-1 { 10554e07ac90SThierry Reding status = "disabled"; 10564e07ac90SThierry Reding }; 10574e07ac90SThierry Reding 10584e07ac90SThierry Reding usb2-2 { 10594e07ac90SThierry Reding status = "disabled"; 10604e07ac90SThierry Reding }; 10614e07ac90SThierry Reding 10624e07ac90SThierry Reding usb2-3 { 10634e07ac90SThierry Reding status = "disabled"; 10644e07ac90SThierry Reding }; 10654e07ac90SThierry Reding 10664e07ac90SThierry Reding hsic-0 { 10674e07ac90SThierry Reding status = "disabled"; 10684e07ac90SThierry Reding }; 10694e07ac90SThierry Reding 10704e07ac90SThierry Reding usb3-0 { 10714e07ac90SThierry Reding status = "disabled"; 10724e07ac90SThierry Reding }; 10734e07ac90SThierry Reding 10744e07ac90SThierry Reding usb3-1 { 10754e07ac90SThierry Reding status = "disabled"; 10764e07ac90SThierry Reding }; 10774e07ac90SThierry Reding 10784e07ac90SThierry Reding usb3-2 { 10794e07ac90SThierry Reding status = "disabled"; 10804e07ac90SThierry Reding }; 10814e07ac90SThierry Reding 10824e07ac90SThierry Reding usb3-3 { 10834e07ac90SThierry Reding status = "disabled"; 10844e07ac90SThierry Reding }; 10854e07ac90SThierry Reding }; 10864e07ac90SThierry Reding }; 10874e07ac90SThierry Reding 1088be70771dSThierry Reding sdhci@700b0000 { 1089742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1090742af7e7SThierry Reding reg = <0x0 0x700b0000 0x0 0x200>; 1091742af7e7SThierry Reding interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1092742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC1>; 1093742af7e7SThierry Reding clock-names = "sdhci"; 1094742af7e7SThierry Reding resets = <&tegra_car 14>; 1095742af7e7SThierry Reding reset-names = "sdhci"; 10964e0f1229SSowjanya Komatineni pinctrl-names = "sdmmc-3v3", "sdmmc-1v8", 10974e0f1229SSowjanya Komatineni "sdmmc-3v3-drv", "sdmmc-1v8-drv"; 10986641af7eSAapo Vienamo pinctrl-0 = <&sdmmc1_3v3>; 10996641af7eSAapo Vienamo pinctrl-1 = <&sdmmc1_1v8>; 11004e0f1229SSowjanya Komatineni pinctrl-2 = <&sdmmc1_3v3_drv>; 11014e0f1229SSowjanya Komatineni pinctrl-3 = <&sdmmc1_1v8_drv>; 11021ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>; 11031ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>; 11041ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>; 11051ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>; 110663af8bcdSAapo Vienamo nvidia,default-tap = <0x2>; 110763af8bcdSAapo Vienamo nvidia,default-trim = <0x4>; 1108918f9671SAapo Vienamo assigned-clocks = <&tegra_car TEGRA210_CLK_SDMMC4>, 1109918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>, 1110918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4>; 1111918f9671SAapo Vienamo assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 1112918f9671SAapo Vienamo assigned-clock-rates = <200000000>, <1000000000>, <1000000000>; 1113742af7e7SThierry Reding status = "disabled"; 1114742af7e7SThierry Reding }; 1115742af7e7SThierry Reding 1116be70771dSThierry Reding sdhci@700b0200 { 1117742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1118742af7e7SThierry Reding reg = <0x0 0x700b0200 0x0 0x200>; 1119742af7e7SThierry Reding interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1120742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC2>; 1121742af7e7SThierry Reding clock-names = "sdhci"; 1122742af7e7SThierry Reding resets = <&tegra_car 9>; 1123742af7e7SThierry Reding reset-names = "sdhci"; 11244e0f1229SSowjanya Komatineni pinctrl-names = "sdmmc-1v8-drv"; 11254e0f1229SSowjanya Komatineni pinctrl-0 = <&sdmmc2_1v8_drv>; 11261ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x05>; 11271ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x05>; 112863af8bcdSAapo Vienamo nvidia,default-tap = <0x8>; 112963af8bcdSAapo Vienamo nvidia,default-trim = <0x0>; 1130742af7e7SThierry Reding status = "disabled"; 1131742af7e7SThierry Reding }; 1132742af7e7SThierry Reding 1133be70771dSThierry Reding sdhci@700b0400 { 1134742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1135742af7e7SThierry Reding reg = <0x0 0x700b0400 0x0 0x200>; 1136742af7e7SThierry Reding interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 1137742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC3>; 1138742af7e7SThierry Reding clock-names = "sdhci"; 1139742af7e7SThierry Reding resets = <&tegra_car 69>; 1140742af7e7SThierry Reding reset-names = "sdhci"; 11414e0f1229SSowjanya Komatineni pinctrl-names = "sdmmc-3v3", "sdmmc-1v8", 11424e0f1229SSowjanya Komatineni "sdmmc-3v3-drv", "sdmmc-1v8-drv"; 11436641af7eSAapo Vienamo pinctrl-0 = <&sdmmc3_3v3>; 11446641af7eSAapo Vienamo pinctrl-1 = <&sdmmc3_1v8>; 11454e0f1229SSowjanya Komatineni pinctrl-2 = <&sdmmc3_3v3_drv>; 11464e0f1229SSowjanya Komatineni pinctrl-3 = <&sdmmc3_1v8_drv>; 11471ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>; 11481ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>; 11491ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>; 11501ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>; 115163af8bcdSAapo Vienamo nvidia,default-tap = <0x3>; 115263af8bcdSAapo Vienamo nvidia,default-trim = <0x3>; 1153742af7e7SThierry Reding status = "disabled"; 1154742af7e7SThierry Reding }; 1155742af7e7SThierry Reding 1156be70771dSThierry Reding sdhci@700b0600 { 1157742af7e7SThierry Reding compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; 1158742af7e7SThierry Reding reg = <0x0 0x700b0600 0x0 0x200>; 1159742af7e7SThierry Reding interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 1160742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_SDMMC4>; 1161742af7e7SThierry Reding clock-names = "sdhci"; 1162742af7e7SThierry Reding resets = <&tegra_car 15>; 1163742af7e7SThierry Reding reset-names = "sdhci"; 11644e0f1229SSowjanya Komatineni pinctrl-names = "sdmmc-3v3-drv", "sdmmc-1v8-drv"; 11654e0f1229SSowjanya Komatineni pinctrl-0 = <&sdmmc4_1v8_drv>; 11664e0f1229SSowjanya Komatineni pinctrl-1 = <&sdmmc4_1v8_drv>; 11671ea06718SAapo Vienamo nvidia,pad-autocal-pull-up-offset-1v8 = <0x05>; 11681ea06718SAapo Vienamo nvidia,pad-autocal-pull-down-offset-1v8 = <0x05>; 116963af8bcdSAapo Vienamo nvidia,default-tap = <0x8>; 117063af8bcdSAapo Vienamo nvidia,default-trim = <0x0>; 1171918f9671SAapo Vienamo assigned-clocks = <&tegra_car TEGRA210_CLK_SDMMC4>, 1172918f9671SAapo Vienamo <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 1173918f9671SAapo Vienamo assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 11745879600aSAapo Vienamo nvidia,dqs-trim = <40>; 1175d5d6b468SAapo Vienamo mmc-hs400-1_8v; 1176742af7e7SThierry Reding status = "disabled"; 1177742af7e7SThierry Reding }; 1178742af7e7SThierry Reding 1179be70771dSThierry Reding mipi: mipi@700e3000 { 1180742af7e7SThierry Reding compatible = "nvidia,tegra210-mipi"; 1181742af7e7SThierry Reding reg = <0x0 0x700e3000 0x0 0x100>; 1182742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_MIPI_CAL>; 1183742af7e7SThierry Reding clock-names = "mipi-cal"; 118496d1f078SJon Hunter power-domains = <&pd_sor>; 1185742af7e7SThierry Reding #nvidia,mipi-calibrate-cells = <1>; 1186742af7e7SThierry Reding }; 1187742af7e7SThierry Reding 11882ceed593SJoseph Lo dfll: clock@70110000 { 11892ceed593SJoseph Lo compatible = "nvidia,tegra210-dfll"; 11902ceed593SJoseph Lo reg = <0 0x70110000 0 0x100>, /* DFLL control */ 11912ceed593SJoseph Lo <0 0x70110000 0 0x100>, /* I2C output control */ 11922ceed593SJoseph Lo <0 0x70110100 0 0x100>, /* Integrated I2C controller */ 11932ceed593SJoseph Lo <0 0x70110200 0 0x100>; /* Look-up table RAM */ 11942ceed593SJoseph Lo interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 11952ceed593SJoseph Lo clocks = <&tegra_car TEGRA210_CLK_DFLL_SOC>, 11962ceed593SJoseph Lo <&tegra_car TEGRA210_CLK_DFLL_REF>, 11972ceed593SJoseph Lo <&tegra_car TEGRA210_CLK_I2C5>; 11982ceed593SJoseph Lo clock-names = "soc", "ref", "i2c"; 11992ceed593SJoseph Lo resets = <&tegra_car TEGRA210_RST_DFLL_DVCO>; 12002ceed593SJoseph Lo reset-names = "dvco"; 12012ceed593SJoseph Lo #clock-cells = <0>; 12022ceed593SJoseph Lo clock-output-names = "dfllCPU_out"; 12032ceed593SJoseph Lo status = "disabled"; 12042ceed593SJoseph Lo }; 12052ceed593SJoseph Lo 12060f133090SJon Hunter aconnect@702c0000 { 12070f133090SJon Hunter compatible = "nvidia,tegra210-aconnect"; 12080f133090SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>, 12090f133090SJon Hunter <&tegra_car TEGRA210_CLK_APB2APE>; 12100f133090SJon Hunter clock-names = "ape", "apb2ape"; 12110f133090SJon Hunter power-domains = <&pd_audio>; 12120f133090SJon Hunter #address-cells = <1>; 12130f133090SJon Hunter #size-cells = <1>; 12140f133090SJon Hunter ranges = <0x702c0000 0x0 0x702c0000 0x00040000>; 12150f133090SJon Hunter status = "disabled"; 1216bcdbde43SJon Hunter 121719e61213SJon Hunter adma: dma@702e2000 { 121819e61213SJon Hunter compatible = "nvidia,tegra210-adma"; 121919e61213SJon Hunter reg = <0x702e2000 0x2000>; 122019e61213SJon Hunter interrupt-parent = <&agic>; 122119e61213SJon Hunter interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, 122219e61213SJon Hunter <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, 122319e61213SJon Hunter <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, 122419e61213SJon Hunter <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, 122519e61213SJon Hunter <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, 122619e61213SJon Hunter <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 122719e61213SJon Hunter <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, 122819e61213SJon Hunter <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, 122919e61213SJon Hunter <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 123019e61213SJon Hunter <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 123119e61213SJon Hunter <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 123219e61213SJon Hunter <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 123319e61213SJon Hunter <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 123419e61213SJon Hunter <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 123519e61213SJon Hunter <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 123619e61213SJon Hunter <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 123719e61213SJon Hunter <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 123819e61213SJon Hunter <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 123919e61213SJon Hunter <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 124019e61213SJon Hunter <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 124119e61213SJon Hunter <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 124219e61213SJon Hunter <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 124319e61213SJon Hunter #dma-cells = <1>; 124419e61213SJon Hunter clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; 124519e61213SJon Hunter clock-names = "d_audio"; 124619e61213SJon Hunter status = "disabled"; 124719e61213SJon Hunter }; 124819e61213SJon Hunter 1249bcdbde43SJon Hunter agic: agic@702f9000 { 1250bcdbde43SJon Hunter compatible = "nvidia,tegra210-agic"; 1251bcdbde43SJon Hunter #interrupt-cells = <3>; 1252bcdbde43SJon Hunter interrupt-controller; 1253bcdbde43SJon Hunter reg = <0x702f9000 0x2000>, 1254bcdbde43SJon Hunter <0x702fa000 0x2000>; 1255bcdbde43SJon Hunter interrupts = <GIC_SPI 102 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 1256bcdbde43SJon Hunter clocks = <&tegra_car TEGRA210_CLK_APE>; 1257bcdbde43SJon Hunter clock-names = "clk"; 1258bcdbde43SJon Hunter status = "disabled"; 1259bcdbde43SJon Hunter }; 12600f133090SJon Hunter }; 12610f133090SJon Hunter 1262be70771dSThierry Reding spi@70410000 { 1263742af7e7SThierry Reding compatible = "nvidia,tegra210-qspi"; 1264742af7e7SThierry Reding reg = <0x0 0x70410000 0x0 0x1000>; 1265742af7e7SThierry Reding interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 1266742af7e7SThierry Reding #address-cells = <1>; 1267742af7e7SThierry Reding #size-cells = <0>; 1268742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_QSPI>; 1269742af7e7SThierry Reding clock-names = "qspi"; 1270742af7e7SThierry Reding resets = <&tegra_car 211>; 1271742af7e7SThierry Reding reset-names = "qspi"; 1272742af7e7SThierry Reding dmas = <&apbdma 5>, <&apbdma 5>; 1273742af7e7SThierry Reding dma-names = "rx", "tx"; 1274742af7e7SThierry Reding status = "disabled"; 1275742af7e7SThierry Reding }; 1276742af7e7SThierry Reding 1277be70771dSThierry Reding usb@7d000000 { 1278742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1279742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>; 1280742af7e7SThierry Reding interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 1281742af7e7SThierry Reding phy_type = "utmi"; 1282742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>; 1283742af7e7SThierry Reding clock-names = "usb"; 1284742af7e7SThierry Reding resets = <&tegra_car 22>; 1285742af7e7SThierry Reding reset-names = "usb"; 1286742af7e7SThierry Reding nvidia,phy = <&phy1>; 1287742af7e7SThierry Reding status = "disabled"; 1288742af7e7SThierry Reding }; 1289742af7e7SThierry Reding 1290be70771dSThierry Reding phy1: usb-phy@7d000000 { 1291742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1292742af7e7SThierry Reding reg = <0x0 0x7d000000 0x0 0x4000>, 1293742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1294742af7e7SThierry Reding phy_type = "utmi"; 1295742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USBD>, 1296742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1297742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1298742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1299742af7e7SThierry Reding resets = <&tegra_car 22>, <&tegra_car 22>; 1300742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1301742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1302742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1303742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1304742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1305742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1306742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1307742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1308742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1309742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1310742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1311742af7e7SThierry Reding nvidia,has-utmi-pad-registers; 1312742af7e7SThierry Reding status = "disabled"; 1313742af7e7SThierry Reding }; 1314742af7e7SThierry Reding 1315be70771dSThierry Reding usb@7d004000 { 1316742af7e7SThierry Reding compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; 1317742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>; 1318742af7e7SThierry Reding interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1319742af7e7SThierry Reding phy_type = "utmi"; 1320742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>; 1321742af7e7SThierry Reding clock-names = "usb"; 1322742af7e7SThierry Reding resets = <&tegra_car 58>; 1323742af7e7SThierry Reding reset-names = "usb"; 1324742af7e7SThierry Reding nvidia,phy = <&phy2>; 1325742af7e7SThierry Reding status = "disabled"; 1326742af7e7SThierry Reding }; 1327742af7e7SThierry Reding 1328be70771dSThierry Reding phy2: usb-phy@7d004000 { 1329742af7e7SThierry Reding compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy"; 1330742af7e7SThierry Reding reg = <0x0 0x7d004000 0x0 0x4000>, 1331742af7e7SThierry Reding <0x0 0x7d000000 0x0 0x4000>; 1332742af7e7SThierry Reding phy_type = "utmi"; 1333742af7e7SThierry Reding clocks = <&tegra_car TEGRA210_CLK_USB2>, 1334742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_PLL_U>, 1335742af7e7SThierry Reding <&tegra_car TEGRA210_CLK_USBD>; 1336742af7e7SThierry Reding clock-names = "reg", "pll_u", "utmi-pads"; 1337742af7e7SThierry Reding resets = <&tegra_car 58>, <&tegra_car 22>; 1338742af7e7SThierry Reding reset-names = "usb", "utmi-pads"; 1339742af7e7SThierry Reding nvidia,hssync-start-delay = <0>; 1340742af7e7SThierry Reding nvidia,idle-wait-delay = <17>; 1341742af7e7SThierry Reding nvidia,elastic-limit = <16>; 1342742af7e7SThierry Reding nvidia,term-range-adj = <6>; 1343742af7e7SThierry Reding nvidia,xcvr-setup = <9>; 1344742af7e7SThierry Reding nvidia,xcvr-lsfslew = <0>; 1345742af7e7SThierry Reding nvidia,xcvr-lsrslew = <3>; 1346742af7e7SThierry Reding nvidia,hssquelch-level = <2>; 1347742af7e7SThierry Reding nvidia,hsdiscon-level = <5>; 1348742af7e7SThierry Reding nvidia,xcvr-hsslew = <12>; 1349742af7e7SThierry Reding status = "disabled"; 1350742af7e7SThierry Reding }; 1351742af7e7SThierry Reding 1352742af7e7SThierry Reding cpus { 1353742af7e7SThierry Reding #address-cells = <1>; 1354742af7e7SThierry Reding #size-cells = <0>; 1355742af7e7SThierry Reding 1356742af7e7SThierry Reding cpu@0 { 1357742af7e7SThierry Reding device_type = "cpu"; 1358742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1359742af7e7SThierry Reding reg = <0>; 136043b9b402SJoseph Lo clocks = <&tegra_car TEGRA210_CLK_CCLK_G>, 136143b9b402SJoseph Lo <&tegra_car TEGRA210_CLK_PLL_X>, 136243b9b402SJoseph Lo <&tegra_car TEGRA210_CLK_PLL_P_OUT4>, 136343b9b402SJoseph Lo <&dfll>; 136443b9b402SJoseph Lo clock-names = "cpu_g", "pll_x", "pll_p", "dfll"; 136543b9b402SJoseph Lo clock-latency = <300000>; 1366742af7e7SThierry Reding }; 1367742af7e7SThierry Reding 1368742af7e7SThierry Reding cpu@1 { 1369742af7e7SThierry Reding device_type = "cpu"; 1370742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1371742af7e7SThierry Reding reg = <1>; 1372742af7e7SThierry Reding }; 1373742af7e7SThierry Reding 1374742af7e7SThierry Reding cpu@2 { 1375742af7e7SThierry Reding device_type = "cpu"; 1376742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1377742af7e7SThierry Reding reg = <2>; 1378742af7e7SThierry Reding }; 1379742af7e7SThierry Reding 1380742af7e7SThierry Reding cpu@3 { 1381742af7e7SThierry Reding device_type = "cpu"; 1382742af7e7SThierry Reding compatible = "arm,cortex-a57"; 1383742af7e7SThierry Reding reg = <3>; 1384742af7e7SThierry Reding }; 1385742af7e7SThierry Reding }; 1386742af7e7SThierry Reding 1387742af7e7SThierry Reding timer { 1388742af7e7SThierry Reding compatible = "arm,armv8-timer"; 1389742af7e7SThierry Reding interrupts = <GIC_PPI 13 1390742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1391742af7e7SThierry Reding <GIC_PPI 14 1392742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1393742af7e7SThierry Reding <GIC_PPI 11 1394742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 1395742af7e7SThierry Reding <GIC_PPI 10 1396742af7e7SThierry Reding (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 1397742af7e7SThierry Reding interrupt-parent = <&gic>; 1398742af7e7SThierry Reding }; 1399e2bed1ebSWei Ni 1400e2bed1ebSWei Ni soctherm: thermal-sensor@700e2000 { 1401e2bed1ebSWei Ni compatible = "nvidia,tegra210-soctherm"; 1402cbd0f000SWei Ni reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */ 1403cbd0f000SWei Ni 0x0 0x60006000 0x0 0x400>; /* CAR reg_base */ 1404cbd0f000SWei Ni reg-names = "soctherm-reg", "car-reg"; 1405e2bed1ebSWei Ni interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 1406e2bed1ebSWei Ni clocks = <&tegra_car TEGRA210_CLK_TSENSOR>, 1407e2bed1ebSWei Ni <&tegra_car TEGRA210_CLK_SOC_THERM>; 1408e2bed1ebSWei Ni clock-names = "tsensor", "soctherm"; 1409e2bed1ebSWei Ni resets = <&tegra_car 78>; 1410e2bed1ebSWei Ni reset-names = "soctherm"; 1411e2bed1ebSWei Ni #thermal-sensor-cells = <1>; 1412cbd0f000SWei Ni 1413cbd0f000SWei Ni throttle-cfgs { 1414cbd0f000SWei Ni throttle_heavy: heavy { 1415cbd0f000SWei Ni nvidia,priority = <100>; 1416cbd0f000SWei Ni nvidia,cpu-throt-percent = <85>; 1417cbd0f000SWei Ni 1418cbd0f000SWei Ni #cooling-cells = <2>; 1419cbd0f000SWei Ni }; 1420cbd0f000SWei Ni }; 1421e2bed1ebSWei Ni }; 1422e2bed1ebSWei Ni 1423e2bed1ebSWei Ni thermal-zones { 1424e2bed1ebSWei Ni cpu { 1425e2bed1ebSWei Ni polling-delay-passive = <1000>; 1426e2bed1ebSWei Ni polling-delay = <0>; 1427e2bed1ebSWei Ni 1428e2bed1ebSWei Ni thermal-sensors = 1429e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; 14305e03f663SWei Ni 14315e03f663SWei Ni trips { 14325e03f663SWei Ni cpu-shutdown-trip { 14335e03f663SWei Ni temperature = <102500>; 14345e03f663SWei Ni hysteresis = <0>; 14355e03f663SWei Ni type = "critical"; 14365e03f663SWei Ni }; 1437cbd0f000SWei Ni 1438cbd0f000SWei Ni cpu_throttle_trip: throttle-trip { 1439cbd0f000SWei Ni temperature = <98500>; 1440cbd0f000SWei Ni hysteresis = <1000>; 1441cbd0f000SWei Ni type = "hot"; 1442cbd0f000SWei Ni }; 14435e03f663SWei Ni }; 14445e03f663SWei Ni 14455e03f663SWei Ni cooling-maps { 1446cbd0f000SWei Ni map0 { 1447cbd0f000SWei Ni trip = <&cpu_throttle_trip>; 1448cbd0f000SWei Ni cooling-device = <&throttle_heavy 1 1>; 1449cbd0f000SWei Ni }; 14505e03f663SWei Ni }; 1451e2bed1ebSWei Ni }; 1452e2bed1ebSWei Ni mem { 1453e2bed1ebSWei Ni polling-delay-passive = <0>; 1454e2bed1ebSWei Ni polling-delay = <0>; 1455e2bed1ebSWei Ni 1456e2bed1ebSWei Ni thermal-sensors = 1457e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; 14585e03f663SWei Ni 14595e03f663SWei Ni trips { 14605e03f663SWei Ni mem-shutdown-trip { 14615e03f663SWei Ni temperature = <103000>; 14625e03f663SWei Ni hysteresis = <0>; 14635e03f663SWei Ni type = "critical"; 14645e03f663SWei Ni }; 14655e03f663SWei Ni }; 14665e03f663SWei Ni 14675e03f663SWei Ni cooling-maps { 14685e03f663SWei Ni /* 14695e03f663SWei Ni * There are currently no cooling maps, 14705e03f663SWei Ni * because there are no cooling devices. 14715e03f663SWei Ni */ 14725e03f663SWei Ni }; 1473e2bed1ebSWei Ni }; 1474e2bed1ebSWei Ni gpu { 1475e2bed1ebSWei Ni polling-delay-passive = <1000>; 1476e2bed1ebSWei Ni polling-delay = <0>; 1477e2bed1ebSWei Ni 1478e2bed1ebSWei Ni thermal-sensors = 1479e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; 14805e03f663SWei Ni 14815e03f663SWei Ni trips { 14825e03f663SWei Ni gpu-shutdown-trip { 14835e03f663SWei Ni temperature = <103000>; 14845e03f663SWei Ni hysteresis = <0>; 14855e03f663SWei Ni type = "critical"; 14865e03f663SWei Ni }; 1487cbd0f000SWei Ni 1488cbd0f000SWei Ni gpu_throttle_trip: throttle-trip { 1489cbd0f000SWei Ni temperature = <100000>; 1490cbd0f000SWei Ni hysteresis = <1000>; 1491cbd0f000SWei Ni type = "hot"; 1492cbd0f000SWei Ni }; 14935e03f663SWei Ni }; 14945e03f663SWei Ni 14955e03f663SWei Ni cooling-maps { 1496cbd0f000SWei Ni map0 { 1497cbd0f000SWei Ni trip = <&gpu_throttle_trip>; 1498cbd0f000SWei Ni cooling-device = <&throttle_heavy 1 1>; 1499cbd0f000SWei Ni }; 15005e03f663SWei Ni }; 1501e2bed1ebSWei Ni }; 1502e2bed1ebSWei Ni pllx { 1503e2bed1ebSWei Ni polling-delay-passive = <0>; 1504e2bed1ebSWei Ni polling-delay = <0>; 1505e2bed1ebSWei Ni 1506e2bed1ebSWei Ni thermal-sensors = 1507e2bed1ebSWei Ni <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; 15085e03f663SWei Ni 15095e03f663SWei Ni trips { 15105e03f663SWei Ni pllx-shutdown-trip { 15115e03f663SWei Ni temperature = <103000>; 15125e03f663SWei Ni hysteresis = <0>; 15135e03f663SWei Ni type = "critical"; 15145e03f663SWei Ni }; 15155e03f663SWei Ni }; 15165e03f663SWei Ni 15175e03f663SWei Ni cooling-maps { 15185e03f663SWei Ni /* 15195e03f663SWei Ni * There are currently no cooling maps, 15205e03f663SWei Ni * because there are no cooling devices. 15215e03f663SWei Ni */ 15225e03f663SWei Ni }; 1523e2bed1ebSWei Ni }; 1524e2bed1ebSWei Ni }; 1525742af7e7SThierry Reding}; 1526