1/dts-v1/;
2
3#include <dt-bindings/input/input.h>
4#include <dt-bindings/mfd/max77620.h>
5#include <dt-bindings/pinctrl/pinctrl-tegra.h>
6
7#include "tegra210.dtsi"
8
9/ {
10	model = "Google Pixel C";
11	compatible = "google,smaug-rev8", "google,smaug-rev7",
12		     "google,smaug-rev6", "google,smaug-rev5",
13		     "google,smaug-rev4", "google,smaug-rev3",
14		     "google,smaug-rev1", "google,smaug", "nvidia,tegra210";
15
16	aliases {
17		serial0 = &uarta;
18	};
19
20	chosen {
21		bootargs = "earlycon";
22		stdout-path = "serial0:115200n8";
23	};
24
25	memory {
26		device_type = "memory";
27		reg = <0x0 0x80000000 0x0 0xc0000000>;
28	};
29
30	host1x@50000000 {
31		dpaux: dpaux@545c0000 {
32			status = "okay";
33		};
34	};
35
36	pinmux: pinmux@700008d4 {
37		pinctrl-names = "boot";
38		pinctrl-0 = <&state_boot>;
39
40		state_boot: pinmux {
41			pex_l0_rst_n_pa0 {
42				nvidia,pins = "pex_l0_rst_n_pa0";
43				nvidia,function = "rsvd1";
44				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
45				nvidia,tristate = <TEGRA_PIN_ENABLE>;
46				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
47				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
48				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
49			};
50			pex_l0_clkreq_n_pa1 {
51				nvidia,pins = "pex_l0_clkreq_n_pa1";
52				nvidia,function = "rsvd1";
53				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
54				nvidia,tristate = <TEGRA_PIN_ENABLE>;
55				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
56				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
57				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
58			};
59			pex_wake_n_pa2 {
60				nvidia,pins = "pex_wake_n_pa2";
61				nvidia,function = "rsvd1";
62				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
63				nvidia,tristate = <TEGRA_PIN_ENABLE>;
64				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
65				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
66				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
67			};
68			pex_l1_rst_n_pa3 {
69				nvidia,pins = "pex_l1_rst_n_pa3";
70				nvidia,function = "rsvd1";
71				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
72				nvidia,tristate = <TEGRA_PIN_ENABLE>;
73				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
74				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
75				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
76			};
77			pex_l1_clkreq_n_pa4 {
78				nvidia,pins = "pex_l1_clkreq_n_pa4";
79				nvidia,function = "rsvd1";
80				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
81				nvidia,tristate = <TEGRA_PIN_ENABLE>;
82				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
83				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
84				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
85			};
86			sata_led_active_pa5 {
87				nvidia,pins = "sata_led_active_pa5";
88				nvidia,function = "rsvd1";
89				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
90				nvidia,tristate = <TEGRA_PIN_ENABLE>;
91				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
92				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
93			};
94			pa6 {
95				nvidia,pins = "pa6";
96				nvidia,function = "rsvd1";
97				nvidia,pull = <TEGRA_PIN_PULL_UP>;
98				nvidia,tristate = <TEGRA_PIN_DISABLE>;
99				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
100				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
101			};
102			dap1_fs_pb0 {
103				nvidia,pins = "dap1_fs_pb0";
104				nvidia,function = "i2s1";
105				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
106				nvidia,tristate = <TEGRA_PIN_DISABLE>;
107				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
108				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
109			};
110			dap1_din_pb1 {
111				nvidia,pins = "dap1_din_pb1";
112				nvidia,function = "i2s1";
113				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
114				nvidia,tristate = <TEGRA_PIN_DISABLE>;
115				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
116				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
117			};
118			dap1_dout_pb2 {
119				nvidia,pins = "dap1_dout_pb2";
120				nvidia,function = "i2s1";
121				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
122				nvidia,tristate = <TEGRA_PIN_DISABLE>;
123				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
124				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
125			};
126			dap1_sclk_pb3 {
127				nvidia,pins = "dap1_sclk_pb3";
128				nvidia,function = "i2s1";
129				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
130				nvidia,tristate = <TEGRA_PIN_DISABLE>;
131				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
132				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
133			};
134			spi2_mosi_pb4 {
135				nvidia,pins = "spi2_mosi_pb4";
136				nvidia,pull = <TEGRA_PIN_PULL_UP>;
137				nvidia,tristate = <TEGRA_PIN_DISABLE>;
138				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
139				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
140			};
141			spi2_miso_pb5 {
142				nvidia,pins = "spi2_miso_pb5";
143				nvidia,function = "rsvd2";
144				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
145				nvidia,tristate = <TEGRA_PIN_ENABLE>;
146				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
147				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
148			};
149			spi2_sck_pb6 {
150				nvidia,pins = "spi2_sck_pb6";
151				nvidia,function = "rsvd2";
152				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
153				nvidia,tristate = <TEGRA_PIN_ENABLE>;
154				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
155				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
156			};
157			spi2_cs0_pb7 {
158				nvidia,pins = "spi2_cs0_pb7";
159				nvidia,function = "rsvd2";
160				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
161				nvidia,tristate = <TEGRA_PIN_ENABLE>;
162				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
163				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
164			};
165			spi1_mosi_pc0 {
166				nvidia,pins = "spi1_mosi_pc0";
167				nvidia,function = "spi1";
168				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
169				nvidia,tristate = <TEGRA_PIN_DISABLE>;
170				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
171				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
172			};
173			spi1_miso_pc1 {
174				nvidia,pins = "spi1_miso_pc1";
175				nvidia,function = "spi1";
176				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
177				nvidia,tristate = <TEGRA_PIN_DISABLE>;
178				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
179				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
180			};
181			spi1_sck_pc2 {
182				nvidia,pins = "spi1_sck_pc2";
183				nvidia,function = "spi1";
184				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
185				nvidia,tristate = <TEGRA_PIN_DISABLE>;
186				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
187				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
188			};
189			spi1_cs0_pc3 {
190				nvidia,pins = "spi1_cs0_pc3";
191				nvidia,function = "spi1";
192				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
193				nvidia,tristate = <TEGRA_PIN_DISABLE>;
194				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
195				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
196			};
197			spi1_cs1_pc4 {
198				nvidia,pins = "spi1_cs1_pc4";
199				nvidia,function = "rsvd1";
200				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
201				nvidia,tristate = <TEGRA_PIN_ENABLE>;
202				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
203				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
204			};
205			spi4_sck_pc5 {
206				nvidia,pins = "spi4_sck_pc5";
207				nvidia,function = "rsvd1";
208				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
209				nvidia,tristate = <TEGRA_PIN_ENABLE>;
210				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
211				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
212			};
213			spi4_cs0_pc6 {
214				nvidia,pins = "spi4_cs0_pc6";
215				nvidia,function = "rsvd1";
216				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
217				nvidia,tristate = <TEGRA_PIN_ENABLE>;
218				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
219				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
220			};
221			spi4_mosi_pc7 {
222				nvidia,pins = "spi4_mosi_pc7";
223				nvidia,function = "rsvd1";
224				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
225				nvidia,tristate = <TEGRA_PIN_ENABLE>;
226				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
227				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
228			};
229			spi4_miso_pd0 {
230				nvidia,pins = "spi4_miso_pd0";
231				nvidia,function = "rsvd1";
232				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
233				nvidia,tristate = <TEGRA_PIN_ENABLE>;
234				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
235				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
236			};
237			uart3_tx_pd1 {
238				nvidia,pins = "uart3_tx_pd1";
239				nvidia,function = "uartc";
240				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
241				nvidia,tristate = <TEGRA_PIN_DISABLE>;
242				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
243				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
244			};
245			uart3_rx_pd2 {
246				nvidia,pins = "uart3_rx_pd2";
247				nvidia,function = "uartc";
248				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
249				nvidia,tristate = <TEGRA_PIN_DISABLE>;
250				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
251				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
252			};
253			uart3_rts_pd3 {
254				nvidia,pins = "uart3_rts_pd3";
255				nvidia,function = "uartc";
256				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
257				nvidia,tristate = <TEGRA_PIN_DISABLE>;
258				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
259				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
260			};
261			uart3_cts_pd4 {
262				nvidia,pins = "uart3_cts_pd4";
263				nvidia,function = "uartc";
264				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
265				nvidia,tristate = <TEGRA_PIN_DISABLE>;
266				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
267				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
268			};
269			dmic1_clk_pe0 {
270				nvidia,pins = "dmic1_clk_pe0";
271				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
272				nvidia,tristate = <TEGRA_PIN_DISABLE>;
273				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
274				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
275			};
276			dmic1_dat_pe1 {
277				nvidia,pins = "dmic1_dat_pe1";
278				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
279				nvidia,tristate = <TEGRA_PIN_DISABLE>;
280				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
281				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
282			};
283			dmic2_clk_pe2 {
284				nvidia,pins = "dmic2_clk_pe2";
285				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
286				nvidia,tristate = <TEGRA_PIN_DISABLE>;
287				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
288				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
289			};
290			dmic2_dat_pe3 {
291				nvidia,pins = "dmic2_dat_pe3";
292				nvidia,pull = <TEGRA_PIN_PULL_UP>;
293				nvidia,tristate = <TEGRA_PIN_DISABLE>;
294				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
295				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
296			};
297			dmic3_clk_pe4 {
298				nvidia,pins = "dmic3_clk_pe4";
299				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
300				nvidia,tristate = <TEGRA_PIN_DISABLE>;
301				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
302				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
303			};
304			dmic3_dat_pe5 {
305				nvidia,pins = "dmic3_dat_pe5";
306				nvidia,function = "rsvd2";
307				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
308				nvidia,tristate = <TEGRA_PIN_ENABLE>;
309				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
310				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
311			};
312			pe6 {
313				nvidia,pins = "pe6";
314				nvidia,pull = <TEGRA_PIN_PULL_UP>;
315				nvidia,tristate = <TEGRA_PIN_DISABLE>;
316				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
317				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
318			};
319			pe7 {
320				nvidia,pins = "pe7";
321				nvidia,pull = <TEGRA_PIN_PULL_UP>;
322				nvidia,tristate = <TEGRA_PIN_DISABLE>;
323				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
324				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
325			};
326			gen3_i2c_scl_pf0 {
327				nvidia,pins = "gen3_i2c_scl_pf0";
328				nvidia,function = "i2c3";
329				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
330				nvidia,tristate = <TEGRA_PIN_DISABLE>;
331				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
332				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
333				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
334			};
335			gen3_i2c_sda_pf1 {
336				nvidia,pins = "gen3_i2c_sda_pf1";
337				nvidia,function = "i2c3";
338				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
339				nvidia,tristate = <TEGRA_PIN_DISABLE>;
340				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
341				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
342				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
343			};
344			uart2_tx_pg0 {
345				nvidia,pins = "uart2_tx_pg0";
346				nvidia,function = "uartb";
347				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
348				nvidia,tristate = <TEGRA_PIN_ENABLE>;
349				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
350				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
351			};
352			uart2_rx_pg1 {
353				nvidia,pins = "uart2_rx_pg1";
354				nvidia,function = "uartb";
355				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
356				nvidia,tristate = <TEGRA_PIN_ENABLE>;
357				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
358				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
359			};
360			uart2_rts_pg2 {
361				nvidia,pins = "uart2_rts_pg2";
362				nvidia,function = "rsvd2";
363				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
364				nvidia,tristate = <TEGRA_PIN_ENABLE>;
365				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
366				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
367			};
368			uart2_cts_pg3 {
369				nvidia,pins = "uart2_cts_pg3";
370				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
371				nvidia,tristate = <TEGRA_PIN_DISABLE>;
372				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
373				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
374			};
375			wifi_en_ph0 {
376				nvidia,pins = "wifi_en_ph0";
377				nvidia,pull = <TEGRA_PIN_PULL_UP>;
378				nvidia,tristate = <TEGRA_PIN_DISABLE>;
379				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
380				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
381			};
382			wifi_rst_ph1 {
383				nvidia,pins = "wifi_rst_ph1";
384				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
385				nvidia,tristate = <TEGRA_PIN_DISABLE>;
386				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
387				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
388			};
389			wifi_wake_ap_ph2 {
390				nvidia,pins = "wifi_wake_ap_ph2";
391				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
392				nvidia,tristate = <TEGRA_PIN_DISABLE>;
393				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
394				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
395			};
396			ap_wake_bt_ph3 {
397				nvidia,pins = "ap_wake_bt_ph3";
398				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
399				nvidia,tristate = <TEGRA_PIN_DISABLE>;
400				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
401				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
402			};
403			bt_rst_ph4 {
404				nvidia,pins = "bt_rst_ph4";
405				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
406				nvidia,tristate = <TEGRA_PIN_DISABLE>;
407				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
408				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
409			};
410			bt_wake_ap_ph5 {
411				nvidia,pins = "bt_wake_ap_ph5";
412				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
413				nvidia,tristate = <TEGRA_PIN_DISABLE>;
414				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
415				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
416			};
417			ph6 {
418				nvidia,pins = "ph6";
419				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
420				nvidia,tristate = <TEGRA_PIN_DISABLE>;
421				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
422				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
423			};
424			ap_wake_nfc_ph7 {
425				nvidia,pins = "ap_wake_nfc_ph7";
426				nvidia,function = "rsvd0";
427				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
428				nvidia,tristate = <TEGRA_PIN_ENABLE>;
429				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
430				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
431			};
432			nfc_en_pi0 {
433				nvidia,pins = "nfc_en_pi0";
434				nvidia,function = "rsvd0";
435				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
436				nvidia,tristate = <TEGRA_PIN_ENABLE>;
437				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
438				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
439			};
440			nfc_int_pi1 {
441				nvidia,pins = "nfc_int_pi1";
442				nvidia,function = "rsvd0";
443				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
444				nvidia,tristate = <TEGRA_PIN_ENABLE>;
445				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
446				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
447			};
448			gps_en_pi2 {
449				nvidia,pins = "gps_en_pi2";
450				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
451				nvidia,tristate = <TEGRA_PIN_DISABLE>;
452				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
453				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
454			};
455			gps_rst_pi3 {
456				nvidia,pins = "gps_rst_pi3";
457				nvidia,function = "rsvd0";
458				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
459				nvidia,tristate = <TEGRA_PIN_ENABLE>;
460				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
461				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
462			};
463			uart4_tx_pi4 {
464				nvidia,pins = "uart4_tx_pi4";
465				nvidia,function = "uartd";
466				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
467				nvidia,tristate = <TEGRA_PIN_DISABLE>;
468				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
469				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
470			};
471			uart4_rx_pi5 {
472				nvidia,pins = "uart4_rx_pi5";
473				nvidia,function = "uartd";
474				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
475				nvidia,tristate = <TEGRA_PIN_DISABLE>;
476				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
477				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
478			};
479			uart4_rts_pi6 {
480				nvidia,pins = "uart4_rts_pi6";
481				nvidia,function = "uartd";
482				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
483				nvidia,tristate = <TEGRA_PIN_DISABLE>;
484				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
485				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
486			};
487			uart4_cts_pi7 {
488				nvidia,pins = "uart4_cts_pi7";
489				nvidia,function = "uartd";
490				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
491				nvidia,tristate = <TEGRA_PIN_DISABLE>;
492				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
493				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
494			};
495			gen1_i2c_sda_pj0 {
496				nvidia,pins = "gen1_i2c_sda_pj0";
497				nvidia,function = "i2c1";
498				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
499				nvidia,tristate = <TEGRA_PIN_DISABLE>;
500				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
501				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
502				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
503			};
504			gen1_i2c_scl_pj1 {
505				nvidia,pins = "gen1_i2c_scl_pj1";
506				nvidia,function = "i2c1";
507				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
508				nvidia,tristate = <TEGRA_PIN_DISABLE>;
509				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
510				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
511				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
512			};
513			gen2_i2c_scl_pj2 {
514				nvidia,pins = "gen2_i2c_scl_pj2";
515				nvidia,function = "i2c2";
516				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
517				nvidia,tristate = <TEGRA_PIN_DISABLE>;
518				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
519				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
520				nvidia,io-hv = <TEGRA_PIN_ENABLE>;
521			};
522			gen2_i2c_sda_pj3 {
523				nvidia,pins = "gen2_i2c_sda_pj3";
524				nvidia,function = "i2c2";
525				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
526				nvidia,tristate = <TEGRA_PIN_DISABLE>;
527				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
528				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
529				nvidia,io-hv = <TEGRA_PIN_ENABLE>;
530			};
531			dap4_fs_pj4 {
532				nvidia,pins = "dap4_fs_pj4";
533				nvidia,function = "rsvd1";
534				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
535				nvidia,tristate = <TEGRA_PIN_ENABLE>;
536				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
537				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
538			};
539			dap4_din_pj5 {
540				nvidia,pins = "dap4_din_pj5";
541				nvidia,function = "rsvd1";
542				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
543				nvidia,tristate = <TEGRA_PIN_ENABLE>;
544				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
545				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
546			};
547			dap4_dout_pj6 {
548				nvidia,pins = "dap4_dout_pj6";
549				nvidia,function = "rsvd1";
550				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
551				nvidia,tristate = <TEGRA_PIN_ENABLE>;
552				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
553				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
554			};
555			dap4_sclk_pj7 {
556				nvidia,pins = "dap4_sclk_pj7";
557				nvidia,function = "rsvd1";
558				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
559				nvidia,tristate = <TEGRA_PIN_ENABLE>;
560				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
561				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
562			};
563			pk0 {
564				nvidia,pins = "pk0";
565				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
566				nvidia,tristate = <TEGRA_PIN_DISABLE>;
567				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
568				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
569			};
570			pk1 {
571				nvidia,pins = "pk1";
572				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
573				nvidia,tristate = <TEGRA_PIN_DISABLE>;
574				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
575				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
576			};
577			pk2 {
578				nvidia,pins = "pk2";
579				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
580				nvidia,tristate = <TEGRA_PIN_DISABLE>;
581				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
582				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
583			};
584			pk3 {
585				nvidia,pins = "pk3";
586				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
587				nvidia,tristate = <TEGRA_PIN_DISABLE>;
588				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
589				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
590			};
591			pk4 {
592				nvidia,pins = "pk4";
593				nvidia,function = "rsvd1";
594				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
595				nvidia,tristate = <TEGRA_PIN_ENABLE>;
596				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
597				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
598			};
599			pk5 {
600				nvidia,pins = "pk5";
601				nvidia,function = "rsvd1";
602				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
603				nvidia,tristate = <TEGRA_PIN_ENABLE>;
604				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
605				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
606			};
607			pk6 {
608				nvidia,pins = "pk6";
609				nvidia,function = "rsvd1";
610				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
611				nvidia,tristate = <TEGRA_PIN_ENABLE>;
612				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
613				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
614			};
615			pk7 {
616				nvidia,pins = "pk7";
617				nvidia,function = "rsvd1";
618				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
619				nvidia,tristate = <TEGRA_PIN_ENABLE>;
620				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
621				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
622			};
623			pl0 {
624				nvidia,pins = "pl0";
625				nvidia,function = "rsvd0";
626				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
627				nvidia,tristate = <TEGRA_PIN_ENABLE>;
628				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
629				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
630			};
631			pl1 {
632				nvidia,pins = "pl1";
633				nvidia,function = "rsvd1";
634				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
635				nvidia,tristate = <TEGRA_PIN_ENABLE>;
636				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
637				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
638			};
639			sdmmc1_clk_pm0 {
640				nvidia,pins = "sdmmc1_clk_pm0";
641				nvidia,function = "rsvd1";
642				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
643				nvidia,tristate = <TEGRA_PIN_ENABLE>;
644				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
645				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
646			};
647			sdmmc1_cmd_pm1 {
648				nvidia,pins = "sdmmc1_cmd_pm1";
649				nvidia,function = "rsvd2";
650				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
651				nvidia,tristate = <TEGRA_PIN_ENABLE>;
652				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
653				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
654			};
655			sdmmc1_dat3_pm2 {
656				nvidia,pins = "sdmmc1_dat3_pm2";
657				nvidia,function = "rsvd2";
658				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
659				nvidia,tristate = <TEGRA_PIN_ENABLE>;
660				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
661				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
662			};
663			sdmmc1_dat2_pm3 {
664				nvidia,pins = "sdmmc1_dat2_pm3";
665				nvidia,function = "rsvd2";
666				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
667				nvidia,tristate = <TEGRA_PIN_ENABLE>;
668				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
669				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
670			};
671			sdmmc1_dat1_pm4 {
672				nvidia,pins = "sdmmc1_dat1_pm4";
673				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
674				nvidia,tristate = <TEGRA_PIN_DISABLE>;
675				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
676				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
677			};
678			sdmmc1_dat0_pm5 {
679				nvidia,pins = "sdmmc1_dat0_pm5";
680				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
681				nvidia,tristate = <TEGRA_PIN_DISABLE>;
682				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
683				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
684			};
685			sdmmc3_clk_pp0 {
686				nvidia,pins = "sdmmc3_clk_pp0";
687				nvidia,function = "rsvd1";
688				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
689				nvidia,tristate = <TEGRA_PIN_ENABLE>;
690				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
691				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
692			};
693			sdmmc3_cmd_pp1 {
694				nvidia,pins = "sdmmc3_cmd_pp1";
695				nvidia,function = "rsvd1";
696				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
697				nvidia,tristate = <TEGRA_PIN_ENABLE>;
698				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
699				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
700			};
701			sdmmc3_dat3_pp2 {
702				nvidia,pins = "sdmmc3_dat3_pp2";
703				nvidia,function = "rsvd1";
704				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
705				nvidia,tristate = <TEGRA_PIN_ENABLE>;
706				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
707				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
708			};
709			sdmmc3_dat2_pp3 {
710				nvidia,pins = "sdmmc3_dat2_pp3";
711				nvidia,function = "rsvd1";
712				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
713				nvidia,tristate = <TEGRA_PIN_ENABLE>;
714				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
715				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
716			};
717			sdmmc3_dat1_pp4 {
718				nvidia,pins = "sdmmc3_dat1_pp4";
719				nvidia,function = "rsvd1";
720				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
721				nvidia,tristate = <TEGRA_PIN_ENABLE>;
722				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
723				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
724			};
725			sdmmc3_dat0_pp5 {
726				nvidia,pins = "sdmmc3_dat0_pp5";
727				nvidia,function = "rsvd1";
728				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
729				nvidia,tristate = <TEGRA_PIN_ENABLE>;
730				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
731				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
732			};
733			cam1_mclk_ps0 {
734				nvidia,pins = "cam1_mclk_ps0";
735				nvidia,function = "extperiph3";
736				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
737				nvidia,tristate = <TEGRA_PIN_DISABLE>;
738				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
739				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
740			};
741			cam2_mclk_ps1 {
742				nvidia,pins = "cam2_mclk_ps1";
743				nvidia,function = "extperiph3";
744				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
745				nvidia,tristate = <TEGRA_PIN_DISABLE>;
746				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
747				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
748			};
749			cam_i2c_scl_ps2 {
750				nvidia,pins = "cam_i2c_scl_ps2";
751				nvidia,function = "i2cvi";
752				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
753				nvidia,tristate = <TEGRA_PIN_DISABLE>;
754				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
755				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
756				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
757			};
758			cam_i2c_sda_ps3 {
759				nvidia,pins = "cam_i2c_sda_ps3";
760				nvidia,function = "i2cvi";
761				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
762				nvidia,tristate = <TEGRA_PIN_DISABLE>;
763				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
764				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
765				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
766			};
767			cam_rst_ps4 {
768				nvidia,pins = "cam_rst_ps4";
769				nvidia,function = "rsvd1";
770				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
771				nvidia,tristate = <TEGRA_PIN_ENABLE>;
772				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
773				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
774			};
775			cam_af_en_ps5 {
776				nvidia,pins = "cam_af_en_ps5";
777				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
778				nvidia,tristate = <TEGRA_PIN_DISABLE>;
779				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
780				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
781			};
782			cam_flash_en_ps6 {
783				nvidia,pins = "cam_flash_en_ps6";
784				nvidia,function = "rsvd2";
785				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
786				nvidia,tristate = <TEGRA_PIN_ENABLE>;
787				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
788				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
789			};
790			cam1_pwdn_ps7 {
791				nvidia,pins = "cam1_pwdn_ps7";
792				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
793				nvidia,tristate = <TEGRA_PIN_DISABLE>;
794				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
795				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
796			};
797			cam2_pwdn_pt0 {
798				nvidia,pins = "cam2_pwdn_pt0";
799				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
800				nvidia,tristate = <TEGRA_PIN_DISABLE>;
801				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
802				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
803			};
804			cam1_strobe_pt1 {
805				nvidia,pins = "cam1_strobe_pt1";
806				nvidia,function = "rsvd1";
807				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
808				nvidia,tristate = <TEGRA_PIN_ENABLE>;
809				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
810				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
811			};
812			uart1_tx_pu0 {
813				nvidia,pins = "uart1_tx_pu0";
814				nvidia,function = "uarta";
815				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
816				nvidia,tristate = <TEGRA_PIN_DISABLE>;
817				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
818				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
819			};
820			uart1_rx_pu1 {
821				nvidia,pins = "uart1_rx_pu1";
822				nvidia,function = "uarta";
823				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
824				nvidia,tristate = <TEGRA_PIN_DISABLE>;
825				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
826				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
827			};
828			uart1_rts_pu2 {
829				nvidia,pins = "uart1_rts_pu2";
830				nvidia,function = "rsvd1";
831				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
832				nvidia,tristate = <TEGRA_PIN_ENABLE>;
833				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
834				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
835			};
836			uart1_cts_pu3 {
837				nvidia,pins = "uart1_cts_pu3";
838				nvidia,function = "rsvd1";
839				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
840				nvidia,tristate = <TEGRA_PIN_ENABLE>;
841				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
842				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
843			};
844			lcd_bl_pwm_pv0 {
845				nvidia,pins = "lcd_bl_pwm_pv0";
846				nvidia,function = "rsvd3";
847				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
848				nvidia,tristate = <TEGRA_PIN_ENABLE>;
849				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
850				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
851			};
852			lcd_bl_en_pv1 {
853				nvidia,pins = "lcd_bl_en_pv1";
854				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
855				nvidia,tristate = <TEGRA_PIN_DISABLE>;
856				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
857				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
858			};
859			lcd_rst_pv2 {
860				nvidia,pins = "lcd_rst_pv2";
861				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
862				nvidia,tristate = <TEGRA_PIN_DISABLE>;
863				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
864				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
865			};
866			lcd_gpio1_pv3 {
867				nvidia,pins = "lcd_gpio1_pv3";
868				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
869				nvidia,tristate = <TEGRA_PIN_DISABLE>;
870				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
871				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
872			};
873			lcd_gpio2_pv4 {
874				nvidia,pins = "lcd_gpio2_pv4";
875				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
876				nvidia,tristate = <TEGRA_PIN_DISABLE>;
877				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
878				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
879			};
880			ap_ready_pv5 {
881				nvidia,pins = "ap_ready_pv5";
882				nvidia,function = "rsvd0";
883				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
884				nvidia,tristate = <TEGRA_PIN_ENABLE>;
885				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
886				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
887			};
888			touch_rst_pv6 {
889				nvidia,pins = "touch_rst_pv6";
890				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
891				nvidia,tristate = <TEGRA_PIN_DISABLE>;
892				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
893				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
894			};
895			touch_clk_pv7 {
896				nvidia,pins = "touch_clk_pv7";
897				nvidia,function = "touch";
898				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
899				nvidia,tristate = <TEGRA_PIN_DISABLE>;
900				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
901				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
902			};
903			modem_wake_ap_px0 {
904				nvidia,pins = "modem_wake_ap_px0";
905				nvidia,function = "rsvd0";
906				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
907				nvidia,tristate = <TEGRA_PIN_ENABLE>;
908				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
909				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
910			};
911			touch_int_px1 {
912				nvidia,pins = "touch_int_px1";
913				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
914				nvidia,tristate = <TEGRA_PIN_DISABLE>;
915				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
916				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
917			};
918			motion_int_px2 {
919				nvidia,pins = "motion_int_px2";
920				nvidia,function = "rsvd0";
921				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
922				nvidia,tristate = <TEGRA_PIN_ENABLE>;
923				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
924				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
925			};
926			als_prox_int_px3 {
927				nvidia,pins = "als_prox_int_px3";
928				nvidia,function = "rsvd0";
929				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
930				nvidia,tristate = <TEGRA_PIN_ENABLE>;
931				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
932				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
933			};
934			temp_alert_px4 {
935				nvidia,pins = "temp_alert_px4";
936				nvidia,pull = <TEGRA_PIN_PULL_UP>;
937				nvidia,tristate = <TEGRA_PIN_DISABLE>;
938				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
939				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
940			};
941			button_power_on_px5 {
942				nvidia,pins = "button_power_on_px5";
943				nvidia,pull = <TEGRA_PIN_PULL_UP>;
944				nvidia,tristate = <TEGRA_PIN_DISABLE>;
945				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
946				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
947			};
948			button_vol_up_px6 {
949				nvidia,pins = "button_vol_up_px6";
950				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
951				nvidia,tristate = <TEGRA_PIN_DISABLE>;
952				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
953				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
954			};
955			button_vol_down_px7 {
956				nvidia,pins = "button_vol_down_px7";
957				nvidia,pull = <TEGRA_PIN_PULL_UP>;
958				nvidia,tristate = <TEGRA_PIN_DISABLE>;
959				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
960				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
961			};
962			button_slide_sw_py0 {
963				nvidia,pins = "button_slide_sw_py0";
964				nvidia,pull = <TEGRA_PIN_PULL_UP>;
965				nvidia,tristate = <TEGRA_PIN_DISABLE>;
966				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
967				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
968			};
969			button_home_py1 {
970				nvidia,pins = "button_home_py1";
971				nvidia,pull = <TEGRA_PIN_PULL_UP>;
972				nvidia,tristate = <TEGRA_PIN_DISABLE>;
973				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
974				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
975			};
976			lcd_te_py2 {
977				nvidia,pins = "lcd_te_py2";
978				nvidia,function = "displaya";
979				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
980				nvidia,tristate = <TEGRA_PIN_DISABLE>;
981				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
982				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
983			};
984			pwr_i2c_scl_py3 {
985				nvidia,pins = "pwr_i2c_scl_py3";
986				nvidia,function = "i2cpmu";
987				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
988				nvidia,tristate = <TEGRA_PIN_DISABLE>;
989				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
990				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
991				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
992			};
993			pwr_i2c_sda_py4 {
994				nvidia,pins = "pwr_i2c_sda_py4";
995				nvidia,function = "i2cpmu";
996				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
997				nvidia,tristate = <TEGRA_PIN_DISABLE>;
998				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
999				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1000				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1001			};
1002			clk_32k_out_py5 {
1003				nvidia,pins = "clk_32k_out_py5";
1004				nvidia,function = "soc";
1005				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1006				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1007				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1008				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1009			};
1010			pz0 {
1011				nvidia,pins = "pz0";
1012				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1013				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1014				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1015				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1016			};
1017			pz1 {
1018				nvidia,pins = "pz1";
1019				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1020				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1021				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1022				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1023			};
1024			pz2 {
1025				nvidia,pins = "pz2";
1026				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1027				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1028				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1029				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1030			};
1031			pz3 {
1032				nvidia,pins = "pz3";
1033				nvidia,function = "rsvd1";
1034				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1035				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1036				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1037				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1038			};
1039			pz4 {
1040				nvidia,pins = "pz4";
1041				nvidia,function = "rsvd1";
1042				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1043				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1044				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1045				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1046			};
1047			pz5 {
1048				nvidia,pins = "pz5";
1049				nvidia,function = "soc";
1050				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1051				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1052				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1053				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1054			};
1055			dap2_fs_paa0 {
1056				nvidia,pins = "dap2_fs_paa0";
1057				nvidia,function = "i2s2";
1058				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1059				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1060				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1061				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1062			};
1063			dap2_sclk_paa1 {
1064				nvidia,pins = "dap2_sclk_paa1";
1065				nvidia,function = "i2s2";
1066				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1067				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1068				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1069				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1070			};
1071			dap2_din_paa2 {
1072				nvidia,pins = "dap2_din_paa2";
1073				nvidia,function = "i2s2";
1074				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1075				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1076				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1077				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1078			};
1079			dap2_dout_paa3 {
1080				nvidia,pins = "dap2_dout_paa3";
1081				nvidia,function = "i2s2";
1082				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1083				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1084				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1085				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1086			};
1087			aud_mclk_pbb0 {
1088				nvidia,pins = "aud_mclk_pbb0";
1089				nvidia,function = "aud";
1090				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1091				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1092				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1093				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1094			};
1095			dvfs_pwm_pbb1 {
1096				nvidia,pins = "dvfs_pwm_pbb1";
1097				nvidia,function = "rsvd0";
1098				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1099				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1100				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1101				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1102			};
1103			dvfs_clk_pbb2 {
1104				nvidia,pins = "dvfs_clk_pbb2";
1105				nvidia,function = "rsvd0";
1106				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1107				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1108				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1109				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1110			};
1111			gpio_x1_aud_pbb3 {
1112				nvidia,pins = "gpio_x1_aud_pbb3";
1113				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1114				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1115				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1116				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1117			};
1118			gpio_x3_aud_pbb4 {
1119				nvidia,pins = "gpio_x3_aud_pbb4";
1120				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1121				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1122				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1123				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1124			};
1125			hdmi_cec_pcc0 {
1126				nvidia,pins = "hdmi_cec_pcc0";
1127				nvidia,function = "rsvd1";
1128				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1129				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1130				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1131				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1132				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1133			};
1134			hdmi_int_dp_hpd_pcc1 {
1135				nvidia,pins = "hdmi_int_dp_hpd_pcc1";
1136				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1137				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1138				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1139				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1140				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1141			};
1142			spdif_out_pcc2 {
1143				nvidia,pins = "spdif_out_pcc2";
1144				nvidia,function = "rsvd1";
1145				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1146				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1147				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1148				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1149			};
1150			spdif_in_pcc3 {
1151				nvidia,pins = "spdif_in_pcc3";
1152				nvidia,function = "rsvd1";
1153				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1154				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1155				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1156				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1157			};
1158			usb_vbus_en0_pcc4 {
1159				nvidia,pins = "usb_vbus_en0_pcc4";
1160				nvidia,function = "rsvd1";
1161				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1162				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1163				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1164				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1165				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1166			};
1167			usb_vbus_en1_pcc5 {
1168				nvidia,pins = "usb_vbus_en1_pcc5";
1169				nvidia,function = "rsvd1";
1170				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1171				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1172				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1173				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1174				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1175			};
1176			dp_hpd0_pcc6 {
1177				nvidia,pins = "dp_hpd0_pcc6";
1178				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1179				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1180				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1181				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1182			};
1183			pcc7 {
1184				nvidia,pins = "pcc7";
1185				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1186				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1187				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1188				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1189				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1190			};
1191			spi2_cs1_pdd0 {
1192				nvidia,pins = "spi2_cs1_pdd0";
1193				nvidia,function = "rsvd1";
1194				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1195				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1196				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1197				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1198			};
1199			qspi_sck_pee0 {
1200				nvidia,pins = "qspi_sck_pee0";
1201				nvidia,function = "qspi";
1202				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1203				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1204				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1205				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1206			};
1207			qspi_cs_n_pee1 {
1208				nvidia,pins = "qspi_cs_n_pee1";
1209				nvidia,function = "qspi";
1210				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1211				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1212				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1213				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1214			};
1215			qspi_io0_pee2 {
1216				nvidia,pins = "qspi_io0_pee2";
1217				nvidia,function = "qspi";
1218				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1219				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1220				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1221				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1222			};
1223			qspi_io1_pee3 {
1224				nvidia,pins = "qspi_io1_pee3";
1225				nvidia,function = "qspi";
1226				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1227				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1228				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1229				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1230			};
1231			qspi_io2_pee4 {
1232				nvidia,pins = "qspi_io2_pee4";
1233				nvidia,function = "rsvd1";
1234				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1235				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1236				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1237				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1238			};
1239			qspi_io3_pee5 {
1240				nvidia,pins = "qspi_io3_pee5";
1241				nvidia,function = "rsvd1";
1242				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1243				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1244				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1245				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1246			};
1247			core_pwr_req {
1248				nvidia,pins = "core_pwr_req";
1249				nvidia,function = "core";
1250				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1251				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1252				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1253				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1254			};
1255			cpu_pwr_req {
1256				nvidia,pins = "cpu_pwr_req";
1257				nvidia,function = "cpu";
1258				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1259				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1260				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1261				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1262			};
1263			pwr_int_n {
1264				nvidia,pins = "pwr_int_n";
1265				nvidia,function = "pmi";
1266				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1267				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1268				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1269				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1270			};
1271			clk_32k_in {
1272				nvidia,pins = "clk_32k_in";
1273				nvidia,function = "clk";
1274				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1275				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1276				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1277				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1278			};
1279			jtag_rtck {
1280				nvidia,pins = "jtag_rtck";
1281				nvidia,function = "jtag";
1282				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1283				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1284				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1285				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1286			};
1287			clk_req {
1288				nvidia,pins = "clk_req";
1289				nvidia,function = "rsvd1";
1290				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1291				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1292				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1293				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1294			};
1295			shutdown {
1296				nvidia,pins = "shutdown";
1297				nvidia,function = "shutdown";
1298				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1299				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1300				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1301				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1302			};
1303		};
1304	};
1305
1306	serial@70006000 {
1307		status = "okay";
1308	};
1309
1310	i2c@7000c400 {
1311		status = "okay";
1312		clock-frequency = <1000000>;
1313
1314		ec@1e {
1315			compatible = "google,cros-ec-i2c";
1316			reg = <0x1e>;
1317			interrupt-parent = <&gpio>;
1318			interrupts = <TEGRA_GPIO(Z, 1) IRQ_TYPE_LEVEL_LOW>;
1319			wakeup-source;
1320
1321			ec_i2c_0: i2c-tunnel {
1322				compatible = "google,cros-ec-i2c-tunnel";
1323				#address-cells = <1>;
1324				#size-cells = <0>;
1325
1326				google,remote-bus = <0>;
1327
1328				battery: bq27742@55 {
1329					compatible = "ti,bq27742";
1330					reg = <0x55>;
1331					battery-name = "battery";
1332				};
1333			};
1334		};
1335	};
1336
1337	i2c@7000d000 {
1338		status = "okay";
1339		clock-frequency = <1000000>;
1340
1341		max77620: max77620@3c {
1342			compatible = "maxim,max77620";
1343			reg = <0x3c>;
1344			interrupts = <0 86 IRQ_TYPE_NONE>;
1345
1346			#interrupt-cells = <2>;
1347			interrupt-controller;
1348
1349			gpio-controller;
1350			#gpio-cells = <2>;
1351
1352			pinctrl-names = "default";
1353			pinctrl-0 = <&max77620_default>;
1354
1355			max77620_default: pinmux@0 {
1356				pin_gpio {
1357					pins = "gpio0", "gpio1", "gpio2", "gpio7";
1358					function = "gpio";
1359				};
1360
1361				/*
1362				 * GPIO3 is used to en_pp3300, and it is part of power
1363				 * sequence, So it must be sequenced up (automatically
1364				 * set by OTP) and down properly.
1365				 */
1366				pin_gpio3 {
1367					pins = "gpio3";
1368					function = "fps-out";
1369					drive-open-drain = <1>;
1370					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1371					maxim,active-fps-power-up-slot = <4>;
1372					maxim,active-fps-power-down-slot = <2>;
1373				};
1374
1375				pin_gpio5_6 {
1376					pins = "gpio5", "gpio6";
1377					function = "gpio";
1378					drive-push-pull = <1>;
1379				};
1380
1381				pin_32k {
1382					pins = "gpio4";
1383					function = "32k-out1";
1384				};
1385			};
1386
1387			fps {
1388				fps0 {
1389					maxim,shutdown-fps-time-period-us = <5120>;
1390					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
1391				};
1392
1393				fps1 {
1394					maxim,shutdown-fps-time-period-us = <5120>;
1395					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
1396					maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
1397				};
1398
1399				fps2 {
1400					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
1401				};
1402			};
1403
1404			regulators {
1405				in-ldo0-1-supply = <&pp1350>;
1406				in-ldo2-supply = <&pp3300>;
1407				in-ldo3-5-supply = <&pp3300>;
1408				in-ldo7-8-supply = <&pp1350>;
1409
1410				ppvar_soc: sd0 {
1411					regulator-name = "PPVAR_SOC";
1412					regulator-min-microvolt = <825000>;
1413					regulator-max-microvolt = <1125000>;
1414					regulator-always-on;
1415					regulator-boot-on;
1416					maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
1417					maxim,active-fps-power-up-slot = <1>;
1418					maxim,active-fps-power-down-slot = <7>;
1419				};
1420
1421				pp1100_sd1: sd1 {
1422					regulator-name = "PP1100";
1423					regulator-min-microvolt = <1125000>;
1424					regulator-max-microvolt = <1125000>;
1425					regulator-always-on;
1426					regulator-boot-on;
1427					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1428					maxim,active-fps-power-up-slot = <5>;
1429					maxim,active-fps-power-down-slot = <1>;
1430				};
1431
1432				pp1350: sd2 {
1433					regulator-name = "PP1350";
1434					regulator-min-microvolt = <1350000>;
1435					regulator-max-microvolt = <1350000>;
1436					regulator-always-on;
1437					regulator-boot-on;
1438					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1439					maxim,active-fps-power-up-slot = <2>;
1440					maxim,active-fps-power-down-slot = <5>;
1441				};
1442
1443				pp1800: sd3 {
1444					regulator-name = "PP1800";
1445					regulator-min-microvolt = <1800000>;
1446					regulator-max-microvolt = <1800000>;
1447					regulator-always-on;
1448					regulator-boot-on;
1449					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1450					maxim,active-fps-power-up-slot = <3>;
1451					maxim,active-fps-power-down-slot = <3>;
1452				};
1453
1454				pp1200_avdd: ldo0 {
1455					regulator-name = "PP1200_AVDD";
1456					regulator-min-microvolt = <1200000>;
1457					regulator-max-microvolt = <1200000>;
1458					regulator-enable-ramp-delay = <26>;
1459					regulator-ramp-delay = <100000>;
1460					regulator-boot-on;
1461					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1462					maxim,active-fps-power-up-slot = <0>;
1463					maxim,active-fps-power-down-slot = <7>;
1464				};
1465
1466				pp1200_rcam: ldo1 {
1467					regulator-name = "PP1200_RCAM";
1468					regulator-min-microvolt = <1200000>;
1469					regulator-max-microvolt = <1200000>;
1470					regulator-enable-ramp-delay = <22>;
1471					regulator-ramp-delay = <100000>;
1472					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1473					maxim,active-fps-power-up-slot = <0>;
1474					maxim,active-fps-power-down-slot = <7>;
1475				};
1476
1477				pp_ldo2: ldo2 {
1478					regulator-name = "PP_LDO2";
1479					regulator-min-microvolt = <1800000>;
1480					regulator-max-microvolt = <1800000>;
1481					regulator-enable-ramp-delay = <62>;
1482					regulator-ramp-delay = <11000>;
1483					regulator-always-on;
1484					regulator-boot-on;
1485					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1486					maxim,active-fps-power-up-slot = <0>;
1487					maxim,active-fps-power-down-slot = <7>;
1488				};
1489
1490				pp2800l_rcam: ldo3 {
1491					regulator-name = "PP2800L_RCAM";
1492					regulator-min-microvolt = <2800000>;
1493					regulator-max-microvolt = <2800000>;
1494					regulator-enable-ramp-delay = <50>;
1495					regulator-ramp-delay = <100000>;
1496					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1497					maxim,active-fps-power-up-slot = <0>;
1498					maxim,active-fps-power-down-slot = <7>;
1499				};
1500
1501				pp100_soc_rtc: ldo4 {
1502					regulator-name = "PP1100_SOC_RTC";
1503					regulator-min-microvolt = <850000>;
1504					regulator-max-microvolt = <850000>;
1505					regulator-enable-ramp-delay = <22>;
1506					regulator-ramp-delay = <100000>;
1507					regulator-always-on; /* Check this */
1508					regulator-boot-on;
1509					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1510					maxim,active-fps-power-up-slot = <1>;
1511					maxim,active-fps-power-down-slot = <7>;
1512				};
1513
1514				pp2800l_fcam: ldo5 {
1515					regulator-name = "PP2800L_FCAM";
1516					regulator-min-microvolt = <2800000>;
1517					regulator-max-microvolt = <2800000>;
1518					regulator-enable-ramp-delay = <62>;
1519					regulator-ramp-delay = <100000>;
1520					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1521					maxim,active-fps-power-up-slot = <0>;
1522					maxim,active-fps-power-down-slot = <7>;
1523				};
1524
1525				ldo6 {
1526					/* Unused. */
1527					regulator-name = "PP_LDO6";
1528					regulator-min-microvolt = <1800000>;
1529					regulator-max-microvolt = <1800000>;
1530					regulator-enable-ramp-delay = <36>;
1531					regulator-ramp-delay = <100000>;
1532					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1533					maxim,active-fps-power-up-slot = <0>;
1534					maxim,active-fps-power-down-slot = <7>;
1535				};
1536
1537				pp1050_avdd: ldo7 {
1538					regulator-name = "PP1050_AVDD";
1539					regulator-min-microvolt = <1050000>;
1540					regulator-max-microvolt = <1050000>;
1541					regulator-enable-ramp-delay = <24>;
1542					regulator-ramp-delay = <100000>;
1543					regulator-always-on;
1544					regulator-boot-on;
1545					maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
1546					maxim,active-fps-power-up-slot = <3>;
1547					maxim,active-fps-power-down-slot = <4>;
1548				};
1549
1550				avddio_1v05: ldo8 {
1551					regulator-name = "AVDDIO_1V05";
1552					regulator-min-microvolt = <1050000>;
1553					regulator-max-microvolt = <1050000>;
1554					regulator-enable-ramp-delay = <22>;
1555					regulator-ramp-delay = <100000>;
1556					regulator-boot-on;
1557					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1558					maxim,active-fps-power-up-slot = <0>;
1559					maxim,active-fps-power-down-slot = <7>;
1560				};
1561			};
1562		};
1563	};
1564
1565	pmc@7000e400 {
1566		nvidia,invert-interrupt;
1567		nvidia,suspend-mode = <0>;
1568		nvidia,cpu-pwr-good-time = <0>;
1569		nvidia,cpu-pwr-off-time = <0>;
1570		nvidia,core-pwr-good-time = <12000 6000>;
1571		nvidia,core-pwr-off-time = <39053>;
1572		nvidia,core-power-req-active-high;
1573		nvidia,sys-clock-req-active-high;
1574		status = "okay";
1575	};
1576
1577	sdhci@700b0600 {
1578		bus-width = <8>;
1579		non-removable;
1580		status = "okay";
1581	};
1582
1583	aconnect@702c0000 {
1584		status = "okay";
1585
1586		dma@702e2000 {
1587			status = "okay";
1588		};
1589
1590		agic@702f9000 {
1591			status = "okay";
1592		};
1593	};
1594
1595	clocks {
1596		compatible = "simple-bus";
1597		#address-cells = <1>;
1598		#size-cells = <0>;
1599
1600		clk32k_in: clock@0 {
1601			compatible = "fixed-clock";
1602			reg = <0>;
1603			#clock-cells = <0>;
1604			clock-frequency = <32768>;
1605		};
1606	};
1607
1608	cpus {
1609		cpu@0 {
1610			enable-method = "psci";
1611		};
1612
1613		cpu@1 {
1614			enable-method = "psci";
1615		};
1616
1617		cpu@2 {
1618			enable-method = "psci";
1619		};
1620
1621		cpu@3 {
1622			enable-method = "psci";
1623		};
1624	};
1625
1626	gpio-keys {
1627		compatible = "gpio-keys";
1628		gpio-keys,name = "gpio-keys";
1629
1630		power {
1631			label = "Power";
1632			gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>;
1633			linux,code = <KEY_POWER>;
1634			debounce-interval = <30>;
1635			wakeup-source;
1636		};
1637
1638		lid {
1639			label = "Lid";
1640			gpios = <&gpio TEGRA_GPIO(B, 4) GPIO_ACTIVE_LOW>;
1641			linux,input-type = <EV_SW>;
1642			linux,code = <SW_LID>;
1643			wakeup-source;
1644		};
1645
1646		tablet_mode {
1647			label = "Tablet Mode";
1648			gpios = <&gpio TEGRA_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
1649			linux,input-type = <EV_SW>;
1650			linux,code = <SW_TABLET_MODE>;
1651			wakeup-source;
1652		};
1653
1654		volume_down {
1655			label = "Volume Down";
1656			gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
1657			linux,code = <KEY_VOLUMEDOWN>;
1658		};
1659
1660		volume_up {
1661			label = "Volume Up";
1662			gpios = <&gpio TEGRA_GPIO(M, 4) GPIO_ACTIVE_LOW>;
1663			linux,code = <KEY_VOLUMEUP>;
1664		};
1665	};
1666
1667	psci {
1668		compatible = "arm,psci-1.0";
1669		method = "smc";
1670	};
1671
1672	regulators {
1673		compatible = "simple-bus";
1674		device_type = "fixed-regulators";
1675		#address-cells = <1>;
1676		#size-cells = <0>;
1677
1678		ppvar_sys: regulator@0 {
1679			compatible = "regulator-fixed";
1680			reg = <0>;
1681			regulator-name = "PPVAR_SYS";
1682			regulator-min-microvolt = <4400000>;
1683			regulator-max-microvolt = <4400000>;
1684			regulator-always-on;
1685		};
1686
1687		pplcd_vdd: regulator@1 {
1688			compatible = "regulator-fixed";
1689			reg = <1>;
1690			regulator-name = "PPLCD_VDD";
1691			regulator-min-microvolt = <4400000>;
1692			regulator-max-microvolt = <4400000>;
1693			gpio = <&gpio TEGRA_GPIO(V, 4) 0>;
1694			enable-active-high;
1695			regulator-boot-on;
1696		};
1697
1698		pp3000_always: regulator@2 {
1699			compatible = "regulator-fixed";
1700			reg = <2>;
1701			regulator-name = "PP3000_ALWAYS";
1702			regulator-min-microvolt = <3000000>;
1703			regulator-max-microvolt = <3000000>;
1704			regulator-always-on;
1705		};
1706
1707		pp3300: regulator@3 {
1708			compatible = "regulator-fixed";
1709			reg = <3>;
1710			regulator-name = "PP3300";
1711			regulator-min-microvolt = <3300000>;
1712			regulator-max-microvolt = <3300000>;
1713			regulator-boot-on;
1714			regulator-always-on;
1715			enable-active-high;
1716		};
1717
1718		pp5000: regulator@4 {
1719			compatible = "regulator-fixed";
1720			reg = <4>;
1721			regulator-name = "PP5000";
1722			regulator-min-microvolt = <5000000>;
1723			regulator-max-microvolt = <5000000>;
1724			regulator-always-on;
1725		};
1726
1727		pp1800_lcdio: regulator@5 {
1728			compatible = "regulator-fixed";
1729			reg = <5>;
1730			regulator-name = "PP1800_LCDIO";
1731			regulator-min-microvolt = <1800000>;
1732			regulator-max-microvolt = <1800000>;
1733			gpio = <&gpio TEGRA_GPIO(V, 3) 0>;
1734			enable-active-high;
1735			regulator-boot-on;
1736		};
1737
1738		pp1800_cam: regulator@6 {
1739			compatible = "regulator-fixed";
1740			reg= <6>;
1741			regulator-name = "PP1800_CAM";
1742			regulator-min-microvolt = <1800000>;
1743			regulator-max-microvolt = <1800000>;
1744			gpio = <&gpio TEGRA_GPIO(K, 3) 0>;
1745			enable-active-high;
1746		};
1747
1748		usbc_vbus: regulator@7 {
1749			compatible = "regulator-fixed";
1750			reg = <7>;
1751			regulator-name = "USBC_VBUS";
1752			regulator-min-microvolt = <5000000>;
1753			regulator-max-microvolt = <5000000>;
1754		};
1755	};
1756};
1757