1// SPDX-License-Identifier: GPL-2.0 2/dts-v1/; 3 4#include <dt-bindings/input/input.h> 5#include <dt-bindings/mfd/max77620.h> 6#include <dt-bindings/pinctrl/pinctrl-tegra.h> 7 8#include "tegra210.dtsi" 9 10/ { 11 model = "Google Pixel C"; 12 compatible = "google,smaug-rev8", "google,smaug-rev7", 13 "google,smaug-rev6", "google,smaug-rev5", 14 "google,smaug-rev4", "google,smaug-rev3", 15 "google,smaug-rev2", "google,smaug-rev1", 16 "google,smaug", "nvidia,tegra210"; 17 18 aliases { 19 serial0 = &uarta; 20 serial3 = &uartd; 21 }; 22 23 chosen { 24 bootargs = "earlycon"; 25 stdout-path = "serial0:115200n8"; 26 }; 27 28 memory { 29 device_type = "memory"; 30 reg = <0x0 0x80000000 0x0 0xc0000000>; 31 }; 32 33 host1x@50000000 { 34 dpaux: dpaux@545c0000 { 35 status = "okay"; 36 }; 37 }; 38 39 pinmux: pinmux@700008d4 { 40 pinctrl-names = "boot"; 41 pinctrl-0 = <&state_boot>; 42 43 state_boot: pinmux { 44 pex_l0_rst_n_pa0 { 45 nvidia,pins = "pex_l0_rst_n_pa0"; 46 nvidia,function = "rsvd1"; 47 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 48 nvidia,tristate = <TEGRA_PIN_ENABLE>; 49 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 50 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 51 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 52 }; 53 pex_l0_clkreq_n_pa1 { 54 nvidia,pins = "pex_l0_clkreq_n_pa1"; 55 nvidia,function = "rsvd1"; 56 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 57 nvidia,tristate = <TEGRA_PIN_ENABLE>; 58 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 59 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 60 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 61 }; 62 pex_wake_n_pa2 { 63 nvidia,pins = "pex_wake_n_pa2"; 64 nvidia,function = "rsvd1"; 65 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 66 nvidia,tristate = <TEGRA_PIN_ENABLE>; 67 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 68 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 69 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 70 }; 71 pex_l1_rst_n_pa3 { 72 nvidia,pins = "pex_l1_rst_n_pa3"; 73 nvidia,function = "rsvd1"; 74 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 75 nvidia,tristate = <TEGRA_PIN_ENABLE>; 76 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 77 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 78 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 79 }; 80 pex_l1_clkreq_n_pa4 { 81 nvidia,pins = "pex_l1_clkreq_n_pa4"; 82 nvidia,function = "rsvd1"; 83 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 84 nvidia,tristate = <TEGRA_PIN_ENABLE>; 85 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 86 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 87 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 88 }; 89 sata_led_active_pa5 { 90 nvidia,pins = "sata_led_active_pa5"; 91 nvidia,function = "rsvd1"; 92 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 93 nvidia,tristate = <TEGRA_PIN_ENABLE>; 94 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 95 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 96 }; 97 pa6 { 98 nvidia,pins = "pa6"; 99 nvidia,function = "rsvd1"; 100 nvidia,pull = <TEGRA_PIN_PULL_UP>; 101 nvidia,tristate = <TEGRA_PIN_DISABLE>; 102 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 103 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 104 }; 105 dap1_fs_pb0 { 106 nvidia,pins = "dap1_fs_pb0"; 107 nvidia,function = "i2s1"; 108 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 109 nvidia,tristate = <TEGRA_PIN_DISABLE>; 110 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 111 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 112 }; 113 dap1_din_pb1 { 114 nvidia,pins = "dap1_din_pb1"; 115 nvidia,function = "i2s1"; 116 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 117 nvidia,tristate = <TEGRA_PIN_DISABLE>; 118 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 119 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 120 }; 121 dap1_dout_pb2 { 122 nvidia,pins = "dap1_dout_pb2"; 123 nvidia,function = "i2s1"; 124 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 125 nvidia,tristate = <TEGRA_PIN_DISABLE>; 126 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 127 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 128 }; 129 dap1_sclk_pb3 { 130 nvidia,pins = "dap1_sclk_pb3"; 131 nvidia,function = "i2s1"; 132 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 133 nvidia,tristate = <TEGRA_PIN_DISABLE>; 134 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 135 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 136 }; 137 spi2_mosi_pb4 { 138 nvidia,pins = "spi2_mosi_pb4"; 139 nvidia,pull = <TEGRA_PIN_PULL_UP>; 140 nvidia,tristate = <TEGRA_PIN_DISABLE>; 141 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 142 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 143 }; 144 spi2_miso_pb5 { 145 nvidia,pins = "spi2_miso_pb5"; 146 nvidia,function = "rsvd2"; 147 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 148 nvidia,tristate = <TEGRA_PIN_ENABLE>; 149 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 150 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 151 }; 152 spi2_sck_pb6 { 153 nvidia,pins = "spi2_sck_pb6"; 154 nvidia,function = "rsvd2"; 155 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 156 nvidia,tristate = <TEGRA_PIN_ENABLE>; 157 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 158 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 159 }; 160 spi2_cs0_pb7 { 161 nvidia,pins = "spi2_cs0_pb7"; 162 nvidia,function = "rsvd2"; 163 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 164 nvidia,tristate = <TEGRA_PIN_ENABLE>; 165 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 166 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 167 }; 168 spi1_mosi_pc0 { 169 nvidia,pins = "spi1_mosi_pc0"; 170 nvidia,function = "spi1"; 171 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 172 nvidia,tristate = <TEGRA_PIN_DISABLE>; 173 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 174 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 175 }; 176 spi1_miso_pc1 { 177 nvidia,pins = "spi1_miso_pc1"; 178 nvidia,function = "spi1"; 179 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 180 nvidia,tristate = <TEGRA_PIN_DISABLE>; 181 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 182 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 183 }; 184 spi1_sck_pc2 { 185 nvidia,pins = "spi1_sck_pc2"; 186 nvidia,function = "spi1"; 187 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 188 nvidia,tristate = <TEGRA_PIN_DISABLE>; 189 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 190 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 191 }; 192 spi1_cs0_pc3 { 193 nvidia,pins = "spi1_cs0_pc3"; 194 nvidia,function = "spi1"; 195 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 196 nvidia,tristate = <TEGRA_PIN_DISABLE>; 197 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 198 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 199 }; 200 spi1_cs1_pc4 { 201 nvidia,pins = "spi1_cs1_pc4"; 202 nvidia,function = "rsvd1"; 203 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 204 nvidia,tristate = <TEGRA_PIN_ENABLE>; 205 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 206 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 207 }; 208 spi4_sck_pc5 { 209 nvidia,pins = "spi4_sck_pc5"; 210 nvidia,function = "rsvd1"; 211 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 212 nvidia,tristate = <TEGRA_PIN_ENABLE>; 213 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 214 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 215 }; 216 spi4_cs0_pc6 { 217 nvidia,pins = "spi4_cs0_pc6"; 218 nvidia,function = "rsvd1"; 219 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 220 nvidia,tristate = <TEGRA_PIN_ENABLE>; 221 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 222 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 223 }; 224 spi4_mosi_pc7 { 225 nvidia,pins = "spi4_mosi_pc7"; 226 nvidia,function = "rsvd1"; 227 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 228 nvidia,tristate = <TEGRA_PIN_ENABLE>; 229 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 230 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 231 }; 232 spi4_miso_pd0 { 233 nvidia,pins = "spi4_miso_pd0"; 234 nvidia,function = "rsvd1"; 235 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 236 nvidia,tristate = <TEGRA_PIN_ENABLE>; 237 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 238 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 239 }; 240 uart3_tx_pd1 { 241 nvidia,pins = "uart3_tx_pd1"; 242 nvidia,function = "uartc"; 243 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 244 nvidia,tristate = <TEGRA_PIN_DISABLE>; 245 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 246 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 247 }; 248 uart3_rx_pd2 { 249 nvidia,pins = "uart3_rx_pd2"; 250 nvidia,function = "uartc"; 251 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 252 nvidia,tristate = <TEGRA_PIN_DISABLE>; 253 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 254 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 255 }; 256 uart3_rts_pd3 { 257 nvidia,pins = "uart3_rts_pd3"; 258 nvidia,function = "uartc"; 259 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 260 nvidia,tristate = <TEGRA_PIN_DISABLE>; 261 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 262 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 263 }; 264 uart3_cts_pd4 { 265 nvidia,pins = "uart3_cts_pd4"; 266 nvidia,function = "uartc"; 267 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 268 nvidia,tristate = <TEGRA_PIN_DISABLE>; 269 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 270 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 271 }; 272 dmic1_clk_pe0 { 273 nvidia,pins = "dmic1_clk_pe0"; 274 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 275 nvidia,tristate = <TEGRA_PIN_DISABLE>; 276 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 277 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 278 }; 279 dmic1_dat_pe1 { 280 nvidia,pins = "dmic1_dat_pe1"; 281 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 282 nvidia,tristate = <TEGRA_PIN_DISABLE>; 283 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 284 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 285 }; 286 dmic2_clk_pe2 { 287 nvidia,pins = "dmic2_clk_pe2"; 288 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 289 nvidia,tristate = <TEGRA_PIN_DISABLE>; 290 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 291 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 292 }; 293 dmic2_dat_pe3 { 294 nvidia,pins = "dmic2_dat_pe3"; 295 nvidia,pull = <TEGRA_PIN_PULL_UP>; 296 nvidia,tristate = <TEGRA_PIN_DISABLE>; 297 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 298 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 299 }; 300 dmic3_clk_pe4 { 301 nvidia,pins = "dmic3_clk_pe4"; 302 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 303 nvidia,tristate = <TEGRA_PIN_DISABLE>; 304 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 305 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 306 }; 307 dmic3_dat_pe5 { 308 nvidia,pins = "dmic3_dat_pe5"; 309 nvidia,function = "rsvd2"; 310 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 311 nvidia,tristate = <TEGRA_PIN_ENABLE>; 312 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 313 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 314 }; 315 pe6 { 316 nvidia,pins = "pe6"; 317 nvidia,pull = <TEGRA_PIN_PULL_UP>; 318 nvidia,tristate = <TEGRA_PIN_DISABLE>; 319 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 320 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 321 }; 322 pe7 { 323 nvidia,pins = "pe7"; 324 nvidia,pull = <TEGRA_PIN_PULL_UP>; 325 nvidia,tristate = <TEGRA_PIN_DISABLE>; 326 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 327 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 328 }; 329 gen3_i2c_scl_pf0 { 330 nvidia,pins = "gen3_i2c_scl_pf0"; 331 nvidia,function = "i2c3"; 332 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 333 nvidia,tristate = <TEGRA_PIN_DISABLE>; 334 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 335 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 336 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 337 }; 338 gen3_i2c_sda_pf1 { 339 nvidia,pins = "gen3_i2c_sda_pf1"; 340 nvidia,function = "i2c3"; 341 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 342 nvidia,tristate = <TEGRA_PIN_DISABLE>; 343 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 344 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 345 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 346 }; 347 uart2_tx_pg0 { 348 nvidia,pins = "uart2_tx_pg0"; 349 nvidia,function = "uartb"; 350 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 351 nvidia,tristate = <TEGRA_PIN_ENABLE>; 352 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 353 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 354 }; 355 uart2_rx_pg1 { 356 nvidia,pins = "uart2_rx_pg1"; 357 nvidia,function = "uartb"; 358 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 359 nvidia,tristate = <TEGRA_PIN_ENABLE>; 360 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 361 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 362 }; 363 uart2_rts_pg2 { 364 nvidia,pins = "uart2_rts_pg2"; 365 nvidia,function = "rsvd2"; 366 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 367 nvidia,tristate = <TEGRA_PIN_ENABLE>; 368 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 369 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 370 }; 371 uart2_cts_pg3 { 372 nvidia,pins = "uart2_cts_pg3"; 373 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 374 nvidia,tristate = <TEGRA_PIN_DISABLE>; 375 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 376 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 377 }; 378 wifi_en_ph0 { 379 nvidia,pins = "wifi_en_ph0"; 380 nvidia,pull = <TEGRA_PIN_PULL_UP>; 381 nvidia,tristate = <TEGRA_PIN_DISABLE>; 382 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 383 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 384 }; 385 wifi_rst_ph1 { 386 nvidia,pins = "wifi_rst_ph1"; 387 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 388 nvidia,tristate = <TEGRA_PIN_DISABLE>; 389 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 390 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 391 }; 392 wifi_wake_ap_ph2 { 393 nvidia,pins = "wifi_wake_ap_ph2"; 394 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 395 nvidia,tristate = <TEGRA_PIN_DISABLE>; 396 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 397 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 398 }; 399 ap_wake_bt_ph3 { 400 nvidia,pins = "ap_wake_bt_ph3"; 401 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 402 nvidia,tristate = <TEGRA_PIN_DISABLE>; 403 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 404 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 405 }; 406 bt_rst_ph4 { 407 nvidia,pins = "bt_rst_ph4"; 408 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 409 nvidia,tristate = <TEGRA_PIN_DISABLE>; 410 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 411 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 412 }; 413 bt_wake_ap_ph5 { 414 nvidia,pins = "bt_wake_ap_ph5"; 415 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 416 nvidia,tristate = <TEGRA_PIN_DISABLE>; 417 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 418 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 419 }; 420 ph6 { 421 nvidia,pins = "ph6"; 422 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 423 nvidia,tristate = <TEGRA_PIN_DISABLE>; 424 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 425 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 426 }; 427 ap_wake_nfc_ph7 { 428 nvidia,pins = "ap_wake_nfc_ph7"; 429 nvidia,function = "rsvd0"; 430 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 431 nvidia,tristate = <TEGRA_PIN_ENABLE>; 432 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 433 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 434 }; 435 nfc_en_pi0 { 436 nvidia,pins = "nfc_en_pi0"; 437 nvidia,function = "rsvd0"; 438 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 439 nvidia,tristate = <TEGRA_PIN_ENABLE>; 440 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 441 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 442 }; 443 nfc_int_pi1 { 444 nvidia,pins = "nfc_int_pi1"; 445 nvidia,function = "rsvd0"; 446 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 447 nvidia,tristate = <TEGRA_PIN_ENABLE>; 448 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 449 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 450 }; 451 gps_en_pi2 { 452 nvidia,pins = "gps_en_pi2"; 453 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 454 nvidia,tristate = <TEGRA_PIN_DISABLE>; 455 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 456 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 457 }; 458 gps_rst_pi3 { 459 nvidia,pins = "gps_rst_pi3"; 460 nvidia,function = "rsvd0"; 461 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 462 nvidia,tristate = <TEGRA_PIN_ENABLE>; 463 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 464 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 465 }; 466 uart4_tx_pi4 { 467 nvidia,pins = "uart4_tx_pi4"; 468 nvidia,function = "uartd"; 469 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 470 nvidia,tristate = <TEGRA_PIN_DISABLE>; 471 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 472 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 473 }; 474 uart4_rx_pi5 { 475 nvidia,pins = "uart4_rx_pi5"; 476 nvidia,function = "uartd"; 477 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 478 nvidia,tristate = <TEGRA_PIN_DISABLE>; 479 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 480 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 481 }; 482 uart4_rts_pi6 { 483 nvidia,pins = "uart4_rts_pi6"; 484 nvidia,function = "uartd"; 485 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 486 nvidia,tristate = <TEGRA_PIN_DISABLE>; 487 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 488 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 489 }; 490 uart4_cts_pi7 { 491 nvidia,pins = "uart4_cts_pi7"; 492 nvidia,function = "uartd"; 493 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 494 nvidia,tristate = <TEGRA_PIN_DISABLE>; 495 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 496 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 497 }; 498 gen1_i2c_sda_pj0 { 499 nvidia,pins = "gen1_i2c_sda_pj0"; 500 nvidia,function = "i2c1"; 501 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 502 nvidia,tristate = <TEGRA_PIN_DISABLE>; 503 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 504 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 505 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 506 }; 507 gen1_i2c_scl_pj1 { 508 nvidia,pins = "gen1_i2c_scl_pj1"; 509 nvidia,function = "i2c1"; 510 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 511 nvidia,tristate = <TEGRA_PIN_DISABLE>; 512 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 513 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 514 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 515 }; 516 gen2_i2c_scl_pj2 { 517 nvidia,pins = "gen2_i2c_scl_pj2"; 518 nvidia,function = "i2c2"; 519 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 520 nvidia,tristate = <TEGRA_PIN_DISABLE>; 521 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 522 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 523 nvidia,io-hv = <TEGRA_PIN_ENABLE>; 524 }; 525 gen2_i2c_sda_pj3 { 526 nvidia,pins = "gen2_i2c_sda_pj3"; 527 nvidia,function = "i2c2"; 528 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 529 nvidia,tristate = <TEGRA_PIN_DISABLE>; 530 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 531 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 532 nvidia,io-hv = <TEGRA_PIN_ENABLE>; 533 }; 534 dap4_fs_pj4 { 535 nvidia,pins = "dap4_fs_pj4"; 536 nvidia,function = "rsvd1"; 537 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 538 nvidia,tristate = <TEGRA_PIN_ENABLE>; 539 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 540 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 541 }; 542 dap4_din_pj5 { 543 nvidia,pins = "dap4_din_pj5"; 544 nvidia,function = "rsvd1"; 545 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 546 nvidia,tristate = <TEGRA_PIN_ENABLE>; 547 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 548 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 549 }; 550 dap4_dout_pj6 { 551 nvidia,pins = "dap4_dout_pj6"; 552 nvidia,function = "rsvd1"; 553 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 554 nvidia,tristate = <TEGRA_PIN_ENABLE>; 555 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 556 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 557 }; 558 dap4_sclk_pj7 { 559 nvidia,pins = "dap4_sclk_pj7"; 560 nvidia,function = "rsvd1"; 561 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 562 nvidia,tristate = <TEGRA_PIN_ENABLE>; 563 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 564 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 565 }; 566 pk0 { 567 nvidia,pins = "pk0"; 568 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 569 nvidia,tristate = <TEGRA_PIN_DISABLE>; 570 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 571 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 572 }; 573 pk1 { 574 nvidia,pins = "pk1"; 575 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 576 nvidia,tristate = <TEGRA_PIN_DISABLE>; 577 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 578 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 579 }; 580 pk2 { 581 nvidia,pins = "pk2"; 582 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 583 nvidia,tristate = <TEGRA_PIN_DISABLE>; 584 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 585 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 586 }; 587 pk3 { 588 nvidia,pins = "pk3"; 589 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 590 nvidia,tristate = <TEGRA_PIN_DISABLE>; 591 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 592 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 593 }; 594 pk4 { 595 nvidia,pins = "pk4"; 596 nvidia,function = "rsvd1"; 597 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 598 nvidia,tristate = <TEGRA_PIN_ENABLE>; 599 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 600 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 601 }; 602 pk5 { 603 nvidia,pins = "pk5"; 604 nvidia,function = "rsvd1"; 605 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 606 nvidia,tristate = <TEGRA_PIN_ENABLE>; 607 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 608 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 609 }; 610 pk6 { 611 nvidia,pins = "pk6"; 612 nvidia,function = "rsvd1"; 613 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 614 nvidia,tristate = <TEGRA_PIN_ENABLE>; 615 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 616 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 617 }; 618 pk7 { 619 nvidia,pins = "pk7"; 620 nvidia,function = "rsvd1"; 621 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 622 nvidia,tristate = <TEGRA_PIN_ENABLE>; 623 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 624 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 625 }; 626 pl0 { 627 nvidia,pins = "pl0"; 628 nvidia,function = "rsvd0"; 629 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 630 nvidia,tristate = <TEGRA_PIN_ENABLE>; 631 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 632 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 633 }; 634 pl1 { 635 nvidia,pins = "pl1"; 636 nvidia,function = "rsvd1"; 637 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 638 nvidia,tristate = <TEGRA_PIN_ENABLE>; 639 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 640 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 641 }; 642 sdmmc1_clk_pm0 { 643 nvidia,pins = "sdmmc1_clk_pm0"; 644 nvidia,function = "rsvd1"; 645 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 646 nvidia,tristate = <TEGRA_PIN_ENABLE>; 647 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 648 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 649 }; 650 sdmmc1_cmd_pm1 { 651 nvidia,pins = "sdmmc1_cmd_pm1"; 652 nvidia,function = "rsvd2"; 653 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 654 nvidia,tristate = <TEGRA_PIN_ENABLE>; 655 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 656 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 657 }; 658 sdmmc1_dat3_pm2 { 659 nvidia,pins = "sdmmc1_dat3_pm2"; 660 nvidia,function = "rsvd2"; 661 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 662 nvidia,tristate = <TEGRA_PIN_ENABLE>; 663 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 664 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 665 }; 666 sdmmc1_dat2_pm3 { 667 nvidia,pins = "sdmmc1_dat2_pm3"; 668 nvidia,function = "rsvd2"; 669 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 670 nvidia,tristate = <TEGRA_PIN_ENABLE>; 671 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 672 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 673 }; 674 sdmmc1_dat1_pm4 { 675 nvidia,pins = "sdmmc1_dat1_pm4"; 676 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 677 nvidia,tristate = <TEGRA_PIN_DISABLE>; 678 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 679 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 680 }; 681 sdmmc1_dat0_pm5 { 682 nvidia,pins = "sdmmc1_dat0_pm5"; 683 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 684 nvidia,tristate = <TEGRA_PIN_DISABLE>; 685 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 686 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 687 }; 688 sdmmc3_clk_pp0 { 689 nvidia,pins = "sdmmc3_clk_pp0"; 690 nvidia,function = "rsvd1"; 691 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 692 nvidia,tristate = <TEGRA_PIN_ENABLE>; 693 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 694 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 695 }; 696 sdmmc3_cmd_pp1 { 697 nvidia,pins = "sdmmc3_cmd_pp1"; 698 nvidia,function = "rsvd1"; 699 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 700 nvidia,tristate = <TEGRA_PIN_ENABLE>; 701 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 702 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 703 }; 704 sdmmc3_dat3_pp2 { 705 nvidia,pins = "sdmmc3_dat3_pp2"; 706 nvidia,function = "rsvd1"; 707 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 708 nvidia,tristate = <TEGRA_PIN_ENABLE>; 709 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 710 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 711 }; 712 sdmmc3_dat2_pp3 { 713 nvidia,pins = "sdmmc3_dat2_pp3"; 714 nvidia,function = "rsvd1"; 715 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 716 nvidia,tristate = <TEGRA_PIN_ENABLE>; 717 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 718 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 719 }; 720 sdmmc3_dat1_pp4 { 721 nvidia,pins = "sdmmc3_dat1_pp4"; 722 nvidia,function = "rsvd1"; 723 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 724 nvidia,tristate = <TEGRA_PIN_ENABLE>; 725 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 726 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 727 }; 728 sdmmc3_dat0_pp5 { 729 nvidia,pins = "sdmmc3_dat0_pp5"; 730 nvidia,function = "rsvd1"; 731 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 732 nvidia,tristate = <TEGRA_PIN_ENABLE>; 733 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 734 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 735 }; 736 cam1_mclk_ps0 { 737 nvidia,pins = "cam1_mclk_ps0"; 738 nvidia,function = "extperiph3"; 739 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 740 nvidia,tristate = <TEGRA_PIN_DISABLE>; 741 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 742 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 743 }; 744 cam2_mclk_ps1 { 745 nvidia,pins = "cam2_mclk_ps1"; 746 nvidia,function = "extperiph3"; 747 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 748 nvidia,tristate = <TEGRA_PIN_DISABLE>; 749 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 750 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 751 }; 752 cam_i2c_scl_ps2 { 753 nvidia,pins = "cam_i2c_scl_ps2"; 754 nvidia,function = "i2cvi"; 755 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 756 nvidia,tristate = <TEGRA_PIN_DISABLE>; 757 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 758 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 759 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 760 }; 761 cam_i2c_sda_ps3 { 762 nvidia,pins = "cam_i2c_sda_ps3"; 763 nvidia,function = "i2cvi"; 764 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 765 nvidia,tristate = <TEGRA_PIN_DISABLE>; 766 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 767 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 768 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 769 }; 770 cam_rst_ps4 { 771 nvidia,pins = "cam_rst_ps4"; 772 nvidia,function = "rsvd1"; 773 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 774 nvidia,tristate = <TEGRA_PIN_ENABLE>; 775 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 776 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 777 }; 778 cam_af_en_ps5 { 779 nvidia,pins = "cam_af_en_ps5"; 780 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 781 nvidia,tristate = <TEGRA_PIN_DISABLE>; 782 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 783 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 784 }; 785 cam_flash_en_ps6 { 786 nvidia,pins = "cam_flash_en_ps6"; 787 nvidia,function = "rsvd2"; 788 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 789 nvidia,tristate = <TEGRA_PIN_ENABLE>; 790 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 791 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 792 }; 793 cam1_pwdn_ps7 { 794 nvidia,pins = "cam1_pwdn_ps7"; 795 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 796 nvidia,tristate = <TEGRA_PIN_DISABLE>; 797 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 798 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 799 }; 800 cam2_pwdn_pt0 { 801 nvidia,pins = "cam2_pwdn_pt0"; 802 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 803 nvidia,tristate = <TEGRA_PIN_DISABLE>; 804 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 805 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 806 }; 807 cam1_strobe_pt1 { 808 nvidia,pins = "cam1_strobe_pt1"; 809 nvidia,function = "rsvd1"; 810 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 811 nvidia,tristate = <TEGRA_PIN_ENABLE>; 812 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 813 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 814 }; 815 uart1_tx_pu0 { 816 nvidia,pins = "uart1_tx_pu0"; 817 nvidia,function = "uarta"; 818 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 819 nvidia,tristate = <TEGRA_PIN_DISABLE>; 820 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 821 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 822 }; 823 uart1_rx_pu1 { 824 nvidia,pins = "uart1_rx_pu1"; 825 nvidia,function = "uarta"; 826 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 827 nvidia,tristate = <TEGRA_PIN_DISABLE>; 828 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 829 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 830 }; 831 uart1_rts_pu2 { 832 nvidia,pins = "uart1_rts_pu2"; 833 nvidia,function = "rsvd1"; 834 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 835 nvidia,tristate = <TEGRA_PIN_ENABLE>; 836 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 837 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 838 }; 839 uart1_cts_pu3 { 840 nvidia,pins = "uart1_cts_pu3"; 841 nvidia,function = "rsvd1"; 842 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 843 nvidia,tristate = <TEGRA_PIN_ENABLE>; 844 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 845 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 846 }; 847 lcd_bl_pwm_pv0 { 848 nvidia,pins = "lcd_bl_pwm_pv0"; 849 nvidia,function = "rsvd3"; 850 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 851 nvidia,tristate = <TEGRA_PIN_ENABLE>; 852 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 853 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 854 }; 855 lcd_bl_en_pv1 { 856 nvidia,pins = "lcd_bl_en_pv1"; 857 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 858 nvidia,tristate = <TEGRA_PIN_DISABLE>; 859 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 860 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 861 }; 862 lcd_rst_pv2 { 863 nvidia,pins = "lcd_rst_pv2"; 864 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 865 nvidia,tristate = <TEGRA_PIN_DISABLE>; 866 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 867 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 868 }; 869 lcd_gpio1_pv3 { 870 nvidia,pins = "lcd_gpio1_pv3"; 871 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 872 nvidia,tristate = <TEGRA_PIN_DISABLE>; 873 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 874 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 875 }; 876 lcd_gpio2_pv4 { 877 nvidia,pins = "lcd_gpio2_pv4"; 878 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 879 nvidia,tristate = <TEGRA_PIN_DISABLE>; 880 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 881 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 882 }; 883 ap_ready_pv5 { 884 nvidia,pins = "ap_ready_pv5"; 885 nvidia,function = "rsvd0"; 886 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 887 nvidia,tristate = <TEGRA_PIN_ENABLE>; 888 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 889 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 890 }; 891 touch_rst_pv6 { 892 nvidia,pins = "touch_rst_pv6"; 893 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 894 nvidia,tristate = <TEGRA_PIN_DISABLE>; 895 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 896 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 897 }; 898 touch_clk_pv7 { 899 nvidia,pins = "touch_clk_pv7"; 900 nvidia,function = "touch"; 901 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 902 nvidia,tristate = <TEGRA_PIN_DISABLE>; 903 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 904 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 905 }; 906 modem_wake_ap_px0 { 907 nvidia,pins = "modem_wake_ap_px0"; 908 nvidia,function = "rsvd0"; 909 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 910 nvidia,tristate = <TEGRA_PIN_ENABLE>; 911 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 912 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 913 }; 914 touch_int_px1 { 915 nvidia,pins = "touch_int_px1"; 916 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 917 nvidia,tristate = <TEGRA_PIN_DISABLE>; 918 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 919 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 920 }; 921 motion_int_px2 { 922 nvidia,pins = "motion_int_px2"; 923 nvidia,function = "rsvd0"; 924 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 925 nvidia,tristate = <TEGRA_PIN_ENABLE>; 926 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 927 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 928 }; 929 als_prox_int_px3 { 930 nvidia,pins = "als_prox_int_px3"; 931 nvidia,function = "rsvd0"; 932 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 933 nvidia,tristate = <TEGRA_PIN_ENABLE>; 934 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 935 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 936 }; 937 temp_alert_px4 { 938 nvidia,pins = "temp_alert_px4"; 939 nvidia,pull = <TEGRA_PIN_PULL_UP>; 940 nvidia,tristate = <TEGRA_PIN_DISABLE>; 941 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 942 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 943 }; 944 button_power_on_px5 { 945 nvidia,pins = "button_power_on_px5"; 946 nvidia,pull = <TEGRA_PIN_PULL_UP>; 947 nvidia,tristate = <TEGRA_PIN_DISABLE>; 948 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 949 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 950 }; 951 button_vol_up_px6 { 952 nvidia,pins = "button_vol_up_px6"; 953 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 954 nvidia,tristate = <TEGRA_PIN_DISABLE>; 955 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 956 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 957 }; 958 button_vol_down_px7 { 959 nvidia,pins = "button_vol_down_px7"; 960 nvidia,pull = <TEGRA_PIN_PULL_UP>; 961 nvidia,tristate = <TEGRA_PIN_DISABLE>; 962 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 963 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 964 }; 965 button_slide_sw_py0 { 966 nvidia,pins = "button_slide_sw_py0"; 967 nvidia,pull = <TEGRA_PIN_PULL_UP>; 968 nvidia,tristate = <TEGRA_PIN_DISABLE>; 969 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 970 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 971 }; 972 button_home_py1 { 973 nvidia,pins = "button_home_py1"; 974 nvidia,pull = <TEGRA_PIN_PULL_UP>; 975 nvidia,tristate = <TEGRA_PIN_DISABLE>; 976 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 977 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 978 }; 979 lcd_te_py2 { 980 nvidia,pins = "lcd_te_py2"; 981 nvidia,function = "displaya"; 982 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 983 nvidia,tristate = <TEGRA_PIN_DISABLE>; 984 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 985 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 986 }; 987 pwr_i2c_scl_py3 { 988 nvidia,pins = "pwr_i2c_scl_py3"; 989 nvidia,function = "i2cpmu"; 990 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 991 nvidia,tristate = <TEGRA_PIN_DISABLE>; 992 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 993 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 994 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 995 }; 996 pwr_i2c_sda_py4 { 997 nvidia,pins = "pwr_i2c_sda_py4"; 998 nvidia,function = "i2cpmu"; 999 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1000 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1001 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1002 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1003 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1004 }; 1005 clk_32k_out_py5 { 1006 nvidia,pins = "clk_32k_out_py5"; 1007 nvidia,function = "soc"; 1008 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1009 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1010 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1011 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1012 }; 1013 pz0 { 1014 nvidia,pins = "pz0"; 1015 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1016 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1017 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1018 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1019 }; 1020 pz1 { 1021 nvidia,pins = "pz1"; 1022 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1023 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1024 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1025 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1026 }; 1027 pz2 { 1028 nvidia,pins = "pz2"; 1029 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1030 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1031 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1032 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1033 }; 1034 pz3 { 1035 nvidia,pins = "pz3"; 1036 nvidia,function = "rsvd1"; 1037 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1038 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1039 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1040 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1041 }; 1042 pz4 { 1043 nvidia,pins = "pz4"; 1044 nvidia,function = "rsvd1"; 1045 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1046 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1047 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1048 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1049 }; 1050 pz5 { 1051 nvidia,pins = "pz5"; 1052 nvidia,function = "soc"; 1053 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1054 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1055 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1056 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1057 }; 1058 dap2_fs_paa0 { 1059 nvidia,pins = "dap2_fs_paa0"; 1060 nvidia,function = "i2s2"; 1061 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1062 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1063 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1064 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1065 }; 1066 dap2_sclk_paa1 { 1067 nvidia,pins = "dap2_sclk_paa1"; 1068 nvidia,function = "i2s2"; 1069 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1070 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1071 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1072 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1073 }; 1074 dap2_din_paa2 { 1075 nvidia,pins = "dap2_din_paa2"; 1076 nvidia,function = "i2s2"; 1077 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1078 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1079 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1080 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1081 }; 1082 dap2_dout_paa3 { 1083 nvidia,pins = "dap2_dout_paa3"; 1084 nvidia,function = "i2s2"; 1085 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1086 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1087 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1088 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1089 }; 1090 aud_mclk_pbb0 { 1091 nvidia,pins = "aud_mclk_pbb0"; 1092 nvidia,function = "aud"; 1093 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1094 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1095 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1096 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1097 }; 1098 dvfs_pwm_pbb1 { 1099 nvidia,pins = "dvfs_pwm_pbb1"; 1100 nvidia,function = "rsvd0"; 1101 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1102 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1103 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1104 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1105 }; 1106 dvfs_clk_pbb2 { 1107 nvidia,pins = "dvfs_clk_pbb2"; 1108 nvidia,function = "rsvd0"; 1109 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1110 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1111 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1112 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1113 }; 1114 gpio_x1_aud_pbb3 { 1115 nvidia,pins = "gpio_x1_aud_pbb3"; 1116 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1117 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1118 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1119 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1120 }; 1121 gpio_x3_aud_pbb4 { 1122 nvidia,pins = "gpio_x3_aud_pbb4"; 1123 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1124 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1125 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1126 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1127 }; 1128 hdmi_cec_pcc0 { 1129 nvidia,pins = "hdmi_cec_pcc0"; 1130 nvidia,function = "rsvd1"; 1131 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1132 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1133 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1134 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1135 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1136 }; 1137 hdmi_int_dp_hpd_pcc1 { 1138 nvidia,pins = "hdmi_int_dp_hpd_pcc1"; 1139 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1140 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1141 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1142 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1143 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1144 }; 1145 spdif_out_pcc2 { 1146 nvidia,pins = "spdif_out_pcc2"; 1147 nvidia,function = "rsvd1"; 1148 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1149 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1150 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1151 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1152 }; 1153 spdif_in_pcc3 { 1154 nvidia,pins = "spdif_in_pcc3"; 1155 nvidia,function = "rsvd1"; 1156 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1157 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1158 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1159 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1160 }; 1161 usb_vbus_en0_pcc4 { 1162 nvidia,pins = "usb_vbus_en0_pcc4"; 1163 nvidia,function = "rsvd1"; 1164 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1165 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1166 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1167 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1168 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1169 }; 1170 usb_vbus_en1_pcc5 { 1171 nvidia,pins = "usb_vbus_en1_pcc5"; 1172 nvidia,function = "rsvd1"; 1173 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1174 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1175 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1176 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1177 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1178 }; 1179 dp_hpd0_pcc6 { 1180 nvidia,pins = "dp_hpd0_pcc6"; 1181 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1182 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1183 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1184 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1185 }; 1186 pcc7 { 1187 nvidia,pins = "pcc7"; 1188 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1189 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1190 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1191 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1192 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1193 }; 1194 spi2_cs1_pdd0 { 1195 nvidia,pins = "spi2_cs1_pdd0"; 1196 nvidia,function = "rsvd1"; 1197 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1198 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1199 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1200 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1201 }; 1202 qspi_sck_pee0 { 1203 nvidia,pins = "qspi_sck_pee0"; 1204 nvidia,function = "qspi"; 1205 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1206 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1207 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1208 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1209 }; 1210 qspi_cs_n_pee1 { 1211 nvidia,pins = "qspi_cs_n_pee1"; 1212 nvidia,function = "qspi"; 1213 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1214 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1215 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1216 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1217 }; 1218 qspi_io0_pee2 { 1219 nvidia,pins = "qspi_io0_pee2"; 1220 nvidia,function = "qspi"; 1221 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1222 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1223 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1224 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1225 }; 1226 qspi_io1_pee3 { 1227 nvidia,pins = "qspi_io1_pee3"; 1228 nvidia,function = "qspi"; 1229 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1230 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1231 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1232 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1233 }; 1234 qspi_io2_pee4 { 1235 nvidia,pins = "qspi_io2_pee4"; 1236 nvidia,function = "rsvd1"; 1237 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1238 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1239 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1240 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1241 }; 1242 qspi_io3_pee5 { 1243 nvidia,pins = "qspi_io3_pee5"; 1244 nvidia,function = "rsvd1"; 1245 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1246 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1247 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1248 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1249 }; 1250 core_pwr_req { 1251 nvidia,pins = "core_pwr_req"; 1252 nvidia,function = "core"; 1253 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1254 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1255 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1256 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1257 }; 1258 cpu_pwr_req { 1259 nvidia,pins = "cpu_pwr_req"; 1260 nvidia,function = "cpu"; 1261 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1262 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1263 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1264 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1265 }; 1266 pwr_int_n { 1267 nvidia,pins = "pwr_int_n"; 1268 nvidia,function = "pmi"; 1269 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1270 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1271 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1272 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1273 }; 1274 clk_32k_in { 1275 nvidia,pins = "clk_32k_in"; 1276 nvidia,function = "clk"; 1277 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1278 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1279 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1280 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1281 }; 1282 jtag_rtck { 1283 nvidia,pins = "jtag_rtck"; 1284 nvidia,function = "jtag"; 1285 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1286 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1287 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1288 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1289 }; 1290 clk_req { 1291 nvidia,pins = "clk_req"; 1292 nvidia,function = "rsvd1"; 1293 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1294 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1295 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1296 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1297 }; 1298 shutdown { 1299 nvidia,pins = "shutdown"; 1300 nvidia,function = "shutdown"; 1301 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1302 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1303 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1304 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1305 }; 1306 }; 1307 }; 1308 1309 serial@70006000 { 1310 status = "okay"; 1311 }; 1312 1313 uartd: serial@70006300 { 1314 compatible = "nvidia,tegra30-hsuart"; 1315 status = "okay"; 1316 1317 bluetooth { 1318 compatible = "brcm,bcm43540-bt"; 1319 max-speed = <4000000>; 1320 brcm,bt-pcm-int-params = [01 02 00 01 01]; 1321 device-wakeup-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; 1322 shutdown-gpios = <&gpio TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; 1323 interrupt-parent = <&gpio>; 1324 interrupts = <TEGRA_GPIO(H, 5) IRQ_TYPE_LEVEL_LOW>; 1325 interrupt-names = "host-wakeup"; 1326 }; 1327 }; 1328 1329 i2c@7000c400 { 1330 status = "okay"; 1331 clock-frequency = <1000000>; 1332 1333 ec@1e { 1334 compatible = "google,cros-ec-i2c"; 1335 reg = <0x1e>; 1336 interrupt-parent = <&gpio>; 1337 interrupts = <TEGRA_GPIO(Z, 1) IRQ_TYPE_LEVEL_LOW>; 1338 wakeup-source; 1339 1340 ec_i2c_0: i2c-tunnel { 1341 compatible = "google,cros-ec-i2c-tunnel"; 1342 #address-cells = <1>; 1343 #size-cells = <0>; 1344 1345 google,remote-bus = <0>; 1346 1347 battery: bq27742@55 { 1348 compatible = "ti,bq27742"; 1349 reg = <0x55>; 1350 }; 1351 }; 1352 }; 1353 }; 1354 1355 i2c@7000d000 { 1356 status = "okay"; 1357 clock-frequency = <1000000>; 1358 1359 max77621_cpu: max77621@1b { 1360 compatible = "maxim,max77621"; 1361 reg = <0x1b>; 1362 interrupt-parent = <&gpio>; 1363 interrupts = <TEGRA_GPIO(Y, 1) IRQ_TYPE_LEVEL_LOW>; 1364 regulator-always-on; 1365 regulator-boot-on; 1366 regulator-min-microvolt = <800000>; 1367 regulator-max-microvolt = <1231250>; 1368 regulator-name = "PPVAR_CPU"; 1369 regulator-ramp-delay = <12500>; 1370 maxim,dvs-default-state = <1>; 1371 maxim,enable-active-discharge; 1372 maxim,enable-bias-control; 1373 maxim,enable-gpio = <&pmic 5 0>; 1374 maxim,externally-enable; 1375 }; 1376 1377 max77621_gpu: regulator@1c { 1378 compatible = "maxim,max77621"; 1379 reg = <0x1c>; 1380 interrupt-parent = <&gpio>; 1381 interrupts = <TEGRA_GPIO(A, 6) IRQ_TYPE_LEVEL_LOW>; 1382 regulator-min-microvolt = <840000>; 1383 regulator-max-microvolt = <1150000>; 1384 regulator-name = "PPVAR_GPU"; 1385 regulator-ramp-delay = <12500>; 1386 maxim,dvs-default-state = <1>; 1387 maxim,enable-active-discharge; 1388 maxim,enable-bias-control; 1389 maxim,disable-etr; 1390 maxim,enable-gpio = <&pmic 6 GPIO_ACTIVE_HIGH>; 1391 maxim,externally-enable; 1392 }; 1393 1394 pmic: pmic@3c { 1395 compatible = "maxim,max77620"; 1396 reg = <0x3c>; 1397 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 1398 1399 #interrupt-cells = <2>; 1400 interrupt-controller; 1401 1402 gpio-controller; 1403 #gpio-cells = <2>; 1404 1405 pinctrl-names = "default"; 1406 pinctrl-0 = <&max77620_default>; 1407 1408 fps { 1409 fps0 { 1410 maxim,shutdown-fps-time-period-us = <5120>; 1411 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 1412 }; 1413 1414 fps1 { 1415 maxim,shutdown-fps-time-period-us = <5120>; 1416 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 1417 maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>; 1418 }; 1419 1420 fps2 { 1421 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 1422 }; 1423 }; 1424 1425 max77620_default: pinmux { 1426 gpio0_1_2_7 { 1427 pins = "gpio0", "gpio1", "gpio2", "gpio7"; 1428 function = "gpio"; 1429 }; 1430 1431 /* 1432 * GPIO3 is used to en_pp3300, and it is part of power 1433 * sequence, So it must be sequenced up (automatically 1434 * set by OTP) and down properly. 1435 */ 1436 gpio3 { 1437 pins = "gpio3"; 1438 function = "fps-out"; 1439 drive-open-drain = <1>; 1440 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1441 maxim,active-fps-power-up-slot = <4>; 1442 maxim,active-fps-power-down-slot = <2>; 1443 }; 1444 1445 gpio4 { 1446 pins = "gpio4"; 1447 function = "32k-out1"; 1448 }; 1449 1450 gpio5_6 { 1451 pins = "gpio5", "gpio6"; 1452 function = "gpio"; 1453 drive-push-pull = <1>; 1454 }; 1455 }; 1456 1457 regulators { 1458 in-ldo0-1-supply = <&pp1350>; 1459 in-ldo2-supply = <&pp3300>; 1460 in-ldo3-5-supply = <&pp3300>; 1461 in-ldo7-8-supply = <&pp1350>; 1462 1463 ppvar_soc: sd0 { 1464 regulator-name = "PPVAR_SOC"; 1465 regulator-min-microvolt = <825000>; 1466 regulator-max-microvolt = <1125000>; 1467 regulator-always-on; 1468 regulator-boot-on; 1469 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 1470 maxim,active-fps-power-up-slot = <1>; 1471 maxim,active-fps-power-down-slot = <7>; 1472 }; 1473 1474 pp1100_sd1: sd1 { 1475 regulator-name = "PP1100"; 1476 regulator-min-microvolt = <1125000>; 1477 regulator-max-microvolt = <1125000>; 1478 regulator-always-on; 1479 regulator-boot-on; 1480 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1481 maxim,active-fps-power-up-slot = <5>; 1482 maxim,active-fps-power-down-slot = <1>; 1483 }; 1484 1485 pp1350: sd2 { 1486 regulator-name = "PP1350"; 1487 regulator-min-microvolt = <1350000>; 1488 regulator-max-microvolt = <1350000>; 1489 regulator-always-on; 1490 regulator-boot-on; 1491 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1492 maxim,active-fps-power-up-slot = <2>; 1493 maxim,active-fps-power-down-slot = <5>; 1494 }; 1495 1496 pp1800: sd3 { 1497 regulator-name = "PP1800"; 1498 regulator-min-microvolt = <1800000>; 1499 regulator-max-microvolt = <1800000>; 1500 regulator-always-on; 1501 regulator-boot-on; 1502 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1503 maxim,active-fps-power-up-slot = <3>; 1504 maxim,active-fps-power-down-slot = <3>; 1505 }; 1506 1507 pp1200_avdd: ldo0 { 1508 regulator-name = "PP1200_AVDD"; 1509 regulator-min-microvolt = <1200000>; 1510 regulator-max-microvolt = <1200000>; 1511 regulator-enable-ramp-delay = <26>; 1512 regulator-ramp-delay = <100000>; 1513 regulator-boot-on; 1514 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1515 maxim,active-fps-power-up-slot = <0>; 1516 maxim,active-fps-power-down-slot = <7>; 1517 }; 1518 1519 pp1200_rcam: ldo1 { 1520 regulator-name = "PP1200_RCAM"; 1521 regulator-min-microvolt = <1200000>; 1522 regulator-max-microvolt = <1200000>; 1523 regulator-enable-ramp-delay = <22>; 1524 regulator-ramp-delay = <100000>; 1525 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1526 maxim,active-fps-power-up-slot = <0>; 1527 maxim,active-fps-power-down-slot = <7>; 1528 }; 1529 1530 pp_ldo2: ldo2 { 1531 regulator-name = "PP_LDO2"; 1532 regulator-min-microvolt = <1800000>; 1533 regulator-max-microvolt = <1800000>; 1534 regulator-enable-ramp-delay = <62>; 1535 regulator-ramp-delay = <11000>; 1536 regulator-always-on; 1537 regulator-boot-on; 1538 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1539 maxim,active-fps-power-up-slot = <0>; 1540 maxim,active-fps-power-down-slot = <7>; 1541 }; 1542 1543 pp2800l_rcam: ldo3 { 1544 regulator-name = "PP2800L_RCAM"; 1545 regulator-min-microvolt = <2800000>; 1546 regulator-max-microvolt = <2800000>; 1547 regulator-enable-ramp-delay = <50>; 1548 regulator-ramp-delay = <100000>; 1549 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1550 maxim,active-fps-power-up-slot = <0>; 1551 maxim,active-fps-power-down-slot = <7>; 1552 }; 1553 1554 pp100_soc_rtc: ldo4 { 1555 regulator-name = "PP1100_SOC_RTC"; 1556 regulator-min-microvolt = <850000>; 1557 regulator-max-microvolt = <850000>; 1558 regulator-enable-ramp-delay = <22>; 1559 regulator-ramp-delay = <100000>; 1560 regulator-always-on; /* Check this */ 1561 regulator-boot-on; 1562 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1563 maxim,active-fps-power-up-slot = <1>; 1564 maxim,active-fps-power-down-slot = <7>; 1565 }; 1566 1567 pp2800l_fcam: ldo5 { 1568 regulator-name = "PP2800L_FCAM"; 1569 regulator-min-microvolt = <2800000>; 1570 regulator-max-microvolt = <2800000>; 1571 regulator-enable-ramp-delay = <62>; 1572 regulator-ramp-delay = <100000>; 1573 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1574 maxim,active-fps-power-up-slot = <0>; 1575 maxim,active-fps-power-down-slot = <7>; 1576 }; 1577 1578 ldo6 { 1579 /* Unused. */ 1580 regulator-name = "PP_LDO6"; 1581 regulator-min-microvolt = <1800000>; 1582 regulator-max-microvolt = <1800000>; 1583 regulator-enable-ramp-delay = <36>; 1584 regulator-ramp-delay = <100000>; 1585 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1586 maxim,active-fps-power-up-slot = <0>; 1587 maxim,active-fps-power-down-slot = <7>; 1588 }; 1589 1590 pp1050_avdd: ldo7 { 1591 regulator-name = "PP1050_AVDD"; 1592 regulator-min-microvolt = <1050000>; 1593 regulator-max-microvolt = <1050000>; 1594 regulator-enable-ramp-delay = <24>; 1595 regulator-ramp-delay = <100000>; 1596 regulator-always-on; 1597 regulator-boot-on; 1598 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 1599 maxim,active-fps-power-up-slot = <3>; 1600 maxim,active-fps-power-down-slot = <4>; 1601 }; 1602 1603 avddio_1v05: ldo8 { 1604 regulator-name = "AVDDIO_1V05"; 1605 regulator-min-microvolt = <1050000>; 1606 regulator-max-microvolt = <1050000>; 1607 regulator-enable-ramp-delay = <22>; 1608 regulator-ramp-delay = <100000>; 1609 regulator-boot-on; 1610 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1611 maxim,active-fps-power-up-slot = <0>; 1612 maxim,active-fps-power-down-slot = <7>; 1613 }; 1614 }; 1615 }; 1616 }; 1617 1618 i2c@7000d100 { 1619 status = "okay"; 1620 clock-frequency = <400000>; 1621 1622 nau8825@1a { 1623 compatible = "nuvoton,nau8825"; 1624 reg = <0x1a>; 1625 interrupt-parent = <&gpio>; 1626 interrupts = <TEGRA_GPIO(E, 6) IRQ_TYPE_LEVEL_LOW>; 1627 clocks = <&tegra_pmc TEGRA_PMC_CLK_OUT_2>; 1628 clock-names = "mclk"; 1629 1630 nuvoton,jkdet-enable; 1631 nuvoton,jkdet-polarity = <GPIO_ACTIVE_LOW>; 1632 nuvoton,vref-impedance = <2>; 1633 nuvoton,micbias-voltage = <6>; 1634 nuvoton,sar-threshold-num = <4>; 1635 nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>; 1636 nuvoton,sar-hysteresis = <1>; 1637 nuvoton,sar-voltage = <0>; 1638 nuvoton,sar-compare-time = <0>; 1639 nuvoton,sar-sampling-time = <0>; 1640 nuvoton,short-key-debounce = <2>; 1641 nuvoton,jack-insert-debounce = <7>; 1642 nuvoton,jack-eject-debounce = <7>; 1643 status = "okay"; 1644 }; 1645 1646 audio-codec@2d { 1647 compatible = "realtek,rt5677"; 1648 reg = <0x2d>; 1649 interrupt-parent = <&gpio>; 1650 interrupts = <TEGRA_GPIO(X, 0) IRQ_TYPE_LEVEL_HIGH>; 1651 realtek,reset-gpio = <&gpio TEGRA_GPIO(BB, 3) GPIO_ACTIVE_LOW>; 1652 gpio-controller; 1653 #gpio-cells = <2>; 1654 status = "okay"; 1655 }; 1656 }; 1657 1658 pmc@7000e400 { 1659 nvidia,invert-interrupt; 1660 nvidia,suspend-mode = <0>; 1661 nvidia,cpu-pwr-good-time = <0>; 1662 nvidia,cpu-pwr-off-time = <0>; 1663 nvidia,core-pwr-good-time = <12000 6000>; 1664 nvidia,core-pwr-off-time = <39053>; 1665 nvidia,core-power-req-active-high; 1666 nvidia,sys-clock-req-active-high; 1667 status = "okay"; 1668 }; 1669 1670 usb@70090000 { 1671 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, 1672 <&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>; 1673 phy-names = "usb2-0", "usb3-0"; 1674 1675 dvddio-pex-supply = <&avddio_1v05>; 1676 hvddio-pex-supply = <&pp1800>; 1677 avdd-usb-supply = <&pp3300>; 1678 1679 status = "okay"; 1680 }; 1681 1682 padctl@7009f000 { 1683 status = "okay"; 1684 1685 avdd-pll-utmip-supply = <&pp1800>; 1686 avdd-pll-uerefe-supply = <&pp1050_avdd>; 1687 dvdd-pex-pll-supply = <&avddio_1v05>; 1688 hvdd-pex-pll-e-supply = <&pp1800>; 1689 1690 pads { 1691 usb2 { 1692 status = "okay"; 1693 1694 lanes { 1695 usb2-0 { 1696 nvidia,function = "xusb"; 1697 status = "okay"; 1698 }; 1699 }; 1700 }; 1701 1702 pcie { 1703 status = "okay"; 1704 1705 lanes { 1706 pcie-6 { 1707 nvidia,function = "usb3-ss"; 1708 status = "okay"; 1709 }; 1710 }; 1711 }; 1712 }; 1713 1714 ports { 1715 usb2-0 { 1716 status = "okay"; 1717 vbus-supply = <&usbc_vbus>; 1718 mode = "otg"; 1719 }; 1720 1721 usb3-0 { 1722 nvidia,usb2-companion = <0>; 1723 status = "okay"; 1724 }; 1725 }; 1726 }; 1727 1728 mmc@700b0200 { 1729 power-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; 1730 bus-width = <4>; 1731 non-removable; 1732 vqmmc-supply = <&pp1800>; 1733 vmmc-supply = <&pp3300>; 1734 #address-cells = <1>; 1735 #size-cells = <0>; 1736 status = "okay"; 1737 1738 wifi@1 { 1739 compatible = "brcm,bcm4354-fmac", "brcm,bcm4329-fmac"; 1740 reg = <1>; 1741 interrupt-parent = <&gpio>; 1742 interrupts = <TEGRA_GPIO(H, 2) IRQ_TYPE_LEVEL_HIGH>; 1743 interrupt-names = "host-wake"; 1744 }; 1745 }; 1746 1747 mmc@700b0600 { 1748 bus-width = <8>; 1749 non-removable; 1750 status = "okay"; 1751 }; 1752 1753 clock@70110000 { 1754 status = "okay"; 1755 nvidia,cf = <6>; 1756 nvidia,ci = <0>; 1757 nvidia,cg = <2>; 1758 nvidia,droop-ctrl = <0x00000f00>; 1759 nvidia,force-mode = <1>; 1760 nvidia,i2c-fs-rate = <400000>; 1761 nvidia,sample-rate = <12500>; 1762 vdd-cpu-supply = <&max77621_cpu>; 1763 }; 1764 1765 aconnect@702c0000 { 1766 status = "okay"; 1767 1768 dma-controller@702e2000 { 1769 status = "okay"; 1770 }; 1771 1772 interrupt-controller@702f9000 { 1773 status = "okay"; 1774 }; 1775 }; 1776 1777 clk32k_in: clock-32k { 1778 compatible = "fixed-clock"; 1779 clock-frequency = <32768>; 1780 #clock-cells = <0>; 1781 }; 1782 1783 cpus { 1784 cpu@0 { 1785 enable-method = "psci"; 1786 }; 1787 1788 cpu@1 { 1789 enable-method = "psci"; 1790 }; 1791 1792 cpu@2 { 1793 enable-method = "psci"; 1794 }; 1795 1796 cpu@3 { 1797 enable-method = "psci"; 1798 }; 1799 1800 idle-states { 1801 cpu-sleep { 1802 arm,psci-suspend-param = <0x00010007>; 1803 status = "okay"; 1804 }; 1805 }; 1806 }; 1807 1808 gpio-keys { 1809 compatible = "gpio-keys"; 1810 1811 key-power { 1812 label = "Power"; 1813 gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>; 1814 linux,code = <KEY_POWER>; 1815 debounce-interval = <30>; 1816 wakeup-source; 1817 }; 1818 1819 key-volume-down { 1820 label = "Volume Down"; 1821 gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>; 1822 linux,code = <KEY_VOLUMEDOWN>; 1823 }; 1824 1825 key-volume-up { 1826 label = "Volume Up"; 1827 gpios = <&gpio TEGRA_GPIO(M, 4) GPIO_ACTIVE_LOW>; 1828 linux,code = <KEY_VOLUMEUP>; 1829 }; 1830 1831 switch-lid { 1832 label = "Lid"; 1833 gpios = <&gpio TEGRA_GPIO(B, 4) GPIO_ACTIVE_LOW>; 1834 linux,input-type = <EV_SW>; 1835 linux,code = <SW_LID>; 1836 wakeup-source; 1837 }; 1838 1839 switch-tablet-mode { 1840 label = "Tablet Mode"; 1841 gpios = <&gpio TEGRA_GPIO(Z, 2) GPIO_ACTIVE_HIGH>; 1842 linux,input-type = <EV_SW>; 1843 linux,code = <SW_TABLET_MODE>; 1844 wakeup-source; 1845 }; 1846 }; 1847 1848 max98357a { 1849 compatible = "maxim,max98357a"; 1850 status = "okay"; 1851 }; 1852 1853 psci { 1854 compatible = "arm,psci-1.0"; 1855 method = "smc"; 1856 }; 1857 1858 ppvar_sys: regulator-ppvar-sys { 1859 compatible = "regulator-fixed"; 1860 regulator-name = "PPVAR_SYS"; 1861 regulator-min-microvolt = <4400000>; 1862 regulator-max-microvolt = <4400000>; 1863 regulator-always-on; 1864 }; 1865 1866 pplcd_vdd: regulator-pplcd-vdd { 1867 compatible = "regulator-fixed"; 1868 regulator-name = "PPLCD_VDD"; 1869 regulator-min-microvolt = <4400000>; 1870 regulator-max-microvolt = <4400000>; 1871 gpio = <&gpio TEGRA_GPIO(V, 4) 0>; 1872 enable-active-high; 1873 regulator-boot-on; 1874 }; 1875 1876 pp3000_always: regulator-pp3000-always { 1877 compatible = "regulator-fixed"; 1878 regulator-name = "PP3000_ALWAYS"; 1879 regulator-min-microvolt = <3000000>; 1880 regulator-max-microvolt = <3000000>; 1881 regulator-always-on; 1882 }; 1883 1884 pp3300: regulator-pp3000 { 1885 compatible = "regulator-fixed"; 1886 regulator-name = "PP3300"; 1887 regulator-min-microvolt = <3300000>; 1888 regulator-max-microvolt = <3300000>; 1889 regulator-boot-on; 1890 regulator-always-on; 1891 enable-active-high; 1892 }; 1893 1894 pp5000: regulator-pp5000 { 1895 compatible = "regulator-fixed"; 1896 regulator-name = "PP5000"; 1897 regulator-min-microvolt = <5000000>; 1898 regulator-max-microvolt = <5000000>; 1899 regulator-always-on; 1900 }; 1901 1902 pp1800_lcdio: regulator-pp1800-lcdio { 1903 compatible = "regulator-fixed"; 1904 regulator-name = "PP1800_LCDIO"; 1905 regulator-min-microvolt = <1800000>; 1906 regulator-max-microvolt = <1800000>; 1907 gpio = <&gpio TEGRA_GPIO(V, 3) 0>; 1908 enable-active-high; 1909 regulator-boot-on; 1910 }; 1911 1912 pp1800_cam: regulator-pp1800-cam { 1913 compatible = "regulator-fixed"; 1914 regulator-name = "PP1800_CAM"; 1915 regulator-min-microvolt = <1800000>; 1916 regulator-max-microvolt = <1800000>; 1917 gpio = <&gpio TEGRA_GPIO(K, 3) 0>; 1918 enable-active-high; 1919 }; 1920 1921 usbc_vbus: regulator-usbc-vbus { 1922 compatible = "regulator-fixed"; 1923 regulator-name = "USBC_VBUS"; 1924 regulator-min-microvolt = <5000000>; 1925 regulator-max-microvolt = <5000000>; 1926 }; 1927}; 1928