1// SPDX-License-Identifier: GPL-2.0 2/dts-v1/; 3 4#include <dt-bindings/input/gpio-keys.h> 5#include <dt-bindings/input/linux-event-codes.h> 6#include <dt-bindings/mfd/max77620.h> 7 8#include "tegra210.dtsi" 9 10/ { 11 model = "NVIDIA Jetson Nano Developer Kit"; 12 compatible = "nvidia,p3450-0000", "nvidia,tegra210"; 13 14 aliases { 15 ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0"; 16 rtc0 = "/i2c@7000d000/pmic@3c"; 17 rtc1 = "/rtc@7000e000"; 18 serial0 = &uarta; 19 }; 20 21 chosen { 22 stdout-path = "serial0:115200n8"; 23 }; 24 25 memory { 26 device_type = "memory"; 27 reg = <0x0 0x80000000 0x1 0x0>; 28 }; 29 30 pcie@1003000 { 31 status = "okay"; 32 33 avdd-pll-uerefe-supply = <&vdd_pex_1v05>; 34 hvddio-pex-supply = <&vdd_1v8>; 35 dvddio-pex-supply = <&vdd_pex_1v05>; 36 dvdd-pex-pll-supply = <&vdd_pex_1v05>; 37 hvdd-pex-pll-e-supply = <&vdd_1v8>; 38 vddio-pex-ctl-supply = <&vdd_1v8>; 39 40 pci@1,0 { 41 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>, 42 <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>, 43 <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>, 44 <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>; 45 phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3"; 46 nvidia,num-lanes = <4>; 47 status = "okay"; 48 }; 49 50 pci@2,0 { 51 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>; 52 phy-names = "pcie-0"; 53 status = "okay"; 54 55 ethernet@0,0 { 56 reg = <0x000000 0 0 0 0>; 57 local-mac-address = [ 00 00 00 00 00 00 ]; 58 }; 59 }; 60 }; 61 62 host1x@50000000 { 63 dpaux@54040000 { 64 status = "okay"; 65 }; 66 67 sor@54580000 { 68 status = "okay"; 69 70 avdd-io-supply = <&avdd_1v05>; 71 vdd-pll-supply = <&vdd_1v8>; 72 hdmi-supply = <&vdd_hdmi>; 73 74 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 75 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(CC, 1) 76 GPIO_ACTIVE_LOW>; 77 nvidia,xbar-cfg = <0 1 2 3 4>; 78 }; 79 }; 80 81 gpu@57000000 { 82 vdd-supply = <&vdd_gpu>; 83 status = "okay"; 84 }; 85 86 /* debug port */ 87 serial@70006000 { 88 status = "okay"; 89 }; 90 91 i2c@7000c500 { 92 status = "okay"; 93 clock-frequency = <100000>; 94 95 eeprom@50 { 96 compatible = "atmel,24c02"; 97 reg = <0x50>; 98 99 address-bits = <8>; 100 page-size = <8>; 101 size = <256>; 102 read-only; 103 }; 104 105 eeprom@57 { 106 compatible = "atmel,24c02"; 107 reg = <0x57>; 108 109 address-bits = <8>; 110 page-size = <8>; 111 size = <256>; 112 read-only; 113 }; 114 }; 115 116 hdmi_ddc: i2c@7000c700 { 117 status = "okay"; 118 clock-frequency = <100000>; 119 }; 120 121 i2c@7000d000 { 122 status = "okay"; 123 clock-frequency = <400000>; 124 125 pmic: pmic@3c { 126 compatible = "maxim,max77620"; 127 reg = <0x3c>; 128 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 129 130 #interrupt-cells = <2>; 131 interrupt-controller; 132 133 #gpio-cells = <2>; 134 gpio-controller; 135 136 pinctrl-names = "default"; 137 pinctrl-0 = <&max77620_default>; 138 139 max77620_default: pinmux { 140 gpio0 { 141 pins = "gpio0"; 142 function = "gpio"; 143 }; 144 145 gpio1 { 146 pins = "gpio1"; 147 function = "fps-out"; 148 drive-push-pull = <1>; 149 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 150 maxim,active-fps-power-up-slot = <0>; 151 maxim,active-fps-power-down-slot = <7>; 152 }; 153 154 gpio2 { 155 pins = "gpio2"; 156 function = "fps-out"; 157 drive-open-drain = <1>; 158 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 159 maxim,active-fps-power-up-slot = <0>; 160 maxim,active-fps-power-down-slot = <7>; 161 }; 162 163 gpio3 { 164 pins = "gpio3"; 165 function = "fps-out"; 166 drive-open-drain = <1>; 167 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 168 maxim,active-fps-power-up-slot = <4>; 169 maxim,active-fps-power-down-slot = <3>; 170 }; 171 172 gpio4 { 173 pins = "gpio4"; 174 function = "32k-out1"; 175 }; 176 177 gpio5_6_7 { 178 pins = "gpio5", "gpio6", "gpio7"; 179 function = "gpio"; 180 drive-push-pull = <1>; 181 }; 182 }; 183 184 fps { 185 fps0 { 186 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 187 maxim,suspend-fps-time-period-us = <5120>; 188 }; 189 190 fps1 { 191 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 192 maxim,suspend-fps-time-period-us = <5120>; 193 }; 194 195 fps2 { 196 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 197 }; 198 }; 199 200 regulators { 201 in-ldo0-1-supply = <&vdd_pre>; 202 in-ldo2-supply = <&vdd_3v3_sys>; 203 in-ldo3-5-supply = <&vdd_1v8>; 204 in-ldo4-6-supply = <&vdd_5v0_sys>; 205 in-ldo7-8-supply = <&vdd_pre>; 206 in-sd0-supply = <&vdd_5v0_sys>; 207 in-sd1-supply = <&vdd_5v0_sys>; 208 in-sd2-supply = <&vdd_5v0_sys>; 209 in-sd3-supply = <&vdd_5v0_sys>; 210 211 vdd_soc: sd0 { 212 regulator-name = "VDD_SOC"; 213 regulator-min-microvolt = <1000000>; 214 regulator-max-microvolt = <1170000>; 215 regulator-enable-ramp-delay = <146>; 216 regulator-disable-ramp-delay = <4080>; 217 regulator-ramp-delay = <27500>; 218 regulator-ramp-delay-scale = <300>; 219 regulator-always-on; 220 regulator-boot-on; 221 222 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 223 maxim,active-fps-power-up-slot = <1>; 224 maxim,active-fps-power-down-slot = <6>; 225 }; 226 227 vdd_ddr: sd1 { 228 regulator-name = "VDD_DDR_1V1_PMIC"; 229 regulator-min-microvolt = <1150000>; 230 regulator-max-microvolt = <1150000>; 231 regulator-enable-ramp-delay = <176>; 232 regulator-disable-ramp-delay = <145800>; 233 regulator-ramp-delay = <27500>; 234 regulator-ramp-delay-scale = <300>; 235 regulator-always-on; 236 regulator-boot-on; 237 238 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 239 maxim,active-fps-power-up-slot = <5>; 240 maxim,active-fps-power-down-slot = <2>; 241 }; 242 243 vdd_pre: sd2 { 244 regulator-name = "VDD_PRE_REG_1V35"; 245 regulator-min-microvolt = <1350000>; 246 regulator-max-microvolt = <1350000>; 247 regulator-enable-ramp-delay = <176>; 248 regulator-disable-ramp-delay = <32000>; 249 regulator-ramp-delay = <27500>; 250 regulator-ramp-delay-scale = <350>; 251 regulator-always-on; 252 regulator-boot-on; 253 254 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 255 maxim,active-fps-power-up-slot = <2>; 256 maxim,active-fps-power-down-slot = <5>; 257 }; 258 259 vdd_1v8: sd3 { 260 regulator-name = "VDD_1V8"; 261 regulator-min-microvolt = <1800000>; 262 regulator-max-microvolt = <1800000>; 263 regulator-enable-ramp-delay = <242>; 264 regulator-disable-ramp-delay = <118000>; 265 regulator-ramp-delay = <27500>; 266 regulator-ramp-delay-scale = <360>; 267 regulator-always-on; 268 regulator-boot-on; 269 270 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 271 maxim,active-fps-power-up-slot = <3>; 272 maxim,active-fps-power-down-slot = <4>; 273 }; 274 275 vdd_sys_1v2: ldo0 { 276 regulator-name = "AVDD_SYS_1V2"; 277 regulator-min-microvolt = <1200000>; 278 regulator-max-microvolt = <1200000>; 279 regulator-enable-ramp-delay = <26>; 280 regulator-disable-ramp-delay = <626>; 281 regulator-ramp-delay = <100000>; 282 regulator-ramp-delay-scale = <200>; 283 regulator-always-on; 284 regulator-boot-on; 285 286 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 287 maxim,active-fps-power-up-slot = <0>; 288 maxim,active-fps-power-down-slot = <7>; 289 }; 290 291 vdd_pex_1v05: ldo1 { 292 regulator-name = "VDD_PEX_1V05"; 293 regulator-min-microvolt = <1050000>; 294 regulator-max-microvolt = <1050000>; 295 regulator-enable-ramp-delay = <22>; 296 regulator-disable-ramp-delay = <650>; 297 regulator-ramp-delay = <100000>; 298 regulator-ramp-delay-scale = <200>; 299 300 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 301 maxim,active-fps-power-up-slot = <0>; 302 maxim,active-fps-power-down-slot = <7>; 303 }; 304 305 vddio_sdmmc: ldo2 { 306 regulator-name = "VDDIO_SDMMC"; 307 regulator-min-microvolt = <1800000>; 308 regulator-max-microvolt = <3300000>; 309 regulator-enable-ramp-delay = <62>; 310 regulator-disable-ramp-delay = <650>; 311 regulator-ramp-delay = <100000>; 312 regulator-ramp-delay-scale = <200>; 313 314 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 315 maxim,active-fps-power-up-slot = <0>; 316 maxim,active-fps-power-down-slot = <7>; 317 }; 318 319 ldo3 { 320 status = "disabled"; 321 }; 322 323 vdd_rtc: ldo4 { 324 regulator-name = "VDD_RTC"; 325 regulator-min-microvolt = <850000>; 326 regulator-max-microvolt = <1100000>; 327 regulator-enable-ramp-delay = <22>; 328 regulator-disable-ramp-delay = <610>; 329 regulator-ramp-delay = <100000>; 330 regulator-ramp-delay-scale = <200>; 331 regulator-disable-active-discharge; 332 regulator-always-on; 333 regulator-boot-on; 334 335 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 336 maxim,active-fps-power-up-slot = <1>; 337 maxim,active-fps-power-down-slot = <6>; 338 }; 339 340 ldo5 { 341 status = "disabled"; 342 }; 343 344 ldo6 { 345 status = "disabled"; 346 }; 347 348 avdd_1v05_pll: ldo7 { 349 regulator-name = "AVDD_1V05_PLL"; 350 regulator-min-microvolt = <1050000>; 351 regulator-max-microvolt = <1050000>; 352 regulator-enable-ramp-delay = <24>; 353 regulator-disable-ramp-delay = <2768>; 354 regulator-ramp-delay = <100000>; 355 regulator-ramp-delay-scale = <200>; 356 357 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 358 maxim,active-fps-power-up-slot = <3>; 359 maxim,active-fps-power-down-slot = <4>; 360 }; 361 362 avdd_1v05: ldo8 { 363 regulator-name = "AVDD_SATA_HDMI_DP_1V05"; 364 regulator-min-microvolt = <1050000>; 365 regulator-max-microvolt = <1050000>; 366 regulator-enable-ramp-delay = <22>; 367 regulator-disable-ramp-delay = <1160>; 368 regulator-ramp-delay = <100000>; 369 regulator-ramp-delay-scale = <200>; 370 371 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 372 maxim,active-fps-power-up-slot = <6>; 373 maxim,active-fps-power-down-slot = <1>; 374 }; 375 }; 376 }; 377 }; 378 379 pmc@7000e400 { 380 nvidia,invert-interrupt; 381 }; 382 383 hda@70030000 { 384 nvidia,model = "jetson-nano-hda"; 385 386 status = "okay"; 387 }; 388 389 usb@70090000 { 390 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, 391 <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, 392 <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, 393 <&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>; 394 phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0"; 395 396 avdd-usb-supply = <&vdd_3v3_sys>; 397 dvddio-pex-supply = <&vdd_pex_1v05>; 398 hvddio-pex-supply = <&vdd_1v8>; 399 /* these really belong to the XUSB pad controller */ 400 avdd-pll-utmip-supply = <&vdd_1v8>; 401 avdd-pll-uerefe-supply = <&vdd_pex_1v05>; 402 dvdd-usb-ss-pll-supply = <&vdd_pex_1v05>; 403 hvdd-usb-ss-pll-e-supply = <&vdd_1v8>; 404 405 status = "okay"; 406 }; 407 408 padctl@7009f000 { 409 status = "okay"; 410 411 avdd-pll-utmip-supply = <&vdd_1v8>; 412 avdd-pll-uerefe-supply = <&vdd_pex_1v05>; 413 dvdd-pex-pll-supply = <&vdd_pex_1v05>; 414 hvdd-pex-pll-e-supply = <&vdd_1v8>; 415 416 pads { 417 usb2 { 418 status = "okay"; 419 420 lanes { 421 usb2-0 { 422 nvidia,function = "xusb"; 423 status = "okay"; 424 }; 425 426 usb2-1 { 427 nvidia,function = "xusb"; 428 status = "okay"; 429 }; 430 431 usb2-2 { 432 nvidia,function = "xusb"; 433 status = "okay"; 434 }; 435 }; 436 }; 437 438 pcie { 439 status = "okay"; 440 441 lanes { 442 pcie-0 { 443 nvidia,function = "pcie-x1"; 444 status = "okay"; 445 }; 446 447 pcie-1 { 448 nvidia,function = "pcie-x4"; 449 status = "okay"; 450 }; 451 452 pcie-2 { 453 nvidia,function = "pcie-x4"; 454 status = "okay"; 455 }; 456 457 pcie-3 { 458 nvidia,function = "pcie-x4"; 459 status = "okay"; 460 }; 461 462 pcie-4 { 463 nvidia,function = "pcie-x4"; 464 status = "okay"; 465 }; 466 467 pcie-5 { 468 nvidia,function = "usb3-ss"; 469 status = "okay"; 470 }; 471 472 pcie-6 { 473 nvidia,function = "usb3-ss"; 474 status = "okay"; 475 }; 476 }; 477 }; 478 }; 479 480 ports { 481 usb2-0 { 482 status = "okay"; 483 mode = "otg"; 484 }; 485 486 usb2-1 { 487 status = "okay"; 488 mode = "host"; 489 }; 490 491 usb2-2 { 492 status = "okay"; 493 mode = "host"; 494 }; 495 496 usb3-0 { 497 status = "okay"; 498 nvidia,usb2-companion = <1>; 499 vbus-supply = <&vdd_hub_3v3>; 500 }; 501 }; 502 }; 503 504 sdhci@700b0000 { 505 status = "okay"; 506 bus-width = <4>; 507 508 cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; 509 510 vqmmc-supply = <&vddio_sdmmc>; 511 vmmc-supply = <&vdd_3v3_sd>; 512 }; 513 514 clocks { 515 compatible = "simple-bus"; 516 #address-cells = <1>; 517 #size-cells = <0>; 518 519 clk32k_in: clock@0 { 520 compatible = "fixed-clock"; 521 reg = <0>; 522 #clock-cells = <0>; 523 clock-frequency = <32768>; 524 }; 525 }; 526 527 cpus { 528 cpu@0 { 529 enable-method = "psci"; 530 }; 531 532 cpu@1 { 533 enable-method = "psci"; 534 }; 535 536 cpu@2 { 537 enable-method = "psci"; 538 }; 539 540 cpu@3 { 541 enable-method = "psci"; 542 }; 543 }; 544 545 gpio-keys { 546 compatible = "gpio-keys"; 547 548 power { 549 label = "Power"; 550 gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>; 551 linux,input-type = <EV_KEY>; 552 linux,code = <KEY_POWER>; 553 debounce-interval = <30>; 554 wakeup-event-action = <EV_ACT_ASSERTED>; 555 wakeup-source; 556 }; 557 558 force-recovery { 559 label = "Force Recovery"; 560 gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>; 561 linux,input-type = <EV_KEY>; 562 linux,code = <BTN_1>; 563 debounce-interval = <30>; 564 }; 565 }; 566 567 psci { 568 compatible = "arm,psci-1.0"; 569 method = "smc"; 570 }; 571 572 regulators { 573 compatible = "simple-bus"; 574 #address-cells = <1>; 575 #size-cells = <0>; 576 577 vdd_5v0_sys: regulator@0 { 578 compatible = "regulator-fixed"; 579 reg = <0>; 580 581 regulator-name = "VDD_5V0_SYS"; 582 regulator-min-microvolt = <5000000>; 583 regulator-max-microvolt = <5000000>; 584 regulator-always-on; 585 regulator-boot-on; 586 }; 587 588 vdd_3v3_sys: regulator@1 { 589 compatible = "regulator-fixed"; 590 reg = <1>; 591 regulator-name = "VDD_3V3_SYS"; 592 regulator-min-microvolt = <3300000>; 593 regulator-max-microvolt = <3300000>; 594 regulator-enable-ramp-delay = <240>; 595 regulator-disable-ramp-delay = <11340>; 596 regulator-always-on; 597 regulator-boot-on; 598 599 gpio = <&pmic 3 GPIO_ACTIVE_HIGH>; 600 enable-active-high; 601 602 vin-supply = <&vdd_5v0_sys>; 603 }; 604 605 vdd_3v3_sd: regulator@2 { 606 compatible = "regulator-fixed"; 607 reg = <2>; 608 609 regulator-name = "VDD_3V3_SD"; 610 regulator-min-microvolt = <3300000>; 611 regulator-max-microvolt = <3300000>; 612 613 gpio = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; 614 enable-active-high; 615 616 vin-supply = <&vdd_3v3_sys>; 617 }; 618 619 vdd_hdmi: regulator@3 { 620 compatible = "regulator-fixed"; 621 reg = <3>; 622 623 regulator-name = "VDD_HDMI_5V0"; 624 regulator-min-microvolt = <5000000>; 625 regulator-max-microvolt = <5000000>; 626 627 vin-supply = <&vdd_5v0_sys>; 628 }; 629 630 vdd_hub_3v3: regulator@4 { 631 compatible = "regulator-fixed"; 632 reg = <4>; 633 634 regulator-name = "VDD_HUB_3V3"; 635 regulator-min-microvolt = <3300000>; 636 regulator-max-microvolt = <3300000>; 637 638 gpio = <&gpio TEGRA_GPIO(A, 6) GPIO_ACTIVE_HIGH>; 639 enable-active-high; 640 641 vin-supply = <&vdd_5v0_sys>; 642 }; 643 644 vdd_cpu: regulator@5 { 645 compatible = "regulator-fixed"; 646 reg = <5>; 647 648 regulator-name = "VDD_CPU"; 649 regulator-min-microvolt = <5000000>; 650 regulator-max-microvolt = <5000000>; 651 regulator-always-on; 652 regulator-boot-on; 653 654 gpio = <&pmic 5 GPIO_ACTIVE_HIGH>; 655 enable-active-high; 656 657 vin-supply = <&vdd_5v0_sys>; 658 }; 659 660 vdd_gpu: regulator@6 { 661 compatible = "regulator-fixed"; 662 reg = <6>; 663 664 regulator-name = "VDD_GPU"; 665 regulator-min-microvolt = <5000000>; 666 regulator-max-microvolt = <5000000>; 667 regulator-enable-ramp-delay = <250>; 668 669 gpio = <&pmic 6 GPIO_ACTIVE_HIGH>; 670 enable-active-high; 671 672 vin-supply = <&vdd_5v0_sys>; 673 }; 674 }; 675}; 676