1// SPDX-License-Identifier: GPL-2.0 2/dts-v1/; 3 4#include <dt-bindings/input/gpio-keys.h> 5#include <dt-bindings/input/linux-event-codes.h> 6#include <dt-bindings/mfd/max77620.h> 7 8#include "tegra210.dtsi" 9 10/ { 11 model = "NVIDIA Jetson Nano Developer Kit"; 12 compatible = "nvidia,p3450-0000", "nvidia,tegra210"; 13 14 aliases { 15 ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0"; 16 rtc0 = "/i2c@7000d000/pmic@3c"; 17 rtc1 = "/rtc@7000e000"; 18 serial0 = &uarta; 19 }; 20 21 chosen { 22 stdout-path = "serial0:115200n8"; 23 }; 24 25 memory { 26 device_type = "memory"; 27 reg = <0x0 0x80000000 0x1 0x0>; 28 }; 29 30 pcie@1003000 { 31 status = "okay"; 32 33 avdd-pll-uerefe-supply = <&vdd_pex_1v05>; 34 hvddio-pex-supply = <&vdd_1v8>; 35 dvddio-pex-supply = <&vdd_pex_1v05>; 36 dvdd-pex-pll-supply = <&vdd_pex_1v05>; 37 hvdd-pex-pll-e-supply = <&vdd_1v8>; 38 vddio-pex-ctl-supply = <&vdd_1v8>; 39 40 pci@1,0 { 41 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>, 42 <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>, 43 <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>, 44 <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>; 45 phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3"; 46 nvidia,num-lanes = <4>; 47 status = "okay"; 48 }; 49 50 pci@2,0 { 51 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>; 52 phy-names = "pcie-0"; 53 status = "okay"; 54 55 ethernet@0,0 { 56 reg = <0x000000 0 0 0 0>; 57 local-mac-address = [ 00 00 00 00 00 00 ]; 58 }; 59 }; 60 }; 61 62 host1x@50000000 { 63 dpaux@54040000 { 64 status = "okay"; 65 }; 66 67 sor@54540000 { 68 status = "okay"; 69 70 avdd-io-hdmi-dp-supply = <&avdd_io_edp_1v05>; 71 vdd-hdmi-dp-pll-supply = <&vdd_1v8>; 72 73 nvidia,xbar-cfg = <2 1 0 3 4>; 74 nvidia,dpaux = <&dpaux>; 75 }; 76 77 sor@54580000 { 78 status = "okay"; 79 80 avdd-io-supply = <&avdd_1v05>; 81 vdd-pll-supply = <&vdd_1v8>; 82 hdmi-supply = <&vdd_hdmi>; 83 84 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 85 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(CC, 1) 86 GPIO_ACTIVE_LOW>; 87 nvidia,xbar-cfg = <0 1 2 3 4>; 88 }; 89 90 dpaux@545c0000 { 91 status = "okay"; 92 }; 93 }; 94 95 gpu@57000000 { 96 vdd-supply = <&vdd_gpu>; 97 status = "okay"; 98 }; 99 100 /* debug port */ 101 serial@70006000 { 102 status = "okay"; 103 }; 104 105 pwm@7000a000 { 106 status = "okay"; 107 }; 108 109 i2c@7000c500 { 110 status = "okay"; 111 clock-frequency = <100000>; 112 113 eeprom@50 { 114 compatible = "atmel,24c02"; 115 reg = <0x50>; 116 117 address-bits = <8>; 118 page-size = <8>; 119 size = <256>; 120 read-only; 121 }; 122 123 eeprom@57 { 124 compatible = "atmel,24c02"; 125 reg = <0x57>; 126 127 address-bits = <8>; 128 page-size = <8>; 129 size = <256>; 130 read-only; 131 }; 132 }; 133 134 hdmi_ddc: i2c@7000c700 { 135 status = "okay"; 136 clock-frequency = <100000>; 137 }; 138 139 i2c@7000d000 { 140 status = "okay"; 141 clock-frequency = <400000>; 142 143 pmic: pmic@3c { 144 compatible = "maxim,max77620"; 145 reg = <0x3c>; 146 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 147 148 #interrupt-cells = <2>; 149 interrupt-controller; 150 151 #gpio-cells = <2>; 152 gpio-controller; 153 154 pinctrl-names = "default"; 155 pinctrl-0 = <&max77620_default>; 156 157 max77620_default: pinmux { 158 gpio0 { 159 pins = "gpio0"; 160 function = "gpio"; 161 }; 162 163 gpio1 { 164 pins = "gpio1"; 165 function = "fps-out"; 166 drive-push-pull = <1>; 167 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 168 maxim,active-fps-power-up-slot = <0>; 169 maxim,active-fps-power-down-slot = <7>; 170 }; 171 172 gpio2 { 173 pins = "gpio2"; 174 function = "fps-out"; 175 drive-open-drain = <1>; 176 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 177 maxim,active-fps-power-up-slot = <0>; 178 maxim,active-fps-power-down-slot = <7>; 179 }; 180 181 gpio3 { 182 pins = "gpio3"; 183 function = "fps-out"; 184 drive-open-drain = <1>; 185 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 186 maxim,active-fps-power-up-slot = <4>; 187 maxim,active-fps-power-down-slot = <3>; 188 }; 189 190 gpio4 { 191 pins = "gpio4"; 192 function = "32k-out1"; 193 }; 194 195 gpio5_6_7 { 196 pins = "gpio5", "gpio6", "gpio7"; 197 function = "gpio"; 198 drive-push-pull = <1>; 199 }; 200 }; 201 202 fps { 203 fps0 { 204 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 205 maxim,suspend-fps-time-period-us = <5120>; 206 }; 207 208 fps1 { 209 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 210 maxim,suspend-fps-time-period-us = <5120>; 211 }; 212 213 fps2 { 214 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 215 }; 216 }; 217 218 regulators { 219 in-ldo0-1-supply = <&vdd_pre>; 220 in-ldo2-supply = <&vdd_3v3_sys>; 221 in-ldo3-5-supply = <&vdd_1v8>; 222 in-ldo4-6-supply = <&vdd_5v0_sys>; 223 in-ldo7-8-supply = <&vdd_pre>; 224 in-sd0-supply = <&vdd_5v0_sys>; 225 in-sd1-supply = <&vdd_5v0_sys>; 226 in-sd2-supply = <&vdd_5v0_sys>; 227 in-sd3-supply = <&vdd_5v0_sys>; 228 229 vdd_soc: sd0 { 230 regulator-name = "VDD_SOC"; 231 regulator-min-microvolt = <1000000>; 232 regulator-max-microvolt = <1170000>; 233 regulator-enable-ramp-delay = <146>; 234 regulator-disable-ramp-delay = <4080>; 235 regulator-ramp-delay = <27500>; 236 regulator-ramp-delay-scale = <300>; 237 regulator-always-on; 238 regulator-boot-on; 239 240 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 241 maxim,active-fps-power-up-slot = <1>; 242 maxim,active-fps-power-down-slot = <6>; 243 }; 244 245 vdd_ddr: sd1 { 246 regulator-name = "VDD_DDR_1V1_PMIC"; 247 regulator-min-microvolt = <1150000>; 248 regulator-max-microvolt = <1150000>; 249 regulator-enable-ramp-delay = <176>; 250 regulator-disable-ramp-delay = <145800>; 251 regulator-ramp-delay = <27500>; 252 regulator-ramp-delay-scale = <300>; 253 regulator-always-on; 254 regulator-boot-on; 255 256 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 257 maxim,active-fps-power-up-slot = <5>; 258 maxim,active-fps-power-down-slot = <2>; 259 }; 260 261 vdd_pre: sd2 { 262 regulator-name = "VDD_PRE_REG_1V35"; 263 regulator-min-microvolt = <1350000>; 264 regulator-max-microvolt = <1350000>; 265 regulator-enable-ramp-delay = <176>; 266 regulator-disable-ramp-delay = <32000>; 267 regulator-ramp-delay = <27500>; 268 regulator-ramp-delay-scale = <350>; 269 regulator-always-on; 270 regulator-boot-on; 271 272 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 273 maxim,active-fps-power-up-slot = <2>; 274 maxim,active-fps-power-down-slot = <5>; 275 }; 276 277 vdd_1v8: sd3 { 278 regulator-name = "VDD_1V8"; 279 regulator-min-microvolt = <1800000>; 280 regulator-max-microvolt = <1800000>; 281 regulator-enable-ramp-delay = <242>; 282 regulator-disable-ramp-delay = <118000>; 283 regulator-ramp-delay = <27500>; 284 regulator-ramp-delay-scale = <360>; 285 regulator-always-on; 286 regulator-boot-on; 287 288 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 289 maxim,active-fps-power-up-slot = <3>; 290 maxim,active-fps-power-down-slot = <4>; 291 }; 292 293 vdd_sys_1v2: ldo0 { 294 regulator-name = "AVDD_SYS_1V2"; 295 regulator-min-microvolt = <1200000>; 296 regulator-max-microvolt = <1200000>; 297 regulator-enable-ramp-delay = <26>; 298 regulator-disable-ramp-delay = <626>; 299 regulator-ramp-delay = <100000>; 300 regulator-ramp-delay-scale = <200>; 301 regulator-always-on; 302 regulator-boot-on; 303 304 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 305 maxim,active-fps-power-up-slot = <0>; 306 maxim,active-fps-power-down-slot = <7>; 307 }; 308 309 vdd_pex_1v05: ldo1 { 310 regulator-name = "VDD_PEX_1V05"; 311 regulator-min-microvolt = <1050000>; 312 regulator-max-microvolt = <1050000>; 313 regulator-enable-ramp-delay = <22>; 314 regulator-disable-ramp-delay = <650>; 315 regulator-ramp-delay = <100000>; 316 regulator-ramp-delay-scale = <200>; 317 318 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 319 maxim,active-fps-power-up-slot = <0>; 320 maxim,active-fps-power-down-slot = <7>; 321 }; 322 323 vddio_sdmmc: ldo2 { 324 regulator-name = "VDDIO_SDMMC"; 325 regulator-min-microvolt = <1800000>; 326 regulator-max-microvolt = <3300000>; 327 regulator-enable-ramp-delay = <62>; 328 regulator-disable-ramp-delay = <650>; 329 regulator-ramp-delay = <100000>; 330 regulator-ramp-delay-scale = <200>; 331 332 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 333 maxim,active-fps-power-up-slot = <0>; 334 maxim,active-fps-power-down-slot = <7>; 335 }; 336 337 ldo3 { 338 status = "disabled"; 339 }; 340 341 vdd_rtc: ldo4 { 342 regulator-name = "VDD_RTC"; 343 regulator-min-microvolt = <850000>; 344 regulator-max-microvolt = <1100000>; 345 regulator-enable-ramp-delay = <22>; 346 regulator-disable-ramp-delay = <610>; 347 regulator-ramp-delay = <100000>; 348 regulator-ramp-delay-scale = <200>; 349 regulator-disable-active-discharge; 350 regulator-always-on; 351 regulator-boot-on; 352 353 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 354 maxim,active-fps-power-up-slot = <1>; 355 maxim,active-fps-power-down-slot = <6>; 356 }; 357 358 ldo5 { 359 status = "disabled"; 360 }; 361 362 ldo6 { 363 status = "disabled"; 364 }; 365 366 avdd_1v05_pll: ldo7 { 367 regulator-name = "AVDD_1V05_PLL"; 368 regulator-min-microvolt = <1050000>; 369 regulator-max-microvolt = <1050000>; 370 regulator-enable-ramp-delay = <24>; 371 regulator-disable-ramp-delay = <2768>; 372 regulator-ramp-delay = <100000>; 373 regulator-ramp-delay-scale = <200>; 374 375 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 376 maxim,active-fps-power-up-slot = <3>; 377 maxim,active-fps-power-down-slot = <4>; 378 }; 379 380 avdd_1v05: ldo8 { 381 regulator-name = "AVDD_SATA_HDMI_DP_1V05"; 382 regulator-min-microvolt = <1050000>; 383 regulator-max-microvolt = <1050000>; 384 regulator-enable-ramp-delay = <22>; 385 regulator-disable-ramp-delay = <1160>; 386 regulator-ramp-delay = <100000>; 387 regulator-ramp-delay-scale = <200>; 388 389 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 390 maxim,active-fps-power-up-slot = <6>; 391 maxim,active-fps-power-down-slot = <1>; 392 }; 393 }; 394 }; 395 }; 396 397 pmc@7000e400 { 398 nvidia,invert-interrupt; 399 }; 400 401 hda@70030000 { 402 nvidia,model = "jetson-nano-hda"; 403 404 status = "okay"; 405 }; 406 407 usb@70090000 { 408 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, 409 <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, 410 <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, 411 <&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>; 412 phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0"; 413 414 avdd-usb-supply = <&vdd_3v3_sys>; 415 dvddio-pex-supply = <&vdd_pex_1v05>; 416 hvddio-pex-supply = <&vdd_1v8>; 417 /* these really belong to the XUSB pad controller */ 418 avdd-pll-utmip-supply = <&vdd_1v8>; 419 avdd-pll-uerefe-supply = <&vdd_pex_1v05>; 420 dvdd-usb-ss-pll-supply = <&vdd_pex_1v05>; 421 hvdd-usb-ss-pll-e-supply = <&vdd_1v8>; 422 423 status = "okay"; 424 }; 425 426 padctl@7009f000 { 427 status = "okay"; 428 429 avdd-pll-utmip-supply = <&vdd_1v8>; 430 avdd-pll-uerefe-supply = <&vdd_pex_1v05>; 431 dvdd-pex-pll-supply = <&vdd_pex_1v05>; 432 hvdd-pex-pll-e-supply = <&vdd_1v8>; 433 434 pads { 435 usb2 { 436 status = "okay"; 437 438 lanes { 439 usb2-0 { 440 nvidia,function = "xusb"; 441 status = "okay"; 442 }; 443 444 usb2-1 { 445 nvidia,function = "xusb"; 446 status = "okay"; 447 }; 448 449 usb2-2 { 450 nvidia,function = "xusb"; 451 status = "okay"; 452 }; 453 }; 454 }; 455 456 pcie { 457 status = "okay"; 458 459 lanes { 460 pcie-0 { 461 nvidia,function = "pcie-x1"; 462 status = "okay"; 463 }; 464 465 pcie-1 { 466 nvidia,function = "pcie-x4"; 467 status = "okay"; 468 }; 469 470 pcie-2 { 471 nvidia,function = "pcie-x4"; 472 status = "okay"; 473 }; 474 475 pcie-3 { 476 nvidia,function = "pcie-x4"; 477 status = "okay"; 478 }; 479 480 pcie-4 { 481 nvidia,function = "pcie-x4"; 482 status = "okay"; 483 }; 484 485 pcie-5 { 486 nvidia,function = "usb3-ss"; 487 status = "okay"; 488 }; 489 490 pcie-6 { 491 nvidia,function = "usb3-ss"; 492 status = "okay"; 493 }; 494 }; 495 }; 496 }; 497 498 ports { 499 usb2-0 { 500 status = "okay"; 501 mode = "otg"; 502 }; 503 504 usb2-1 { 505 status = "okay"; 506 mode = "host"; 507 }; 508 509 usb2-2 { 510 status = "okay"; 511 mode = "host"; 512 }; 513 514 usb3-0 { 515 status = "okay"; 516 nvidia,usb2-companion = <1>; 517 vbus-supply = <&vdd_hub_3v3>; 518 }; 519 }; 520 }; 521 522 sdhci@700b0000 { 523 status = "okay"; 524 bus-width = <4>; 525 526 cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; 527 528 vqmmc-supply = <&vddio_sdmmc>; 529 vmmc-supply = <&vdd_3v3_sd>; 530 }; 531 532 clocks { 533 compatible = "simple-bus"; 534 #address-cells = <1>; 535 #size-cells = <0>; 536 537 clk32k_in: clock@0 { 538 compatible = "fixed-clock"; 539 reg = <0>; 540 #clock-cells = <0>; 541 clock-frequency = <32768>; 542 }; 543 }; 544 545 cpus { 546 cpu@0 { 547 enable-method = "psci"; 548 }; 549 550 cpu@1 { 551 enable-method = "psci"; 552 }; 553 554 cpu@2 { 555 enable-method = "psci"; 556 }; 557 558 cpu@3 { 559 enable-method = "psci"; 560 }; 561 562 idle-states { 563 cpu-sleep { 564 status = "okay"; 565 }; 566 }; 567 }; 568 569 gpio-keys { 570 compatible = "gpio-keys"; 571 572 power { 573 label = "Power"; 574 gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>; 575 linux,input-type = <EV_KEY>; 576 linux,code = <KEY_POWER>; 577 debounce-interval = <30>; 578 wakeup-event-action = <EV_ACT_ASSERTED>; 579 wakeup-source; 580 }; 581 582 force-recovery { 583 label = "Force Recovery"; 584 gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>; 585 linux,input-type = <EV_KEY>; 586 linux,code = <BTN_1>; 587 debounce-interval = <30>; 588 }; 589 }; 590 591 psci { 592 compatible = "arm,psci-1.0"; 593 method = "smc"; 594 }; 595 596 regulators { 597 compatible = "simple-bus"; 598 #address-cells = <1>; 599 #size-cells = <0>; 600 601 vdd_5v0_sys: regulator@0 { 602 compatible = "regulator-fixed"; 603 reg = <0>; 604 605 regulator-name = "VDD_5V0_SYS"; 606 regulator-min-microvolt = <5000000>; 607 regulator-max-microvolt = <5000000>; 608 regulator-always-on; 609 regulator-boot-on; 610 }; 611 612 vdd_3v3_sys: regulator@1 { 613 compatible = "regulator-fixed"; 614 reg = <1>; 615 regulator-name = "VDD_3V3_SYS"; 616 regulator-min-microvolt = <3300000>; 617 regulator-max-microvolt = <3300000>; 618 regulator-enable-ramp-delay = <240>; 619 regulator-disable-ramp-delay = <11340>; 620 regulator-always-on; 621 regulator-boot-on; 622 623 gpio = <&pmic 3 GPIO_ACTIVE_HIGH>; 624 enable-active-high; 625 626 vin-supply = <&vdd_5v0_sys>; 627 }; 628 629 vdd_3v3_sd: regulator@2 { 630 compatible = "regulator-fixed"; 631 reg = <2>; 632 633 regulator-name = "VDD_3V3_SD"; 634 regulator-min-microvolt = <3300000>; 635 regulator-max-microvolt = <3300000>; 636 637 gpio = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; 638 enable-active-high; 639 640 vin-supply = <&vdd_3v3_sys>; 641 }; 642 643 vdd_hdmi: regulator@3 { 644 compatible = "regulator-fixed"; 645 reg = <3>; 646 647 regulator-name = "VDD_HDMI_5V0"; 648 regulator-min-microvolt = <5000000>; 649 regulator-max-microvolt = <5000000>; 650 651 vin-supply = <&vdd_5v0_sys>; 652 }; 653 654 vdd_hub_3v3: regulator@4 { 655 compatible = "regulator-fixed"; 656 reg = <4>; 657 658 regulator-name = "VDD_HUB_3V3"; 659 regulator-min-microvolt = <3300000>; 660 regulator-max-microvolt = <3300000>; 661 662 gpio = <&gpio TEGRA_GPIO(A, 6) GPIO_ACTIVE_HIGH>; 663 enable-active-high; 664 665 vin-supply = <&vdd_5v0_sys>; 666 }; 667 668 vdd_cpu: regulator@5 { 669 compatible = "regulator-fixed"; 670 reg = <5>; 671 672 regulator-name = "VDD_CPU"; 673 regulator-min-microvolt = <5000000>; 674 regulator-max-microvolt = <5000000>; 675 regulator-always-on; 676 regulator-boot-on; 677 678 gpio = <&pmic 5 GPIO_ACTIVE_HIGH>; 679 enable-active-high; 680 681 vin-supply = <&vdd_5v0_sys>; 682 }; 683 684 vdd_gpu: regulator@6 { 685 compatible = "pwm-regulator"; 686 reg = <6>; 687 pwms = <&pwm 1 4880>; 688 regulator-name = "VDD_GPU"; 689 regulator-min-microvolt = <710000>; 690 regulator-max-microvolt = <1320000>; 691 regulator-ramp-delay = <80>; 692 regulator-enable-ramp-delay = <2000>; 693 regulator-settling-time-us = <160>; 694 enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>; 695 vin-supply = <&vdd_5v0_sys>; 696 }; 697 698 avdd_io_edp_1v05: regulator@7 { 699 compatible = "regulator-fixed"; 700 reg = <7>; 701 702 regulator-name = "AVDD_IO_EDP_1V05"; 703 regulator-min-microvolt = <1050000>; 704 regulator-max-microvolt = <1050000>; 705 706 gpio = <&pmic 7 GPIO_ACTIVE_HIGH>; 707 enable-active-high; 708 709 vin-supply = <&avdd_1v05_pll>; 710 }; 711 }; 712}; 713