16772cd0eSThierry Reding// SPDX-License-Identifier: GPL-2.0 26772cd0eSThierry Reding/dts-v1/; 36772cd0eSThierry Reding 46772cd0eSThierry Reding#include <dt-bindings/input/gpio-keys.h> 56772cd0eSThierry Reding#include <dt-bindings/input/linux-event-codes.h> 66772cd0eSThierry Reding#include <dt-bindings/mfd/max77620.h> 76772cd0eSThierry Reding 86772cd0eSThierry Reding#include "tegra210.dtsi" 96772cd0eSThierry Reding 106772cd0eSThierry Reding/ { 116772cd0eSThierry Reding model = "NVIDIA Jetson Nano Developer Kit"; 126772cd0eSThierry Reding compatible = "nvidia,p3450-0000", "nvidia,tegra210"; 136772cd0eSThierry Reding 146772cd0eSThierry Reding aliases { 156772cd0eSThierry Reding ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0"; 166772cd0eSThierry Reding rtc0 = "/i2c@7000d000/pmic@3c"; 176772cd0eSThierry Reding rtc1 = "/rtc@7000e000"; 186772cd0eSThierry Reding serial0 = &uarta; 196772cd0eSThierry Reding }; 206772cd0eSThierry Reding 216772cd0eSThierry Reding chosen { 226772cd0eSThierry Reding stdout-path = "serial0:115200n8"; 236772cd0eSThierry Reding }; 246772cd0eSThierry Reding 25772a6a7bSThierry Reding memory@80000000 { 266772cd0eSThierry Reding device_type = "memory"; 276772cd0eSThierry Reding reg = <0x0 0x80000000 0x1 0x0>; 286772cd0eSThierry Reding }; 296772cd0eSThierry Reding 306772cd0eSThierry Reding pcie@1003000 { 316772cd0eSThierry Reding status = "okay"; 326772cd0eSThierry Reding 336772cd0eSThierry Reding avdd-pll-uerefe-supply = <&vdd_pex_1v05>; 346772cd0eSThierry Reding hvddio-pex-supply = <&vdd_1v8>; 356772cd0eSThierry Reding dvddio-pex-supply = <&vdd_pex_1v05>; 366772cd0eSThierry Reding dvdd-pex-pll-supply = <&vdd_pex_1v05>; 376772cd0eSThierry Reding hvdd-pex-pll-e-supply = <&vdd_1v8>; 386772cd0eSThierry Reding vddio-pex-ctl-supply = <&vdd_1v8>; 396772cd0eSThierry Reding 406772cd0eSThierry Reding pci@1,0 { 416772cd0eSThierry Reding phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>, 426772cd0eSThierry Reding <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>, 436772cd0eSThierry Reding <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>, 446772cd0eSThierry Reding <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>; 456772cd0eSThierry Reding phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3"; 466772cd0eSThierry Reding nvidia,num-lanes = <4>; 476772cd0eSThierry Reding status = "okay"; 486772cd0eSThierry Reding }; 496772cd0eSThierry Reding 506772cd0eSThierry Reding pci@2,0 { 516772cd0eSThierry Reding phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>; 526772cd0eSThierry Reding phy-names = "pcie-0"; 536772cd0eSThierry Reding status = "okay"; 546772cd0eSThierry Reding 556772cd0eSThierry Reding ethernet@0,0 { 566772cd0eSThierry Reding reg = <0x000000 0 0 0 0>; 576772cd0eSThierry Reding local-mac-address = [ 00 00 00 00 00 00 ]; 586772cd0eSThierry Reding }; 596772cd0eSThierry Reding }; 606772cd0eSThierry Reding }; 616772cd0eSThierry Reding 626772cd0eSThierry Reding host1x@50000000 { 636772cd0eSThierry Reding dpaux@54040000 { 646772cd0eSThierry Reding status = "okay"; 656772cd0eSThierry Reding }; 666772cd0eSThierry Reding 67ffcb6cf1SSowjanya Komatineni vi@54080000 { 68ffcb6cf1SSowjanya Komatineni status = "okay"; 69ffcb6cf1SSowjanya Komatineni 70ffcb6cf1SSowjanya Komatineni avdd-dsi-csi-supply = <&vdd_sys_1v2>; 71ffcb6cf1SSowjanya Komatineni 72ffcb6cf1SSowjanya Komatineni csi@838 { 73ffcb6cf1SSowjanya Komatineni status = "okay"; 74ffcb6cf1SSowjanya Komatineni }; 75ffcb6cf1SSowjanya Komatineni }; 76ffcb6cf1SSowjanya Komatineni 7735cbf655SThierry Reding sor@54540000 { 7835cbf655SThierry Reding status = "okay"; 7935cbf655SThierry Reding 8035cbf655SThierry Reding avdd-io-hdmi-dp-supply = <&avdd_io_edp_1v05>; 8135cbf655SThierry Reding vdd-hdmi-dp-pll-supply = <&vdd_1v8>; 8235cbf655SThierry Reding 8335cbf655SThierry Reding nvidia,xbar-cfg = <2 1 0 3 4>; 8435cbf655SThierry Reding nvidia,dpaux = <&dpaux>; 8535cbf655SThierry Reding }; 8635cbf655SThierry Reding 876772cd0eSThierry Reding sor@54580000 { 886772cd0eSThierry Reding status = "okay"; 896772cd0eSThierry Reding 90e8931a27SThierry Reding avdd-io-hdmi-dp-supply = <&avdd_1v05>; 91e8931a27SThierry Reding vdd-hdmi-dp-pll-supply = <&vdd_1v8>; 926772cd0eSThierry Reding hdmi-supply = <&vdd_hdmi>; 936772cd0eSThierry Reding 946772cd0eSThierry Reding nvidia,ddc-i2c-bus = <&hdmi_ddc>; 956772cd0eSThierry Reding nvidia,hpd-gpio = <&gpio TEGRA_GPIO(CC, 1) 966772cd0eSThierry Reding GPIO_ACTIVE_LOW>; 976772cd0eSThierry Reding nvidia,xbar-cfg = <0 1 2 3 4>; 986772cd0eSThierry Reding }; 9935cbf655SThierry Reding 10035cbf655SThierry Reding dpaux@545c0000 { 10135cbf655SThierry Reding status = "okay"; 10235cbf655SThierry Reding }; 103ce8a8596SThierry Reding 104ce8a8596SThierry Reding i2c@546c0000 { 105ce8a8596SThierry Reding status = "okay"; 106ce8a8596SThierry Reding }; 1076772cd0eSThierry Reding }; 1086772cd0eSThierry Reding 1096772cd0eSThierry Reding gpu@57000000 { 1106772cd0eSThierry Reding vdd-supply = <&vdd_gpu>; 1116772cd0eSThierry Reding status = "okay"; 1126772cd0eSThierry Reding }; 1136772cd0eSThierry Reding 114579db6e5SJon Hunter pinmux@700008d4 { 115579db6e5SJon Hunter dvfs_pwm_active_state: dvfs_pwm_active { 116579db6e5SJon Hunter dvfs_pwm_pbb1 { 117579db6e5SJon Hunter nvidia,pins = "dvfs_pwm_pbb1"; 118579db6e5SJon Hunter nvidia,tristate = <TEGRA_PIN_DISABLE>; 119579db6e5SJon Hunter }; 120579db6e5SJon Hunter }; 121579db6e5SJon Hunter 122579db6e5SJon Hunter dvfs_pwm_inactive_state: dvfs_pwm_inactive { 123579db6e5SJon Hunter dvfs_pwm_pbb1 { 124579db6e5SJon Hunter nvidia,pins = "dvfs_pwm_pbb1"; 125579db6e5SJon Hunter nvidia,tristate = <TEGRA_PIN_ENABLE>; 126579db6e5SJon Hunter }; 127579db6e5SJon Hunter }; 128579db6e5SJon Hunter }; 129579db6e5SJon Hunter 1306772cd0eSThierry Reding /* debug port */ 1316772cd0eSThierry Reding serial@70006000 { 1326772cd0eSThierry Reding status = "okay"; 1336772cd0eSThierry Reding }; 1346772cd0eSThierry Reding 135d87764daSThierry Reding pwm@7000a000 { 136d87764daSThierry Reding status = "okay"; 137d87764daSThierry Reding }; 138d87764daSThierry Reding 1398300a70eSThierry Reding i2c@7000c500 { 1408300a70eSThierry Reding status = "okay"; 1418300a70eSThierry Reding clock-frequency = <100000>; 1428300a70eSThierry Reding 1438300a70eSThierry Reding eeprom@50 { 1448300a70eSThierry Reding compatible = "atmel,24c02"; 1458300a70eSThierry Reding reg = <0x50>; 1468300a70eSThierry Reding 147a4387f29SJon Hunter label = "module"; 148ec5fd197SJon Hunter vcc-supply = <&vdd_1v8>; 1499efa0fcaSThierry Reding address-width = <8>; 1509efa0fcaSThierry Reding pagesize = <8>; 1518300a70eSThierry Reding size = <256>; 1528300a70eSThierry Reding read-only; 1538300a70eSThierry Reding }; 1548300a70eSThierry Reding 1558300a70eSThierry Reding eeprom@57 { 1568300a70eSThierry Reding compatible = "atmel,24c02"; 1578300a70eSThierry Reding reg = <0x57>; 1588300a70eSThierry Reding 159a4387f29SJon Hunter label = "system"; 160ec5fd197SJon Hunter vcc-supply = <&vdd_1v8>; 1619efa0fcaSThierry Reding address-width = <8>; 1629efa0fcaSThierry Reding pagesize = <8>; 1638300a70eSThierry Reding size = <256>; 1648300a70eSThierry Reding read-only; 1658300a70eSThierry Reding }; 1668300a70eSThierry Reding }; 1678300a70eSThierry Reding 1686772cd0eSThierry Reding hdmi_ddc: i2c@7000c700 { 1696772cd0eSThierry Reding status = "okay"; 1706772cd0eSThierry Reding clock-frequency = <100000>; 1716772cd0eSThierry Reding }; 1726772cd0eSThierry Reding 1736772cd0eSThierry Reding i2c@7000d000 { 1746772cd0eSThierry Reding status = "okay"; 1756772cd0eSThierry Reding clock-frequency = <400000>; 1766772cd0eSThierry Reding 1776772cd0eSThierry Reding pmic: pmic@3c { 1786772cd0eSThierry Reding compatible = "maxim,max77620"; 1796772cd0eSThierry Reding reg = <0x3c>; 180358a6777SJon Hunter interrupt-parent = <&tegra_pmc>; 181358a6777SJon Hunter interrupts = <51 IRQ_TYPE_LEVEL_LOW>; 1826772cd0eSThierry Reding 1836772cd0eSThierry Reding #interrupt-cells = <2>; 1846772cd0eSThierry Reding interrupt-controller; 1856772cd0eSThierry Reding 1866772cd0eSThierry Reding #gpio-cells = <2>; 1876772cd0eSThierry Reding gpio-controller; 1886772cd0eSThierry Reding 1896772cd0eSThierry Reding pinctrl-names = "default"; 1906772cd0eSThierry Reding pinctrl-0 = <&max77620_default>; 1916772cd0eSThierry Reding 1926772cd0eSThierry Reding max77620_default: pinmux { 1936772cd0eSThierry Reding gpio0 { 1946772cd0eSThierry Reding pins = "gpio0"; 1956772cd0eSThierry Reding function = "gpio"; 1966772cd0eSThierry Reding }; 1976772cd0eSThierry Reding 1986772cd0eSThierry Reding gpio1 { 1996772cd0eSThierry Reding pins = "gpio1"; 2006772cd0eSThierry Reding function = "fps-out"; 2016772cd0eSThierry Reding drive-push-pull = <1>; 2026772cd0eSThierry Reding maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 2036772cd0eSThierry Reding maxim,active-fps-power-up-slot = <0>; 2046772cd0eSThierry Reding maxim,active-fps-power-down-slot = <7>; 2056772cd0eSThierry Reding }; 2066772cd0eSThierry Reding 2076772cd0eSThierry Reding gpio2 { 2086772cd0eSThierry Reding pins = "gpio2"; 2096772cd0eSThierry Reding function = "fps-out"; 2106772cd0eSThierry Reding drive-open-drain = <1>; 2116772cd0eSThierry Reding maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 2126772cd0eSThierry Reding maxim,active-fps-power-up-slot = <0>; 2136772cd0eSThierry Reding maxim,active-fps-power-down-slot = <7>; 2146772cd0eSThierry Reding }; 2156772cd0eSThierry Reding 2166772cd0eSThierry Reding gpio3 { 2176772cd0eSThierry Reding pins = "gpio3"; 2186772cd0eSThierry Reding function = "fps-out"; 2196772cd0eSThierry Reding drive-open-drain = <1>; 2206772cd0eSThierry Reding maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 2216772cd0eSThierry Reding maxim,active-fps-power-up-slot = <4>; 2226772cd0eSThierry Reding maxim,active-fps-power-down-slot = <3>; 2236772cd0eSThierry Reding }; 2246772cd0eSThierry Reding 2256772cd0eSThierry Reding gpio4 { 2266772cd0eSThierry Reding pins = "gpio4"; 2276772cd0eSThierry Reding function = "32k-out1"; 2286772cd0eSThierry Reding }; 2296772cd0eSThierry Reding 2306772cd0eSThierry Reding gpio5_6_7 { 2316772cd0eSThierry Reding pins = "gpio5", "gpio6", "gpio7"; 2326772cd0eSThierry Reding function = "gpio"; 2336772cd0eSThierry Reding drive-push-pull = <1>; 2346772cd0eSThierry Reding }; 2356772cd0eSThierry Reding }; 2366772cd0eSThierry Reding 2376772cd0eSThierry Reding fps { 2386772cd0eSThierry Reding fps0 { 2396772cd0eSThierry Reding maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 2406772cd0eSThierry Reding maxim,suspend-fps-time-period-us = <5120>; 2416772cd0eSThierry Reding }; 2426772cd0eSThierry Reding 2436772cd0eSThierry Reding fps1 { 2446772cd0eSThierry Reding maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 2456772cd0eSThierry Reding maxim,suspend-fps-time-period-us = <5120>; 2466772cd0eSThierry Reding }; 2476772cd0eSThierry Reding 2486772cd0eSThierry Reding fps2 { 2496772cd0eSThierry Reding maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 2506772cd0eSThierry Reding }; 2516772cd0eSThierry Reding }; 2526772cd0eSThierry Reding 2536772cd0eSThierry Reding regulators { 2546772cd0eSThierry Reding in-ldo0-1-supply = <&vdd_pre>; 2556772cd0eSThierry Reding in-ldo2-supply = <&vdd_3v3_sys>; 2566772cd0eSThierry Reding in-ldo3-5-supply = <&vdd_1v8>; 2576772cd0eSThierry Reding in-ldo4-6-supply = <&vdd_5v0_sys>; 2586772cd0eSThierry Reding in-ldo7-8-supply = <&vdd_pre>; 2596772cd0eSThierry Reding in-sd0-supply = <&vdd_5v0_sys>; 2606772cd0eSThierry Reding in-sd1-supply = <&vdd_5v0_sys>; 2616772cd0eSThierry Reding in-sd2-supply = <&vdd_5v0_sys>; 2626772cd0eSThierry Reding in-sd3-supply = <&vdd_5v0_sys>; 2636772cd0eSThierry Reding 2646772cd0eSThierry Reding vdd_soc: sd0 { 2656772cd0eSThierry Reding regulator-name = "VDD_SOC"; 2666772cd0eSThierry Reding regulator-min-microvolt = <1000000>; 2676772cd0eSThierry Reding regulator-max-microvolt = <1170000>; 2686772cd0eSThierry Reding regulator-enable-ramp-delay = <146>; 2696772cd0eSThierry Reding regulator-disable-ramp-delay = <4080>; 2706772cd0eSThierry Reding regulator-ramp-delay = <27500>; 2716772cd0eSThierry Reding regulator-ramp-delay-scale = <300>; 2726772cd0eSThierry Reding regulator-always-on; 2736772cd0eSThierry Reding regulator-boot-on; 2746772cd0eSThierry Reding 2756772cd0eSThierry Reding maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 2766772cd0eSThierry Reding maxim,active-fps-power-up-slot = <1>; 2776772cd0eSThierry Reding maxim,active-fps-power-down-slot = <6>; 2786772cd0eSThierry Reding }; 2796772cd0eSThierry Reding 2806772cd0eSThierry Reding vdd_ddr: sd1 { 2816772cd0eSThierry Reding regulator-name = "VDD_DDR_1V1_PMIC"; 2826772cd0eSThierry Reding regulator-min-microvolt = <1150000>; 2836772cd0eSThierry Reding regulator-max-microvolt = <1150000>; 2846772cd0eSThierry Reding regulator-enable-ramp-delay = <176>; 2856772cd0eSThierry Reding regulator-disable-ramp-delay = <145800>; 2866772cd0eSThierry Reding regulator-ramp-delay = <27500>; 2876772cd0eSThierry Reding regulator-ramp-delay-scale = <300>; 2886772cd0eSThierry Reding regulator-always-on; 2896772cd0eSThierry Reding regulator-boot-on; 2906772cd0eSThierry Reding 2916772cd0eSThierry Reding maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 2926772cd0eSThierry Reding maxim,active-fps-power-up-slot = <5>; 2936772cd0eSThierry Reding maxim,active-fps-power-down-slot = <2>; 2946772cd0eSThierry Reding }; 2956772cd0eSThierry Reding 2966772cd0eSThierry Reding vdd_pre: sd2 { 2976772cd0eSThierry Reding regulator-name = "VDD_PRE_REG_1V35"; 2986772cd0eSThierry Reding regulator-min-microvolt = <1350000>; 2996772cd0eSThierry Reding regulator-max-microvolt = <1350000>; 3006772cd0eSThierry Reding regulator-enable-ramp-delay = <176>; 3016772cd0eSThierry Reding regulator-disable-ramp-delay = <32000>; 3026772cd0eSThierry Reding regulator-ramp-delay = <27500>; 3036772cd0eSThierry Reding regulator-ramp-delay-scale = <350>; 3046772cd0eSThierry Reding regulator-always-on; 3056772cd0eSThierry Reding regulator-boot-on; 3066772cd0eSThierry Reding 3076772cd0eSThierry Reding maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 3086772cd0eSThierry Reding maxim,active-fps-power-up-slot = <2>; 3096772cd0eSThierry Reding maxim,active-fps-power-down-slot = <5>; 3106772cd0eSThierry Reding }; 3116772cd0eSThierry Reding 3126772cd0eSThierry Reding vdd_1v8: sd3 { 3136772cd0eSThierry Reding regulator-name = "VDD_1V8"; 3146772cd0eSThierry Reding regulator-min-microvolt = <1800000>; 3156772cd0eSThierry Reding regulator-max-microvolt = <1800000>; 3166772cd0eSThierry Reding regulator-enable-ramp-delay = <242>; 3176772cd0eSThierry Reding regulator-disable-ramp-delay = <118000>; 3186772cd0eSThierry Reding regulator-ramp-delay = <27500>; 3196772cd0eSThierry Reding regulator-ramp-delay-scale = <360>; 3206772cd0eSThierry Reding regulator-always-on; 3216772cd0eSThierry Reding regulator-boot-on; 3226772cd0eSThierry Reding 3236772cd0eSThierry Reding maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 3246772cd0eSThierry Reding maxim,active-fps-power-up-slot = <3>; 3256772cd0eSThierry Reding maxim,active-fps-power-down-slot = <4>; 3266772cd0eSThierry Reding }; 3276772cd0eSThierry Reding 3286772cd0eSThierry Reding vdd_sys_1v2: ldo0 { 3296772cd0eSThierry Reding regulator-name = "AVDD_SYS_1V2"; 3306772cd0eSThierry Reding regulator-min-microvolt = <1200000>; 3316772cd0eSThierry Reding regulator-max-microvolt = <1200000>; 3326772cd0eSThierry Reding regulator-enable-ramp-delay = <26>; 3336772cd0eSThierry Reding regulator-disable-ramp-delay = <626>; 3346772cd0eSThierry Reding regulator-ramp-delay = <100000>; 3356772cd0eSThierry Reding regulator-ramp-delay-scale = <200>; 3366772cd0eSThierry Reding regulator-always-on; 3376772cd0eSThierry Reding regulator-boot-on; 3386772cd0eSThierry Reding 3396772cd0eSThierry Reding maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 3406772cd0eSThierry Reding maxim,active-fps-power-up-slot = <0>; 3416772cd0eSThierry Reding maxim,active-fps-power-down-slot = <7>; 3426772cd0eSThierry Reding }; 3436772cd0eSThierry Reding 3446772cd0eSThierry Reding vdd_pex_1v05: ldo1 { 3456772cd0eSThierry Reding regulator-name = "VDD_PEX_1V05"; 3466772cd0eSThierry Reding regulator-min-microvolt = <1050000>; 3476772cd0eSThierry Reding regulator-max-microvolt = <1050000>; 3486772cd0eSThierry Reding regulator-enable-ramp-delay = <22>; 3496772cd0eSThierry Reding regulator-disable-ramp-delay = <650>; 3506772cd0eSThierry Reding regulator-ramp-delay = <100000>; 3516772cd0eSThierry Reding regulator-ramp-delay-scale = <200>; 3526772cd0eSThierry Reding 3536772cd0eSThierry Reding maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 3546772cd0eSThierry Reding maxim,active-fps-power-up-slot = <0>; 3556772cd0eSThierry Reding maxim,active-fps-power-down-slot = <7>; 3566772cd0eSThierry Reding }; 3576772cd0eSThierry Reding 3586772cd0eSThierry Reding vddio_sdmmc: ldo2 { 3596772cd0eSThierry Reding regulator-name = "VDDIO_SDMMC"; 3606772cd0eSThierry Reding regulator-min-microvolt = <1800000>; 3616772cd0eSThierry Reding regulator-max-microvolt = <3300000>; 3626772cd0eSThierry Reding regulator-enable-ramp-delay = <62>; 3636772cd0eSThierry Reding regulator-disable-ramp-delay = <650>; 3646772cd0eSThierry Reding regulator-ramp-delay = <100000>; 3656772cd0eSThierry Reding regulator-ramp-delay-scale = <200>; 3666772cd0eSThierry Reding 3676772cd0eSThierry Reding maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 3686772cd0eSThierry Reding maxim,active-fps-power-up-slot = <0>; 3696772cd0eSThierry Reding maxim,active-fps-power-down-slot = <7>; 3706772cd0eSThierry Reding }; 3716772cd0eSThierry Reding 3726772cd0eSThierry Reding ldo3 { 3736772cd0eSThierry Reding status = "disabled"; 3746772cd0eSThierry Reding }; 3756772cd0eSThierry Reding 3766772cd0eSThierry Reding vdd_rtc: ldo4 { 3776772cd0eSThierry Reding regulator-name = "VDD_RTC"; 3786772cd0eSThierry Reding regulator-min-microvolt = <850000>; 3796772cd0eSThierry Reding regulator-max-microvolt = <1100000>; 3806772cd0eSThierry Reding regulator-enable-ramp-delay = <22>; 3816772cd0eSThierry Reding regulator-disable-ramp-delay = <610>; 3826772cd0eSThierry Reding regulator-ramp-delay = <100000>; 3836772cd0eSThierry Reding regulator-ramp-delay-scale = <200>; 3846772cd0eSThierry Reding regulator-disable-active-discharge; 3856772cd0eSThierry Reding regulator-always-on; 3866772cd0eSThierry Reding regulator-boot-on; 3876772cd0eSThierry Reding 3886772cd0eSThierry Reding maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 3896772cd0eSThierry Reding maxim,active-fps-power-up-slot = <1>; 3906772cd0eSThierry Reding maxim,active-fps-power-down-slot = <6>; 3916772cd0eSThierry Reding }; 3926772cd0eSThierry Reding 3936772cd0eSThierry Reding ldo5 { 3946772cd0eSThierry Reding status = "disabled"; 3956772cd0eSThierry Reding }; 3966772cd0eSThierry Reding 3976772cd0eSThierry Reding ldo6 { 3986772cd0eSThierry Reding status = "disabled"; 3996772cd0eSThierry Reding }; 4006772cd0eSThierry Reding 4016772cd0eSThierry Reding avdd_1v05_pll: ldo7 { 4026772cd0eSThierry Reding regulator-name = "AVDD_1V05_PLL"; 4036772cd0eSThierry Reding regulator-min-microvolt = <1050000>; 4046772cd0eSThierry Reding regulator-max-microvolt = <1050000>; 4056772cd0eSThierry Reding regulator-enable-ramp-delay = <24>; 4066772cd0eSThierry Reding regulator-disable-ramp-delay = <2768>; 4076772cd0eSThierry Reding regulator-ramp-delay = <100000>; 4086772cd0eSThierry Reding regulator-ramp-delay-scale = <200>; 4096772cd0eSThierry Reding 4106772cd0eSThierry Reding maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 4116772cd0eSThierry Reding maxim,active-fps-power-up-slot = <3>; 4126772cd0eSThierry Reding maxim,active-fps-power-down-slot = <4>; 4136772cd0eSThierry Reding }; 4146772cd0eSThierry Reding 4156772cd0eSThierry Reding avdd_1v05: ldo8 { 4166772cd0eSThierry Reding regulator-name = "AVDD_SATA_HDMI_DP_1V05"; 4176772cd0eSThierry Reding regulator-min-microvolt = <1050000>; 4186772cd0eSThierry Reding regulator-max-microvolt = <1050000>; 4196772cd0eSThierry Reding regulator-enable-ramp-delay = <22>; 4206772cd0eSThierry Reding regulator-disable-ramp-delay = <1160>; 4216772cd0eSThierry Reding regulator-ramp-delay = <100000>; 4226772cd0eSThierry Reding regulator-ramp-delay-scale = <200>; 4236772cd0eSThierry Reding 4246772cd0eSThierry Reding maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 4256772cd0eSThierry Reding maxim,active-fps-power-up-slot = <6>; 4266772cd0eSThierry Reding maxim,active-fps-power-down-slot = <1>; 4276772cd0eSThierry Reding }; 4286772cd0eSThierry Reding }; 4296772cd0eSThierry Reding }; 4306772cd0eSThierry Reding }; 4316772cd0eSThierry Reding 4326772cd0eSThierry Reding pmc@7000e400 { 4336772cd0eSThierry Reding nvidia,invert-interrupt; 43447b4e129SSowjanya Komatineni nvidia,suspend-mode = <0>; 43547b4e129SSowjanya Komatineni nvidia,cpu-pwr-good-time = <0>; 43647b4e129SSowjanya Komatineni nvidia,cpu-pwr-off-time = <0>; 43747b4e129SSowjanya Komatineni nvidia,core-pwr-good-time = <4587 3876>; 43847b4e129SSowjanya Komatineni nvidia,core-pwr-off-time = <39065>; 43947b4e129SSowjanya Komatineni nvidia,core-power-req-active-high; 44047b4e129SSowjanya Komatineni nvidia,sys-clock-req-active-high; 4416772cd0eSThierry Reding }; 4426772cd0eSThierry Reding 4436772cd0eSThierry Reding hda@70030000 { 444b8928c2bSThierry Reding nvidia,model = "NVIDIA Jetson Nano HDA"; 4456772cd0eSThierry Reding 4466772cd0eSThierry Reding status = "okay"; 4476772cd0eSThierry Reding }; 4486772cd0eSThierry Reding 4496772cd0eSThierry Reding usb@70090000 { 4506772cd0eSThierry Reding phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, 4516772cd0eSThierry Reding <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, 4526772cd0eSThierry Reding <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, 4536772cd0eSThierry Reding <&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>; 4546772cd0eSThierry Reding phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0"; 4556772cd0eSThierry Reding 4566772cd0eSThierry Reding avdd-usb-supply = <&vdd_3v3_sys>; 4576772cd0eSThierry Reding dvddio-pex-supply = <&vdd_pex_1v05>; 4586772cd0eSThierry Reding hvddio-pex-supply = <&vdd_1v8>; 4596772cd0eSThierry Reding /* these really belong to the XUSB pad controller */ 4606772cd0eSThierry Reding avdd-pll-utmip-supply = <&vdd_1v8>; 4616772cd0eSThierry Reding avdd-pll-uerefe-supply = <&vdd_pex_1v05>; 4626772cd0eSThierry Reding dvdd-usb-ss-pll-supply = <&vdd_pex_1v05>; 4636772cd0eSThierry Reding hvdd-usb-ss-pll-e-supply = <&vdd_1v8>; 4646772cd0eSThierry Reding 4656772cd0eSThierry Reding status = "okay"; 4666772cd0eSThierry Reding }; 4676772cd0eSThierry Reding 4686772cd0eSThierry Reding padctl@7009f000 { 4696772cd0eSThierry Reding status = "okay"; 4706772cd0eSThierry Reding 4716772cd0eSThierry Reding avdd-pll-utmip-supply = <&vdd_1v8>; 4726772cd0eSThierry Reding avdd-pll-uerefe-supply = <&vdd_pex_1v05>; 4736772cd0eSThierry Reding dvdd-pex-pll-supply = <&vdd_pex_1v05>; 4746772cd0eSThierry Reding hvdd-pex-pll-e-supply = <&vdd_1v8>; 4756772cd0eSThierry Reding 4766772cd0eSThierry Reding pads { 4776772cd0eSThierry Reding usb2 { 4786772cd0eSThierry Reding status = "okay"; 4796772cd0eSThierry Reding 4806772cd0eSThierry Reding lanes { 4819f2ff738SNagarjuna Kristam micro_b: usb2-0 { 4826772cd0eSThierry Reding nvidia,function = "xusb"; 4836772cd0eSThierry Reding status = "okay"; 4846772cd0eSThierry Reding }; 4856772cd0eSThierry Reding 4866772cd0eSThierry Reding usb2-1 { 4876772cd0eSThierry Reding nvidia,function = "xusb"; 4886772cd0eSThierry Reding status = "okay"; 4896772cd0eSThierry Reding }; 4906772cd0eSThierry Reding 4916772cd0eSThierry Reding usb2-2 { 4926772cd0eSThierry Reding nvidia,function = "xusb"; 4936772cd0eSThierry Reding status = "okay"; 4946772cd0eSThierry Reding }; 4956772cd0eSThierry Reding }; 4966772cd0eSThierry Reding }; 4976772cd0eSThierry Reding 4986772cd0eSThierry Reding pcie { 4996772cd0eSThierry Reding status = "okay"; 5006772cd0eSThierry Reding 5016772cd0eSThierry Reding lanes { 5026772cd0eSThierry Reding pcie-0 { 5036772cd0eSThierry Reding nvidia,function = "pcie-x1"; 5046772cd0eSThierry Reding status = "okay"; 5056772cd0eSThierry Reding }; 5066772cd0eSThierry Reding 5076772cd0eSThierry Reding pcie-1 { 5086772cd0eSThierry Reding nvidia,function = "pcie-x4"; 5096772cd0eSThierry Reding status = "okay"; 5106772cd0eSThierry Reding }; 5116772cd0eSThierry Reding 5126772cd0eSThierry Reding pcie-2 { 5136772cd0eSThierry Reding nvidia,function = "pcie-x4"; 5146772cd0eSThierry Reding status = "okay"; 5156772cd0eSThierry Reding }; 5166772cd0eSThierry Reding 5176772cd0eSThierry Reding pcie-3 { 5186772cd0eSThierry Reding nvidia,function = "pcie-x4"; 5196772cd0eSThierry Reding status = "okay"; 5206772cd0eSThierry Reding }; 5216772cd0eSThierry Reding 5226772cd0eSThierry Reding pcie-4 { 5236772cd0eSThierry Reding nvidia,function = "pcie-x4"; 5246772cd0eSThierry Reding status = "okay"; 5256772cd0eSThierry Reding }; 5266772cd0eSThierry Reding 5276772cd0eSThierry Reding pcie-5 { 5286772cd0eSThierry Reding nvidia,function = "usb3-ss"; 5296772cd0eSThierry Reding status = "okay"; 5306772cd0eSThierry Reding }; 5316772cd0eSThierry Reding 5326772cd0eSThierry Reding pcie-6 { 5336772cd0eSThierry Reding nvidia,function = "usb3-ss"; 5346772cd0eSThierry Reding status = "okay"; 5356772cd0eSThierry Reding }; 5366772cd0eSThierry Reding }; 5376772cd0eSThierry Reding }; 5386772cd0eSThierry Reding }; 5396772cd0eSThierry Reding 5406772cd0eSThierry Reding ports { 5416772cd0eSThierry Reding usb2-0 { 5426772cd0eSThierry Reding status = "okay"; 54388d1049eSNagarjuna Kristam mode = "peripheral"; 54488d1049eSNagarjuna Kristam usb-role-switch; 5451ca6bc89SThierry Reding 54678bc57ffSThierry Reding vbus-supply = <&vdd_5v0_usb>; 54778bc57ffSThierry Reding 54888d1049eSNagarjuna Kristam connector { 5491ca6bc89SThierry Reding compatible = "gpio-usb-b-connector", 5501ca6bc89SThierry Reding "usb-b-connector"; 55188d1049eSNagarjuna Kristam label = "micro-USB"; 55288d1049eSNagarjuna Kristam type = "micro"; 5531ca6bc89SThierry Reding vbus-gpios = <&gpio TEGRA_GPIO(CC, 4) 55488d1049eSNagarjuna Kristam GPIO_ACTIVE_LOW>; 55588d1049eSNagarjuna Kristam }; 5566772cd0eSThierry Reding }; 5576772cd0eSThierry Reding 5586772cd0eSThierry Reding usb2-1 { 5596772cd0eSThierry Reding status = "okay"; 5606772cd0eSThierry Reding mode = "host"; 5616772cd0eSThierry Reding }; 5626772cd0eSThierry Reding 5636772cd0eSThierry Reding usb2-2 { 5646772cd0eSThierry Reding status = "okay"; 5656772cd0eSThierry Reding mode = "host"; 5666772cd0eSThierry Reding }; 5676772cd0eSThierry Reding 5686772cd0eSThierry Reding usb3-0 { 5696772cd0eSThierry Reding status = "okay"; 5706772cd0eSThierry Reding nvidia,usb2-companion = <1>; 5716772cd0eSThierry Reding vbus-supply = <&vdd_hub_3v3>; 5726772cd0eSThierry Reding }; 5736772cd0eSThierry Reding }; 5746772cd0eSThierry Reding }; 5756772cd0eSThierry Reding 57667bb17f6SThierry Reding mmc@700b0000 { 5776772cd0eSThierry Reding status = "okay"; 5786772cd0eSThierry Reding bus-width = <4>; 5796772cd0eSThierry Reding 5806772cd0eSThierry Reding cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; 581da415b71SThierry Reding disable-wp; 5826772cd0eSThierry Reding 5836772cd0eSThierry Reding vqmmc-supply = <&vddio_sdmmc>; 5846772cd0eSThierry Reding vmmc-supply = <&vdd_3v3_sd>; 5856772cd0eSThierry Reding }; 5866772cd0eSThierry Reding 58767bb17f6SThierry Reding mmc@700b0400 { 5881f32a31fSTamás Szűcs status = "okay"; 5891f32a31fSTamás Szűcs bus-width = <4>; 5901f32a31fSTamás Szűcs 5911f32a31fSTamás Szűcs vqmmc-supply = <&vdd_1v8>; 5921f32a31fSTamás Szűcs vmmc-supply = <&vdd_3v3_sys>; 5931f32a31fSTamás Szűcs 5941f32a31fSTamás Szűcs non-removable; 5951f32a31fSTamás Szűcs cap-sdio-irq; 5961f32a31fSTamás Szűcs keep-power-in-suspend; 5971f32a31fSTamás Szűcs wakeup-source; 5981f32a31fSTamás Szűcs }; 5991f32a31fSTamás Szűcs 600862120bdSThierry Reding usb@700d0000 { 601862120bdSThierry Reding status = "okay"; 602862120bdSThierry Reding phys = <µ_b>; 603862120bdSThierry Reding phy-names = "usb2-0"; 604862120bdSThierry Reding avddio-usb-supply = <&vdd_3v3_sys>; 605862120bdSThierry Reding hvdd-usb-supply = <&vdd_1v8>; 606862120bdSThierry Reding }; 607862120bdSThierry Reding 608579db6e5SJon Hunter clock@70110000 { 609579db6e5SJon Hunter status = "okay"; 610579db6e5SJon Hunter 611579db6e5SJon Hunter nvidia,cf = <6>; 612579db6e5SJon Hunter nvidia,ci = <0>; 613579db6e5SJon Hunter nvidia,cg = <2>; 614579db6e5SJon Hunter nvidia,droop-ctrl = <0x00000f00>; 615579db6e5SJon Hunter nvidia,force-mode = <1>; 616579db6e5SJon Hunter nvidia,sample-rate = <25000>; 617579db6e5SJon Hunter 618579db6e5SJon Hunter nvidia,pwm-min-microvolts = <708000>; 619579db6e5SJon Hunter nvidia,pwm-period-nanoseconds = <2500>; /* 2.5us */ 620579db6e5SJon Hunter nvidia,pwm-to-pmic; 621579db6e5SJon Hunter nvidia,pwm-tristate-microvolts = <1000000>; 622579db6e5SJon Hunter nvidia,pwm-voltage-step-microvolts = <19200>; 623579db6e5SJon Hunter 624579db6e5SJon Hunter pinctrl-names = "dvfs_pwm_enable", "dvfs_pwm_disable"; 625579db6e5SJon Hunter pinctrl-0 = <&dvfs_pwm_active_state>; 626579db6e5SJon Hunter pinctrl-1 = <&dvfs_pwm_inactive_state>; 627579db6e5SJon Hunter }; 628579db6e5SJon Hunter 629547141b5SSameer Pujar aconnect@702c0000 { 630547141b5SSameer Pujar status = "okay"; 631547141b5SSameer Pujar 632b6e136c7SSameer Pujar dma-controller@702e2000 { 633547141b5SSameer Pujar status = "okay"; 634547141b5SSameer Pujar }; 635547141b5SSameer Pujar 636547141b5SSameer Pujar interrupt-controller@702f9000 { 637547141b5SSameer Pujar status = "okay"; 638547141b5SSameer Pujar }; 639b0b4e286SSameer Pujar 640b0b4e286SSameer Pujar ahub@702d0800 { 641b0b4e286SSameer Pujar status = "okay"; 642b0b4e286SSameer Pujar 643b0b4e286SSameer Pujar admaif@702d0000 { 644b0b4e286SSameer Pujar status = "okay"; 645b0b4e286SSameer Pujar }; 646b0b4e286SSameer Pujar 647b0b4e286SSameer Pujar i2s@702d1200 { 648b0b4e286SSameer Pujar status = "okay"; 649b0b4e286SSameer Pujar 650b0b4e286SSameer Pujar ports { 651b0b4e286SSameer Pujar #address-cells = <1>; 652b0b4e286SSameer Pujar #size-cells = <0>; 653b0b4e286SSameer Pujar 654b0b4e286SSameer Pujar port@0 { 655b0b4e286SSameer Pujar reg = <0>; 656b0b4e286SSameer Pujar 657b0b4e286SSameer Pujar i2s3_cif_ep: endpoint { 658b0b4e286SSameer Pujar remote-endpoint = <&xbar_i2s3_ep>; 659b0b4e286SSameer Pujar }; 660b0b4e286SSameer Pujar }; 661b0b4e286SSameer Pujar 662b0b4e286SSameer Pujar i2s3_port: port@1 { 663b0b4e286SSameer Pujar reg = <1>; 664b0b4e286SSameer Pujar 665b0b4e286SSameer Pujar i2s3_dap_ep: endpoint { 666b0b4e286SSameer Pujar dai-format = "i2s"; 667b0b4e286SSameer Pujar /* Placeholder for external Codec */ 668b0b4e286SSameer Pujar }; 669b0b4e286SSameer Pujar }; 670b0b4e286SSameer Pujar }; 671b0b4e286SSameer Pujar }; 672b0b4e286SSameer Pujar 673b0b4e286SSameer Pujar i2s@702d1300 { 674b0b4e286SSameer Pujar status = "okay"; 675b0b4e286SSameer Pujar 676b0b4e286SSameer Pujar ports { 677b0b4e286SSameer Pujar #address-cells = <1>; 678b0b4e286SSameer Pujar #size-cells = <0>; 679b0b4e286SSameer Pujar 680b0b4e286SSameer Pujar port@0 { 681b0b4e286SSameer Pujar reg = <0>; 682b0b4e286SSameer Pujar 683b0b4e286SSameer Pujar i2s4_cif_ep: endpoint { 684b0b4e286SSameer Pujar remote-endpoint = <&xbar_i2s4_ep>; 685b0b4e286SSameer Pujar }; 686b0b4e286SSameer Pujar }; 687b0b4e286SSameer Pujar 688b0b4e286SSameer Pujar i2s4_port: port@1 { 689b0b4e286SSameer Pujar reg = <1>; 690b0b4e286SSameer Pujar 691b0b4e286SSameer Pujar i2s4_dap_ep: endpoint@0 { 692b0b4e286SSameer Pujar dai-format = "i2s"; 693b0b4e286SSameer Pujar /* Placeholder for external Codec */ 694b0b4e286SSameer Pujar }; 695b0b4e286SSameer Pujar }; 696b0b4e286SSameer Pujar }; 697b0b4e286SSameer Pujar }; 698b0b4e286SSameer Pujar 699b0b4e286SSameer Pujar dmic@702d4000 { 700b0b4e286SSameer Pujar status = "okay"; 701b0b4e286SSameer Pujar 702b0b4e286SSameer Pujar ports { 703b0b4e286SSameer Pujar #address-cells = <1>; 704b0b4e286SSameer Pujar #size-cells = <0>; 705b0b4e286SSameer Pujar 706b0b4e286SSameer Pujar port@0 { 707b0b4e286SSameer Pujar reg = <0>; 708b0b4e286SSameer Pujar 709b0b4e286SSameer Pujar dmic1_cif_ep: endpoint@0 { 710b0b4e286SSameer Pujar remote-endpoint = <&xbar_dmic1_ep>; 711b0b4e286SSameer Pujar }; 712b0b4e286SSameer Pujar }; 713b0b4e286SSameer Pujar 714b0b4e286SSameer Pujar dmic1_port: port@1 { 715b0b4e286SSameer Pujar reg = <1>; 716b0b4e286SSameer Pujar 717b0b4e286SSameer Pujar dmic1_dap_ep: endpoint@0 { 718b0b4e286SSameer Pujar /* Placeholder for external Codec */ 719b0b4e286SSameer Pujar }; 720b0b4e286SSameer Pujar }; 721b0b4e286SSameer Pujar }; 722b0b4e286SSameer Pujar }; 723b0b4e286SSameer Pujar 724b0b4e286SSameer Pujar dmic@702d4100 { 725b0b4e286SSameer Pujar status = "okay"; 726b0b4e286SSameer Pujar 727b0b4e286SSameer Pujar ports { 728b0b4e286SSameer Pujar #address-cells = <1>; 729b0b4e286SSameer Pujar #size-cells = <0>; 730b0b4e286SSameer Pujar 731b0b4e286SSameer Pujar port@0 { 732b0b4e286SSameer Pujar reg = <0>; 733b0b4e286SSameer Pujar 734b0b4e286SSameer Pujar dmic2_cif_ep: endpoint@0 { 735b0b4e286SSameer Pujar remote-endpoint = <&xbar_dmic2_ep>; 736b0b4e286SSameer Pujar }; 737b0b4e286SSameer Pujar }; 738b0b4e286SSameer Pujar 739b0b4e286SSameer Pujar dmic2_port: port@1 { 740b0b4e286SSameer Pujar reg = <1>; 741b0b4e286SSameer Pujar 742b0b4e286SSameer Pujar dmic2_dap_ep: endpoint@0 { 743b0b4e286SSameer Pujar /* Placeholder for external Codec */ 744b0b4e286SSameer Pujar }; 745b0b4e286SSameer Pujar }; 746b0b4e286SSameer Pujar }; 747b0b4e286SSameer Pujar }; 748b0b4e286SSameer Pujar 749*4f45fb0bSSameer Pujar sfc@702d2000 { 750*4f45fb0bSSameer Pujar status = "okay"; 751*4f45fb0bSSameer Pujar 752*4f45fb0bSSameer Pujar ports { 753*4f45fb0bSSameer Pujar #address-cells = <1>; 754*4f45fb0bSSameer Pujar #size-cells = <0>; 755*4f45fb0bSSameer Pujar 756*4f45fb0bSSameer Pujar port@0 { 757*4f45fb0bSSameer Pujar reg = <0>; 758*4f45fb0bSSameer Pujar 759*4f45fb0bSSameer Pujar sfc1_cif_in_ep: endpoint { 760*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_sfc1_in_ep>; 761*4f45fb0bSSameer Pujar }; 762*4f45fb0bSSameer Pujar }; 763*4f45fb0bSSameer Pujar 764*4f45fb0bSSameer Pujar sfc1_out_port: port@1 { 765*4f45fb0bSSameer Pujar reg = <1>; 766*4f45fb0bSSameer Pujar 767*4f45fb0bSSameer Pujar sfc1_cif_out_ep: endpoint { 768*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_sfc1_out_ep>; 769*4f45fb0bSSameer Pujar }; 770*4f45fb0bSSameer Pujar }; 771*4f45fb0bSSameer Pujar }; 772*4f45fb0bSSameer Pujar }; 773*4f45fb0bSSameer Pujar 774*4f45fb0bSSameer Pujar sfc@702d2200 { 775*4f45fb0bSSameer Pujar status = "okay"; 776*4f45fb0bSSameer Pujar 777*4f45fb0bSSameer Pujar ports { 778*4f45fb0bSSameer Pujar #address-cells = <1>; 779*4f45fb0bSSameer Pujar #size-cells = <0>; 780*4f45fb0bSSameer Pujar 781*4f45fb0bSSameer Pujar port@0 { 782*4f45fb0bSSameer Pujar reg = <0>; 783*4f45fb0bSSameer Pujar 784*4f45fb0bSSameer Pujar sfc2_cif_in_ep: endpoint { 785*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_sfc2_in_ep>; 786*4f45fb0bSSameer Pujar }; 787*4f45fb0bSSameer Pujar }; 788*4f45fb0bSSameer Pujar 789*4f45fb0bSSameer Pujar sfc2_out_port: port@1 { 790*4f45fb0bSSameer Pujar reg = <1>; 791*4f45fb0bSSameer Pujar 792*4f45fb0bSSameer Pujar sfc2_cif_out_ep: endpoint { 793*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_sfc2_out_ep>; 794*4f45fb0bSSameer Pujar }; 795*4f45fb0bSSameer Pujar }; 796*4f45fb0bSSameer Pujar }; 797*4f45fb0bSSameer Pujar }; 798*4f45fb0bSSameer Pujar 799*4f45fb0bSSameer Pujar sfc@702d2400 { 800*4f45fb0bSSameer Pujar status = "okay"; 801*4f45fb0bSSameer Pujar 802*4f45fb0bSSameer Pujar ports { 803*4f45fb0bSSameer Pujar #address-cells = <1>; 804*4f45fb0bSSameer Pujar #size-cells = <0>; 805*4f45fb0bSSameer Pujar 806*4f45fb0bSSameer Pujar port@0 { 807*4f45fb0bSSameer Pujar reg = <0>; 808*4f45fb0bSSameer Pujar 809*4f45fb0bSSameer Pujar sfc3_cif_in_ep: endpoint { 810*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_sfc3_in_ep>; 811*4f45fb0bSSameer Pujar }; 812*4f45fb0bSSameer Pujar }; 813*4f45fb0bSSameer Pujar 814*4f45fb0bSSameer Pujar sfc3_out_port: port@1 { 815*4f45fb0bSSameer Pujar reg = <1>; 816*4f45fb0bSSameer Pujar 817*4f45fb0bSSameer Pujar sfc3_cif_out_ep: endpoint { 818*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_sfc3_out_ep>; 819*4f45fb0bSSameer Pujar }; 820*4f45fb0bSSameer Pujar }; 821*4f45fb0bSSameer Pujar }; 822*4f45fb0bSSameer Pujar }; 823*4f45fb0bSSameer Pujar 824*4f45fb0bSSameer Pujar sfc@702d2600 { 825*4f45fb0bSSameer Pujar status = "okay"; 826*4f45fb0bSSameer Pujar 827*4f45fb0bSSameer Pujar ports { 828*4f45fb0bSSameer Pujar #address-cells = <1>; 829*4f45fb0bSSameer Pujar #size-cells = <0>; 830*4f45fb0bSSameer Pujar 831*4f45fb0bSSameer Pujar port@0 { 832*4f45fb0bSSameer Pujar reg = <0>; 833*4f45fb0bSSameer Pujar 834*4f45fb0bSSameer Pujar sfc4_cif_in_ep: endpoint { 835*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_sfc4_in_ep>; 836*4f45fb0bSSameer Pujar }; 837*4f45fb0bSSameer Pujar }; 838*4f45fb0bSSameer Pujar 839*4f45fb0bSSameer Pujar sfc4_out_port: port@1 { 840*4f45fb0bSSameer Pujar reg = <1>; 841*4f45fb0bSSameer Pujar 842*4f45fb0bSSameer Pujar sfc4_cif_out_ep: endpoint { 843*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_sfc4_out_ep>; 844*4f45fb0bSSameer Pujar }; 845*4f45fb0bSSameer Pujar }; 846*4f45fb0bSSameer Pujar }; 847*4f45fb0bSSameer Pujar }; 848*4f45fb0bSSameer Pujar 849*4f45fb0bSSameer Pujar mvc@702da000 { 850*4f45fb0bSSameer Pujar status = "okay"; 851*4f45fb0bSSameer Pujar 852*4f45fb0bSSameer Pujar ports { 853*4f45fb0bSSameer Pujar #address-cells = <1>; 854*4f45fb0bSSameer Pujar #size-cells = <0>; 855*4f45fb0bSSameer Pujar 856*4f45fb0bSSameer Pujar port@0 { 857*4f45fb0bSSameer Pujar reg = <0>; 858*4f45fb0bSSameer Pujar 859*4f45fb0bSSameer Pujar mvc1_cif_in_ep: endpoint { 860*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mvc1_in_ep>; 861*4f45fb0bSSameer Pujar }; 862*4f45fb0bSSameer Pujar }; 863*4f45fb0bSSameer Pujar 864*4f45fb0bSSameer Pujar mvc1_out_port: port@1 { 865*4f45fb0bSSameer Pujar reg = <1>; 866*4f45fb0bSSameer Pujar 867*4f45fb0bSSameer Pujar mvc1_cif_out_ep: endpoint { 868*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mvc1_out_ep>; 869*4f45fb0bSSameer Pujar }; 870*4f45fb0bSSameer Pujar }; 871*4f45fb0bSSameer Pujar }; 872*4f45fb0bSSameer Pujar }; 873*4f45fb0bSSameer Pujar 874*4f45fb0bSSameer Pujar mvc@702da200 { 875*4f45fb0bSSameer Pujar status = "okay"; 876*4f45fb0bSSameer Pujar 877*4f45fb0bSSameer Pujar ports { 878*4f45fb0bSSameer Pujar #address-cells = <1>; 879*4f45fb0bSSameer Pujar #size-cells = <0>; 880*4f45fb0bSSameer Pujar 881*4f45fb0bSSameer Pujar port@0 { 882*4f45fb0bSSameer Pujar reg = <0>; 883*4f45fb0bSSameer Pujar 884*4f45fb0bSSameer Pujar mvc2_cif_in_ep: endpoint { 885*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mvc2_in_ep>; 886*4f45fb0bSSameer Pujar }; 887*4f45fb0bSSameer Pujar }; 888*4f45fb0bSSameer Pujar 889*4f45fb0bSSameer Pujar mvc2_out_port: port@1 { 890*4f45fb0bSSameer Pujar reg = <1>; 891*4f45fb0bSSameer Pujar 892*4f45fb0bSSameer Pujar mvc2_cif_out_ep: endpoint { 893*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mvc2_out_ep>; 894*4f45fb0bSSameer Pujar }; 895*4f45fb0bSSameer Pujar }; 896*4f45fb0bSSameer Pujar }; 897*4f45fb0bSSameer Pujar }; 898*4f45fb0bSSameer Pujar 899*4f45fb0bSSameer Pujar amx@702d3000 { 900*4f45fb0bSSameer Pujar status = "okay"; 901*4f45fb0bSSameer Pujar 902*4f45fb0bSSameer Pujar ports { 903*4f45fb0bSSameer Pujar #address-cells = <1>; 904*4f45fb0bSSameer Pujar #size-cells = <0>; 905*4f45fb0bSSameer Pujar 906*4f45fb0bSSameer Pujar port@0 { 907*4f45fb0bSSameer Pujar reg = <0>; 908*4f45fb0bSSameer Pujar 909*4f45fb0bSSameer Pujar amx1_in1_ep: endpoint { 910*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_amx1_in1_ep>; 911*4f45fb0bSSameer Pujar }; 912*4f45fb0bSSameer Pujar }; 913*4f45fb0bSSameer Pujar 914*4f45fb0bSSameer Pujar port@1 { 915*4f45fb0bSSameer Pujar reg = <1>; 916*4f45fb0bSSameer Pujar 917*4f45fb0bSSameer Pujar amx1_in2_ep: endpoint { 918*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_amx1_in2_ep>; 919*4f45fb0bSSameer Pujar }; 920*4f45fb0bSSameer Pujar }; 921*4f45fb0bSSameer Pujar 922*4f45fb0bSSameer Pujar port@2 { 923*4f45fb0bSSameer Pujar reg = <2>; 924*4f45fb0bSSameer Pujar 925*4f45fb0bSSameer Pujar amx1_in3_ep: endpoint { 926*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_amx1_in3_ep>; 927*4f45fb0bSSameer Pujar }; 928*4f45fb0bSSameer Pujar }; 929*4f45fb0bSSameer Pujar 930*4f45fb0bSSameer Pujar port@3 { 931*4f45fb0bSSameer Pujar reg = <3>; 932*4f45fb0bSSameer Pujar 933*4f45fb0bSSameer Pujar amx1_in4_ep: endpoint { 934*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_amx1_in4_ep>; 935*4f45fb0bSSameer Pujar }; 936*4f45fb0bSSameer Pujar }; 937*4f45fb0bSSameer Pujar 938*4f45fb0bSSameer Pujar amx1_out_port: port@4 { 939*4f45fb0bSSameer Pujar reg = <4>; 940*4f45fb0bSSameer Pujar 941*4f45fb0bSSameer Pujar amx1_out_ep: endpoint { 942*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_amx1_out_ep>; 943*4f45fb0bSSameer Pujar }; 944*4f45fb0bSSameer Pujar }; 945*4f45fb0bSSameer Pujar }; 946*4f45fb0bSSameer Pujar }; 947*4f45fb0bSSameer Pujar 948*4f45fb0bSSameer Pujar amx@702d3100 { 949*4f45fb0bSSameer Pujar status = "okay"; 950*4f45fb0bSSameer Pujar 951*4f45fb0bSSameer Pujar ports { 952*4f45fb0bSSameer Pujar #address-cells = <1>; 953*4f45fb0bSSameer Pujar #size-cells = <0>; 954*4f45fb0bSSameer Pujar 955*4f45fb0bSSameer Pujar port@0 { 956*4f45fb0bSSameer Pujar reg = <0>; 957*4f45fb0bSSameer Pujar 958*4f45fb0bSSameer Pujar amx2_in1_ep: endpoint { 959*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_amx2_in1_ep>; 960*4f45fb0bSSameer Pujar }; 961*4f45fb0bSSameer Pujar }; 962*4f45fb0bSSameer Pujar 963*4f45fb0bSSameer Pujar port@1 { 964*4f45fb0bSSameer Pujar reg = <1>; 965*4f45fb0bSSameer Pujar 966*4f45fb0bSSameer Pujar amx2_in2_ep: endpoint { 967*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_amx2_in2_ep>; 968*4f45fb0bSSameer Pujar }; 969*4f45fb0bSSameer Pujar }; 970*4f45fb0bSSameer Pujar 971*4f45fb0bSSameer Pujar amx2_in3_port: port@2 { 972*4f45fb0bSSameer Pujar reg = <2>; 973*4f45fb0bSSameer Pujar 974*4f45fb0bSSameer Pujar amx2_in3_ep: endpoint { 975*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_amx2_in3_ep>; 976*4f45fb0bSSameer Pujar }; 977*4f45fb0bSSameer Pujar }; 978*4f45fb0bSSameer Pujar 979*4f45fb0bSSameer Pujar amx2_in4_port: port@3 { 980*4f45fb0bSSameer Pujar reg = <3>; 981*4f45fb0bSSameer Pujar 982*4f45fb0bSSameer Pujar amx2_in4_ep: endpoint { 983*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_amx2_in4_ep>; 984*4f45fb0bSSameer Pujar }; 985*4f45fb0bSSameer Pujar }; 986*4f45fb0bSSameer Pujar 987*4f45fb0bSSameer Pujar amx2_out_port: port@4 { 988*4f45fb0bSSameer Pujar reg = <4>; 989*4f45fb0bSSameer Pujar 990*4f45fb0bSSameer Pujar amx2_out_ep: endpoint { 991*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_amx2_out_ep>; 992*4f45fb0bSSameer Pujar }; 993*4f45fb0bSSameer Pujar }; 994*4f45fb0bSSameer Pujar }; 995*4f45fb0bSSameer Pujar }; 996*4f45fb0bSSameer Pujar 997*4f45fb0bSSameer Pujar adx@702d3800 { 998*4f45fb0bSSameer Pujar status = "okay"; 999*4f45fb0bSSameer Pujar 1000*4f45fb0bSSameer Pujar ports { 1001*4f45fb0bSSameer Pujar #address-cells = <1>; 1002*4f45fb0bSSameer Pujar #size-cells = <0>; 1003*4f45fb0bSSameer Pujar 1004*4f45fb0bSSameer Pujar port@0 { 1005*4f45fb0bSSameer Pujar reg = <0>; 1006*4f45fb0bSSameer Pujar 1007*4f45fb0bSSameer Pujar adx1_in_ep: endpoint { 1008*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_adx1_in_ep>; 1009*4f45fb0bSSameer Pujar }; 1010*4f45fb0bSSameer Pujar }; 1011*4f45fb0bSSameer Pujar 1012*4f45fb0bSSameer Pujar adx1_out1_port: port@1 { 1013*4f45fb0bSSameer Pujar reg = <1>; 1014*4f45fb0bSSameer Pujar 1015*4f45fb0bSSameer Pujar adx1_out1_ep: endpoint { 1016*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_adx1_out1_ep>; 1017*4f45fb0bSSameer Pujar }; 1018*4f45fb0bSSameer Pujar }; 1019*4f45fb0bSSameer Pujar 1020*4f45fb0bSSameer Pujar adx1_out2_port: port@2 { 1021*4f45fb0bSSameer Pujar reg = <2>; 1022*4f45fb0bSSameer Pujar 1023*4f45fb0bSSameer Pujar adx1_out2_ep: endpoint { 1024*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_adx1_out2_ep>; 1025*4f45fb0bSSameer Pujar }; 1026*4f45fb0bSSameer Pujar }; 1027*4f45fb0bSSameer Pujar 1028*4f45fb0bSSameer Pujar adx1_out3_port: port@3 { 1029*4f45fb0bSSameer Pujar reg = <3>; 1030*4f45fb0bSSameer Pujar 1031*4f45fb0bSSameer Pujar adx1_out3_ep: endpoint { 1032*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_adx1_out3_ep>; 1033*4f45fb0bSSameer Pujar }; 1034*4f45fb0bSSameer Pujar }; 1035*4f45fb0bSSameer Pujar 1036*4f45fb0bSSameer Pujar adx1_out4_port: port@4 { 1037*4f45fb0bSSameer Pujar reg = <4>; 1038*4f45fb0bSSameer Pujar 1039*4f45fb0bSSameer Pujar adx1_out4_ep: endpoint { 1040*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_adx1_out4_ep>; 1041*4f45fb0bSSameer Pujar }; 1042*4f45fb0bSSameer Pujar }; 1043*4f45fb0bSSameer Pujar }; 1044*4f45fb0bSSameer Pujar }; 1045*4f45fb0bSSameer Pujar 1046*4f45fb0bSSameer Pujar adx@702d3900 { 1047*4f45fb0bSSameer Pujar status = "okay"; 1048*4f45fb0bSSameer Pujar 1049*4f45fb0bSSameer Pujar ports { 1050*4f45fb0bSSameer Pujar #address-cells = <1>; 1051*4f45fb0bSSameer Pujar #size-cells = <0>; 1052*4f45fb0bSSameer Pujar 1053*4f45fb0bSSameer Pujar port@0 { 1054*4f45fb0bSSameer Pujar reg = <0>; 1055*4f45fb0bSSameer Pujar 1056*4f45fb0bSSameer Pujar adx2_in_ep: endpoint { 1057*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_adx2_in_ep>; 1058*4f45fb0bSSameer Pujar }; 1059*4f45fb0bSSameer Pujar }; 1060*4f45fb0bSSameer Pujar 1061*4f45fb0bSSameer Pujar adx2_out1_port: port@1 { 1062*4f45fb0bSSameer Pujar reg = <1>; 1063*4f45fb0bSSameer Pujar 1064*4f45fb0bSSameer Pujar adx2_out1_ep: endpoint { 1065*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_adx2_out1_ep>; 1066*4f45fb0bSSameer Pujar }; 1067*4f45fb0bSSameer Pujar }; 1068*4f45fb0bSSameer Pujar 1069*4f45fb0bSSameer Pujar adx2_out2_port: port@2 { 1070*4f45fb0bSSameer Pujar reg = <2>; 1071*4f45fb0bSSameer Pujar 1072*4f45fb0bSSameer Pujar adx2_out2_ep: endpoint { 1073*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_adx2_out2_ep>; 1074*4f45fb0bSSameer Pujar }; 1075*4f45fb0bSSameer Pujar }; 1076*4f45fb0bSSameer Pujar 1077*4f45fb0bSSameer Pujar adx2_out3_port: port@3 { 1078*4f45fb0bSSameer Pujar reg = <3>; 1079*4f45fb0bSSameer Pujar 1080*4f45fb0bSSameer Pujar adx2_out3_ep: endpoint { 1081*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_adx2_out3_ep>; 1082*4f45fb0bSSameer Pujar }; 1083*4f45fb0bSSameer Pujar }; 1084*4f45fb0bSSameer Pujar 1085*4f45fb0bSSameer Pujar adx2_out4_port: port@4 { 1086*4f45fb0bSSameer Pujar reg = <4>; 1087*4f45fb0bSSameer Pujar 1088*4f45fb0bSSameer Pujar adx2_out4_ep: endpoint { 1089*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_adx2_out4_ep>; 1090*4f45fb0bSSameer Pujar }; 1091*4f45fb0bSSameer Pujar }; 1092*4f45fb0bSSameer Pujar }; 1093*4f45fb0bSSameer Pujar }; 1094*4f45fb0bSSameer Pujar 1095*4f45fb0bSSameer Pujar amixer@702dbb00 { 1096*4f45fb0bSSameer Pujar status = "okay"; 1097*4f45fb0bSSameer Pujar 1098*4f45fb0bSSameer Pujar ports { 1099*4f45fb0bSSameer Pujar #address-cells = <1>; 1100*4f45fb0bSSameer Pujar #size-cells = <0>; 1101*4f45fb0bSSameer Pujar 1102*4f45fb0bSSameer Pujar port@0 { 1103*4f45fb0bSSameer Pujar reg = <0x0>; 1104*4f45fb0bSSameer Pujar 1105*4f45fb0bSSameer Pujar mixer_in1_ep: endpoint { 1106*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mixer_in1_ep>; 1107*4f45fb0bSSameer Pujar }; 1108*4f45fb0bSSameer Pujar }; 1109*4f45fb0bSSameer Pujar 1110*4f45fb0bSSameer Pujar port@1 { 1111*4f45fb0bSSameer Pujar reg = <0x1>; 1112*4f45fb0bSSameer Pujar 1113*4f45fb0bSSameer Pujar mixer_in2_ep: endpoint { 1114*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mixer_in2_ep>; 1115*4f45fb0bSSameer Pujar }; 1116*4f45fb0bSSameer Pujar }; 1117*4f45fb0bSSameer Pujar 1118*4f45fb0bSSameer Pujar port@2 { 1119*4f45fb0bSSameer Pujar reg = <0x2>; 1120*4f45fb0bSSameer Pujar 1121*4f45fb0bSSameer Pujar mixer_in3_ep: endpoint { 1122*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mixer_in3_ep>; 1123*4f45fb0bSSameer Pujar }; 1124*4f45fb0bSSameer Pujar }; 1125*4f45fb0bSSameer Pujar 1126*4f45fb0bSSameer Pujar port@3 { 1127*4f45fb0bSSameer Pujar reg = <0x3>; 1128*4f45fb0bSSameer Pujar 1129*4f45fb0bSSameer Pujar mixer_in4_ep: endpoint { 1130*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mixer_in4_ep>; 1131*4f45fb0bSSameer Pujar }; 1132*4f45fb0bSSameer Pujar }; 1133*4f45fb0bSSameer Pujar 1134*4f45fb0bSSameer Pujar port@4 { 1135*4f45fb0bSSameer Pujar reg = <0x4>; 1136*4f45fb0bSSameer Pujar 1137*4f45fb0bSSameer Pujar mixer_in5_ep: endpoint { 1138*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mixer_in5_ep>; 1139*4f45fb0bSSameer Pujar }; 1140*4f45fb0bSSameer Pujar }; 1141*4f45fb0bSSameer Pujar 1142*4f45fb0bSSameer Pujar port@5 { 1143*4f45fb0bSSameer Pujar reg = <0x5>; 1144*4f45fb0bSSameer Pujar 1145*4f45fb0bSSameer Pujar mixer_in6_ep: endpoint { 1146*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mixer_in6_ep>; 1147*4f45fb0bSSameer Pujar }; 1148*4f45fb0bSSameer Pujar }; 1149*4f45fb0bSSameer Pujar 1150*4f45fb0bSSameer Pujar port@6 { 1151*4f45fb0bSSameer Pujar reg = <0x6>; 1152*4f45fb0bSSameer Pujar 1153*4f45fb0bSSameer Pujar mixer_in7_ep: endpoint { 1154*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mixer_in7_ep>; 1155*4f45fb0bSSameer Pujar }; 1156*4f45fb0bSSameer Pujar }; 1157*4f45fb0bSSameer Pujar 1158*4f45fb0bSSameer Pujar port@7 { 1159*4f45fb0bSSameer Pujar reg = <0x7>; 1160*4f45fb0bSSameer Pujar 1161*4f45fb0bSSameer Pujar mixer_in8_ep: endpoint { 1162*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mixer_in8_ep>; 1163*4f45fb0bSSameer Pujar }; 1164*4f45fb0bSSameer Pujar }; 1165*4f45fb0bSSameer Pujar 1166*4f45fb0bSSameer Pujar port@8 { 1167*4f45fb0bSSameer Pujar reg = <0x8>; 1168*4f45fb0bSSameer Pujar 1169*4f45fb0bSSameer Pujar mixer_in9_ep: endpoint { 1170*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mixer_in9_ep>; 1171*4f45fb0bSSameer Pujar }; 1172*4f45fb0bSSameer Pujar }; 1173*4f45fb0bSSameer Pujar 1174*4f45fb0bSSameer Pujar port@9 { 1175*4f45fb0bSSameer Pujar reg = <0x9>; 1176*4f45fb0bSSameer Pujar 1177*4f45fb0bSSameer Pujar mixer_in10_ep: endpoint { 1178*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mixer_in10_ep>; 1179*4f45fb0bSSameer Pujar }; 1180*4f45fb0bSSameer Pujar }; 1181*4f45fb0bSSameer Pujar 1182*4f45fb0bSSameer Pujar mixer_out1_port: port@a { 1183*4f45fb0bSSameer Pujar reg = <0xa>; 1184*4f45fb0bSSameer Pujar 1185*4f45fb0bSSameer Pujar mixer_out1_ep: endpoint { 1186*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mixer_out1_ep>; 1187*4f45fb0bSSameer Pujar }; 1188*4f45fb0bSSameer Pujar }; 1189*4f45fb0bSSameer Pujar 1190*4f45fb0bSSameer Pujar mixer_out2_port: port@b { 1191*4f45fb0bSSameer Pujar reg = <0xb>; 1192*4f45fb0bSSameer Pujar 1193*4f45fb0bSSameer Pujar mixer_out2_ep: endpoint { 1194*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mixer_out2_ep>; 1195*4f45fb0bSSameer Pujar }; 1196*4f45fb0bSSameer Pujar }; 1197*4f45fb0bSSameer Pujar 1198*4f45fb0bSSameer Pujar mixer_out3_port: port@c { 1199*4f45fb0bSSameer Pujar reg = <0xc>; 1200*4f45fb0bSSameer Pujar 1201*4f45fb0bSSameer Pujar mixer_out3_ep: endpoint { 1202*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mixer_out3_ep>; 1203*4f45fb0bSSameer Pujar }; 1204*4f45fb0bSSameer Pujar }; 1205*4f45fb0bSSameer Pujar 1206*4f45fb0bSSameer Pujar mixer_out4_port: port@d { 1207*4f45fb0bSSameer Pujar reg = <0xd>; 1208*4f45fb0bSSameer Pujar 1209*4f45fb0bSSameer Pujar mixer_out4_ep: endpoint { 1210*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mixer_out4_ep>; 1211*4f45fb0bSSameer Pujar }; 1212*4f45fb0bSSameer Pujar }; 1213*4f45fb0bSSameer Pujar 1214*4f45fb0bSSameer Pujar mixer_out5_port: port@e { 1215*4f45fb0bSSameer Pujar reg = <0xe>; 1216*4f45fb0bSSameer Pujar 1217*4f45fb0bSSameer Pujar mixer_out5_ep: endpoint { 1218*4f45fb0bSSameer Pujar remote-endpoint = <&xbar_mixer_out5_ep>; 1219*4f45fb0bSSameer Pujar }; 1220*4f45fb0bSSameer Pujar }; 1221*4f45fb0bSSameer Pujar }; 1222*4f45fb0bSSameer Pujar }; 1223*4f45fb0bSSameer Pujar 1224b0b4e286SSameer Pujar ports { 1225b0b4e286SSameer Pujar xbar_i2s3_port: port@c { 1226b0b4e286SSameer Pujar reg = <0xc>; 1227b0b4e286SSameer Pujar 1228b0b4e286SSameer Pujar xbar_i2s3_ep: endpoint { 1229b0b4e286SSameer Pujar remote-endpoint = <&i2s3_cif_ep>; 1230b0b4e286SSameer Pujar }; 1231b0b4e286SSameer Pujar }; 1232b0b4e286SSameer Pujar 1233b0b4e286SSameer Pujar xbar_i2s4_port: port@d { 1234b0b4e286SSameer Pujar reg = <0xd>; 1235b0b4e286SSameer Pujar 1236b0b4e286SSameer Pujar xbar_i2s4_ep: endpoint { 1237b0b4e286SSameer Pujar remote-endpoint = <&i2s4_cif_ep>; 1238b0b4e286SSameer Pujar }; 1239b0b4e286SSameer Pujar }; 1240b0b4e286SSameer Pujar 1241b0b4e286SSameer Pujar xbar_dmic1_port: port@f { 1242b0b4e286SSameer Pujar reg = <0xf>; 1243b0b4e286SSameer Pujar 1244b0b4e286SSameer Pujar xbar_dmic1_ep: endpoint { 1245b0b4e286SSameer Pujar remote-endpoint = <&dmic1_cif_ep>; 1246b0b4e286SSameer Pujar }; 1247b0b4e286SSameer Pujar }; 1248b0b4e286SSameer Pujar 1249b0b4e286SSameer Pujar xbar_dmic2_port: port@10 { 1250b0b4e286SSameer Pujar reg = <0x10>; 1251b0b4e286SSameer Pujar 1252b0b4e286SSameer Pujar xbar_dmic2_ep: endpoint { 1253b0b4e286SSameer Pujar remote-endpoint = <&dmic2_cif_ep>; 1254b0b4e286SSameer Pujar }; 1255b0b4e286SSameer Pujar }; 1256*4f45fb0bSSameer Pujar 1257*4f45fb0bSSameer Pujar xbar_sfc1_in_port: port@12 { 1258*4f45fb0bSSameer Pujar reg = <0x12>; 1259*4f45fb0bSSameer Pujar 1260*4f45fb0bSSameer Pujar xbar_sfc1_in_ep: endpoint { 1261*4f45fb0bSSameer Pujar remote-endpoint = <&sfc1_cif_in_ep>; 1262*4f45fb0bSSameer Pujar }; 1263*4f45fb0bSSameer Pujar }; 1264*4f45fb0bSSameer Pujar 1265*4f45fb0bSSameer Pujar port@13 { 1266*4f45fb0bSSameer Pujar reg = <0x13>; 1267*4f45fb0bSSameer Pujar 1268*4f45fb0bSSameer Pujar xbar_sfc1_out_ep: endpoint { 1269*4f45fb0bSSameer Pujar remote-endpoint = <&sfc1_cif_out_ep>; 1270*4f45fb0bSSameer Pujar }; 1271*4f45fb0bSSameer Pujar }; 1272*4f45fb0bSSameer Pujar 1273*4f45fb0bSSameer Pujar xbar_sfc2_in_port: port@14 { 1274*4f45fb0bSSameer Pujar reg = <0x14>; 1275*4f45fb0bSSameer Pujar 1276*4f45fb0bSSameer Pujar xbar_sfc2_in_ep: endpoint { 1277*4f45fb0bSSameer Pujar remote-endpoint = <&sfc2_cif_in_ep>; 1278*4f45fb0bSSameer Pujar }; 1279*4f45fb0bSSameer Pujar }; 1280*4f45fb0bSSameer Pujar 1281*4f45fb0bSSameer Pujar port@15 { 1282*4f45fb0bSSameer Pujar reg = <0x15>; 1283*4f45fb0bSSameer Pujar 1284*4f45fb0bSSameer Pujar xbar_sfc2_out_ep: endpoint { 1285*4f45fb0bSSameer Pujar remote-endpoint = <&sfc2_cif_out_ep>; 1286*4f45fb0bSSameer Pujar }; 1287*4f45fb0bSSameer Pujar }; 1288*4f45fb0bSSameer Pujar 1289*4f45fb0bSSameer Pujar xbar_sfc3_in_port: port@16 { 1290*4f45fb0bSSameer Pujar reg = <0x16>; 1291*4f45fb0bSSameer Pujar 1292*4f45fb0bSSameer Pujar xbar_sfc3_in_ep: endpoint { 1293*4f45fb0bSSameer Pujar remote-endpoint = <&sfc3_cif_in_ep>; 1294*4f45fb0bSSameer Pujar }; 1295*4f45fb0bSSameer Pujar }; 1296*4f45fb0bSSameer Pujar 1297*4f45fb0bSSameer Pujar port@17 { 1298*4f45fb0bSSameer Pujar reg = <0x17>; 1299*4f45fb0bSSameer Pujar 1300*4f45fb0bSSameer Pujar xbar_sfc3_out_ep: endpoint { 1301*4f45fb0bSSameer Pujar remote-endpoint = <&sfc3_cif_out_ep>; 1302*4f45fb0bSSameer Pujar }; 1303*4f45fb0bSSameer Pujar }; 1304*4f45fb0bSSameer Pujar 1305*4f45fb0bSSameer Pujar xbar_sfc4_in_port: port@18 { 1306*4f45fb0bSSameer Pujar reg = <0x18>; 1307*4f45fb0bSSameer Pujar 1308*4f45fb0bSSameer Pujar xbar_sfc4_in_ep: endpoint { 1309*4f45fb0bSSameer Pujar remote-endpoint = <&sfc4_cif_in_ep>; 1310*4f45fb0bSSameer Pujar }; 1311*4f45fb0bSSameer Pujar }; 1312*4f45fb0bSSameer Pujar 1313*4f45fb0bSSameer Pujar port@19 { 1314*4f45fb0bSSameer Pujar reg = <0x19>; 1315*4f45fb0bSSameer Pujar 1316*4f45fb0bSSameer Pujar xbar_sfc4_out_ep: endpoint { 1317*4f45fb0bSSameer Pujar remote-endpoint = <&sfc4_cif_out_ep>; 1318*4f45fb0bSSameer Pujar }; 1319*4f45fb0bSSameer Pujar }; 1320*4f45fb0bSSameer Pujar 1321*4f45fb0bSSameer Pujar xbar_mvc1_in_port: port@1a { 1322*4f45fb0bSSameer Pujar reg = <0x1a>; 1323*4f45fb0bSSameer Pujar 1324*4f45fb0bSSameer Pujar xbar_mvc1_in_ep: endpoint { 1325*4f45fb0bSSameer Pujar remote-endpoint = <&mvc1_cif_in_ep>; 1326*4f45fb0bSSameer Pujar }; 1327*4f45fb0bSSameer Pujar }; 1328*4f45fb0bSSameer Pujar 1329*4f45fb0bSSameer Pujar port@1b { 1330*4f45fb0bSSameer Pujar reg = <0x1b>; 1331*4f45fb0bSSameer Pujar 1332*4f45fb0bSSameer Pujar xbar_mvc1_out_ep: endpoint { 1333*4f45fb0bSSameer Pujar remote-endpoint = <&mvc1_cif_out_ep>; 1334*4f45fb0bSSameer Pujar }; 1335*4f45fb0bSSameer Pujar }; 1336*4f45fb0bSSameer Pujar 1337*4f45fb0bSSameer Pujar xbar_mvc2_in_port: port@1c { 1338*4f45fb0bSSameer Pujar reg = <0x1c>; 1339*4f45fb0bSSameer Pujar 1340*4f45fb0bSSameer Pujar xbar_mvc2_in_ep: endpoint { 1341*4f45fb0bSSameer Pujar remote-endpoint = <&mvc2_cif_in_ep>; 1342*4f45fb0bSSameer Pujar }; 1343*4f45fb0bSSameer Pujar }; 1344*4f45fb0bSSameer Pujar 1345*4f45fb0bSSameer Pujar port@1d { 1346*4f45fb0bSSameer Pujar reg = <0x1d>; 1347*4f45fb0bSSameer Pujar 1348*4f45fb0bSSameer Pujar xbar_mvc2_out_ep: endpoint { 1349*4f45fb0bSSameer Pujar remote-endpoint = <&mvc2_cif_out_ep>; 1350*4f45fb0bSSameer Pujar }; 1351*4f45fb0bSSameer Pujar }; 1352*4f45fb0bSSameer Pujar 1353*4f45fb0bSSameer Pujar xbar_amx1_in1_port: port@1e { 1354*4f45fb0bSSameer Pujar reg = <0x1e>; 1355*4f45fb0bSSameer Pujar 1356*4f45fb0bSSameer Pujar xbar_amx1_in1_ep: endpoint { 1357*4f45fb0bSSameer Pujar remote-endpoint = <&amx1_in1_ep>; 1358*4f45fb0bSSameer Pujar }; 1359*4f45fb0bSSameer Pujar }; 1360*4f45fb0bSSameer Pujar 1361*4f45fb0bSSameer Pujar xbar_amx1_in2_port: port@1f { 1362*4f45fb0bSSameer Pujar reg = <0x1f>; 1363*4f45fb0bSSameer Pujar 1364*4f45fb0bSSameer Pujar xbar_amx1_in2_ep: endpoint { 1365*4f45fb0bSSameer Pujar remote-endpoint = <&amx1_in2_ep>; 1366*4f45fb0bSSameer Pujar }; 1367*4f45fb0bSSameer Pujar }; 1368*4f45fb0bSSameer Pujar 1369*4f45fb0bSSameer Pujar xbar_amx1_in3_port: port@20 { 1370*4f45fb0bSSameer Pujar reg = <0x20>; 1371*4f45fb0bSSameer Pujar 1372*4f45fb0bSSameer Pujar xbar_amx1_in3_ep: endpoint { 1373*4f45fb0bSSameer Pujar remote-endpoint = <&amx1_in3_ep>; 1374*4f45fb0bSSameer Pujar }; 1375*4f45fb0bSSameer Pujar }; 1376*4f45fb0bSSameer Pujar 1377*4f45fb0bSSameer Pujar xbar_amx1_in4_port: port@21 { 1378*4f45fb0bSSameer Pujar reg = <0x21>; 1379*4f45fb0bSSameer Pujar 1380*4f45fb0bSSameer Pujar xbar_amx1_in4_ep: endpoint { 1381*4f45fb0bSSameer Pujar remote-endpoint = <&amx1_in4_ep>; 1382*4f45fb0bSSameer Pujar }; 1383*4f45fb0bSSameer Pujar }; 1384*4f45fb0bSSameer Pujar 1385*4f45fb0bSSameer Pujar port@22 { 1386*4f45fb0bSSameer Pujar reg = <0x22>; 1387*4f45fb0bSSameer Pujar 1388*4f45fb0bSSameer Pujar xbar_amx1_out_ep: endpoint { 1389*4f45fb0bSSameer Pujar remote-endpoint = <&amx1_out_ep>; 1390*4f45fb0bSSameer Pujar }; 1391*4f45fb0bSSameer Pujar }; 1392*4f45fb0bSSameer Pujar 1393*4f45fb0bSSameer Pujar xbar_amx2_in1_port: port@23 { 1394*4f45fb0bSSameer Pujar reg = <0x23>; 1395*4f45fb0bSSameer Pujar 1396*4f45fb0bSSameer Pujar xbar_amx2_in1_ep: endpoint { 1397*4f45fb0bSSameer Pujar remote-endpoint = <&amx2_in1_ep>; 1398*4f45fb0bSSameer Pujar }; 1399*4f45fb0bSSameer Pujar }; 1400*4f45fb0bSSameer Pujar 1401*4f45fb0bSSameer Pujar xbar_amx2_in2_port: port@24 { 1402*4f45fb0bSSameer Pujar reg = <0x24>; 1403*4f45fb0bSSameer Pujar 1404*4f45fb0bSSameer Pujar xbar_amx2_in2_ep: endpoint { 1405*4f45fb0bSSameer Pujar remote-endpoint = <&amx2_in2_ep>; 1406*4f45fb0bSSameer Pujar }; 1407*4f45fb0bSSameer Pujar }; 1408*4f45fb0bSSameer Pujar 1409*4f45fb0bSSameer Pujar xbar_amx2_in3_port: port@25 { 1410*4f45fb0bSSameer Pujar reg = <0x25>; 1411*4f45fb0bSSameer Pujar 1412*4f45fb0bSSameer Pujar xbar_amx2_in3_ep: endpoint { 1413*4f45fb0bSSameer Pujar remote-endpoint = <&amx2_in3_ep>; 1414*4f45fb0bSSameer Pujar }; 1415*4f45fb0bSSameer Pujar }; 1416*4f45fb0bSSameer Pujar 1417*4f45fb0bSSameer Pujar xbar_amx2_in4_port: port@26 { 1418*4f45fb0bSSameer Pujar reg = <0x26>; 1419*4f45fb0bSSameer Pujar 1420*4f45fb0bSSameer Pujar xbar_amx2_in4_ep: endpoint { 1421*4f45fb0bSSameer Pujar remote-endpoint = <&amx2_in4_ep>; 1422*4f45fb0bSSameer Pujar }; 1423*4f45fb0bSSameer Pujar }; 1424*4f45fb0bSSameer Pujar 1425*4f45fb0bSSameer Pujar port@27 { 1426*4f45fb0bSSameer Pujar reg = <0x27>; 1427*4f45fb0bSSameer Pujar 1428*4f45fb0bSSameer Pujar xbar_amx2_out_ep: endpoint { 1429*4f45fb0bSSameer Pujar remote-endpoint = <&amx2_out_ep>; 1430*4f45fb0bSSameer Pujar }; 1431*4f45fb0bSSameer Pujar }; 1432*4f45fb0bSSameer Pujar 1433*4f45fb0bSSameer Pujar xbar_adx1_in_port: port@28 { 1434*4f45fb0bSSameer Pujar reg = <0x28>; 1435*4f45fb0bSSameer Pujar 1436*4f45fb0bSSameer Pujar xbar_adx1_in_ep: endpoint { 1437*4f45fb0bSSameer Pujar remote-endpoint = <&adx1_in_ep>; 1438*4f45fb0bSSameer Pujar }; 1439*4f45fb0bSSameer Pujar }; 1440*4f45fb0bSSameer Pujar 1441*4f45fb0bSSameer Pujar port@29 { 1442*4f45fb0bSSameer Pujar reg = <0x29>; 1443*4f45fb0bSSameer Pujar 1444*4f45fb0bSSameer Pujar xbar_adx1_out1_ep: endpoint { 1445*4f45fb0bSSameer Pujar remote-endpoint = <&adx1_out1_ep>; 1446*4f45fb0bSSameer Pujar }; 1447*4f45fb0bSSameer Pujar }; 1448*4f45fb0bSSameer Pujar 1449*4f45fb0bSSameer Pujar port@2a { 1450*4f45fb0bSSameer Pujar reg = <0x2a>; 1451*4f45fb0bSSameer Pujar 1452*4f45fb0bSSameer Pujar xbar_adx1_out2_ep: endpoint { 1453*4f45fb0bSSameer Pujar remote-endpoint = <&adx1_out2_ep>; 1454*4f45fb0bSSameer Pujar }; 1455*4f45fb0bSSameer Pujar }; 1456*4f45fb0bSSameer Pujar 1457*4f45fb0bSSameer Pujar port@2b { 1458*4f45fb0bSSameer Pujar reg = <0x2b>; 1459*4f45fb0bSSameer Pujar 1460*4f45fb0bSSameer Pujar xbar_adx1_out3_ep: endpoint { 1461*4f45fb0bSSameer Pujar remote-endpoint = <&adx1_out3_ep>; 1462*4f45fb0bSSameer Pujar }; 1463*4f45fb0bSSameer Pujar }; 1464*4f45fb0bSSameer Pujar 1465*4f45fb0bSSameer Pujar port@2c { 1466*4f45fb0bSSameer Pujar reg = <0x2c>; 1467*4f45fb0bSSameer Pujar 1468*4f45fb0bSSameer Pujar xbar_adx1_out4_ep: endpoint { 1469*4f45fb0bSSameer Pujar remote-endpoint = <&adx1_out4_ep>; 1470*4f45fb0bSSameer Pujar }; 1471*4f45fb0bSSameer Pujar }; 1472*4f45fb0bSSameer Pujar 1473*4f45fb0bSSameer Pujar xbar_adx2_in_port: port@2d { 1474*4f45fb0bSSameer Pujar reg = <0x2d>; 1475*4f45fb0bSSameer Pujar 1476*4f45fb0bSSameer Pujar xbar_adx2_in_ep: endpoint { 1477*4f45fb0bSSameer Pujar remote-endpoint = <&adx2_in_ep>; 1478*4f45fb0bSSameer Pujar }; 1479*4f45fb0bSSameer Pujar }; 1480*4f45fb0bSSameer Pujar 1481*4f45fb0bSSameer Pujar port@2e { 1482*4f45fb0bSSameer Pujar reg = <0x2e>; 1483*4f45fb0bSSameer Pujar 1484*4f45fb0bSSameer Pujar xbar_adx2_out1_ep: endpoint { 1485*4f45fb0bSSameer Pujar remote-endpoint = <&adx2_out1_ep>; 1486*4f45fb0bSSameer Pujar }; 1487*4f45fb0bSSameer Pujar }; 1488*4f45fb0bSSameer Pujar 1489*4f45fb0bSSameer Pujar port@2f { 1490*4f45fb0bSSameer Pujar reg = <0x2f>; 1491*4f45fb0bSSameer Pujar 1492*4f45fb0bSSameer Pujar xbar_adx2_out2_ep: endpoint { 1493*4f45fb0bSSameer Pujar remote-endpoint = <&adx2_out2_ep>; 1494*4f45fb0bSSameer Pujar }; 1495*4f45fb0bSSameer Pujar }; 1496*4f45fb0bSSameer Pujar 1497*4f45fb0bSSameer Pujar port@30 { 1498*4f45fb0bSSameer Pujar reg = <0x30>; 1499*4f45fb0bSSameer Pujar 1500*4f45fb0bSSameer Pujar xbar_adx2_out3_ep: endpoint { 1501*4f45fb0bSSameer Pujar remote-endpoint = <&adx2_out3_ep>; 1502*4f45fb0bSSameer Pujar }; 1503*4f45fb0bSSameer Pujar }; 1504*4f45fb0bSSameer Pujar 1505*4f45fb0bSSameer Pujar port@31 { 1506*4f45fb0bSSameer Pujar reg = <0x31>; 1507*4f45fb0bSSameer Pujar 1508*4f45fb0bSSameer Pujar xbar_adx2_out4_ep: endpoint { 1509*4f45fb0bSSameer Pujar remote-endpoint = <&adx2_out4_ep>; 1510*4f45fb0bSSameer Pujar }; 1511*4f45fb0bSSameer Pujar }; 1512*4f45fb0bSSameer Pujar 1513*4f45fb0bSSameer Pujar xbar_mixer_in1_port: port@32 { 1514*4f45fb0bSSameer Pujar reg = <0x32>; 1515*4f45fb0bSSameer Pujar 1516*4f45fb0bSSameer Pujar xbar_mixer_in1_ep: endpoint { 1517*4f45fb0bSSameer Pujar remote-endpoint = <&mixer_in1_ep>; 1518*4f45fb0bSSameer Pujar }; 1519*4f45fb0bSSameer Pujar }; 1520*4f45fb0bSSameer Pujar 1521*4f45fb0bSSameer Pujar xbar_mixer_in2_port: port@33 { 1522*4f45fb0bSSameer Pujar reg = <0x33>; 1523*4f45fb0bSSameer Pujar 1524*4f45fb0bSSameer Pujar xbar_mixer_in2_ep: endpoint { 1525*4f45fb0bSSameer Pujar remote-endpoint = <&mixer_in2_ep>; 1526*4f45fb0bSSameer Pujar }; 1527*4f45fb0bSSameer Pujar }; 1528*4f45fb0bSSameer Pujar 1529*4f45fb0bSSameer Pujar xbar_mixer_in3_port: port@34 { 1530*4f45fb0bSSameer Pujar reg = <0x34>; 1531*4f45fb0bSSameer Pujar 1532*4f45fb0bSSameer Pujar xbar_mixer_in3_ep: endpoint { 1533*4f45fb0bSSameer Pujar remote-endpoint = <&mixer_in3_ep>; 1534*4f45fb0bSSameer Pujar }; 1535*4f45fb0bSSameer Pujar }; 1536*4f45fb0bSSameer Pujar 1537*4f45fb0bSSameer Pujar xbar_mixer_in4_port: port@35 { 1538*4f45fb0bSSameer Pujar reg = <0x35>; 1539*4f45fb0bSSameer Pujar 1540*4f45fb0bSSameer Pujar xbar_mixer_in4_ep: endpoint { 1541*4f45fb0bSSameer Pujar remote-endpoint = <&mixer_in4_ep>; 1542*4f45fb0bSSameer Pujar }; 1543*4f45fb0bSSameer Pujar }; 1544*4f45fb0bSSameer Pujar 1545*4f45fb0bSSameer Pujar xbar_mixer_in5_port: port@36 { 1546*4f45fb0bSSameer Pujar reg = <0x36>; 1547*4f45fb0bSSameer Pujar 1548*4f45fb0bSSameer Pujar xbar_mixer_in5_ep: endpoint { 1549*4f45fb0bSSameer Pujar remote-endpoint = <&mixer_in5_ep>; 1550*4f45fb0bSSameer Pujar }; 1551*4f45fb0bSSameer Pujar }; 1552*4f45fb0bSSameer Pujar 1553*4f45fb0bSSameer Pujar xbar_mixer_in6_port: port@37 { 1554*4f45fb0bSSameer Pujar reg = <0x37>; 1555*4f45fb0bSSameer Pujar 1556*4f45fb0bSSameer Pujar xbar_mixer_in6_ep: endpoint { 1557*4f45fb0bSSameer Pujar remote-endpoint = <&mixer_in6_ep>; 1558*4f45fb0bSSameer Pujar }; 1559*4f45fb0bSSameer Pujar }; 1560*4f45fb0bSSameer Pujar 1561*4f45fb0bSSameer Pujar xbar_mixer_in7_port: port@38 { 1562*4f45fb0bSSameer Pujar reg = <0x38>; 1563*4f45fb0bSSameer Pujar 1564*4f45fb0bSSameer Pujar xbar_mixer_in7_ep: endpoint { 1565*4f45fb0bSSameer Pujar remote-endpoint = <&mixer_in7_ep>; 1566*4f45fb0bSSameer Pujar }; 1567*4f45fb0bSSameer Pujar }; 1568*4f45fb0bSSameer Pujar 1569*4f45fb0bSSameer Pujar xbar_mixer_in8_port: port@39 { 1570*4f45fb0bSSameer Pujar reg = <0x39>; 1571*4f45fb0bSSameer Pujar 1572*4f45fb0bSSameer Pujar xbar_mixer_in8_ep: endpoint { 1573*4f45fb0bSSameer Pujar remote-endpoint = <&mixer_in8_ep>; 1574*4f45fb0bSSameer Pujar }; 1575*4f45fb0bSSameer Pujar }; 1576*4f45fb0bSSameer Pujar 1577*4f45fb0bSSameer Pujar xbar_mixer_in9_port: port@3a { 1578*4f45fb0bSSameer Pujar reg = <0x3a>; 1579*4f45fb0bSSameer Pujar 1580*4f45fb0bSSameer Pujar xbar_mixer_in9_ep: endpoint { 1581*4f45fb0bSSameer Pujar remote-endpoint = <&mixer_in9_ep>; 1582*4f45fb0bSSameer Pujar }; 1583*4f45fb0bSSameer Pujar }; 1584*4f45fb0bSSameer Pujar 1585*4f45fb0bSSameer Pujar xbar_mixer_in10_port: port@3b { 1586*4f45fb0bSSameer Pujar reg = <0x3b>; 1587*4f45fb0bSSameer Pujar 1588*4f45fb0bSSameer Pujar xbar_mixer_in10_ep: endpoint { 1589*4f45fb0bSSameer Pujar remote-endpoint = <&mixer_in10_ep>; 1590*4f45fb0bSSameer Pujar }; 1591*4f45fb0bSSameer Pujar }; 1592*4f45fb0bSSameer Pujar 1593*4f45fb0bSSameer Pujar port@3c { 1594*4f45fb0bSSameer Pujar reg = <0x3c>; 1595*4f45fb0bSSameer Pujar 1596*4f45fb0bSSameer Pujar xbar_mixer_out1_ep: endpoint { 1597*4f45fb0bSSameer Pujar remote-endpoint = <&mixer_out1_ep>; 1598*4f45fb0bSSameer Pujar }; 1599*4f45fb0bSSameer Pujar }; 1600*4f45fb0bSSameer Pujar 1601*4f45fb0bSSameer Pujar port@3d { 1602*4f45fb0bSSameer Pujar reg = <0x3d>; 1603*4f45fb0bSSameer Pujar 1604*4f45fb0bSSameer Pujar xbar_mixer_out2_ep: endpoint { 1605*4f45fb0bSSameer Pujar remote-endpoint = <&mixer_out2_ep>; 1606*4f45fb0bSSameer Pujar }; 1607*4f45fb0bSSameer Pujar }; 1608*4f45fb0bSSameer Pujar 1609*4f45fb0bSSameer Pujar port@3e { 1610*4f45fb0bSSameer Pujar reg = <0x3e>; 1611*4f45fb0bSSameer Pujar 1612*4f45fb0bSSameer Pujar xbar_mixer_out3_ep: endpoint { 1613*4f45fb0bSSameer Pujar remote-endpoint = <&mixer_out3_ep>; 1614*4f45fb0bSSameer Pujar }; 1615*4f45fb0bSSameer Pujar }; 1616*4f45fb0bSSameer Pujar 1617*4f45fb0bSSameer Pujar port@3f { 1618*4f45fb0bSSameer Pujar reg = <0x3f>; 1619*4f45fb0bSSameer Pujar 1620*4f45fb0bSSameer Pujar xbar_mixer_out4_ep: endpoint { 1621*4f45fb0bSSameer Pujar remote-endpoint = <&mixer_out4_ep>; 1622*4f45fb0bSSameer Pujar }; 1623*4f45fb0bSSameer Pujar }; 1624*4f45fb0bSSameer Pujar 1625*4f45fb0bSSameer Pujar port@40 { 1626*4f45fb0bSSameer Pujar reg = <0x40>; 1627*4f45fb0bSSameer Pujar 1628*4f45fb0bSSameer Pujar xbar_mixer_out5_ep: endpoint { 1629*4f45fb0bSSameer Pujar remote-endpoint = <&mixer_out5_ep>; 1630*4f45fb0bSSameer Pujar }; 1631*4f45fb0bSSameer Pujar }; 1632b0b4e286SSameer Pujar }; 1633b0b4e286SSameer Pujar }; 1634547141b5SSameer Pujar }; 1635547141b5SSameer Pujar 163607910a79SSowjanya Komatineni spi@70410000 { 163707910a79SSowjanya Komatineni status = "okay"; 163807910a79SSowjanya Komatineni 163907910a79SSowjanya Komatineni flash@0 { 164007910a79SSowjanya Komatineni compatible = "spi-nor"; 164107910a79SSowjanya Komatineni reg = <0>; 164207910a79SSowjanya Komatineni spi-max-frequency = <104000000>; 164307910a79SSowjanya Komatineni spi-tx-bus-width = <2>; 164407910a79SSowjanya Komatineni spi-rx-bus-width = <2>; 164507910a79SSowjanya Komatineni }; 164607910a79SSowjanya Komatineni }; 164707910a79SSowjanya Komatineni 16486772cd0eSThierry Reding clk32k_in: clock@0 { 16496772cd0eSThierry Reding compatible = "fixed-clock"; 16506772cd0eSThierry Reding clock-frequency = <32768>; 1651393a403eSThierry Reding #clock-cells = <0>; 16526772cd0eSThierry Reding }; 16536772cd0eSThierry Reding 16546772cd0eSThierry Reding cpus { 16556772cd0eSThierry Reding cpu@0 { 16566772cd0eSThierry Reding enable-method = "psci"; 16576772cd0eSThierry Reding }; 16586772cd0eSThierry Reding 16596772cd0eSThierry Reding cpu@1 { 16606772cd0eSThierry Reding enable-method = "psci"; 16616772cd0eSThierry Reding }; 16626772cd0eSThierry Reding 16636772cd0eSThierry Reding cpu@2 { 16646772cd0eSThierry Reding enable-method = "psci"; 16656772cd0eSThierry Reding }; 16666772cd0eSThierry Reding 16676772cd0eSThierry Reding cpu@3 { 16686772cd0eSThierry Reding enable-method = "psci"; 16696772cd0eSThierry Reding }; 1670e57cf057SThierry Reding 1671e57cf057SThierry Reding idle-states { 1672e57cf057SThierry Reding cpu-sleep { 1673e57cf057SThierry Reding status = "okay"; 1674e57cf057SThierry Reding }; 1675e57cf057SThierry Reding }; 16766772cd0eSThierry Reding }; 16776772cd0eSThierry Reding 16786f78a946STamás Szűcs fan: fan { 16796f78a946STamás Szűcs compatible = "pwm-fan"; 16806f78a946STamás Szűcs pwms = <&pwm 3 45334>; 16816f78a946STamás Szűcs 16826f78a946STamás Szűcs cooling-levels = <0 64 128 255>; 16836f78a946STamás Szűcs #cooling-cells = <2>; 16846f78a946STamás Szűcs }; 16856f78a946STamás Szűcs 16866f78a946STamás Szűcs thermal-zones { 16876f78a946STamás Szűcs cpu { 16886f78a946STamás Szűcs trips { 16896f78a946STamás Szűcs cpu_trip_critical: critical { 16906f78a946STamás Szűcs temperature = <96500>; 16916f78a946STamás Szűcs hysteresis = <0>; 16926f78a946STamás Szűcs type = "critical"; 16936f78a946STamás Szűcs }; 16946f78a946STamás Szűcs 16956f78a946STamás Szűcs cpu_trip_hot: hot { 16966f78a946STamás Szűcs temperature = <70000>; 16976f78a946STamás Szűcs hysteresis = <2000>; 16986f78a946STamás Szűcs type = "hot"; 16996f78a946STamás Szűcs }; 17006f78a946STamás Szűcs 17016f78a946STamás Szűcs cpu_trip_active: active { 17026f78a946STamás Szűcs temperature = <50000>; 17036f78a946STamás Szűcs hysteresis = <2000>; 17046f78a946STamás Szűcs type = "active"; 17056f78a946STamás Szűcs }; 17066f78a946STamás Szűcs 17076f78a946STamás Szűcs cpu_trip_passive: passive { 17086f78a946STamás Szűcs temperature = <30000>; 17096f78a946STamás Szűcs hysteresis = <2000>; 17106f78a946STamás Szűcs type = "passive"; 17116f78a946STamás Szűcs }; 17126f78a946STamás Szűcs }; 17136f78a946STamás Szűcs 17146f78a946STamás Szűcs cooling-maps { 17156f78a946STamás Szűcs cpu-critical { 17166f78a946STamás Szűcs cooling-device = <&fan 3 3>; 17176f78a946STamás Szűcs trip = <&cpu_trip_critical>; 17186f78a946STamás Szűcs }; 17196f78a946STamás Szűcs 17206f78a946STamás Szűcs cpu-hot { 17216f78a946STamás Szűcs cooling-device = <&fan 2 2>; 17226f78a946STamás Szűcs trip = <&cpu_trip_hot>; 17236f78a946STamás Szűcs }; 17246f78a946STamás Szűcs 17256f78a946STamás Szűcs cpu-active { 17266f78a946STamás Szűcs cooling-device = <&fan 1 1>; 17276f78a946STamás Szűcs trip = <&cpu_trip_active>; 17286f78a946STamás Szűcs }; 17296f78a946STamás Szűcs 17306f78a946STamás Szűcs cpu-passive { 17316f78a946STamás Szűcs cooling-device = <&fan 0 0>; 17326f78a946STamás Szűcs trip = <&cpu_trip_passive>; 17336f78a946STamás Szűcs }; 17346f78a946STamás Szűcs }; 17356f78a946STamás Szűcs }; 17366f78a946STamás Szűcs }; 17376f78a946STamás Szűcs 17386772cd0eSThierry Reding gpio-keys { 17396772cd0eSThierry Reding compatible = "gpio-keys"; 17406772cd0eSThierry Reding 17416772cd0eSThierry Reding power { 17426772cd0eSThierry Reding label = "Power"; 17436772cd0eSThierry Reding gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>; 17446772cd0eSThierry Reding linux,input-type = <EV_KEY>; 17456772cd0eSThierry Reding linux,code = <KEY_POWER>; 17466772cd0eSThierry Reding debounce-interval = <30>; 17476772cd0eSThierry Reding wakeup-event-action = <EV_ACT_ASSERTED>; 17486772cd0eSThierry Reding wakeup-source; 17496772cd0eSThierry Reding }; 17506772cd0eSThierry Reding 17516772cd0eSThierry Reding force-recovery { 17526772cd0eSThierry Reding label = "Force Recovery"; 17536772cd0eSThierry Reding gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>; 17546772cd0eSThierry Reding linux,input-type = <EV_KEY>; 17556772cd0eSThierry Reding linux,code = <BTN_1>; 17566772cd0eSThierry Reding debounce-interval = <30>; 17576772cd0eSThierry Reding }; 17586772cd0eSThierry Reding }; 17596772cd0eSThierry Reding 17606772cd0eSThierry Reding psci { 17616772cd0eSThierry Reding compatible = "arm,psci-1.0"; 17626772cd0eSThierry Reding method = "smc"; 17636772cd0eSThierry Reding }; 17646772cd0eSThierry Reding 17656772cd0eSThierry Reding vdd_5v0_sys: regulator@0 { 17666772cd0eSThierry Reding compatible = "regulator-fixed"; 17676772cd0eSThierry Reding 17686772cd0eSThierry Reding regulator-name = "VDD_5V0_SYS"; 17696772cd0eSThierry Reding regulator-min-microvolt = <5000000>; 17706772cd0eSThierry Reding regulator-max-microvolt = <5000000>; 17716772cd0eSThierry Reding regulator-always-on; 17726772cd0eSThierry Reding regulator-boot-on; 17736772cd0eSThierry Reding }; 17746772cd0eSThierry Reding 17756772cd0eSThierry Reding vdd_3v3_sys: regulator@1 { 17766772cd0eSThierry Reding compatible = "regulator-fixed"; 17777517248aSThierry Reding 17786772cd0eSThierry Reding regulator-name = "VDD_3V3_SYS"; 17796772cd0eSThierry Reding regulator-min-microvolt = <3300000>; 17806772cd0eSThierry Reding regulator-max-microvolt = <3300000>; 17816772cd0eSThierry Reding regulator-enable-ramp-delay = <240>; 17826772cd0eSThierry Reding regulator-disable-ramp-delay = <11340>; 17836772cd0eSThierry Reding regulator-always-on; 17846772cd0eSThierry Reding regulator-boot-on; 17856772cd0eSThierry Reding 17866772cd0eSThierry Reding gpio = <&pmic 3 GPIO_ACTIVE_HIGH>; 17876772cd0eSThierry Reding enable-active-high; 17886772cd0eSThierry Reding 17896772cd0eSThierry Reding vin-supply = <&vdd_5v0_sys>; 17906772cd0eSThierry Reding }; 17916772cd0eSThierry Reding 17926772cd0eSThierry Reding vdd_3v3_sd: regulator@2 { 17936772cd0eSThierry Reding compatible = "regulator-fixed"; 17946772cd0eSThierry Reding 17956772cd0eSThierry Reding regulator-name = "VDD_3V3_SD"; 17966772cd0eSThierry Reding regulator-min-microvolt = <3300000>; 17976772cd0eSThierry Reding regulator-max-microvolt = <3300000>; 17986772cd0eSThierry Reding 17996772cd0eSThierry Reding gpio = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; 18006772cd0eSThierry Reding enable-active-high; 18016772cd0eSThierry Reding 18026772cd0eSThierry Reding vin-supply = <&vdd_3v3_sys>; 18036772cd0eSThierry Reding }; 18046772cd0eSThierry Reding 18056772cd0eSThierry Reding vdd_hdmi: regulator@3 { 18066772cd0eSThierry Reding compatible = "regulator-fixed"; 18076772cd0eSThierry Reding 18086772cd0eSThierry Reding regulator-name = "VDD_HDMI_5V0"; 18096772cd0eSThierry Reding regulator-min-microvolt = <5000000>; 18106772cd0eSThierry Reding regulator-max-microvolt = <5000000>; 18116772cd0eSThierry Reding 18126772cd0eSThierry Reding vin-supply = <&vdd_5v0_sys>; 18136772cd0eSThierry Reding }; 18146772cd0eSThierry Reding 18156772cd0eSThierry Reding vdd_hub_3v3: regulator@4 { 18166772cd0eSThierry Reding compatible = "regulator-fixed"; 18176772cd0eSThierry Reding 18186772cd0eSThierry Reding regulator-name = "VDD_HUB_3V3"; 18196772cd0eSThierry Reding regulator-min-microvolt = <3300000>; 18206772cd0eSThierry Reding regulator-max-microvolt = <3300000>; 18216772cd0eSThierry Reding 18226772cd0eSThierry Reding gpio = <&gpio TEGRA_GPIO(A, 6) GPIO_ACTIVE_HIGH>; 18236772cd0eSThierry Reding enable-active-high; 18246772cd0eSThierry Reding 18256772cd0eSThierry Reding vin-supply = <&vdd_5v0_sys>; 18266772cd0eSThierry Reding }; 18276772cd0eSThierry Reding 18286772cd0eSThierry Reding vdd_cpu: regulator@5 { 18296772cd0eSThierry Reding compatible = "regulator-fixed"; 18306772cd0eSThierry Reding 18316772cd0eSThierry Reding regulator-name = "VDD_CPU"; 18326772cd0eSThierry Reding regulator-min-microvolt = <5000000>; 18336772cd0eSThierry Reding regulator-max-microvolt = <5000000>; 18346772cd0eSThierry Reding regulator-always-on; 18356772cd0eSThierry Reding regulator-boot-on; 18366772cd0eSThierry Reding 18376772cd0eSThierry Reding gpio = <&pmic 5 GPIO_ACTIVE_HIGH>; 18386772cd0eSThierry Reding enable-active-high; 18396772cd0eSThierry Reding 18406772cd0eSThierry Reding vin-supply = <&vdd_5v0_sys>; 18416772cd0eSThierry Reding }; 18426772cd0eSThierry Reding 18436772cd0eSThierry Reding vdd_gpu: regulator@6 { 1844434e8aedSJon Hunter compatible = "pwm-regulator"; 1845562da8b4SThierry Reding pwms = <&pwm 1 8000>; 18467517248aSThierry Reding 18476772cd0eSThierry Reding regulator-name = "VDD_GPU"; 1848434e8aedSJon Hunter regulator-min-microvolt = <710000>; 1849434e8aedSJon Hunter regulator-max-microvolt = <1320000>; 1850434e8aedSJon Hunter regulator-ramp-delay = <80>; 1851434e8aedSJon Hunter regulator-enable-ramp-delay = <2000>; 1852434e8aedSJon Hunter regulator-settling-time-us = <160>; 18537517248aSThierry Reding 1854434e8aedSJon Hunter enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>; 18556772cd0eSThierry Reding vin-supply = <&vdd_5v0_sys>; 18566772cd0eSThierry Reding }; 185735cbf655SThierry Reding 185835cbf655SThierry Reding avdd_io_edp_1v05: regulator@7 { 185935cbf655SThierry Reding compatible = "regulator-fixed"; 186035cbf655SThierry Reding 186135cbf655SThierry Reding regulator-name = "AVDD_IO_EDP_1V05"; 186235cbf655SThierry Reding regulator-min-microvolt = <1050000>; 186335cbf655SThierry Reding regulator-max-microvolt = <1050000>; 186435cbf655SThierry Reding 186535cbf655SThierry Reding gpio = <&pmic 7 GPIO_ACTIVE_HIGH>; 186635cbf655SThierry Reding enable-active-high; 186735cbf655SThierry Reding 186835cbf655SThierry Reding vin-supply = <&avdd_1v05_pll>; 186935cbf655SThierry Reding }; 187078bc57ffSThierry Reding 187178bc57ffSThierry Reding vdd_5v0_usb: regulator@8 { 187278bc57ffSThierry Reding compatible = "regulator-fixed"; 187378bc57ffSThierry Reding 187478bc57ffSThierry Reding regulator-name = "VDD_5V_USB"; 187578bc57ffSThierry Reding regulator-min-microvolt = <50000000>; 187678bc57ffSThierry Reding regulator-max-microvolt = <50000000>; 187778bc57ffSThierry Reding 187878bc57ffSThierry Reding vin-supply = <&vdd_5v0_sys>; 187978bc57ffSThierry Reding }; 1880b0b4e286SSameer Pujar 1881b0b4e286SSameer Pujar sound { 1882b0b4e286SSameer Pujar compatible = "nvidia,tegra210-audio-graph-card"; 1883b0b4e286SSameer Pujar status = "okay"; 1884b0b4e286SSameer Pujar 1885b0b4e286SSameer Pujar dais = /* FE */ 1886b0b4e286SSameer Pujar <&admaif1_port>, <&admaif2_port>, <&admaif3_port>, 1887b0b4e286SSameer Pujar <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, 1888b0b4e286SSameer Pujar <&admaif7_port>, <&admaif8_port>, <&admaif9_port>, 1889b0b4e286SSameer Pujar <&admaif10_port>, 1890b0b4e286SSameer Pujar /* Router */ 1891b0b4e286SSameer Pujar <&xbar_i2s3_port>, <&xbar_i2s4_port>, 1892b0b4e286SSameer Pujar <&xbar_dmic1_port>, <&xbar_dmic2_port>, 1893*4f45fb0bSSameer Pujar <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>, 1894*4f45fb0bSSameer Pujar <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>, 1895*4f45fb0bSSameer Pujar <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>, 1896*4f45fb0bSSameer Pujar <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>, 1897*4f45fb0bSSameer Pujar <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>, 1898*4f45fb0bSSameer Pujar <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>, 1899*4f45fb0bSSameer Pujar <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>, 1900*4f45fb0bSSameer Pujar <&xbar_adx1_in_port>, <&xbar_adx2_in_port>, 1901*4f45fb0bSSameer Pujar <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>, 1902*4f45fb0bSSameer Pujar <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>, 1903*4f45fb0bSSameer Pujar <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>, 1904*4f45fb0bSSameer Pujar <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>, 1905*4f45fb0bSSameer Pujar <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>, 1906*4f45fb0bSSameer Pujar /* HW accelerators */ 1907*4f45fb0bSSameer Pujar <&sfc1_out_port>, <&sfc2_out_port>, 1908*4f45fb0bSSameer Pujar <&sfc3_out_port>, <&sfc4_out_port>, 1909*4f45fb0bSSameer Pujar <&mvc1_out_port>, <&mvc2_out_port>, 1910*4f45fb0bSSameer Pujar <&amx1_out_port>, <&amx2_out_port>, 1911*4f45fb0bSSameer Pujar <&adx1_out1_port>, <&adx1_out2_port>, 1912*4f45fb0bSSameer Pujar <&adx1_out3_port>, <&adx1_out4_port>, 1913*4f45fb0bSSameer Pujar <&adx2_out1_port>, <&adx2_out2_port>, 1914*4f45fb0bSSameer Pujar <&adx2_out3_port>, <&adx2_out4_port>, 1915*4f45fb0bSSameer Pujar <&mixer_out1_port>, <&mixer_out2_port>, 1916*4f45fb0bSSameer Pujar <&mixer_out3_port>, <&mixer_out4_port>, 1917*4f45fb0bSSameer Pujar <&mixer_out5_port>, 1918b0b4e286SSameer Pujar /* I/O DAP Ports */ 1919b0b4e286SSameer Pujar <&i2s3_port>, <&i2s4_port>, 1920b0b4e286SSameer Pujar <&dmic1_port>, <&dmic2_port>; 1921b0b4e286SSameer Pujar 1922b8928c2bSThierry Reding label = "NVIDIA Jetson Nano APE"; 1923b0b4e286SSameer Pujar }; 19246772cd0eSThierry Reding}; 1925