1b2441318SGreg Kroah-Hartman// SPDX-License-Identifier: GPL-2.0
2336f79c7SThierry Reding/dts-v1/;
3336f79c7SThierry Reding
4336f79c7SThierry Reding#include "tegra210-p2180.dtsi"
5336f79c7SThierry Reding#include "tegra210-p2597.dtsi"
6336f79c7SThierry Reding
7336f79c7SThierry Reding/ {
8336f79c7SThierry Reding	model = "NVIDIA Jetson TX1 Developer Kit";
9336f79c7SThierry Reding	compatible = "nvidia,p2371-2180", "nvidia,tegra210";
107596723eSThierry Reding
11475d99fcSRob Herring	pcie@1003000 {
12af099eabSThierry Reding		status = "okay";
13af099eabSThierry Reding
14af099eabSThierry Reding		avdd-pll-uerefe-supply = <&avdd_1v05_pll>;
15af099eabSThierry Reding		hvddio-pex-supply = <&vdd_1v8>;
16af099eabSThierry Reding		dvddio-pex-supply = <&vdd_pex_1v05>;
17af099eabSThierry Reding		dvdd-pex-pll-supply = <&vdd_pex_1v05>;
18af099eabSThierry Reding		hvdd-pex-pll-e-supply = <&vdd_1v8>;
19af099eabSThierry Reding		vddio-pex-ctl-supply = <&vdd_1v8>;
20af099eabSThierry Reding
21af099eabSThierry Reding		pci@1,0 {
22af099eabSThierry Reding			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
23af099eabSThierry Reding			       <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
24af099eabSThierry Reding			       <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>,
25af099eabSThierry Reding			       <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>;
26af099eabSThierry Reding			phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3";
27af099eabSThierry Reding			status = "okay";
28af099eabSThierry Reding		};
29af099eabSThierry Reding
30af099eabSThierry Reding		pci@2,0 {
31af099eabSThierry Reding			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
32af099eabSThierry Reding			phy-names = "pcie-0";
33af099eabSThierry Reding			status = "okay";
34af099eabSThierry Reding		};
35af099eabSThierry Reding	};
36af099eabSThierry Reding
377596723eSThierry Reding	host1x@50000000 {
387596723eSThierry Reding		dsi@54300000 {
397596723eSThierry Reding			status = "okay";
407596723eSThierry Reding
417596723eSThierry Reding			avdd-dsi-csi-supply = <&vdd_dsi_csi>;
427596723eSThierry Reding
437596723eSThierry Reding			panel@0 {
447596723eSThierry Reding				compatible = "auo,b080uan01";
457596723eSThierry Reding				reg = <0>;
467596723eSThierry Reding
477596723eSThierry Reding				enable-gpios = <&gpio TEGRA_GPIO(V, 2)
487596723eSThierry Reding						GPIO_ACTIVE_HIGH>;
497596723eSThierry Reding				power-supply = <&vdd_5v0_io>;
507596723eSThierry Reding				backlight = <&backlight>;
517596723eSThierry Reding			};
527596723eSThierry Reding		};
537596723eSThierry Reding	};
547596723eSThierry Reding
557596723eSThierry Reding	i2c@7000c400 {
567596723eSThierry Reding		backlight: backlight@2c {
577596723eSThierry Reding			compatible = "ti,lp8557";
587596723eSThierry Reding			reg = <0x2c>;
597596723eSThierry Reding
607596723eSThierry Reding			dev-ctrl = /bits/ 8 <0x80>;
617596723eSThierry Reding			init-brt = /bits/ 8 <0xff>;
627596723eSThierry Reding
637596723eSThierry Reding			pwm-period = <29334>;
647596723eSThierry Reding
657596723eSThierry Reding			pwms = <&pwm 0 29334>;
667596723eSThierry Reding			pwm-names = "lp8557";
677596723eSThierry Reding
687596723eSThierry Reding			/* 3 LED string */
697596723eSThierry Reding			rom_14h {
707596723eSThierry Reding				rom-addr = /bits/ 8 <0x14>;
717596723eSThierry Reding				rom-val = /bits/ 8 <0x87>;
727596723eSThierry Reding			};
737596723eSThierry Reding
747596723eSThierry Reding			/* boost frequency 1 MHz */
757596723eSThierry Reding			rom_13h {
767596723eSThierry Reding				rom-addr = /bits/ 8 <0x13>;
777596723eSThierry Reding				rom-val = /bits/ 8 <0x01>;
787596723eSThierry Reding			};
797596723eSThierry Reding		};
807596723eSThierry Reding	};
81a1304d35SJoseph Lo
823492d0a1SThierry Reding	i2c@7000c500 {
833492d0a1SThierry Reding		/* carrier board ID EEPROM */
843492d0a1SThierry Reding		eeprom@57 {
853492d0a1SThierry Reding			compatible = "atmel,24c02";
863492d0a1SThierry Reding			reg = <0x57>;
873492d0a1SThierry Reding
88ec5fd197SJon Hunter			vcc-supply = <&vdd_1v8>;
893492d0a1SThierry Reding			address-bits = <8>;
903492d0a1SThierry Reding			page-size = <8>;
913492d0a1SThierry Reding			size = <256>;
923492d0a1SThierry Reding			read-only;
933492d0a1SThierry Reding		};
943492d0a1SThierry Reding	};
953492d0a1SThierry Reding
96a1304d35SJoseph Lo	clock@70110000 {
97a1304d35SJoseph Lo		status = "okay";
98a1304d35SJoseph Lo
99a1304d35SJoseph Lo		nvidia,cf = <6>;
100a1304d35SJoseph Lo		nvidia,ci = <0>;
101a1304d35SJoseph Lo		nvidia,cg = <2>;
102a1304d35SJoseph Lo		nvidia,droop-ctrl = <0x00000f00>;
103a1304d35SJoseph Lo		nvidia,force-mode = <1>;
104a1304d35SJoseph Lo		nvidia,sample-rate = <25000>;
105a1304d35SJoseph Lo
106a1304d35SJoseph Lo		nvidia,pwm-min-microvolts = <708000>;
107a1304d35SJoseph Lo		nvidia,pwm-period-nanoseconds = <2500>; /* 2.5us */
108a1304d35SJoseph Lo		nvidia,pwm-to-pmic;
109a1304d35SJoseph Lo		nvidia,pwm-tristate-microvolts = <1000000>;
110a1304d35SJoseph Lo		nvidia,pwm-voltage-step-microvolts = <19200>;
111a1304d35SJoseph Lo
112a1304d35SJoseph Lo		pinctrl-names = "dvfs_pwm_enable", "dvfs_pwm_disable";
113a1304d35SJoseph Lo		pinctrl-0 = <&dvfs_pwm_active_state>;
114a1304d35SJoseph Lo		pinctrl-1 = <&dvfs_pwm_inactive_state>;
115a1304d35SJoseph Lo	};
11610ece0c1SSameer Pujar
11710ece0c1SSameer Pujar	aconnect@702c0000 {
11810ece0c1SSameer Pujar		status = "okay";
11910ece0c1SSameer Pujar
12010ece0c1SSameer Pujar		dma@702e2000 {
12110ece0c1SSameer Pujar			status = "okay";
12210ece0c1SSameer Pujar		};
12310ece0c1SSameer Pujar
12410ece0c1SSameer Pujar		agic@702f9000 {
12510ece0c1SSameer Pujar			status = "okay";
12610ece0c1SSameer Pujar		};
12710ece0c1SSameer Pujar	};
128336f79c7SThierry Reding};
129