1b2441318SGreg Kroah-Hartman// SPDX-License-Identifier: GPL-2.0 2336f79c7SThierry Reding/dts-v1/; 3336f79c7SThierry Reding 4336f79c7SThierry Reding#include "tegra210-p2180.dtsi" 5336f79c7SThierry Reding#include "tegra210-p2597.dtsi" 6336f79c7SThierry Reding 7336f79c7SThierry Reding/ { 8336f79c7SThierry Reding model = "NVIDIA Jetson TX1 Developer Kit"; 9336f79c7SThierry Reding compatible = "nvidia,p2371-2180", "nvidia,tegra210"; 107596723eSThierry Reding 11475d99fcSRob Herring pcie@1003000 { 12af099eabSThierry Reding status = "okay"; 13af099eabSThierry Reding 14af099eabSThierry Reding avdd-pll-uerefe-supply = <&avdd_1v05_pll>; 15af099eabSThierry Reding hvddio-pex-supply = <&vdd_1v8>; 16af099eabSThierry Reding dvddio-pex-supply = <&vdd_pex_1v05>; 17af099eabSThierry Reding dvdd-pex-pll-supply = <&vdd_pex_1v05>; 18af099eabSThierry Reding hvdd-pex-pll-e-supply = <&vdd_1v8>; 19af099eabSThierry Reding vddio-pex-ctl-supply = <&vdd_1v8>; 20af099eabSThierry Reding 21af099eabSThierry Reding pci@1,0 { 22af099eabSThierry Reding phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, 23af099eabSThierry Reding <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>, 24af099eabSThierry Reding <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>, 25af099eabSThierry Reding <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>; 26af099eabSThierry Reding phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3"; 27af099eabSThierry Reding status = "okay"; 28af099eabSThierry Reding }; 29af099eabSThierry Reding 30af099eabSThierry Reding pci@2,0 { 31af099eabSThierry Reding phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>; 32af099eabSThierry Reding phy-names = "pcie-0"; 33af099eabSThierry Reding status = "okay"; 34af099eabSThierry Reding }; 35af099eabSThierry Reding }; 36af099eabSThierry Reding 377596723eSThierry Reding host1x@50000000 { 387596723eSThierry Reding dsi@54300000 { 397596723eSThierry Reding status = "okay"; 407596723eSThierry Reding 417596723eSThierry Reding avdd-dsi-csi-supply = <&vdd_dsi_csi>; 427596723eSThierry Reding 437596723eSThierry Reding panel@0 { 447596723eSThierry Reding compatible = "auo,b080uan01"; 457596723eSThierry Reding reg = <0>; 467596723eSThierry Reding 477596723eSThierry Reding enable-gpios = <&gpio TEGRA_GPIO(V, 2) 487596723eSThierry Reding GPIO_ACTIVE_HIGH>; 497596723eSThierry Reding power-supply = <&vdd_5v0_io>; 507596723eSThierry Reding backlight = <&backlight>; 517596723eSThierry Reding }; 527596723eSThierry Reding }; 537596723eSThierry Reding }; 547596723eSThierry Reding 557596723eSThierry Reding i2c@7000c400 { 567596723eSThierry Reding backlight: backlight@2c { 577596723eSThierry Reding compatible = "ti,lp8557"; 587596723eSThierry Reding reg = <0x2c>; 59db705117SJon Hunter power-supply = <&vdd_3v3_sys>; 607596723eSThierry Reding 617596723eSThierry Reding dev-ctrl = /bits/ 8 <0x80>; 627596723eSThierry Reding init-brt = /bits/ 8 <0xff>; 637596723eSThierry Reding 647596723eSThierry Reding pwm-period = <29334>; 657596723eSThierry Reding 667596723eSThierry Reding pwms = <&pwm 0 29334>; 677596723eSThierry Reding pwm-names = "lp8557"; 687596723eSThierry Reding 697596723eSThierry Reding /* 3 LED string */ 707596723eSThierry Reding rom_14h { 717596723eSThierry Reding rom-addr = /bits/ 8 <0x14>; 727596723eSThierry Reding rom-val = /bits/ 8 <0x87>; 737596723eSThierry Reding }; 747596723eSThierry Reding 757596723eSThierry Reding /* boost frequency 1 MHz */ 767596723eSThierry Reding rom_13h { 777596723eSThierry Reding rom-addr = /bits/ 8 <0x13>; 787596723eSThierry Reding rom-val = /bits/ 8 <0x01>; 797596723eSThierry Reding }; 807596723eSThierry Reding }; 817596723eSThierry Reding }; 82a1304d35SJoseph Lo 833492d0a1SThierry Reding i2c@7000c500 { 843492d0a1SThierry Reding /* carrier board ID EEPROM */ 853492d0a1SThierry Reding eeprom@57 { 863492d0a1SThierry Reding compatible = "atmel,24c02"; 873492d0a1SThierry Reding reg = <0x57>; 883492d0a1SThierry Reding 89a4387f29SJon Hunter label = "system"; 90ec5fd197SJon Hunter vcc-supply = <&vdd_1v8>; 919efa0fcaSThierry Reding address-width = <8>; 929efa0fcaSThierry Reding pagesize = <8>; 933492d0a1SThierry Reding size = <256>; 943492d0a1SThierry Reding read-only; 953492d0a1SThierry Reding }; 963492d0a1SThierry Reding }; 973492d0a1SThierry Reding 98a1304d35SJoseph Lo clock@70110000 { 99a1304d35SJoseph Lo status = "okay"; 100a1304d35SJoseph Lo 101a1304d35SJoseph Lo nvidia,cf = <6>; 102a1304d35SJoseph Lo nvidia,ci = <0>; 103a1304d35SJoseph Lo nvidia,cg = <2>; 104a1304d35SJoseph Lo nvidia,droop-ctrl = <0x00000f00>; 105a1304d35SJoseph Lo nvidia,force-mode = <1>; 106a1304d35SJoseph Lo nvidia,sample-rate = <25000>; 107a1304d35SJoseph Lo 108a1304d35SJoseph Lo nvidia,pwm-min-microvolts = <708000>; 109a1304d35SJoseph Lo nvidia,pwm-period-nanoseconds = <2500>; /* 2.5us */ 110a1304d35SJoseph Lo nvidia,pwm-to-pmic; 111a1304d35SJoseph Lo nvidia,pwm-tristate-microvolts = <1000000>; 112a1304d35SJoseph Lo nvidia,pwm-voltage-step-microvolts = <19200>; 113a1304d35SJoseph Lo 114a1304d35SJoseph Lo pinctrl-names = "dvfs_pwm_enable", "dvfs_pwm_disable"; 115a1304d35SJoseph Lo pinctrl-0 = <&dvfs_pwm_active_state>; 116a1304d35SJoseph Lo pinctrl-1 = <&dvfs_pwm_inactive_state>; 117a1304d35SJoseph Lo }; 11810ece0c1SSameer Pujar 11910ece0c1SSameer Pujar aconnect@702c0000 { 12010ece0c1SSameer Pujar status = "okay"; 12110ece0c1SSameer Pujar 122b6e136c7SSameer Pujar dma-controller@702e2000 { 12310ece0c1SSameer Pujar status = "okay"; 12410ece0c1SSameer Pujar }; 12510ece0c1SSameer Pujar 126df93557bSThierry Reding interrupt-controller@702f9000 { 12710ece0c1SSameer Pujar status = "okay"; 12810ece0c1SSameer Pujar }; 129*b0b4e286SSameer Pujar 130*b0b4e286SSameer Pujar ahub@702d0800 { 131*b0b4e286SSameer Pujar status = "okay"; 132*b0b4e286SSameer Pujar 133*b0b4e286SSameer Pujar admaif@702d0000 { 134*b0b4e286SSameer Pujar status = "okay"; 135*b0b4e286SSameer Pujar }; 136*b0b4e286SSameer Pujar 137*b0b4e286SSameer Pujar i2s@702d1000 { 138*b0b4e286SSameer Pujar status = "okay"; 139*b0b4e286SSameer Pujar 140*b0b4e286SSameer Pujar ports { 141*b0b4e286SSameer Pujar #address-cells = <1>; 142*b0b4e286SSameer Pujar #size-cells = <0>; 143*b0b4e286SSameer Pujar 144*b0b4e286SSameer Pujar port@0 { 145*b0b4e286SSameer Pujar reg = <0>; 146*b0b4e286SSameer Pujar 147*b0b4e286SSameer Pujar i2s1_cif_ep: endpoint { 148*b0b4e286SSameer Pujar remote-endpoint = <&xbar_i2s1_ep>; 149*b0b4e286SSameer Pujar }; 150*b0b4e286SSameer Pujar }; 151*b0b4e286SSameer Pujar 152*b0b4e286SSameer Pujar i2s1_port: port@1 { 153*b0b4e286SSameer Pujar reg = <1>; 154*b0b4e286SSameer Pujar 155*b0b4e286SSameer Pujar i2s1_dap_ep: endpoint { 156*b0b4e286SSameer Pujar dai-format = "i2s"; 157*b0b4e286SSameer Pujar /* Placeholder for external Codec */ 158*b0b4e286SSameer Pujar }; 159*b0b4e286SSameer Pujar }; 160*b0b4e286SSameer Pujar }; 161*b0b4e286SSameer Pujar }; 162*b0b4e286SSameer Pujar 163*b0b4e286SSameer Pujar i2s@702d1100 { 164*b0b4e286SSameer Pujar status = "okay"; 165*b0b4e286SSameer Pujar 166*b0b4e286SSameer Pujar ports { 167*b0b4e286SSameer Pujar #address-cells = <1>; 168*b0b4e286SSameer Pujar #size-cells = <0>; 169*b0b4e286SSameer Pujar 170*b0b4e286SSameer Pujar port@0 { 171*b0b4e286SSameer Pujar reg = <0>; 172*b0b4e286SSameer Pujar 173*b0b4e286SSameer Pujar i2s2_cif_ep: endpoint { 174*b0b4e286SSameer Pujar remote-endpoint = <&xbar_i2s2_ep>; 175*b0b4e286SSameer Pujar }; 176*b0b4e286SSameer Pujar }; 177*b0b4e286SSameer Pujar 178*b0b4e286SSameer Pujar i2s2_port: port@1 { 179*b0b4e286SSameer Pujar reg = <1>; 180*b0b4e286SSameer Pujar 181*b0b4e286SSameer Pujar i2s2_dap_ep: endpoint { 182*b0b4e286SSameer Pujar dai-format = "i2s"; 183*b0b4e286SSameer Pujar /* Placeholder for external Codec */ 184*b0b4e286SSameer Pujar }; 185*b0b4e286SSameer Pujar }; 186*b0b4e286SSameer Pujar }; 187*b0b4e286SSameer Pujar }; 188*b0b4e286SSameer Pujar 189*b0b4e286SSameer Pujar i2s@702d1200 { 190*b0b4e286SSameer Pujar status = "okay"; 191*b0b4e286SSameer Pujar 192*b0b4e286SSameer Pujar ports { 193*b0b4e286SSameer Pujar #address-cells = <1>; 194*b0b4e286SSameer Pujar #size-cells = <0>; 195*b0b4e286SSameer Pujar 196*b0b4e286SSameer Pujar port@0 { 197*b0b4e286SSameer Pujar reg = <0>; 198*b0b4e286SSameer Pujar 199*b0b4e286SSameer Pujar i2s3_cif_ep: endpoint { 200*b0b4e286SSameer Pujar remote-endpoint = <&xbar_i2s3_ep>; 201*b0b4e286SSameer Pujar }; 202*b0b4e286SSameer Pujar }; 203*b0b4e286SSameer Pujar 204*b0b4e286SSameer Pujar i2s3_port: port@1 { 205*b0b4e286SSameer Pujar reg = <1>; 206*b0b4e286SSameer Pujar 207*b0b4e286SSameer Pujar i2s3_dap_ep: endpoint { 208*b0b4e286SSameer Pujar dai-format = "i2s"; 209*b0b4e286SSameer Pujar /* Placeholder for external Codec */ 210*b0b4e286SSameer Pujar }; 211*b0b4e286SSameer Pujar }; 212*b0b4e286SSameer Pujar }; 213*b0b4e286SSameer Pujar }; 214*b0b4e286SSameer Pujar 215*b0b4e286SSameer Pujar i2s@702d1300 { 216*b0b4e286SSameer Pujar status = "okay"; 217*b0b4e286SSameer Pujar 218*b0b4e286SSameer Pujar ports { 219*b0b4e286SSameer Pujar #address-cells = <1>; 220*b0b4e286SSameer Pujar #size-cells = <0>; 221*b0b4e286SSameer Pujar 222*b0b4e286SSameer Pujar port@0 { 223*b0b4e286SSameer Pujar reg = <0>; 224*b0b4e286SSameer Pujar 225*b0b4e286SSameer Pujar i2s4_cif_ep: endpoint { 226*b0b4e286SSameer Pujar remote-endpoint = <&xbar_i2s4_ep>; 227*b0b4e286SSameer Pujar }; 228*b0b4e286SSameer Pujar }; 229*b0b4e286SSameer Pujar 230*b0b4e286SSameer Pujar i2s4_port: port@1 { 231*b0b4e286SSameer Pujar reg = <1>; 232*b0b4e286SSameer Pujar 233*b0b4e286SSameer Pujar i2s4_dap_ep: endpoint { 234*b0b4e286SSameer Pujar dai-format = "i2s"; 235*b0b4e286SSameer Pujar /* Placeholder for external Codec */ 236*b0b4e286SSameer Pujar }; 237*b0b4e286SSameer Pujar }; 238*b0b4e286SSameer Pujar }; 239*b0b4e286SSameer Pujar }; 240*b0b4e286SSameer Pujar 241*b0b4e286SSameer Pujar i2s@702d1400 { 242*b0b4e286SSameer Pujar status = "okay"; 243*b0b4e286SSameer Pujar 244*b0b4e286SSameer Pujar ports { 245*b0b4e286SSameer Pujar #address-cells = <1>; 246*b0b4e286SSameer Pujar #size-cells = <0>; 247*b0b4e286SSameer Pujar 248*b0b4e286SSameer Pujar port@0 { 249*b0b4e286SSameer Pujar reg = <0>; 250*b0b4e286SSameer Pujar 251*b0b4e286SSameer Pujar i2s5_cif_ep: endpoint { 252*b0b4e286SSameer Pujar remote-endpoint = <&xbar_i2s5_ep>; 253*b0b4e286SSameer Pujar }; 254*b0b4e286SSameer Pujar }; 255*b0b4e286SSameer Pujar 256*b0b4e286SSameer Pujar i2s5_port: port@1 { 257*b0b4e286SSameer Pujar reg = <1>; 258*b0b4e286SSameer Pujar 259*b0b4e286SSameer Pujar i2s5_dap_ep: endpoint { 260*b0b4e286SSameer Pujar dai-format = "i2s"; 261*b0b4e286SSameer Pujar /* Placeholder for external Codec */ 262*b0b4e286SSameer Pujar }; 263*b0b4e286SSameer Pujar }; 264*b0b4e286SSameer Pujar }; 265*b0b4e286SSameer Pujar }; 266*b0b4e286SSameer Pujar 267*b0b4e286SSameer Pujar dmic@702d4000 { 268*b0b4e286SSameer Pujar status = "okay"; 269*b0b4e286SSameer Pujar 270*b0b4e286SSameer Pujar ports { 271*b0b4e286SSameer Pujar #address-cells = <1>; 272*b0b4e286SSameer Pujar #size-cells = <0>; 273*b0b4e286SSameer Pujar 274*b0b4e286SSameer Pujar port@0 { 275*b0b4e286SSameer Pujar reg = <0>; 276*b0b4e286SSameer Pujar 277*b0b4e286SSameer Pujar dmic1_cif_ep: endpoint { 278*b0b4e286SSameer Pujar remote-endpoint = <&xbar_dmic1_ep>; 279*b0b4e286SSameer Pujar }; 280*b0b4e286SSameer Pujar }; 281*b0b4e286SSameer Pujar 282*b0b4e286SSameer Pujar dmic1_port: port@1 { 283*b0b4e286SSameer Pujar reg = <1>; 284*b0b4e286SSameer Pujar 285*b0b4e286SSameer Pujar dmic1_dap_ep: endpoint { 286*b0b4e286SSameer Pujar /* Placeholder for external Codec */ 287*b0b4e286SSameer Pujar }; 288*b0b4e286SSameer Pujar }; 289*b0b4e286SSameer Pujar }; 290*b0b4e286SSameer Pujar }; 291*b0b4e286SSameer Pujar 292*b0b4e286SSameer Pujar dmic@702d4100 { 293*b0b4e286SSameer Pujar status = "okay"; 294*b0b4e286SSameer Pujar 295*b0b4e286SSameer Pujar ports { 296*b0b4e286SSameer Pujar #address-cells = <1>; 297*b0b4e286SSameer Pujar #size-cells = <0>; 298*b0b4e286SSameer Pujar 299*b0b4e286SSameer Pujar port@0 { 300*b0b4e286SSameer Pujar reg = <0>; 301*b0b4e286SSameer Pujar 302*b0b4e286SSameer Pujar dmic2_cif_ep: endpoint { 303*b0b4e286SSameer Pujar remote-endpoint = <&xbar_dmic2_ep>; 304*b0b4e286SSameer Pujar }; 305*b0b4e286SSameer Pujar }; 306*b0b4e286SSameer Pujar 307*b0b4e286SSameer Pujar dmic2_port: port@1 { 308*b0b4e286SSameer Pujar reg = <1>; 309*b0b4e286SSameer Pujar 310*b0b4e286SSameer Pujar dmic2_dap_ep: endpoint { 311*b0b4e286SSameer Pujar /* Placeholder for external Codec */ 312*b0b4e286SSameer Pujar }; 313*b0b4e286SSameer Pujar }; 314*b0b4e286SSameer Pujar }; 315*b0b4e286SSameer Pujar }; 316*b0b4e286SSameer Pujar 317*b0b4e286SSameer Pujar dmic@702d4200 { 318*b0b4e286SSameer Pujar status = "okay"; 319*b0b4e286SSameer Pujar 320*b0b4e286SSameer Pujar ports { 321*b0b4e286SSameer Pujar #address-cells = <1>; 322*b0b4e286SSameer Pujar #size-cells = <0>; 323*b0b4e286SSameer Pujar 324*b0b4e286SSameer Pujar port@0 { 325*b0b4e286SSameer Pujar reg = <0>; 326*b0b4e286SSameer Pujar 327*b0b4e286SSameer Pujar dmic3_cif_ep: endpoint { 328*b0b4e286SSameer Pujar remote-endpoint = <&xbar_dmic3_ep>; 329*b0b4e286SSameer Pujar }; 330*b0b4e286SSameer Pujar }; 331*b0b4e286SSameer Pujar 332*b0b4e286SSameer Pujar dmic3_port: port@1 { 333*b0b4e286SSameer Pujar reg = <1>; 334*b0b4e286SSameer Pujar 335*b0b4e286SSameer Pujar dmic3_dap_ep: endpoint { 336*b0b4e286SSameer Pujar /* Placeholder for external Codec */ 337*b0b4e286SSameer Pujar }; 338*b0b4e286SSameer Pujar }; 339*b0b4e286SSameer Pujar }; 340*b0b4e286SSameer Pujar }; 341*b0b4e286SSameer Pujar 342*b0b4e286SSameer Pujar ports { 343*b0b4e286SSameer Pujar xbar_i2s1_port: port@a { 344*b0b4e286SSameer Pujar reg = <0xa>; 345*b0b4e286SSameer Pujar 346*b0b4e286SSameer Pujar xbar_i2s1_ep: endpoint { 347*b0b4e286SSameer Pujar remote-endpoint = <&i2s1_cif_ep>; 348*b0b4e286SSameer Pujar }; 349*b0b4e286SSameer Pujar }; 350*b0b4e286SSameer Pujar 351*b0b4e286SSameer Pujar xbar_i2s2_port: port@b { 352*b0b4e286SSameer Pujar reg = <0xb>; 353*b0b4e286SSameer Pujar 354*b0b4e286SSameer Pujar xbar_i2s2_ep: endpoint { 355*b0b4e286SSameer Pujar remote-endpoint = <&i2s2_cif_ep>; 356*b0b4e286SSameer Pujar }; 357*b0b4e286SSameer Pujar }; 358*b0b4e286SSameer Pujar 359*b0b4e286SSameer Pujar xbar_i2s3_port: port@c { 360*b0b4e286SSameer Pujar reg = <0xc>; 361*b0b4e286SSameer Pujar 362*b0b4e286SSameer Pujar xbar_i2s3_ep: endpoint { 363*b0b4e286SSameer Pujar remote-endpoint = <&i2s3_cif_ep>; 364*b0b4e286SSameer Pujar }; 365*b0b4e286SSameer Pujar }; 366*b0b4e286SSameer Pujar 367*b0b4e286SSameer Pujar xbar_i2s4_port: port@d { 368*b0b4e286SSameer Pujar reg = <0xd>; 369*b0b4e286SSameer Pujar 370*b0b4e286SSameer Pujar xbar_i2s4_ep: endpoint { 371*b0b4e286SSameer Pujar remote-endpoint = <&i2s4_cif_ep>; 372*b0b4e286SSameer Pujar }; 373*b0b4e286SSameer Pujar }; 374*b0b4e286SSameer Pujar 375*b0b4e286SSameer Pujar xbar_i2s5_port: port@e { 376*b0b4e286SSameer Pujar reg = <0xe>; 377*b0b4e286SSameer Pujar 378*b0b4e286SSameer Pujar xbar_i2s5_ep: endpoint { 379*b0b4e286SSameer Pujar remote-endpoint = <&i2s5_cif_ep>; 380*b0b4e286SSameer Pujar }; 381*b0b4e286SSameer Pujar }; 382*b0b4e286SSameer Pujar 383*b0b4e286SSameer Pujar xbar_dmic1_port: port@f { 384*b0b4e286SSameer Pujar reg = <0xf>; 385*b0b4e286SSameer Pujar 386*b0b4e286SSameer Pujar xbar_dmic1_ep: endpoint { 387*b0b4e286SSameer Pujar remote-endpoint = <&dmic1_cif_ep>; 388*b0b4e286SSameer Pujar }; 389*b0b4e286SSameer Pujar }; 390*b0b4e286SSameer Pujar 391*b0b4e286SSameer Pujar xbar_dmic2_port: port@10 { 392*b0b4e286SSameer Pujar reg = <0x10>; 393*b0b4e286SSameer Pujar 394*b0b4e286SSameer Pujar xbar_dmic2_ep: endpoint { 395*b0b4e286SSameer Pujar remote-endpoint = <&dmic2_cif_ep>; 396*b0b4e286SSameer Pujar }; 397*b0b4e286SSameer Pujar }; 398*b0b4e286SSameer Pujar 399*b0b4e286SSameer Pujar xbar_dmic3_port: port@11 { 400*b0b4e286SSameer Pujar reg = <0x11>; 401*b0b4e286SSameer Pujar 402*b0b4e286SSameer Pujar xbar_dmic3_ep: endpoint { 403*b0b4e286SSameer Pujar remote-endpoint = <&dmic3_cif_ep>; 404*b0b4e286SSameer Pujar }; 405*b0b4e286SSameer Pujar }; 406*b0b4e286SSameer Pujar }; 407*b0b4e286SSameer Pujar }; 408*b0b4e286SSameer Pujar }; 409*b0b4e286SSameer Pujar 410*b0b4e286SSameer Pujar sound { 411*b0b4e286SSameer Pujar compatible = "nvidia,tegra210-audio-graph-card"; 412*b0b4e286SSameer Pujar status = "okay"; 413*b0b4e286SSameer Pujar 414*b0b4e286SSameer Pujar dais = /* FE */ 415*b0b4e286SSameer Pujar <&admaif1_port>, <&admaif2_port>, <&admaif3_port>, 416*b0b4e286SSameer Pujar <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, 417*b0b4e286SSameer Pujar <&admaif7_port>, <&admaif8_port>, <&admaif9_port>, 418*b0b4e286SSameer Pujar <&admaif10_port>, 419*b0b4e286SSameer Pujar /* Router */ 420*b0b4e286SSameer Pujar <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>, 421*b0b4e286SSameer Pujar <&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_dmic1_port>, 422*b0b4e286SSameer Pujar <&xbar_dmic2_port>, <&xbar_dmic3_port>, 423*b0b4e286SSameer Pujar /* I/O DAP Ports */ 424*b0b4e286SSameer Pujar <&i2s1_port>, <&i2s2_port>, <&i2s3_port>, <&i2s4_port>, 425*b0b4e286SSameer Pujar <&i2s5_port>, <&dmic1_port>, <&dmic2_port>, <&dmic3_port>; 426*b0b4e286SSameer Pujar 427*b0b4e286SSameer Pujar label = "jetson-tx1-ape"; 42810ece0c1SSameer Pujar }; 429336f79c7SThierry Reding}; 430