1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/linux-event-codes.h>
5#include <dt-bindings/input/gpio-keys.h>
6
7#include "tegra186-p3310.dtsi"
8
9/ {
10	model = "NVIDIA Jetson TX2 Developer Kit";
11	compatible = "nvidia,p2771-0000", "nvidia,tegra186";
12
13	aconnect@2900000 {
14		status = "okay";
15
16		dma-controller@2930000 {
17			status = "okay";
18		};
19
20		interrupt-controller@2a40000 {
21			status = "okay";
22		};
23
24		ahub@2900800 {
25			status = "okay";
26
27			ports {
28				#address-cells = <1>;
29				#size-cells = <0>;
30
31				port@0 {
32					reg = <0x0>;
33
34					xbar_admaif0_ep: endpoint {
35						remote-endpoint = <&admaif0_ep>;
36					};
37				};
38
39				port@1 {
40					reg = <0x1>;
41
42					xbar_admaif1_ep: endpoint {
43						remote-endpoint = <&admaif1_ep>;
44					};
45				};
46
47				port@2 {
48					reg = <0x2>;
49
50					xbar_admaif2_ep: endpoint {
51						remote-endpoint = <&admaif2_ep>;
52					};
53				};
54
55				port@3 {
56					reg = <0x3>;
57
58					xbar_admaif3_ep: endpoint {
59						remote-endpoint = <&admaif3_ep>;
60					};
61				};
62
63				port@4 {
64					reg = <0x4>;
65
66					xbar_admaif4_ep: endpoint {
67						remote-endpoint = <&admaif4_ep>;
68					};
69				};
70
71				port@5 {
72					reg = <0x5>;
73
74					xbar_admaif5_ep: endpoint {
75						remote-endpoint = <&admaif5_ep>;
76					};
77				};
78
79				port@6 {
80					reg = <0x6>;
81
82					xbar_admaif6_ep: endpoint {
83						remote-endpoint = <&admaif6_ep>;
84					};
85				};
86
87				port@7 {
88					reg = <0x7>;
89
90					xbar_admaif7_ep: endpoint {
91						remote-endpoint = <&admaif7_ep>;
92					};
93				};
94
95				port@8 {
96					reg = <0x8>;
97
98					xbar_admaif8_ep: endpoint {
99						remote-endpoint = <&admaif8_ep>;
100					};
101				};
102
103				port@9 {
104					reg = <0x9>;
105
106					xbar_admaif9_ep: endpoint {
107						remote-endpoint = <&admaif9_ep>;
108					};
109				};
110
111				port@a {
112					reg = <0xa>;
113
114					xbar_admaif10_ep: endpoint {
115						remote-endpoint = <&admaif10_ep>;
116					};
117				};
118
119				port@b {
120					reg = <0xb>;
121
122					xbar_admaif11_ep: endpoint {
123						remote-endpoint = <&admaif11_ep>;
124					};
125				};
126
127				port@c {
128					reg = <0xc>;
129
130					xbar_admaif12_ep: endpoint {
131						remote-endpoint = <&admaif12_ep>;
132					};
133				};
134
135				port@d {
136					reg = <0xd>;
137
138					xbar_admaif13_ep: endpoint {
139						remote-endpoint = <&admaif13_ep>;
140					};
141				};
142
143				port@e {
144					reg = <0xe>;
145
146					xbar_admaif14_ep: endpoint {
147						remote-endpoint = <&admaif14_ep>;
148					};
149				};
150
151				port@f {
152					reg = <0xf>;
153
154					xbar_admaif15_ep: endpoint {
155						remote-endpoint = <&admaif15_ep>;
156					};
157				};
158
159				port@10 {
160					reg = <0x10>;
161
162					xbar_admaif16_ep: endpoint {
163						remote-endpoint = <&admaif16_ep>;
164					};
165				};
166
167				port@11 {
168					reg = <0x11>;
169
170					xbar_admaif17_ep: endpoint {
171						remote-endpoint = <&admaif17_ep>;
172					};
173				};
174
175				port@12 {
176					reg = <0x12>;
177
178					xbar_admaif18_ep: endpoint {
179						remote-endpoint = <&admaif18_ep>;
180					};
181				};
182
183				port@13 {
184					reg = <0x13>;
185
186					xbar_admaif19_ep: endpoint {
187						remote-endpoint = <&admaif19_ep>;
188					};
189				};
190
191				xbar_i2s1_port: port@14 {
192					reg = <0x14>;
193
194					xbar_i2s1_ep: endpoint {
195						remote-endpoint = <&i2s1_cif_ep>;
196					};
197				};
198
199				xbar_i2s2_port: port@15 {
200					reg = <0x15>;
201
202					xbar_i2s2_ep: endpoint {
203						remote-endpoint = <&i2s2_cif_ep>;
204					};
205				};
206
207				xbar_i2s3_port: port@16 {
208					reg = <0x16>;
209
210					xbar_i2s3_ep: endpoint {
211						remote-endpoint = <&i2s3_cif_ep>;
212					};
213				};
214
215				xbar_i2s4_port: port@17 {
216					reg = <0x17>;
217
218					xbar_i2s4_ep: endpoint {
219						remote-endpoint = <&i2s4_cif_ep>;
220					};
221				};
222
223				xbar_i2s5_port: port@18 {
224					reg = <0x18>;
225
226					xbar_i2s5_ep: endpoint {
227						remote-endpoint = <&i2s5_cif_ep>;
228					};
229				};
230
231				xbar_i2s6_port: port@19 {
232					reg = <0x19>;
233
234					xbar_i2s6_ep: endpoint {
235						remote-endpoint = <&i2s6_cif_ep>;
236					};
237				};
238
239				xbar_dmic1_port: port@1a {
240					reg = <0x1a>;
241
242					xbar_dmic1_ep: endpoint {
243						remote-endpoint = <&dmic1_cif_ep>;
244					};
245				};
246
247				xbar_dmic2_port: port@1b {
248					reg = <0x1b>;
249
250					xbar_dmic2_ep: endpoint {
251						remote-endpoint = <&dmic2_cif_ep>;
252					};
253				};
254
255				xbar_dmic3_port: port@1c {
256					reg = <0x1c>;
257
258					xbar_dmic3_ep: endpoint {
259						remote-endpoint = <&dmic3_cif_ep>;
260					};
261				};
262
263				xbar_dspk1_port: port@1e {
264					reg = <0x1e>;
265
266					xbar_dspk1_ep: endpoint {
267						remote-endpoint = <&dspk1_cif_ep>;
268					};
269				};
270
271				xbar_dspk2_port: port@1f {
272					reg = <0x1f>;
273
274					xbar_dspk2_ep: endpoint {
275						remote-endpoint = <&dspk2_cif_ep>;
276					};
277				};
278
279				xbar_sfc1_in_port: port@20 {
280					reg = <0x20>;
281
282					xbar_sfc1_in_ep: endpoint {
283						remote-endpoint = <&sfc1_cif_in_ep>;
284					};
285				};
286
287				port@21 {
288					reg = <0x21>;
289
290					xbar_sfc1_out_ep: endpoint {
291						remote-endpoint = <&sfc1_cif_out_ep>;
292					};
293				};
294
295				xbar_sfc2_in_port: port@22 {
296					reg = <0x22>;
297
298					xbar_sfc2_in_ep: endpoint {
299						remote-endpoint = <&sfc2_cif_in_ep>;
300					};
301				};
302
303				port@23 {
304					reg = <0x23>;
305
306					xbar_sfc2_out_ep: endpoint {
307						remote-endpoint = <&sfc2_cif_out_ep>;
308					};
309				};
310
311				xbar_sfc3_in_port: port@24 {
312					reg = <0x24>;
313
314					xbar_sfc3_in_ep: endpoint {
315						remote-endpoint = <&sfc3_cif_in_ep>;
316					};
317				};
318
319				port@25 {
320					reg = <0x25>;
321
322					xbar_sfc3_out_ep: endpoint {
323						remote-endpoint = <&sfc3_cif_out_ep>;
324					};
325				};
326
327				xbar_sfc4_in_port: port@26 {
328					reg = <0x26>;
329
330					xbar_sfc4_in_ep: endpoint {
331						remote-endpoint = <&sfc4_cif_in_ep>;
332					};
333				};
334
335				port@27 {
336					reg = <0x27>;
337
338					xbar_sfc4_out_ep: endpoint {
339						remote-endpoint = <&sfc4_cif_out_ep>;
340					};
341				};
342
343				xbar_mvc1_in_port: port@28 {
344					reg = <0x28>;
345
346					xbar_mvc1_in_ep: endpoint {
347						remote-endpoint = <&mvc1_cif_in_ep>;
348					};
349				};
350
351				port@29 {
352					reg = <0x29>;
353
354					xbar_mvc1_out_ep: endpoint {
355						remote-endpoint = <&mvc1_cif_out_ep>;
356					};
357				};
358
359				xbar_mvc2_in_port: port@2a {
360					reg = <0x2a>;
361
362					xbar_mvc2_in_ep: endpoint {
363						remote-endpoint = <&mvc2_cif_in_ep>;
364					};
365				};
366
367				port@2b {
368					reg = <0x2b>;
369
370					xbar_mvc2_out_ep: endpoint {
371						remote-endpoint = <&mvc2_cif_out_ep>;
372					};
373				};
374
375				xbar_amx1_in1_port: port@2c {
376					reg = <0x2c>;
377
378					xbar_amx1_in1_ep: endpoint {
379						remote-endpoint = <&amx1_in1_ep>;
380					};
381				};
382
383				xbar_amx1_in2_port: port@2d {
384					reg = <0x2d>;
385
386					xbar_amx1_in2_ep: endpoint {
387						remote-endpoint = <&amx1_in2_ep>;
388					};
389				};
390
391				xbar_amx1_in3_port: port@2e {
392					reg = <0x2e>;
393
394					xbar_amx1_in3_ep: endpoint {
395						remote-endpoint = <&amx1_in3_ep>;
396					};
397				};
398
399				xbar_amx1_in4_port: port@2f {
400					reg = <0x2f>;
401
402					xbar_amx1_in4_ep: endpoint {
403						remote-endpoint = <&amx1_in4_ep>;
404					};
405				};
406
407				port@30 {
408					reg = <0x30>;
409
410					xbar_amx1_out_ep: endpoint {
411						remote-endpoint = <&amx1_out_ep>;
412					};
413				};
414
415				xbar_amx2_in1_port: port@31 {
416					reg = <0x31>;
417
418					xbar_amx2_in1_ep: endpoint {
419						remote-endpoint = <&amx2_in1_ep>;
420					};
421				};
422
423				xbar_amx2_in2_port: port@32 {
424					reg = <0x32>;
425
426					xbar_amx2_in2_ep: endpoint {
427						remote-endpoint = <&amx2_in2_ep>;
428					};
429				};
430
431				xbar_amx2_in3_port: port@33 {
432					reg = <0x33>;
433
434					xbar_amx2_in3_ep: endpoint {
435						remote-endpoint = <&amx2_in3_ep>;
436					};
437				};
438
439				xbar_amx2_in4_port: port@34 {
440					reg = <0x34>;
441
442					xbar_amx2_in4_ep: endpoint {
443						remote-endpoint = <&amx2_in4_ep>;
444					};
445				};
446
447				port@35 {
448					reg = <0x35>;
449
450					xbar_amx2_out_ep: endpoint {
451						remote-endpoint = <&amx2_out_ep>;
452					};
453				};
454
455				xbar_amx3_in1_port: port@36 {
456					reg = <0x36>;
457
458					xbar_amx3_in1_ep: endpoint {
459						remote-endpoint = <&amx3_in1_ep>;
460					};
461				};
462
463				xbar_amx3_in2_port: port@37 {
464					reg = <0x37>;
465
466					xbar_amx3_in2_ep: endpoint {
467						remote-endpoint = <&amx3_in2_ep>;
468					};
469				};
470
471				xbar_amx3_in3_port: port@38 {
472					reg = <0x38>;
473
474					xbar_amx3_in3_ep: endpoint {
475						remote-endpoint = <&amx3_in3_ep>;
476					};
477				};
478
479				xbar_amx3_in4_port: port@39 {
480					reg = <0x39>;
481
482					xbar_amx3_in4_ep: endpoint {
483						remote-endpoint = <&amx3_in4_ep>;
484					};
485				};
486
487				port@3a {
488					reg = <0x3a>;
489
490					xbar_amx3_out_ep: endpoint {
491						remote-endpoint = <&amx3_out_ep>;
492					};
493				};
494
495				xbar_amx4_in1_port: port@3b {
496					reg = <0x3b>;
497
498					xbar_amx4_in1_ep: endpoint {
499						remote-endpoint = <&amx4_in1_ep>;
500					};
501				};
502
503				xbar_amx4_in2_port: port@3c {
504					reg = <0x3c>;
505
506					xbar_amx4_in2_ep: endpoint {
507						remote-endpoint = <&amx4_in2_ep>;
508					};
509				};
510
511				xbar_amx4_in3_port: port@3d {
512					reg = <0x3d>;
513
514					xbar_amx4_in3_ep: endpoint {
515						remote-endpoint = <&amx4_in3_ep>;
516					};
517				};
518
519				xbar_amx4_in4_port: port@3e {
520					reg = <0x3e>;
521
522					xbar_amx4_in4_ep: endpoint {
523						remote-endpoint = <&amx4_in4_ep>;
524					};
525				};
526
527				port@3f {
528					reg = <0x3f>;
529
530					xbar_amx4_out_ep: endpoint {
531						remote-endpoint = <&amx4_out_ep>;
532					};
533				};
534
535				xbar_adx1_in_port: port@40 {
536					reg = <0x40>;
537
538					xbar_adx1_in_ep: endpoint {
539						remote-endpoint = <&adx1_in_ep>;
540					};
541				};
542
543				port@41 {
544					reg = <0x41>;
545
546					xbar_adx1_out1_ep: endpoint {
547						remote-endpoint = <&adx1_out1_ep>;
548					};
549				};
550
551				port@42 {
552					reg = <0x42>;
553
554					xbar_adx1_out2_ep: endpoint {
555						remote-endpoint = <&adx1_out2_ep>;
556					};
557				};
558
559				port@43 {
560					reg = <0x43>;
561
562					xbar_adx1_out3_ep: endpoint {
563						remote-endpoint = <&adx1_out3_ep>;
564					};
565				};
566
567				port@44 {
568					reg = <0x44>;
569
570					xbar_adx1_out4_ep: endpoint {
571						remote-endpoint = <&adx1_out4_ep>;
572					};
573				};
574
575				xbar_adx2_in_port: port@45 {
576					reg = <0x45>;
577
578					xbar_adx2_in_ep: endpoint {
579						remote-endpoint = <&adx2_in_ep>;
580					};
581				};
582
583				port@46 {
584					reg = <0x46>;
585
586					xbar_adx2_out1_ep: endpoint {
587						remote-endpoint = <&adx2_out1_ep>;
588					};
589				};
590
591				port@47 {
592					reg = <0x47>;
593
594					xbar_adx2_out2_ep: endpoint {
595						remote-endpoint = <&adx2_out2_ep>;
596					};
597				};
598
599				port@48 {
600					reg = <0x48>;
601
602					xbar_adx2_out3_ep: endpoint {
603						remote-endpoint = <&adx2_out3_ep>;
604					};
605				};
606
607				port@49 {
608					reg = <0x49>;
609
610					xbar_adx2_out4_ep: endpoint {
611						remote-endpoint = <&adx2_out4_ep>;
612					};
613				};
614
615				xbar_adx3_in_port: port@4a {
616					reg = <0x4a>;
617
618					xbar_adx3_in_ep: endpoint {
619						remote-endpoint = <&adx3_in_ep>;
620					};
621				};
622
623				port@4b {
624					reg = <0x4b>;
625
626					xbar_adx3_out1_ep: endpoint {
627						remote-endpoint = <&adx3_out1_ep>;
628					};
629				};
630
631				port@4c {
632					reg = <0x4c>;
633
634					xbar_adx3_out2_ep: endpoint {
635						remote-endpoint = <&adx3_out2_ep>;
636					};
637				};
638
639				port@4d {
640					reg = <0x4d>;
641
642					xbar_adx3_out3_ep: endpoint {
643						remote-endpoint = <&adx3_out3_ep>;
644					};
645				};
646
647				port@4e {
648					reg = <0x4e>;
649
650					xbar_adx3_out4_ep: endpoint {
651						remote-endpoint = <&adx3_out4_ep>;
652					};
653				};
654
655				xbar_adx4_in_port: port@4f {
656					reg = <0x4f>;
657
658					xbar_adx4_in_ep: endpoint {
659						remote-endpoint = <&adx4_in_ep>;
660					};
661				};
662
663				port@50 {
664					reg = <0x50>;
665
666					xbar_adx4_out1_ep: endpoint {
667						remote-endpoint = <&adx4_out1_ep>;
668					};
669				};
670
671				port@51 {
672					reg = <0x51>;
673
674					xbar_adx4_out2_ep: endpoint {
675						remote-endpoint = <&adx4_out2_ep>;
676					};
677				};
678
679				port@52 {
680					reg = <0x52>;
681
682					xbar_adx4_out3_ep: endpoint {
683						remote-endpoint = <&adx4_out3_ep>;
684					};
685				};
686
687				port@53 {
688					reg = <0x53>;
689
690					xbar_adx4_out4_ep: endpoint {
691						remote-endpoint = <&adx4_out4_ep>;
692					};
693				};
694
695				xbar_mixer_in1_port: port@54 {
696					reg = <0x54>;
697
698					xbar_mixer_in1_ep: endpoint {
699						remote-endpoint = <&mixer_in1_ep>;
700					};
701				};
702
703				xbar_mixer_in2_port: port@55 {
704					reg = <0x55>;
705
706					xbar_mixer_in2_ep: endpoint {
707						remote-endpoint = <&mixer_in2_ep>;
708					};
709				};
710
711				xbar_mixer_in3_port: port@56 {
712					reg = <0x56>;
713
714					xbar_mixer_in3_ep: endpoint {
715						remote-endpoint = <&mixer_in3_ep>;
716					};
717				};
718
719				xbar_mixer_in4_port: port@57 {
720					reg = <0x57>;
721
722					xbar_mixer_in4_ep: endpoint {
723						remote-endpoint = <&mixer_in4_ep>;
724					};
725				};
726
727				xbar_mixer_in5_port: port@58 {
728					reg = <0x58>;
729
730					xbar_mixer_in5_ep: endpoint {
731						remote-endpoint = <&mixer_in5_ep>;
732					};
733				};
734
735				xbar_mixer_in6_port: port@59 {
736					reg = <0x59>;
737
738					xbar_mixer_in6_ep: endpoint {
739						remote-endpoint = <&mixer_in6_ep>;
740					};
741				};
742
743				xbar_mixer_in7_port: port@5a {
744					reg = <0x5a>;
745
746					xbar_mixer_in7_ep: endpoint {
747						remote-endpoint = <&mixer_in7_ep>;
748					};
749				};
750
751				xbar_mixer_in8_port: port@5b {
752					reg = <0x5b>;
753
754					xbar_mixer_in8_ep: endpoint {
755						remote-endpoint = <&mixer_in8_ep>;
756					};
757				};
758
759				xbar_mixer_in9_port: port@5c {
760					reg = <0x5c>;
761
762					xbar_mixer_in9_ep: endpoint {
763						remote-endpoint = <&mixer_in9_ep>;
764					};
765				};
766
767				xbar_mixer_in10_port: port@5d {
768					reg = <0x5d>;
769
770					xbar_mixer_in10_ep: endpoint {
771						remote-endpoint = <&mixer_in10_ep>;
772					};
773				};
774
775				port@5e {
776					reg = <0x5e>;
777
778					xbar_mixer_out1_ep: endpoint {
779						remote-endpoint = <&mixer_out1_ep>;
780					};
781				};
782
783				port@5f {
784					reg = <0x5f>;
785
786					xbar_mixer_out2_ep: endpoint {
787						remote-endpoint = <&mixer_out2_ep>;
788					};
789				};
790
791				port@60 {
792					reg = <0x60>;
793
794					xbar_mixer_out3_ep: endpoint {
795						remote-endpoint = <&mixer_out3_ep>;
796					};
797				};
798
799				port@61 {
800					reg = <0x61>;
801
802					xbar_mixer_out4_ep: endpoint {
803						remote-endpoint = <&mixer_out4_ep>;
804					};
805				};
806
807				port@62 {
808					reg = <0x62>;
809
810					xbar_mixer_out5_ep: endpoint {
811						remote-endpoint = <&mixer_out5_ep>;
812					};
813				};
814			};
815
816			admaif@290f000 {
817				status = "okay";
818
819				ports {
820					#address-cells = <1>;
821					#size-cells = <0>;
822
823					admaif0_port: port@0 {
824						reg = <0x0>;
825
826						admaif0_ep: endpoint {
827							remote-endpoint = <&xbar_admaif0_ep>;
828						};
829					};
830
831					admaif1_port: port@1 {
832						reg = <0x1>;
833
834						admaif1_ep: endpoint {
835							remote-endpoint = <&xbar_admaif1_ep>;
836						};
837					};
838
839					admaif2_port: port@2 {
840						reg = <0x2>;
841
842						admaif2_ep: endpoint {
843							remote-endpoint = <&xbar_admaif2_ep>;
844						};
845					};
846
847					admaif3_port: port@3 {
848						reg = <0x3>;
849
850						admaif3_ep: endpoint {
851							remote-endpoint = <&xbar_admaif3_ep>;
852						};
853					};
854
855					admaif4_port: port@4 {
856						reg = <0x4>;
857
858						admaif4_ep: endpoint {
859							remote-endpoint = <&xbar_admaif4_ep>;
860						};
861					};
862
863					admaif5_port: port@5 {
864						reg = <0x5>;
865
866						admaif5_ep: endpoint {
867							remote-endpoint = <&xbar_admaif5_ep>;
868						};
869					};
870
871					admaif6_port: port@6 {
872						reg = <0x6>;
873
874						admaif6_ep: endpoint {
875							remote-endpoint = <&xbar_admaif6_ep>;
876						};
877					};
878
879					admaif7_port: port@7 {
880						reg = <0x7>;
881
882						admaif7_ep: endpoint {
883							remote-endpoint = <&xbar_admaif7_ep>;
884						};
885					};
886
887					admaif8_port: port@8 {
888						reg = <0x8>;
889
890						admaif8_ep: endpoint {
891							remote-endpoint = <&xbar_admaif8_ep>;
892						};
893					};
894
895					admaif9_port: port@9 {
896						reg = <0x9>;
897
898						admaif9_ep: endpoint {
899							remote-endpoint = <&xbar_admaif9_ep>;
900						};
901					};
902
903					admaif10_port: port@a {
904						reg = <0xa>;
905
906						admaif10_ep: endpoint {
907							remote-endpoint = <&xbar_admaif10_ep>;
908						};
909					};
910
911					admaif11_port: port@b {
912						reg = <0xb>;
913
914						admaif11_ep: endpoint {
915							remote-endpoint = <&xbar_admaif11_ep>;
916						};
917					};
918
919					admaif12_port: port@c {
920						reg = <0xc>;
921
922						admaif12_ep: endpoint {
923							remote-endpoint = <&xbar_admaif12_ep>;
924						};
925					};
926
927					admaif13_port: port@d {
928						reg = <0xd>;
929
930						admaif13_ep: endpoint {
931							remote-endpoint = <&xbar_admaif13_ep>;
932						};
933					};
934
935					admaif14_port: port@e {
936						reg = <0xe>;
937
938						admaif14_ep: endpoint {
939							remote-endpoint = <&xbar_admaif14_ep>;
940						};
941					};
942
943					admaif15_port: port@f {
944						reg = <0xf>;
945
946						admaif15_ep: endpoint {
947							remote-endpoint = <&xbar_admaif15_ep>;
948						};
949					};
950
951					admaif16_port: port@10 {
952						reg = <0x10>;
953
954						admaif16_ep: endpoint {
955							remote-endpoint = <&xbar_admaif16_ep>;
956						};
957					};
958
959					admaif17_port: port@11 {
960						reg = <0x11>;
961
962						admaif17_ep: endpoint {
963							remote-endpoint = <&xbar_admaif17_ep>;
964						};
965					};
966
967					admaif18_port: port@12 {
968						reg = <0x12>;
969
970						admaif18_ep: endpoint {
971							remote-endpoint = <&xbar_admaif18_ep>;
972						};
973					};
974
975					admaif19_port: port@13 {
976						reg = <0x13>;
977
978						admaif19_ep: endpoint {
979							remote-endpoint = <&xbar_admaif19_ep>;
980						};
981					};
982				};
983			};
984
985			i2s@2901000 {
986				status = "okay";
987
988				ports {
989					#address-cells = <1>;
990					#size-cells = <0>;
991
992					port@0 {
993						reg = <0>;
994
995						i2s1_cif_ep: endpoint {
996							remote-endpoint = <&xbar_i2s1_ep>;
997						};
998					};
999
1000					i2s1_port: port@1 {
1001						reg = <1>;
1002
1003						i2s1_dap_ep: endpoint {
1004							dai-format = "i2s";
1005							/* Placeholder for external Codec */
1006						};
1007					};
1008				};
1009			};
1010
1011			i2s@2901100 {
1012				status = "okay";
1013
1014				ports {
1015					#address-cells = <1>;
1016					#size-cells = <0>;
1017
1018					port@0 {
1019						reg = <0>;
1020
1021						i2s2_cif_ep: endpoint {
1022							remote-endpoint = <&xbar_i2s2_ep>;
1023						};
1024					};
1025
1026					i2s2_port: port@1 {
1027						reg = <1>;
1028
1029						i2s2_dap_ep: endpoint {
1030							dai-format = "i2s";
1031							/* Placeholder for external Codec */
1032						};
1033					};
1034				};
1035			};
1036
1037			i2s@2901200 {
1038				status = "okay";
1039
1040				ports {
1041					#address-cells = <1>;
1042					#size-cells = <0>;
1043
1044					port@0 {
1045						reg = <0>;
1046
1047						i2s3_cif_ep: endpoint {
1048							remote-endpoint = <&xbar_i2s3_ep>;
1049						};
1050					};
1051
1052					i2s3_port: port@1 {
1053						reg = <1>;
1054
1055						i2s3_dap_ep: endpoint {
1056							dai-format = "i2s";
1057							/* Placeholder for external Codec */
1058						};
1059					};
1060				};
1061			};
1062
1063			i2s@2901300 {
1064				status = "okay";
1065
1066				ports {
1067					#address-cells = <1>;
1068					#size-cells = <0>;
1069
1070					port@0 {
1071						reg = <0>;
1072
1073						i2s4_cif_ep: endpoint {
1074							remote-endpoint = <&xbar_i2s4_ep>;
1075						};
1076					};
1077
1078					i2s4_port: port@1 {
1079						reg = <1>;
1080
1081						i2s4_dap_ep: endpoint {
1082							dai-format = "i2s";
1083							/* Placeholder for external Codec */
1084						};
1085					};
1086				};
1087			};
1088
1089			i2s@2901400 {
1090				status = "okay";
1091
1092				ports {
1093					#address-cells = <1>;
1094					#size-cells = <0>;
1095
1096					port@0 {
1097						reg = <0>;
1098
1099						i2s5_cif_ep: endpoint {
1100							remote-endpoint = <&xbar_i2s5_ep>;
1101						};
1102					};
1103
1104					i2s5_port: port@1 {
1105						reg = <1>;
1106
1107						i2s5_dap_ep: endpoint {
1108							dai-format = "i2s";
1109							/* Placeholder for external Codec */
1110						};
1111					};
1112				};
1113			};
1114
1115			i2s@2901500 {
1116				status = "okay";
1117
1118				ports {
1119					#address-cells = <1>;
1120					#size-cells = <0>;
1121
1122					port@0 {
1123						reg = <0>;
1124
1125						i2s6_cif_ep: endpoint {
1126							remote-endpoint = <&xbar_i2s6_ep>;
1127						};
1128					};
1129
1130					i2s6_port: port@1 {
1131						reg = <1>;
1132
1133						i2s6_dap_ep: endpoint {
1134							dai-format = "i2s";
1135							/* Placeholder for external Codec */
1136						};
1137					};
1138				};
1139			};
1140
1141			dmic@2904000 {
1142				status = "okay";
1143
1144				ports {
1145					#address-cells = <1>;
1146					#size-cells = <0>;
1147
1148					port@0 {
1149						reg = <0>;
1150
1151						dmic1_cif_ep: endpoint {
1152							remote-endpoint = <&xbar_dmic1_ep>;
1153						};
1154					};
1155
1156					dmic1_port: port@1 {
1157						reg = <1>;
1158
1159						dmic1_dap_ep: endpoint {
1160							/* Place holder for external Codec */
1161						};
1162					};
1163				};
1164			};
1165
1166			dmic@2904100 {
1167				status = "okay";
1168
1169				ports {
1170					#address-cells = <1>;
1171					#size-cells = <0>;
1172
1173					port@0 {
1174						reg = <0>;
1175
1176						dmic2_cif_ep: endpoint {
1177							remote-endpoint = <&xbar_dmic2_ep>;
1178						};
1179					};
1180
1181					dmic2_port: port@1 {
1182						reg = <1>;
1183
1184						dmic2_dap_ep: endpoint {
1185							/* Place holder for external Codec */
1186						};
1187					};
1188				};
1189			};
1190
1191			dmic@2904200 {
1192				status = "okay";
1193
1194				ports {
1195					#address-cells = <1>;
1196					#size-cells = <0>;
1197
1198					port@0 {
1199						reg = <0>;
1200
1201						dmic3_cif_ep: endpoint {
1202							remote-endpoint = <&xbar_dmic3_ep>;
1203						};
1204					};
1205
1206					dmic3_port: port@1 {
1207						reg = <1>;
1208
1209						dmic3_dap_ep: endpoint {
1210							/* Place holder for external Codec */
1211						};
1212					};
1213				};
1214			};
1215
1216			dspk@2905000 {
1217				status = "okay";
1218
1219				ports {
1220					#address-cells = <1>;
1221					#size-cells = <0>;
1222
1223					port@0 {
1224						reg = <0>;
1225
1226						dspk1_cif_ep: endpoint {
1227							remote-endpoint = <&xbar_dspk1_ep>;
1228						};
1229					};
1230
1231					dspk1_port: port@1 {
1232						reg = <1>;
1233
1234						dspk1_dap_ep: endpoint {
1235							/* Place holder for external Codec */
1236						};
1237					};
1238				};
1239			};
1240
1241			dspk@2905100 {
1242				status = "okay";
1243
1244				ports {
1245					#address-cells = <1>;
1246					#size-cells = <0>;
1247
1248					port@0 {
1249						reg = <0>;
1250
1251						dspk2_cif_ep: endpoint {
1252							remote-endpoint = <&xbar_dspk2_ep>;
1253						};
1254					};
1255
1256					dspk2_port: port@1 {
1257						reg = <1>;
1258
1259						dspk2_dap_ep: endpoint {
1260							/* Place holder for external Codec */
1261						};
1262					};
1263				};
1264			};
1265
1266			sfc@2902000 {
1267				status = "okay";
1268
1269				ports {
1270					#address-cells = <1>;
1271					#size-cells = <0>;
1272
1273					port@0 {
1274						reg = <0>;
1275
1276						sfc1_cif_in_ep: endpoint {
1277							remote-endpoint = <&xbar_sfc1_in_ep>;
1278							convert-rate = <44100>;
1279						};
1280					};
1281
1282					sfc1_out_port: port@1 {
1283						reg = <1>;
1284
1285						sfc1_cif_out_ep: endpoint {
1286							remote-endpoint = <&xbar_sfc1_out_ep>;
1287							convert-rate = <48000>;
1288						};
1289					};
1290				};
1291			};
1292
1293			sfc@2902200 {
1294				status = "okay";
1295
1296				ports {
1297					#address-cells = <1>;
1298					#size-cells = <0>;
1299
1300					port@0 {
1301						reg = <0>;
1302
1303						sfc2_cif_in_ep: endpoint {
1304							remote-endpoint = <&xbar_sfc2_in_ep>;
1305						};
1306					};
1307
1308					sfc2_out_port: port@1 {
1309						reg = <1>;
1310
1311						sfc2_cif_out_ep: endpoint {
1312							remote-endpoint = <&xbar_sfc2_out_ep>;
1313						};
1314					};
1315				};
1316			};
1317
1318			sfc@2902400 {
1319				status = "okay";
1320
1321				ports {
1322					#address-cells = <1>;
1323					#size-cells = <0>;
1324
1325					port@0 {
1326						reg = <0>;
1327
1328						sfc3_cif_in_ep: endpoint {
1329							remote-endpoint = <&xbar_sfc3_in_ep>;
1330						};
1331					};
1332
1333					sfc3_out_port: port@1 {
1334						reg = <1>;
1335
1336						sfc3_cif_out_ep: endpoint {
1337							remote-endpoint = <&xbar_sfc3_out_ep>;
1338						};
1339					};
1340				};
1341			};
1342
1343			sfc@2902600 {
1344				status = "okay";
1345
1346				ports {
1347					#address-cells = <1>;
1348					#size-cells = <0>;
1349
1350					port@0 {
1351						reg = <0>;
1352
1353						sfc4_cif_in_ep: endpoint {
1354							remote-endpoint = <&xbar_sfc4_in_ep>;
1355						};
1356					};
1357
1358					sfc4_out_port: port@1 {
1359						reg = <1>;
1360
1361						sfc4_cif_out_ep: endpoint {
1362							remote-endpoint = <&xbar_sfc4_out_ep>;
1363						};
1364					};
1365				};
1366			};
1367
1368			mvc@290a000 {
1369				status = "okay";
1370
1371				ports {
1372					#address-cells = <1>;
1373					#size-cells = <0>;
1374
1375					port@0 {
1376						reg = <0>;
1377
1378						mvc1_cif_in_ep: endpoint {
1379							remote-endpoint = <&xbar_mvc1_in_ep>;
1380						};
1381					};
1382
1383					mvc1_out_port: port@1 {
1384						reg = <1>;
1385
1386						mvc1_cif_out_ep: endpoint {
1387							remote-endpoint = <&xbar_mvc1_out_ep>;
1388						};
1389					};
1390				};
1391			};
1392
1393			mvc@290a200 {
1394				status = "okay";
1395
1396				ports {
1397					#address-cells = <1>;
1398					#size-cells = <0>;
1399
1400					port@0 {
1401						reg = <0>;
1402
1403						mvc2_cif_in_ep: endpoint {
1404							remote-endpoint = <&xbar_mvc2_in_ep>;
1405						};
1406					};
1407
1408					mvc2_out_port: port@1 {
1409						reg = <1>;
1410
1411						mvc2_cif_out_ep: endpoint {
1412							remote-endpoint = <&xbar_mvc2_out_ep>;
1413						};
1414					};
1415				};
1416			};
1417
1418			amx@2903000 {
1419				status = "okay";
1420
1421				ports {
1422					#address-cells = <1>;
1423					#size-cells = <0>;
1424
1425					port@0 {
1426						reg = <0>;
1427
1428						amx1_in1_ep: endpoint {
1429							remote-endpoint = <&xbar_amx1_in1_ep>;
1430						};
1431					};
1432
1433					port@1 {
1434						reg = <1>;
1435
1436						amx1_in2_ep: endpoint {
1437							remote-endpoint = <&xbar_amx1_in2_ep>;
1438						};
1439					};
1440
1441					port@2 {
1442						reg = <2>;
1443
1444						amx1_in3_ep: endpoint {
1445							remote-endpoint = <&xbar_amx1_in3_ep>;
1446						};
1447					};
1448
1449					port@3 {
1450						reg = <3>;
1451
1452						amx1_in4_ep: endpoint {
1453							remote-endpoint = <&xbar_amx1_in4_ep>;
1454						};
1455					};
1456
1457					amx1_out_port: port@4 {
1458						reg = <4>;
1459
1460						amx1_out_ep: endpoint {
1461							remote-endpoint = <&xbar_amx1_out_ep>;
1462						};
1463					};
1464				};
1465			};
1466
1467			amx@2903100 {
1468				status = "okay";
1469
1470				ports {
1471					#address-cells = <1>;
1472					#size-cells = <0>;
1473
1474					port@0 {
1475						reg = <0>;
1476
1477						amx2_in1_ep: endpoint {
1478							remote-endpoint = <&xbar_amx2_in1_ep>;
1479						};
1480					};
1481
1482					port@1 {
1483						reg = <1>;
1484
1485						amx2_in2_ep: endpoint {
1486							remote-endpoint = <&xbar_amx2_in2_ep>;
1487						};
1488					};
1489
1490					amx2_in3_port: port@2 {
1491						reg = <2>;
1492
1493						amx2_in3_ep: endpoint {
1494							remote-endpoint = <&xbar_amx2_in3_ep>;
1495						};
1496					};
1497
1498					amx2_in4_port: port@3 {
1499						reg = <3>;
1500
1501						amx2_in4_ep: endpoint {
1502							remote-endpoint = <&xbar_amx2_in4_ep>;
1503						};
1504					};
1505
1506					amx2_out_port: port@4 {
1507						reg = <4>;
1508
1509						amx2_out_ep: endpoint {
1510							remote-endpoint = <&xbar_amx2_out_ep>;
1511						};
1512					};
1513				};
1514			};
1515
1516			amx@2903200 {
1517				status = "okay";
1518
1519				ports {
1520					#address-cells = <1>;
1521					#size-cells = <0>;
1522
1523					port@0 {
1524						reg = <0>;
1525
1526						amx3_in1_ep: endpoint {
1527							remote-endpoint = <&xbar_amx3_in1_ep>;
1528						};
1529					};
1530
1531					port@1 {
1532						reg = <1>;
1533
1534						amx3_in2_ep: endpoint {
1535							remote-endpoint = <&xbar_amx3_in2_ep>;
1536						};
1537					};
1538
1539					port@2 {
1540						reg = <2>;
1541
1542						amx3_in3_ep: endpoint {
1543							remote-endpoint = <&xbar_amx3_in3_ep>;
1544						};
1545					};
1546
1547					port@3 {
1548						reg = <3>;
1549
1550						amx3_in4_ep: endpoint {
1551							remote-endpoint = <&xbar_amx3_in4_ep>;
1552						};
1553					};
1554
1555					amx3_out_port: port@4 {
1556						reg = <4>;
1557
1558						amx3_out_ep: endpoint {
1559							remote-endpoint = <&xbar_amx3_out_ep>;
1560						};
1561					};
1562				};
1563			};
1564
1565			amx@2903300 {
1566				status = "okay";
1567
1568				ports {
1569					#address-cells = <1>;
1570					#size-cells = <0>;
1571
1572					port@0 {
1573						reg = <0>;
1574
1575						amx4_in1_ep: endpoint {
1576							remote-endpoint = <&xbar_amx4_in1_ep>;
1577						};
1578					};
1579
1580					port@1 {
1581						reg = <1>;
1582
1583						amx4_in2_ep: endpoint {
1584							remote-endpoint = <&xbar_amx4_in2_ep>;
1585						};
1586					};
1587
1588					port@2 {
1589						reg = <2>;
1590
1591						amx4_in3_ep: endpoint {
1592							remote-endpoint = <&xbar_amx4_in3_ep>;
1593						};
1594					};
1595
1596					port@3 {
1597						reg = <3>;
1598
1599						amx4_in4_ep: endpoint {
1600							remote-endpoint = <&xbar_amx4_in4_ep>;
1601						};
1602					};
1603
1604					amx4_out_port: port@4 {
1605						reg = <4>;
1606
1607						amx4_out_ep: endpoint {
1608							remote-endpoint = <&xbar_amx4_out_ep>;
1609						};
1610					};
1611				};
1612			};
1613
1614			adx@2903800 {
1615				status = "okay";
1616
1617				ports {
1618					#address-cells = <1>;
1619					#size-cells = <0>;
1620
1621					port@0 {
1622						reg = <0>;
1623
1624						adx1_in_ep: endpoint {
1625							remote-endpoint = <&xbar_adx1_in_ep>;
1626						};
1627					};
1628
1629					adx1_out1_port: port@1 {
1630						reg = <1>;
1631
1632						adx1_out1_ep: endpoint {
1633							remote-endpoint = <&xbar_adx1_out1_ep>;
1634						};
1635					};
1636
1637					adx1_out2_port: port@2 {
1638						reg = <2>;
1639
1640						adx1_out2_ep: endpoint {
1641							remote-endpoint = <&xbar_adx1_out2_ep>;
1642						};
1643					};
1644
1645					adx1_out3_port: port@3 {
1646						reg = <3>;
1647
1648						adx1_out3_ep: endpoint {
1649							remote-endpoint = <&xbar_adx1_out3_ep>;
1650						};
1651					};
1652
1653					adx1_out4_port: port@4 {
1654						reg = <4>;
1655
1656						adx1_out4_ep: endpoint {
1657							remote-endpoint = <&xbar_adx1_out4_ep>;
1658						};
1659					};
1660				};
1661			};
1662
1663			adx@2903900 {
1664				status = "okay";
1665
1666				ports {
1667					#address-cells = <1>;
1668					#size-cells = <0>;
1669
1670					port@0 {
1671						reg = <0>;
1672
1673						adx2_in_ep: endpoint {
1674							remote-endpoint = <&xbar_adx2_in_ep>;
1675						};
1676					};
1677
1678					adx2_out1_port: port@1 {
1679						reg = <1>;
1680
1681						adx2_out1_ep: endpoint {
1682							remote-endpoint = <&xbar_adx2_out1_ep>;
1683						};
1684					};
1685
1686					adx2_out2_port: port@2 {
1687						reg = <2>;
1688
1689						adx2_out2_ep: endpoint {
1690							remote-endpoint = <&xbar_adx2_out2_ep>;
1691						};
1692					};
1693
1694					adx2_out3_port: port@3 {
1695						reg = <3>;
1696
1697						adx2_out3_ep: endpoint {
1698							remote-endpoint = <&xbar_adx2_out3_ep>;
1699						};
1700					};
1701
1702					adx2_out4_port: port@4 {
1703						reg = <4>;
1704
1705						adx2_out4_ep: endpoint {
1706							remote-endpoint = <&xbar_adx2_out4_ep>;
1707						};
1708					};
1709				};
1710			};
1711
1712			adx@2903a00 {
1713				status = "okay";
1714
1715				ports {
1716					#address-cells = <1>;
1717					#size-cells = <0>;
1718
1719					port@0 {
1720						reg = <0>;
1721
1722						adx3_in_ep: endpoint {
1723							remote-endpoint = <&xbar_adx3_in_ep>;
1724						};
1725					};
1726
1727					adx3_out1_port: port@1 {
1728						reg = <1>;
1729
1730						adx3_out1_ep: endpoint {
1731							remote-endpoint = <&xbar_adx3_out1_ep>;
1732						};
1733					};
1734
1735					adx3_out2_port: port@2 {
1736						reg = <2>;
1737
1738						adx3_out2_ep: endpoint {
1739							remote-endpoint = <&xbar_adx3_out2_ep>;
1740						};
1741					};
1742
1743					adx3_out3_port: port@3 {
1744						reg = <3>;
1745
1746						adx3_out3_ep: endpoint {
1747							remote-endpoint = <&xbar_adx3_out3_ep>;
1748						};
1749					};
1750
1751					adx3_out4_port: port@4 {
1752						reg = <4>;
1753
1754						adx3_out4_ep: endpoint {
1755							remote-endpoint = <&xbar_adx3_out4_ep>;
1756						};
1757					};
1758				};
1759			};
1760
1761			adx@2903b00 {
1762				status = "okay";
1763
1764				ports {
1765					#address-cells = <1>;
1766					#size-cells = <0>;
1767
1768					port@0 {
1769						reg = <0>;
1770
1771						adx4_in_ep: endpoint {
1772							remote-endpoint = <&xbar_adx4_in_ep>;
1773						};
1774					};
1775
1776					adx4_out1_port: port@1 {
1777						reg = <1>;
1778
1779						adx4_out1_ep: endpoint {
1780							remote-endpoint = <&xbar_adx4_out1_ep>;
1781						};
1782					};
1783
1784					adx4_out2_port: port@2 {
1785						reg = <2>;
1786
1787						adx4_out2_ep: endpoint {
1788							remote-endpoint = <&xbar_adx4_out2_ep>;
1789						};
1790					};
1791
1792					adx4_out3_port: port@3 {
1793						reg = <3>;
1794
1795						adx4_out3_ep: endpoint {
1796							remote-endpoint = <&xbar_adx4_out3_ep>;
1797						};
1798					};
1799
1800					adx4_out4_port: port@4 {
1801						reg = <4>;
1802
1803						adx4_out4_ep: endpoint {
1804							remote-endpoint = <&xbar_adx4_out4_ep>;
1805						};
1806					};
1807				};
1808			};
1809
1810			amixer@290bb00 {
1811				status = "okay";
1812
1813				ports {
1814					#address-cells = <1>;
1815					#size-cells = <0>;
1816
1817					port@0 {
1818						reg = <0x0>;
1819
1820						mixer_in1_ep: endpoint {
1821							remote-endpoint = <&xbar_mixer_in1_ep>;
1822						};
1823					};
1824
1825					port@1 {
1826						reg = <0x1>;
1827
1828						mixer_in2_ep: endpoint {
1829							remote-endpoint = <&xbar_mixer_in2_ep>;
1830						};
1831					};
1832
1833					port@2 {
1834						reg = <0x2>;
1835
1836						mixer_in3_ep: endpoint {
1837							remote-endpoint = <&xbar_mixer_in3_ep>;
1838						};
1839					};
1840
1841					port@3 {
1842						reg = <0x3>;
1843
1844						mixer_in4_ep: endpoint {
1845							remote-endpoint = <&xbar_mixer_in4_ep>;
1846						};
1847					};
1848
1849					port@4 {
1850						reg = <0x4>;
1851
1852						mixer_in5_ep: endpoint {
1853							remote-endpoint = <&xbar_mixer_in5_ep>;
1854						};
1855					};
1856
1857					port@5 {
1858						reg = <0x5>;
1859
1860						mixer_in6_ep: endpoint {
1861							remote-endpoint = <&xbar_mixer_in6_ep>;
1862						};
1863					};
1864
1865					port@6 {
1866						reg = <0x6>;
1867
1868						mixer_in7_ep: endpoint {
1869							remote-endpoint = <&xbar_mixer_in7_ep>;
1870						};
1871					};
1872
1873					port@7 {
1874						reg = <0x7>;
1875
1876						mixer_in8_ep: endpoint {
1877							remote-endpoint = <&xbar_mixer_in8_ep>;
1878						};
1879					};
1880
1881					port@8 {
1882						reg = <0x8>;
1883
1884						mixer_in9_ep: endpoint {
1885							remote-endpoint = <&xbar_mixer_in9_ep>;
1886						};
1887					};
1888
1889					port@9 {
1890						reg = <0x9>;
1891
1892						mixer_in10_ep: endpoint {
1893							remote-endpoint = <&xbar_mixer_in10_ep>;
1894						};
1895					};
1896
1897					mixer_out1_port: port@a {
1898						reg = <0xa>;
1899
1900						mixer_out1_ep: endpoint {
1901							remote-endpoint = <&xbar_mixer_out1_ep>;
1902						};
1903					};
1904
1905					mixer_out2_port: port@b {
1906						reg = <0xb>;
1907
1908						mixer_out2_ep: endpoint {
1909							remote-endpoint = <&xbar_mixer_out2_ep>;
1910						};
1911					};
1912
1913					mixer_out3_port: port@c {
1914						reg = <0xc>;
1915
1916						mixer_out3_ep: endpoint {
1917							remote-endpoint = <&xbar_mixer_out3_ep>;
1918						};
1919					};
1920
1921					mixer_out4_port: port@d {
1922						reg = <0xd>;
1923
1924						mixer_out4_ep: endpoint {
1925							remote-endpoint = <&xbar_mixer_out4_ep>;
1926						};
1927					};
1928
1929					mixer_out5_port: port@e {
1930						reg = <0xe>;
1931
1932						mixer_out5_ep: endpoint {
1933							remote-endpoint = <&xbar_mixer_out5_ep>;
1934						};
1935					};
1936				};
1937			};
1938		};
1939	};
1940
1941	i2c@3160000 {
1942		power-monitor@42 {
1943			compatible = "ti,ina3221";
1944			reg = <0x42>;
1945			#address-cells = <1>;
1946			#size-cells = <0>;
1947
1948			channel@0 {
1949				reg = <0x0>;
1950				label = "VDD_MUX";
1951				shunt-resistor-micro-ohms = <20000>;
1952			};
1953
1954			channel@1 {
1955				reg = <0x1>;
1956				label = "VDD_5V0_IO_SYS";
1957				shunt-resistor-micro-ohms = <5000>;
1958			};
1959
1960			channel@2 {
1961				reg = <0x2>;
1962				label = "VDD_3V3_SYS";
1963				shunt-resistor-micro-ohms = <10000>;
1964			};
1965		};
1966
1967		power-monitor@43 {
1968			compatible = "ti,ina3221";
1969			reg = <0x43>;
1970			#address-cells = <1>;
1971			#size-cells = <0>;
1972
1973			channel@0 {
1974				reg = <0x0>;
1975				label = "VDD_3V3_IO_SLP";
1976				shunt-resistor-micro-ohms = <10000>;
1977			};
1978
1979			channel@1 {
1980				reg = <0x1>;
1981				label = "VDD_1V8_IO";
1982				shunt-resistor-micro-ohms = <10000>;
1983			};
1984
1985			channel@2 {
1986				reg = <0x2>;
1987				label = "VDD_M2_IN";
1988				shunt-resistor-micro-ohms = <10000>;
1989			};
1990		};
1991
1992		exp1: gpio@74 {
1993			compatible = "ti,tca9539";
1994			reg = <0x74>;
1995
1996			interrupt-parent = <&gpio>;
1997			interrupts = <TEGRA186_MAIN_GPIO(Y, 0)
1998				      GPIO_ACTIVE_LOW>;
1999
2000			#gpio-cells = <2>;
2001			gpio-controller;
2002
2003			vcc-supply = <&vdd_3v3_sys>;
2004		};
2005
2006		exp2: gpio@77 {
2007			compatible = "ti,tca9539";
2008			reg = <0x77>;
2009
2010			interrupt-parent = <&gpio>;
2011			interrupts = <TEGRA186_MAIN_GPIO(Y, 6)
2012				      GPIO_ACTIVE_LOW>;
2013
2014			#gpio-cells = <2>;
2015			gpio-controller;
2016
2017			vcc-supply = <&vdd_1v8>;
2018		};
2019	};
2020
2021	/* SDMMC1 (SD/MMC) */
2022	mmc@3400000 {
2023		status = "okay";
2024
2025		vmmc-supply = <&vdd_sd>;
2026	};
2027
2028	hda@3510000 {
2029		nvidia,model = "NVIDIA Jetson TX2 HDA";
2030		status = "okay";
2031	};
2032
2033	padctl@3520000 {
2034		status = "okay";
2035
2036		avdd-pll-erefeut-supply = <&vdd_1v8_pll>;
2037		avdd-usb-supply = <&vdd_3v3_sys>;
2038		vclamp-usb-supply = <&vdd_1v8>;
2039		vddio-hsic-supply = <&gnd>;
2040
2041		pads {
2042			usb2 {
2043				status = "okay";
2044
2045				lanes {
2046					micro_b: usb2-0 {
2047						nvidia,function = "xusb";
2048						status = "okay";
2049					};
2050
2051					usb2-1 {
2052						nvidia,function = "xusb";
2053						status = "okay";
2054					};
2055
2056					usb2-2 {
2057						nvidia,function = "xusb";
2058						status = "okay";
2059					};
2060				};
2061			};
2062
2063			usb3 {
2064				status = "okay";
2065
2066				lanes {
2067					usb3-0 {
2068						nvidia,function = "xusb";
2069						status = "okay";
2070					};
2071
2072					usb3-1 {
2073						nvidia,function = "xusb";
2074						status = "okay";
2075					};
2076
2077					usb3-2 {
2078						nvidia,function = "xusb";
2079						status = "okay";
2080					};
2081				};
2082			};
2083		};
2084
2085		ports {
2086			usb2-0 {
2087				status = "okay";
2088				mode = "otg";
2089				vbus-supply = <&vdd_usb0>;
2090				usb-role-switch;
2091
2092				connector {
2093					compatible = "gpio-usb-b-connector",
2094						     "usb-b-connector";
2095					label = "micro-USB";
2096					type = "micro";
2097					vbus-gpios = <&gpio
2098						      TEGRA186_MAIN_GPIO(X, 7)
2099						      GPIO_ACTIVE_LOW>;
2100					id-gpios = <&pmic 0 GPIO_ACTIVE_HIGH>;
2101				};
2102			};
2103
2104			usb2-1 {
2105				status = "okay";
2106				mode = "host";
2107
2108				vbus-supply = <&vdd_usb1>;
2109			};
2110
2111			usb3-0 {
2112				nvidia,usb2-companion = <1>;
2113				vbus-supply = <&vdd_usb1>;
2114				status = "okay";
2115			};
2116		};
2117	};
2118
2119	usb@3530000 {
2120		status = "okay";
2121
2122		phys = <&{/padctl@3520000/pads/usb2/lanes/usb2-0}>,
2123		       <&{/padctl@3520000/pads/usb2/lanes/usb2-1}>,
2124		       <&{/padctl@3520000/pads/usb3/lanes/usb3-0}>;
2125		phy-names = "usb2-0", "usb2-1", "usb3-0";
2126	};
2127
2128	usb@3550000 {
2129		status = "okay";
2130
2131		phys = <&micro_b>;
2132		phy-names = "usb2-0";
2133	};
2134
2135	i2c@c250000 {
2136		/* carrier board ID EEPROM */
2137		eeprom@57 {
2138			compatible = "atmel,24c02";
2139			reg = <0x57>;
2140
2141			label = "system";
2142			vcc-supply = <&vdd_1v8>;
2143			address-width = <8>;
2144			pagesize = <8>;
2145			size = <256>;
2146			read-only;
2147		};
2148	};
2149
2150	pcie@10003000 {
2151		status = "okay";
2152
2153		dvdd-pex-supply = <&vdd_pex>;
2154		hvdd-pex-pll-supply = <&vdd_1v8>;
2155		hvdd-pex-supply = <&vdd_1v8>;
2156		vddio-pexctl-aud-supply = <&vdd_1v8>;
2157
2158		pci@1,0 {
2159			nvidia,num-lanes = <4>;
2160			status = "okay";
2161		};
2162
2163		pci@2,0 {
2164			nvidia,num-lanes = <0>;
2165			status = "disabled";
2166		};
2167
2168		pci@3,0 {
2169			nvidia,num-lanes = <1>;
2170			status = "disabled";
2171		};
2172	};
2173
2174	host1x@13e00000 {
2175		status = "okay";
2176
2177		dpaux@15040000 {
2178			status = "okay";
2179		};
2180
2181		display-hub@15200000 {
2182			status = "okay";
2183		};
2184
2185		dsi@15300000 {
2186			status = "disabled";
2187		};
2188
2189		/* DP on E3320 */
2190		sor@15540000 {
2191			status = "okay";
2192
2193			avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>;
2194			vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>;
2195
2196			nvidia,dpaux = <&dpaux>;
2197		};
2198
2199		sor@15580000 {
2200			status = "okay";
2201
2202			avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>;
2203			vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>;
2204			hdmi-supply = <&vdd_hdmi>;
2205
2206			nvidia,ddc-i2c-bus = <&ddc>;
2207			nvidia,hpd-gpio = <&gpio TEGRA186_MAIN_GPIO(P, 1)
2208						 GPIO_ACTIVE_LOW>;
2209		};
2210
2211		dpaux@155c0000 {
2212			status = "okay";
2213		};
2214	};
2215
2216	sata@3507000 {
2217		status = "okay";
2218	};
2219
2220	gpio-keys {
2221		compatible = "gpio-keys";
2222
2223		power {
2224			label = "Power";
2225			gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 0)
2226					   GPIO_ACTIVE_LOW>;
2227			linux,input-type = <EV_KEY>;
2228			linux,code = <KEY_POWER>;
2229			debounce-interval = <10>;
2230			wakeup-event-action = <EV_ACT_ASSERTED>;
2231			wakeup-source;
2232		};
2233
2234		volume-up {
2235			label = "Volume Up";
2236			gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 1)
2237					   GPIO_ACTIVE_LOW>;
2238			linux,input-type = <EV_KEY>;
2239			linux,code = <KEY_VOLUMEUP>;
2240			debounce-interval = <10>;
2241		};
2242
2243		volume-down {
2244			label = "Volume Down";
2245			gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 2)
2246					   GPIO_ACTIVE_LOW>;
2247			linux,input-type = <EV_KEY>;
2248			linux,code = <KEY_VOLUMEDOWN>;
2249			debounce-interval = <10>;
2250		};
2251	};
2252
2253	vdd_sd: regulator@100 {
2254		compatible = "regulator-fixed";
2255		regulator-name = "SD_CARD_SW_PWR";
2256		regulator-min-microvolt = <3300000>;
2257		regulator-max-microvolt = <3300000>;
2258
2259		gpio = <&gpio TEGRA186_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>;
2260		enable-active-high;
2261
2262		vin-supply = <&vdd_3v3_sys>;
2263	};
2264
2265	vdd_hdmi: regulator@101 {
2266		compatible = "regulator-fixed";
2267		regulator-name = "VDD_HDMI_5V0";
2268		regulator-min-microvolt = <5000000>;
2269		regulator-max-microvolt = <5000000>;
2270
2271		gpio = <&exp1 14 GPIO_ACTIVE_HIGH>;
2272		enable-active-high;
2273
2274		vin-supply = <&vdd_5v0_sys>;
2275	};
2276
2277	vdd_usb0: regulator@102 {
2278		compatible = "regulator-fixed";
2279		regulator-name = "VDD_USB0";
2280		regulator-min-microvolt = <5000000>;
2281		regulator-max-microvolt = <5000000>;
2282
2283		gpio = <&gpio TEGRA186_MAIN_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
2284		enable-active-high;
2285
2286		vin-supply = <&vdd_5v0_sys>;
2287	};
2288
2289	vdd_usb1: regulator@103 {
2290		compatible = "regulator-fixed";
2291		regulator-name = "VDD_USB1";
2292		regulator-min-microvolt = <5000000>;
2293		regulator-max-microvolt = <5000000>;
2294
2295		gpio = <&gpio TEGRA186_MAIN_GPIO(L, 5) GPIO_ACTIVE_HIGH>;
2296		enable-active-high;
2297
2298		vin-supply = <&vdd_5v0_sys>;
2299	};
2300
2301	sound {
2302		compatible = "nvidia,tegra186-audio-graph-card";
2303		status = "okay";
2304
2305		dais = /* FE */
2306		       <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
2307		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>,
2308		       <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>,
2309		       <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
2310		       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>,
2311		       /* Router */
2312		       <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>,
2313		       <&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_i2s6_port>,
2314		       <&xbar_dmic1_port>, <&xbar_dmic2_port>, <&xbar_dmic3_port>,
2315		       <&xbar_dspk1_port>, <&xbar_dspk2_port>,
2316		       <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
2317		       <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,
2318		       <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,
2319		       <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
2320		       <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
2321		       <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
2322		       <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
2323		       <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
2324		       <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
2325		       <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
2326		       <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,
2327		       <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
2328		       <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,
2329		       <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
2330		       <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
2331		       <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
2332		       <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
2333		       <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,
2334		       /* HW accelerators */
2335		       <&sfc1_out_port>, <&sfc2_out_port>,
2336		       <&sfc3_out_port>, <&sfc4_out_port>,
2337		       <&mvc1_out_port>, <&mvc2_out_port>,
2338		       <&amx1_out_port>, <&amx2_out_port>,
2339		       <&amx3_out_port>, <&amx4_out_port>,
2340		       <&adx1_out1_port>, <&adx1_out2_port>,
2341		       <&adx1_out3_port>, <&adx1_out4_port>,
2342		       <&adx2_out1_port>, <&adx2_out2_port>,
2343		       <&adx2_out3_port>, <&adx2_out4_port>,
2344		       <&adx3_out1_port>, <&adx3_out2_port>,
2345		       <&adx3_out3_port>, <&adx3_out4_port>,
2346		       <&adx4_out1_port>, <&adx4_out2_port>,
2347		       <&adx4_out3_port>, <&adx4_out4_port>,
2348		       <&mixer_out1_port>, <&mixer_out2_port>,
2349		       <&mixer_out3_port>, <&mixer_out4_port>,
2350		       <&mixer_out5_port>,
2351		       /* I/O */
2352		       <&i2s1_port>, <&i2s2_port>, <&i2s3_port>, <&i2s4_port>,
2353		       <&i2s5_port>, <&i2s6_port>, <&dmic1_port>, <&dmic2_port>,
2354		       <&dmic3_port>, <&dspk1_port>, <&dspk2_port>;
2355
2356		label = "NVIDIA Jetson TX2 APE";
2357	};
2358};
2359