199575bceSJoseph Lo/dts-v1/; 299575bceSJoseph Lo 359686a92SThierry Reding#include <dt-bindings/input/linux-event-codes.h> 459686a92SThierry Reding 599575bceSJoseph Lo#include "tegra186-p3310.dtsi" 699575bceSJoseph Lo 799575bceSJoseph Lo/ { 899575bceSJoseph Lo model = "NVIDIA Tegra186 P2771-0000 Development Board"; 999575bceSJoseph Lo compatible = "nvidia,p2771-0000", "nvidia,tegra186"; 10b0ddea85SThierry Reding 11b693b3d7SThierry Reding i2c@3160000 { 12b693b3d7SThierry Reding power-monitor@42 { 13b693b3d7SThierry Reding compatible = "ti,ina3221"; 14b693b3d7SThierry Reding reg = <0x42>; 15b693b3d7SThierry Reding }; 16b693b3d7SThierry Reding 17b693b3d7SThierry Reding power-monitor@43 { 18b693b3d7SThierry Reding compatible = "ti,ina3221"; 19b693b3d7SThierry Reding reg = <0x43>; 20b693b3d7SThierry Reding }; 21b27d5250SThierry Reding 22b27d5250SThierry Reding exp1: gpio@74 { 23b27d5250SThierry Reding compatible = "ti,tca9539"; 24b27d5250SThierry Reding reg = <0x74>; 25b27d5250SThierry Reding 26b27d5250SThierry Reding interrupt-parent = <&gpio>; 27b27d5250SThierry Reding interrupts = <TEGRA_MAIN_GPIO(Y, 0) GPIO_ACTIVE_LOW>; 28b27d5250SThierry Reding 29b27d5250SThierry Reding #gpio-cells = <2>; 30b27d5250SThierry Reding gpio-controller; 31b27d5250SThierry Reding }; 32b27d5250SThierry Reding 33b27d5250SThierry Reding exp2: gpio@77 { 34b27d5250SThierry Reding compatible = "ti,tca9539"; 35b27d5250SThierry Reding reg = <0x77>; 36b27d5250SThierry Reding 37b27d5250SThierry Reding interrupt-parent = <&gpio>; 38b27d5250SThierry Reding interrupts = <TEGRA_MAIN_GPIO(Y, 6) GPIO_ACTIVE_LOW>; 39b27d5250SThierry Reding 40b27d5250SThierry Reding #gpio-cells = <2>; 41b27d5250SThierry Reding gpio-controller; 42b27d5250SThierry Reding }; 43b693b3d7SThierry Reding }; 44b693b3d7SThierry Reding 45b0ddea85SThierry Reding /* SDMMC1 (SD/MMC) */ 46b0ddea85SThierry Reding sdhci@3400000 { 47b0ddea85SThierry Reding status = "okay"; 48b0ddea85SThierry Reding 49b0ddea85SThierry Reding vmmc-supply = <&vdd_sd>; 50b0ddea85SThierry Reding }; 51b0ddea85SThierry Reding 5259686a92SThierry Reding gpio-keys { 5359686a92SThierry Reding compatible = "gpio-keys"; 5459686a92SThierry Reding 5559686a92SThierry Reding power { 5659686a92SThierry Reding label = "Power"; 5759686a92SThierry Reding gpios = <&gpio_aon TEGRA_AON_GPIO(FF, 0) 5859686a92SThierry Reding GPIO_ACTIVE_LOW>; 5959686a92SThierry Reding linux,input-type = <EV_KEY>; 6059686a92SThierry Reding linux,code = <KEY_POWER>; 6159686a92SThierry Reding debounce-interval = <10>; 6259686a92SThierry Reding wakeup-source; 6359686a92SThierry Reding }; 6459686a92SThierry Reding 6559686a92SThierry Reding volume-up { 6659686a92SThierry Reding label = "Volume Up"; 6759686a92SThierry Reding gpios = <&gpio_aon TEGRA_AON_GPIO(FF, 1) 6859686a92SThierry Reding GPIO_ACTIVE_LOW>; 6959686a92SThierry Reding linux,input-type = <EV_KEY>; 7059686a92SThierry Reding linux,code = <KEY_VOLUMEUP>; 7159686a92SThierry Reding debounce-interval = <10>; 7259686a92SThierry Reding }; 7359686a92SThierry Reding 7459686a92SThierry Reding volume-down { 7559686a92SThierry Reding label = "Volume Down"; 7659686a92SThierry Reding gpios = <&gpio_aon TEGRA_AON_GPIO(FF, 2) 7759686a92SThierry Reding GPIO_ACTIVE_LOW>; 7859686a92SThierry Reding linux,input-type = <EV_KEY>; 7959686a92SThierry Reding linux,code = <KEY_VOLUMEDOWN>; 8059686a92SThierry Reding debounce-interval = <10>; 8159686a92SThierry Reding }; 8259686a92SThierry Reding }; 8359686a92SThierry Reding 84b0ddea85SThierry Reding regulators { 85b0ddea85SThierry Reding vdd_sd: regulator@100 { 86b0ddea85SThierry Reding compatible = "regulator-fixed"; 87b0ddea85SThierry Reding reg = <100>; 88b0ddea85SThierry Reding 89b0ddea85SThierry Reding regulator-name = "SD_CARD_SW_PWR"; 90b0ddea85SThierry Reding regulator-min-microvolt = <3300000>; 91b0ddea85SThierry Reding regulator-max-microvolt = <3300000>; 92b0ddea85SThierry Reding 93b0ddea85SThierry Reding gpio = <&gpio TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>; 94b0ddea85SThierry Reding enable-active-high; 95b0ddea85SThierry Reding 96b0ddea85SThierry Reding vin-supply = <&vdd_3v3_sys>; 97b0ddea85SThierry Reding }; 98b0ddea85SThierry Reding }; 9999575bceSJoseph Lo}; 100