1b2441318SGreg Kroah-Hartman// SPDX-License-Identifier: GPL-2.0 299575bceSJoseph Lo/dts-v1/; 399575bceSJoseph Lo 459686a92SThierry Reding#include <dt-bindings/input/linux-event-codes.h> 559686a92SThierry Reding 699575bceSJoseph Lo#include "tegra186-p3310.dtsi" 799575bceSJoseph Lo 899575bceSJoseph Lo/ { 999575bceSJoseph Lo model = "NVIDIA Tegra186 P2771-0000 Development Board"; 1099575bceSJoseph Lo compatible = "nvidia,p2771-0000", "nvidia,tegra186"; 11b0ddea85SThierry Reding 12b693b3d7SThierry Reding i2c@3160000 { 13b693b3d7SThierry Reding power-monitor@42 { 14b693b3d7SThierry Reding compatible = "ti,ina3221"; 15b693b3d7SThierry Reding reg = <0x42>; 16b693b3d7SThierry Reding }; 17b693b3d7SThierry Reding 18b693b3d7SThierry Reding power-monitor@43 { 19b693b3d7SThierry Reding compatible = "ti,ina3221"; 20b693b3d7SThierry Reding reg = <0x43>; 21b693b3d7SThierry Reding }; 22b27d5250SThierry Reding 23b27d5250SThierry Reding exp1: gpio@74 { 24b27d5250SThierry Reding compatible = "ti,tca9539"; 25b27d5250SThierry Reding reg = <0x74>; 26b27d5250SThierry Reding 27b27d5250SThierry Reding interrupt-parent = <&gpio>; 28b27d5250SThierry Reding interrupts = <TEGRA_MAIN_GPIO(Y, 0) GPIO_ACTIVE_LOW>; 29b27d5250SThierry Reding 30b27d5250SThierry Reding #gpio-cells = <2>; 31b27d5250SThierry Reding gpio-controller; 32b27d5250SThierry Reding }; 33b27d5250SThierry Reding 34b27d5250SThierry Reding exp2: gpio@77 { 35b27d5250SThierry Reding compatible = "ti,tca9539"; 36b27d5250SThierry Reding reg = <0x77>; 37b27d5250SThierry Reding 38b27d5250SThierry Reding interrupt-parent = <&gpio>; 39b27d5250SThierry Reding interrupts = <TEGRA_MAIN_GPIO(Y, 6) GPIO_ACTIVE_LOW>; 40b27d5250SThierry Reding 41b27d5250SThierry Reding #gpio-cells = <2>; 42b27d5250SThierry Reding gpio-controller; 43b27d5250SThierry Reding }; 44b693b3d7SThierry Reding }; 45b693b3d7SThierry Reding 46b0ddea85SThierry Reding /* SDMMC1 (SD/MMC) */ 47b0ddea85SThierry Reding sdhci@3400000 { 48b0ddea85SThierry Reding status = "okay"; 49b0ddea85SThierry Reding 50b0ddea85SThierry Reding vmmc-supply = <&vdd_sd>; 51b0ddea85SThierry Reding }; 52b0ddea85SThierry Reding 5389b469ccSManikanta Maddireddy pcie@10003000 { 5489b469ccSManikanta Maddireddy status = "okay"; 5589b469ccSManikanta Maddireddy 5689b469ccSManikanta Maddireddy dvdd-pex-supply = <&vdd_pex>; 5789b469ccSManikanta Maddireddy hvdd-pex-pll-supply = <&vdd_1v8>; 5889b469ccSManikanta Maddireddy hvdd-pex-supply = <&vdd_1v8>; 5989b469ccSManikanta Maddireddy vddio-pexctl-aud-supply = <&vdd_1v8>; 6089b469ccSManikanta Maddireddy 6189b469ccSManikanta Maddireddy pci@1,0 { 6289b469ccSManikanta Maddireddy nvidia,num-lanes = <4>; 6389b469ccSManikanta Maddireddy status = "okay"; 6489b469ccSManikanta Maddireddy }; 6589b469ccSManikanta Maddireddy 6689b469ccSManikanta Maddireddy pci@2,0 { 6789b469ccSManikanta Maddireddy nvidia,num-lanes = <0>; 6889b469ccSManikanta Maddireddy status = "disabled"; 6989b469ccSManikanta Maddireddy }; 7089b469ccSManikanta Maddireddy 7189b469ccSManikanta Maddireddy pci@3,0 { 7289b469ccSManikanta Maddireddy nvidia,num-lanes = <1>; 7389b469ccSManikanta Maddireddy status = "disabled"; 7489b469ccSManikanta Maddireddy }; 7589b469ccSManikanta Maddireddy }; 7689b469ccSManikanta Maddireddy 7736328505SThierry Reding host1x@13e00000 { 7836328505SThierry Reding status = "okay"; 7936328505SThierry Reding 8036328505SThierry Reding dpaux@15040000 { 8136328505SThierry Reding status = "okay"; 8236328505SThierry Reding }; 8336328505SThierry Reding 8436328505SThierry Reding display-hub@15200000 { 8536328505SThierry Reding status = "okay"; 8636328505SThierry Reding }; 8736328505SThierry Reding 8836328505SThierry Reding dsi@15300000 { 8936328505SThierry Reding status = "disabled"; 9036328505SThierry Reding }; 9136328505SThierry Reding 9236328505SThierry Reding sor@15540000 { 9336328505SThierry Reding status = "disabled"; 9436328505SThierry Reding 9536328505SThierry Reding nvidia,dpaux = <&dpaux1>; 9636328505SThierry Reding }; 9736328505SThierry Reding 9836328505SThierry Reding sor@15580000 { 9936328505SThierry Reding status = "okay"; 10036328505SThierry Reding 10136328505SThierry Reding avdd-io-supply = <&vdd_hdmi_1v05>; 10236328505SThierry Reding vdd-pll-supply = <&vdd_1v8_ap>; 10336328505SThierry Reding hdmi-supply = <&vdd_hdmi>; 10436328505SThierry Reding 10536328505SThierry Reding nvidia,ddc-i2c-bus = <&ddc>; 10636328505SThierry Reding nvidia,hpd-gpio = <&gpio TEGRA_MAIN_GPIO(P, 1) GPIO_ACTIVE_LOW>; 10736328505SThierry Reding }; 10836328505SThierry Reding 10936328505SThierry Reding dpaux@155c0000 { 11036328505SThierry Reding status = "okay"; 11136328505SThierry Reding }; 11236328505SThierry Reding }; 11336328505SThierry Reding 11459686a92SThierry Reding gpio-keys { 11559686a92SThierry Reding compatible = "gpio-keys"; 11659686a92SThierry Reding 11759686a92SThierry Reding power { 11859686a92SThierry Reding label = "Power"; 11959686a92SThierry Reding gpios = <&gpio_aon TEGRA_AON_GPIO(FF, 0) 12059686a92SThierry Reding GPIO_ACTIVE_LOW>; 12159686a92SThierry Reding linux,input-type = <EV_KEY>; 12259686a92SThierry Reding linux,code = <KEY_POWER>; 12359686a92SThierry Reding debounce-interval = <10>; 12459686a92SThierry Reding wakeup-source; 12559686a92SThierry Reding }; 12659686a92SThierry Reding 12759686a92SThierry Reding volume-up { 12859686a92SThierry Reding label = "Volume Up"; 12959686a92SThierry Reding gpios = <&gpio_aon TEGRA_AON_GPIO(FF, 1) 13059686a92SThierry Reding GPIO_ACTIVE_LOW>; 13159686a92SThierry Reding linux,input-type = <EV_KEY>; 13259686a92SThierry Reding linux,code = <KEY_VOLUMEUP>; 13359686a92SThierry Reding debounce-interval = <10>; 13459686a92SThierry Reding }; 13559686a92SThierry Reding 13659686a92SThierry Reding volume-down { 13759686a92SThierry Reding label = "Volume Down"; 13859686a92SThierry Reding gpios = <&gpio_aon TEGRA_AON_GPIO(FF, 2) 13959686a92SThierry Reding GPIO_ACTIVE_LOW>; 14059686a92SThierry Reding linux,input-type = <EV_KEY>; 14159686a92SThierry Reding linux,code = <KEY_VOLUMEDOWN>; 14259686a92SThierry Reding debounce-interval = <10>; 14359686a92SThierry Reding }; 14459686a92SThierry Reding }; 14559686a92SThierry Reding 146b0ddea85SThierry Reding regulators { 147b0ddea85SThierry Reding vdd_sd: regulator@100 { 148b0ddea85SThierry Reding compatible = "regulator-fixed"; 149b0ddea85SThierry Reding reg = <100>; 150b0ddea85SThierry Reding 151b0ddea85SThierry Reding regulator-name = "SD_CARD_SW_PWR"; 152b0ddea85SThierry Reding regulator-min-microvolt = <3300000>; 153b0ddea85SThierry Reding regulator-max-microvolt = <3300000>; 154b0ddea85SThierry Reding 155b0ddea85SThierry Reding gpio = <&gpio TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>; 156b0ddea85SThierry Reding enable-active-high; 157b0ddea85SThierry Reding 158b0ddea85SThierry Reding vin-supply = <&vdd_3v3_sys>; 159b0ddea85SThierry Reding }; 16036328505SThierry Reding 16136328505SThierry Reding vdd_hdmi: regulator@101 { 16236328505SThierry Reding compatible = "regulator-fixed"; 16336328505SThierry Reding reg = <101>; 16436328505SThierry Reding 16536328505SThierry Reding regulator-name = "VDD_HDMI_5V0"; 16636328505SThierry Reding regulator-min-microvolt = <5000000>; 16736328505SThierry Reding regulator-max-microvolt = <5000000>; 16836328505SThierry Reding 16936328505SThierry Reding gpio = <&exp1 14 GPIO_ACTIVE_HIGH>; 17036328505SThierry Reding enable-active-high; 17136328505SThierry Reding 17236328505SThierry Reding vin-supply = <&vdd_5v0_sys>; 17336328505SThierry Reding }; 174b0ddea85SThierry Reding }; 17599575bceSJoseph Lo}; 176