1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2021-2022 BayLibre, SAS. 4 * Authors: 5 * Fabien Parent <fparent@baylibre.com> 6 * Bernhard Rosenkränzer <bero@baylibre.com> 7 */ 8 9/dts-v1/; 10 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/input/input.h> 13#include <dt-bindings/pinctrl/mt8365-pinfunc.h> 14#include "mt8365.dtsi" 15 16/ { 17 model = "MediaTek MT8365 Open Platform EVK"; 18 compatible = "mediatek,mt8365-evk", "mediatek,mt8365"; 19 20 aliases { 21 serial0 = &uart0; 22 }; 23 24 chosen { 25 stdout-path = "serial0:921600n8"; 26 }; 27 28 firmware { 29 optee { 30 compatible = "linaro,optee-tz"; 31 method = "smc"; 32 }; 33 }; 34 35 gpio-keys { 36 compatible = "gpio-keys"; 37 pinctrl-names = "default"; 38 pinctrl-0 = <&gpio_keys>; 39 40 key-volume-up { 41 gpios = <&pio 24 GPIO_ACTIVE_LOW>; 42 label = "volume_up"; 43 linux,code = <KEY_VOLUMEUP>; 44 wakeup-source; 45 debounce-interval = <15>; 46 }; 47 }; 48 49 memory@40000000 { 50 device_type = "memory"; 51 reg = <0 0x40000000 0 0xc0000000>; 52 }; 53 54 usb_otg_vbus: regulator-0 { 55 compatible = "regulator-fixed"; 56 regulator-name = "otg_vbus"; 57 regulator-min-microvolt = <5000000>; 58 regulator-max-microvolt = <5000000>; 59 gpio = <&pio 16 GPIO_ACTIVE_HIGH>; 60 enable-active-high; 61 }; 62 63 reserved-memory { 64 #address-cells = <2>; 65 #size-cells = <2>; 66 ranges; 67 68 /* 128 KiB reserved for ARM Trusted Firmware (BL31) */ 69 bl31_secmon_reserved: secmon@43000000 { 70 no-map; 71 reg = <0 0x43000000 0 0x20000>; 72 }; 73 74 /* 12 MiB reserved for OP-TEE (BL32) 75 * +-----------------------+ 0x43e0_0000 76 * | SHMEM 2MiB | 77 * +-----------------------+ 0x43c0_0000 78 * | | TA_RAM 8MiB | 79 * + TZDRAM +--------------+ 0x4340_0000 80 * | | TEE_RAM 2MiB | 81 * +-----------------------+ 0x4320_0000 82 */ 83 optee_reserved: optee@43200000 { 84 no-map; 85 reg = <0 0x43200000 0 0x00c00000>; 86 }; 87 }; 88}; 89 90&pio { 91 gpio_keys: gpio-keys-pins { 92 pins { 93 pinmux = <MT8365_PIN_24_KPCOL0__FUNC_KPCOL0>; 94 bias-pull-up; 95 input-enable; 96 }; 97 }; 98 99 uart0_pins: uart0-pins { 100 pins { 101 pinmux = <MT8365_PIN_35_URXD0__FUNC_URXD0>, 102 <MT8365_PIN_36_UTXD0__FUNC_UTXD0>; 103 }; 104 }; 105 106 uart1_pins: uart1-pins { 107 pins { 108 pinmux = <MT8365_PIN_37_URXD1__FUNC_URXD1>, 109 <MT8365_PIN_38_UTXD1__FUNC_UTXD1>; 110 }; 111 }; 112 113 uart2_pins: uart2-pins { 114 pins { 115 pinmux = <MT8365_PIN_39_URXD2__FUNC_URXD2>, 116 <MT8365_PIN_40_UTXD2__FUNC_UTXD2>; 117 }; 118 }; 119 120 usb_pins: usb-pins { 121 id-pins { 122 pinmux = <MT8365_PIN_17_GPIO17__FUNC_GPIO17>; 123 input-enable; 124 bias-pull-up; 125 }; 126 127 usb0-vbus-pins { 128 pinmux = <MT8365_PIN_16_GPIO16__FUNC_USB_DRVVBUS>; 129 output-high; 130 }; 131 132 usb1-vbus-pins { 133 pinmux = <MT8365_PIN_18_GPIO18__FUNC_GPIO18>; 134 output-high; 135 }; 136 }; 137 138 pwm_pins: pwm-pins { 139 pins { 140 pinmux = <MT8365_PIN_19_DISP_PWM__FUNC_PWM_A>, 141 <MT8365_PIN_116_I2S_BCK__FUNC_PWM_C>; 142 }; 143 }; 144}; 145 146&pwm { 147 pinctrl-0 = <&pwm_pins>; 148 pinctrl-names = "default"; 149 status = "okay"; 150}; 151 152&uart0 { 153 pinctrl-0 = <&uart0_pins>; 154 pinctrl-names = "default"; 155 status = "okay"; 156}; 157 158&uart1 { 159 pinctrl-0 = <&uart1_pins>; 160 pinctrl-names = "default"; 161 status = "okay"; 162}; 163 164&uart2 { 165 pinctrl-0 = <&uart2_pins>; 166 pinctrl-names = "default"; 167 status = "okay"; 168}; 169