16ff94537SFabien Parent// SPDX-License-Identifier: GPL-2.0 26ff94537SFabien Parent/* 36ff94537SFabien Parent * Copyright (c) 2021-2022 BayLibre, SAS. 46ff94537SFabien Parent * Authors: 56ff94537SFabien Parent * Fabien Parent <fparent@baylibre.com> 66ff94537SFabien Parent * Bernhard Rosenkränzer <bero@baylibre.com> 76ff94537SFabien Parent */ 86ff94537SFabien Parent 96ff94537SFabien Parent/dts-v1/; 106ff94537SFabien Parent 116ff94537SFabien Parent#include <dt-bindings/gpio/gpio.h> 126ff94537SFabien Parent#include <dt-bindings/input/input.h> 136ff94537SFabien Parent#include <dt-bindings/pinctrl/mt8365-pinfunc.h> 146ff94537SFabien Parent#include "mt8365.dtsi" 1556e9f0f4SAlexandre Mergnat#include "mt6357.dtsi" 166ff94537SFabien Parent 176ff94537SFabien Parent/ { 186ff94537SFabien Parent model = "MediaTek MT8365 Open Platform EVK"; 196ff94537SFabien Parent compatible = "mediatek,mt8365-evk", "mediatek,mt8365"; 206ff94537SFabien Parent 216ff94537SFabien Parent aliases { 226ff94537SFabien Parent serial0 = &uart0; 236ff94537SFabien Parent }; 246ff94537SFabien Parent 256ff94537SFabien Parent chosen { 266ff94537SFabien Parent stdout-path = "serial0:921600n8"; 276ff94537SFabien Parent }; 286ff94537SFabien Parent 296ff94537SFabien Parent firmware { 306ff94537SFabien Parent optee { 316ff94537SFabien Parent compatible = "linaro,optee-tz"; 326ff94537SFabien Parent method = "smc"; 336ff94537SFabien Parent }; 346ff94537SFabien Parent }; 356ff94537SFabien Parent 366ff94537SFabien Parent gpio-keys { 376ff94537SFabien Parent compatible = "gpio-keys"; 386ff94537SFabien Parent pinctrl-names = "default"; 396ff94537SFabien Parent pinctrl-0 = <&gpio_keys>; 406ff94537SFabien Parent 416ff94537SFabien Parent key-volume-up { 426ff94537SFabien Parent gpios = <&pio 24 GPIO_ACTIVE_LOW>; 436ff94537SFabien Parent label = "volume_up"; 446ff94537SFabien Parent linux,code = <KEY_VOLUMEUP>; 456ff94537SFabien Parent wakeup-source; 466ff94537SFabien Parent debounce-interval = <15>; 476ff94537SFabien Parent }; 486ff94537SFabien Parent }; 496ff94537SFabien Parent 506ff94537SFabien Parent memory@40000000 { 516ff94537SFabien Parent device_type = "memory"; 526ff94537SFabien Parent reg = <0 0x40000000 0 0xc0000000>; 536ff94537SFabien Parent }; 546ff94537SFabien Parent 556ff94537SFabien Parent usb_otg_vbus: regulator-0 { 566ff94537SFabien Parent compatible = "regulator-fixed"; 576ff94537SFabien Parent regulator-name = "otg_vbus"; 586ff94537SFabien Parent regulator-min-microvolt = <5000000>; 596ff94537SFabien Parent regulator-max-microvolt = <5000000>; 606ff94537SFabien Parent gpio = <&pio 16 GPIO_ACTIVE_HIGH>; 616ff94537SFabien Parent enable-active-high; 626ff94537SFabien Parent }; 636ff94537SFabien Parent 646ff94537SFabien Parent reserved-memory { 656ff94537SFabien Parent #address-cells = <2>; 666ff94537SFabien Parent #size-cells = <2>; 676ff94537SFabien Parent ranges; 686ff94537SFabien Parent 692d98d0d2SAlexandre Bailon /* 192 KiB reserved for ARM Trusted Firmware (BL31) */ 706ff94537SFabien Parent bl31_secmon_reserved: secmon@43000000 { 716ff94537SFabien Parent no-map; 722d98d0d2SAlexandre Bailon reg = <0 0x43000000 0 0x30000>; 736ff94537SFabien Parent }; 746ff94537SFabien Parent 756ff94537SFabien Parent /* 12 MiB reserved for OP-TEE (BL32) 766ff94537SFabien Parent * +-----------------------+ 0x43e0_0000 776ff94537SFabien Parent * | SHMEM 2MiB | 786ff94537SFabien Parent * +-----------------------+ 0x43c0_0000 796ff94537SFabien Parent * | | TA_RAM 8MiB | 806ff94537SFabien Parent * + TZDRAM +--------------+ 0x4340_0000 816ff94537SFabien Parent * | | TEE_RAM 2MiB | 826ff94537SFabien Parent * +-----------------------+ 0x4320_0000 836ff94537SFabien Parent */ 846ff94537SFabien Parent optee_reserved: optee@43200000 { 856ff94537SFabien Parent no-map; 866ff94537SFabien Parent reg = <0 0x43200000 0 0x00c00000>; 876ff94537SFabien Parent }; 886ff94537SFabien Parent }; 896ff94537SFabien Parent}; 906ff94537SFabien Parent 91988eff65SAlexandre Mergnat&i2c0 { 92988eff65SAlexandre Mergnat clock-frequency = <100000>; 93988eff65SAlexandre Mergnat pinctrl-0 = <&i2c0_pins>; 94988eff65SAlexandre Mergnat pinctrl-names = "default"; 95988eff65SAlexandre Mergnat status = "okay"; 96988eff65SAlexandre Mergnat}; 97988eff65SAlexandre Mergnat 98*6e8270afSAlexandre Mergnat&mmc0 { 99*6e8270afSAlexandre Mergnat assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL>; 100*6e8270afSAlexandre Mergnat assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>; 101*6e8270afSAlexandre Mergnat bus-width = <8>; 102*6e8270afSAlexandre Mergnat cap-mmc-highspeed; 103*6e8270afSAlexandre Mergnat cap-mmc-hw-reset; 104*6e8270afSAlexandre Mergnat hs400-ds-delay = <0x12012>; 105*6e8270afSAlexandre Mergnat max-frequency = <200000000>; 106*6e8270afSAlexandre Mergnat mmc-hs200-1_8v; 107*6e8270afSAlexandre Mergnat mmc-hs400-1_8v; 108*6e8270afSAlexandre Mergnat no-sd; 109*6e8270afSAlexandre Mergnat no-sdio; 110*6e8270afSAlexandre Mergnat non-removable; 111*6e8270afSAlexandre Mergnat pinctrl-0 = <&mmc0_default_pins>; 112*6e8270afSAlexandre Mergnat pinctrl-1 = <&mmc0_uhs_pins>; 113*6e8270afSAlexandre Mergnat pinctrl-names = "default", "state_uhs"; 114*6e8270afSAlexandre Mergnat vmmc-supply = <&mt6357_vemc_reg>; 115*6e8270afSAlexandre Mergnat vqmmc-supply = <&mt6357_vio18_reg>; 116*6e8270afSAlexandre Mergnat status = "okay"; 117*6e8270afSAlexandre Mergnat}; 118*6e8270afSAlexandre Mergnat 119*6e8270afSAlexandre Mergnat&mmc1 { 120*6e8270afSAlexandre Mergnat bus-width = <4>; 121*6e8270afSAlexandre Mergnat cap-sd-highspeed; 122*6e8270afSAlexandre Mergnat cd-gpios = <&pio 76 GPIO_ACTIVE_LOW>; 123*6e8270afSAlexandre Mergnat max-frequency = <200000000>; 124*6e8270afSAlexandre Mergnat pinctrl-0 = <&mmc1_default_pins>; 125*6e8270afSAlexandre Mergnat pinctrl-1 = <&mmc1_uhs_pins>; 126*6e8270afSAlexandre Mergnat pinctrl-names = "default", "state_uhs"; 127*6e8270afSAlexandre Mergnat sd-uhs-sdr104; 128*6e8270afSAlexandre Mergnat sd-uhs-sdr50; 129*6e8270afSAlexandre Mergnat vmmc-supply = <&mt6357_vmch_reg>; 130*6e8270afSAlexandre Mergnat vqmmc-supply = <&mt6357_vmc_reg>; 131*6e8270afSAlexandre Mergnat status = "okay"; 132*6e8270afSAlexandre Mergnat}; 133*6e8270afSAlexandre Mergnat 13456e9f0f4SAlexandre Mergnat&mt6357_pmic { 13556e9f0f4SAlexandre Mergnat interrupts-extended = <&pio 145 IRQ_TYPE_LEVEL_HIGH>; 13656e9f0f4SAlexandre Mergnat interrupt-controller; 13756e9f0f4SAlexandre Mergnat #interrupt-cells = <2>; 13856e9f0f4SAlexandre Mergnat}; 13956e9f0f4SAlexandre Mergnat 1406ff94537SFabien Parent&pio { 1416ff94537SFabien Parent gpio_keys: gpio-keys-pins { 1426ff94537SFabien Parent pins { 1436ff94537SFabien Parent pinmux = <MT8365_PIN_24_KPCOL0__FUNC_KPCOL0>; 1446ff94537SFabien Parent bias-pull-up; 1456ff94537SFabien Parent input-enable; 1466ff94537SFabien Parent }; 1476ff94537SFabien Parent }; 1486ff94537SFabien Parent 149988eff65SAlexandre Mergnat i2c0_pins: i2c0-pins { 150988eff65SAlexandre Mergnat pins { 151988eff65SAlexandre Mergnat pinmux = <MT8365_PIN_57_SDA0__FUNC_SDA0_0>, 152988eff65SAlexandre Mergnat <MT8365_PIN_58_SCL0__FUNC_SCL0_0>; 153988eff65SAlexandre Mergnat bias-pull-up; 154988eff65SAlexandre Mergnat }; 155988eff65SAlexandre Mergnat }; 156988eff65SAlexandre Mergnat 157*6e8270afSAlexandre Mergnat mmc0_default_pins: mmc0-default-pins { 158*6e8270afSAlexandre Mergnat clk-pins { 159*6e8270afSAlexandre Mergnat pinmux = <MT8365_PIN_99_MSDC0_CLK__FUNC_MSDC0_CLK>; 160*6e8270afSAlexandre Mergnat bias-pull-down; 161*6e8270afSAlexandre Mergnat }; 162*6e8270afSAlexandre Mergnat 163*6e8270afSAlexandre Mergnat cmd-dat-pins { 164*6e8270afSAlexandre Mergnat pinmux = <MT8365_PIN_103_MSDC0_DAT0__FUNC_MSDC0_DAT0>, 165*6e8270afSAlexandre Mergnat <MT8365_PIN_102_MSDC0_DAT1__FUNC_MSDC0_DAT1>, 166*6e8270afSAlexandre Mergnat <MT8365_PIN_101_MSDC0_DAT2__FUNC_MSDC0_DAT2>, 167*6e8270afSAlexandre Mergnat <MT8365_PIN_100_MSDC0_DAT3__FUNC_MSDC0_DAT3>, 168*6e8270afSAlexandre Mergnat <MT8365_PIN_96_MSDC0_DAT4__FUNC_MSDC0_DAT4>, 169*6e8270afSAlexandre Mergnat <MT8365_PIN_95_MSDC0_DAT5__FUNC_MSDC0_DAT5>, 170*6e8270afSAlexandre Mergnat <MT8365_PIN_94_MSDC0_DAT6__FUNC_MSDC0_DAT6>, 171*6e8270afSAlexandre Mergnat <MT8365_PIN_93_MSDC0_DAT7__FUNC_MSDC0_DAT7>, 172*6e8270afSAlexandre Mergnat <MT8365_PIN_98_MSDC0_CMD__FUNC_MSDC0_CMD>; 173*6e8270afSAlexandre Mergnat input-enable; 174*6e8270afSAlexandre Mergnat bias-pull-up; 175*6e8270afSAlexandre Mergnat }; 176*6e8270afSAlexandre Mergnat 177*6e8270afSAlexandre Mergnat rst-pins { 178*6e8270afSAlexandre Mergnat pinmux = <MT8365_PIN_97_MSDC0_RSTB__FUNC_MSDC0_RSTB>; 179*6e8270afSAlexandre Mergnat bias-pull-up; 180*6e8270afSAlexandre Mergnat }; 181*6e8270afSAlexandre Mergnat }; 182*6e8270afSAlexandre Mergnat 183*6e8270afSAlexandre Mergnat mmc0_uhs_pins: mmc0-uhs-pins { 184*6e8270afSAlexandre Mergnat clk-pins { 185*6e8270afSAlexandre Mergnat pinmux = <MT8365_PIN_99_MSDC0_CLK__FUNC_MSDC0_CLK>; 186*6e8270afSAlexandre Mergnat drive-strength = <MTK_DRIVE_10mA>; 187*6e8270afSAlexandre Mergnat bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 188*6e8270afSAlexandre Mergnat }; 189*6e8270afSAlexandre Mergnat 190*6e8270afSAlexandre Mergnat cmd-dat-pins { 191*6e8270afSAlexandre Mergnat pinmux = <MT8365_PIN_103_MSDC0_DAT0__FUNC_MSDC0_DAT0>, 192*6e8270afSAlexandre Mergnat <MT8365_PIN_102_MSDC0_DAT1__FUNC_MSDC0_DAT1>, 193*6e8270afSAlexandre Mergnat <MT8365_PIN_101_MSDC0_DAT2__FUNC_MSDC0_DAT2>, 194*6e8270afSAlexandre Mergnat <MT8365_PIN_100_MSDC0_DAT3__FUNC_MSDC0_DAT3>, 195*6e8270afSAlexandre Mergnat <MT8365_PIN_96_MSDC0_DAT4__FUNC_MSDC0_DAT4>, 196*6e8270afSAlexandre Mergnat <MT8365_PIN_95_MSDC0_DAT5__FUNC_MSDC0_DAT5>, 197*6e8270afSAlexandre Mergnat <MT8365_PIN_94_MSDC0_DAT6__FUNC_MSDC0_DAT6>, 198*6e8270afSAlexandre Mergnat <MT8365_PIN_93_MSDC0_DAT7__FUNC_MSDC0_DAT7>, 199*6e8270afSAlexandre Mergnat <MT8365_PIN_98_MSDC0_CMD__FUNC_MSDC0_CMD>; 200*6e8270afSAlexandre Mergnat input-enable; 201*6e8270afSAlexandre Mergnat drive-strength = <MTK_DRIVE_10mA>; 202*6e8270afSAlexandre Mergnat bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 203*6e8270afSAlexandre Mergnat }; 204*6e8270afSAlexandre Mergnat 205*6e8270afSAlexandre Mergnat ds-pins { 206*6e8270afSAlexandre Mergnat pinmux = <MT8365_PIN_104_MSDC0_DSL__FUNC_MSDC0_DSL>; 207*6e8270afSAlexandre Mergnat drive-strength = <MTK_DRIVE_10mA>; 208*6e8270afSAlexandre Mergnat bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 209*6e8270afSAlexandre Mergnat }; 210*6e8270afSAlexandre Mergnat 211*6e8270afSAlexandre Mergnat rst-pins { 212*6e8270afSAlexandre Mergnat pinmux = <MT8365_PIN_97_MSDC0_RSTB__FUNC_MSDC0_RSTB>; 213*6e8270afSAlexandre Mergnat drive-strength = <MTK_DRIVE_10mA>; 214*6e8270afSAlexandre Mergnat bias-pull-up; 215*6e8270afSAlexandre Mergnat }; 216*6e8270afSAlexandre Mergnat }; 217*6e8270afSAlexandre Mergnat 218*6e8270afSAlexandre Mergnat mmc1_default_pins: mmc1-default-pins { 219*6e8270afSAlexandre Mergnat cd-pins { 220*6e8270afSAlexandre Mergnat pinmux = <MT8365_PIN_76_CMDAT8__FUNC_GPIO76>; 221*6e8270afSAlexandre Mergnat bias-pull-up; 222*6e8270afSAlexandre Mergnat }; 223*6e8270afSAlexandre Mergnat 224*6e8270afSAlexandre Mergnat clk-pins { 225*6e8270afSAlexandre Mergnat pinmux = <MT8365_PIN_88_MSDC1_CLK__FUNC_MSDC1_CLK>; 226*6e8270afSAlexandre Mergnat bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 227*6e8270afSAlexandre Mergnat }; 228*6e8270afSAlexandre Mergnat 229*6e8270afSAlexandre Mergnat cmd-dat-pins { 230*6e8270afSAlexandre Mergnat pinmux = <MT8365_PIN_89_MSDC1_DAT0__FUNC_MSDC1_DAT0>, 231*6e8270afSAlexandre Mergnat <MT8365_PIN_90_MSDC1_DAT1__FUNC_MSDC1_DAT1>, 232*6e8270afSAlexandre Mergnat <MT8365_PIN_91_MSDC1_DAT2__FUNC_MSDC1_DAT2>, 233*6e8270afSAlexandre Mergnat <MT8365_PIN_92_MSDC1_DAT3__FUNC_MSDC1_DAT3>, 234*6e8270afSAlexandre Mergnat <MT8365_PIN_87_MSDC1_CMD__FUNC_MSDC1_CMD>; 235*6e8270afSAlexandre Mergnat input-enable; 236*6e8270afSAlexandre Mergnat bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 237*6e8270afSAlexandre Mergnat }; 238*6e8270afSAlexandre Mergnat }; 239*6e8270afSAlexandre Mergnat 240*6e8270afSAlexandre Mergnat mmc1_uhs_pins: mmc1-uhs-pins { 241*6e8270afSAlexandre Mergnat clk-pins { 242*6e8270afSAlexandre Mergnat pinmux = <MT8365_PIN_88_MSDC1_CLK__FUNC_MSDC1_CLK>; 243*6e8270afSAlexandre Mergnat drive-strength = <MTK_DRIVE_8mA>; 244*6e8270afSAlexandre Mergnat bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 245*6e8270afSAlexandre Mergnat }; 246*6e8270afSAlexandre Mergnat 247*6e8270afSAlexandre Mergnat cmd-dat-pins { 248*6e8270afSAlexandre Mergnat pinmux = <MT8365_PIN_89_MSDC1_DAT0__FUNC_MSDC1_DAT0>, 249*6e8270afSAlexandre Mergnat <MT8365_PIN_90_MSDC1_DAT1__FUNC_MSDC1_DAT1>, 250*6e8270afSAlexandre Mergnat <MT8365_PIN_91_MSDC1_DAT2__FUNC_MSDC1_DAT2>, 251*6e8270afSAlexandre Mergnat <MT8365_PIN_92_MSDC1_DAT3__FUNC_MSDC1_DAT3>, 252*6e8270afSAlexandre Mergnat <MT8365_PIN_87_MSDC1_CMD__FUNC_MSDC1_CMD>; 253*6e8270afSAlexandre Mergnat input-enable; 254*6e8270afSAlexandre Mergnat drive-strength = <MTK_DRIVE_6mA>; 255*6e8270afSAlexandre Mergnat bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 256*6e8270afSAlexandre Mergnat }; 257*6e8270afSAlexandre Mergnat }; 258*6e8270afSAlexandre Mergnat 2596ff94537SFabien Parent uart0_pins: uart0-pins { 2606ff94537SFabien Parent pins { 2616ff94537SFabien Parent pinmux = <MT8365_PIN_35_URXD0__FUNC_URXD0>, 2626ff94537SFabien Parent <MT8365_PIN_36_UTXD0__FUNC_UTXD0>; 2636ff94537SFabien Parent }; 2646ff94537SFabien Parent }; 2656ff94537SFabien Parent 2666ff94537SFabien Parent uart1_pins: uart1-pins { 2676ff94537SFabien Parent pins { 2686ff94537SFabien Parent pinmux = <MT8365_PIN_37_URXD1__FUNC_URXD1>, 2696ff94537SFabien Parent <MT8365_PIN_38_UTXD1__FUNC_UTXD1>; 2706ff94537SFabien Parent }; 2716ff94537SFabien Parent }; 2726ff94537SFabien Parent 2736ff94537SFabien Parent uart2_pins: uart2-pins { 2746ff94537SFabien Parent pins { 2756ff94537SFabien Parent pinmux = <MT8365_PIN_39_URXD2__FUNC_URXD2>, 2766ff94537SFabien Parent <MT8365_PIN_40_UTXD2__FUNC_UTXD2>; 2776ff94537SFabien Parent }; 2786ff94537SFabien Parent }; 2796ff94537SFabien Parent 2806ff94537SFabien Parent usb_pins: usb-pins { 2816ff94537SFabien Parent id-pins { 2826ff94537SFabien Parent pinmux = <MT8365_PIN_17_GPIO17__FUNC_GPIO17>; 2836ff94537SFabien Parent input-enable; 2846ff94537SFabien Parent bias-pull-up; 2856ff94537SFabien Parent }; 2866ff94537SFabien Parent 2876ff94537SFabien Parent usb0-vbus-pins { 2886ff94537SFabien Parent pinmux = <MT8365_PIN_16_GPIO16__FUNC_USB_DRVVBUS>; 2896ff94537SFabien Parent output-high; 2906ff94537SFabien Parent }; 2916ff94537SFabien Parent 2926ff94537SFabien Parent usb1-vbus-pins { 2936ff94537SFabien Parent pinmux = <MT8365_PIN_18_GPIO18__FUNC_GPIO18>; 2946ff94537SFabien Parent output-high; 2956ff94537SFabien Parent }; 2966ff94537SFabien Parent }; 2976ff94537SFabien Parent 2986ff94537SFabien Parent pwm_pins: pwm-pins { 2996ff94537SFabien Parent pins { 3006ff94537SFabien Parent pinmux = <MT8365_PIN_19_DISP_PWM__FUNC_PWM_A>, 3016ff94537SFabien Parent <MT8365_PIN_116_I2S_BCK__FUNC_PWM_C>; 3026ff94537SFabien Parent }; 3036ff94537SFabien Parent }; 3046ff94537SFabien Parent}; 3056ff94537SFabien Parent 3066ff94537SFabien Parent&pwm { 3076ff94537SFabien Parent pinctrl-0 = <&pwm_pins>; 3086ff94537SFabien Parent pinctrl-names = "default"; 3096ff94537SFabien Parent status = "okay"; 3106ff94537SFabien Parent}; 3116ff94537SFabien Parent 3126ff94537SFabien Parent&uart0 { 3136ff94537SFabien Parent pinctrl-0 = <&uart0_pins>; 3146ff94537SFabien Parent pinctrl-names = "default"; 3156ff94537SFabien Parent status = "okay"; 3166ff94537SFabien Parent}; 3176ff94537SFabien Parent 3186ff94537SFabien Parent&uart1 { 3196ff94537SFabien Parent pinctrl-0 = <&uart1_pins>; 3206ff94537SFabien Parent pinctrl-names = "default"; 3216ff94537SFabien Parent status = "okay"; 3226ff94537SFabien Parent}; 3236ff94537SFabien Parent 3246ff94537SFabien Parent&uart2 { 3256ff94537SFabien Parent pinctrl-0 = <&uart2_pins>; 3266ff94537SFabien Parent pinctrl-names = "default"; 3276ff94537SFabien Parent status = "okay"; 3286ff94537SFabien Parent}; 329