16ff94537SFabien Parent// SPDX-License-Identifier: GPL-2.0
26ff94537SFabien Parent/*
36ff94537SFabien Parent * Copyright (c) 2021-2022 BayLibre, SAS.
46ff94537SFabien Parent * Authors:
56ff94537SFabien Parent * Fabien Parent <fparent@baylibre.com>
66ff94537SFabien Parent * Bernhard Rosenkränzer <bero@baylibre.com>
76ff94537SFabien Parent */
86ff94537SFabien Parent
96ff94537SFabien Parent/dts-v1/;
106ff94537SFabien Parent
116ff94537SFabien Parent#include <dt-bindings/gpio/gpio.h>
126ff94537SFabien Parent#include <dt-bindings/input/input.h>
136ff94537SFabien Parent#include <dt-bindings/pinctrl/mt8365-pinfunc.h>
146ff94537SFabien Parent#include "mt8365.dtsi"
156ff94537SFabien Parent
166ff94537SFabien Parent/ {
176ff94537SFabien Parent	model = "MediaTek MT8365 Open Platform EVK";
186ff94537SFabien Parent	compatible = "mediatek,mt8365-evk", "mediatek,mt8365";
196ff94537SFabien Parent
206ff94537SFabien Parent	aliases {
216ff94537SFabien Parent		serial0 = &uart0;
226ff94537SFabien Parent	};
236ff94537SFabien Parent
246ff94537SFabien Parent	chosen {
256ff94537SFabien Parent		stdout-path = "serial0:921600n8";
266ff94537SFabien Parent	};
276ff94537SFabien Parent
286ff94537SFabien Parent	firmware {
296ff94537SFabien Parent		optee {
306ff94537SFabien Parent			compatible = "linaro,optee-tz";
316ff94537SFabien Parent			method = "smc";
326ff94537SFabien Parent		};
336ff94537SFabien Parent	};
346ff94537SFabien Parent
356ff94537SFabien Parent	gpio-keys {
366ff94537SFabien Parent		compatible = "gpio-keys";
376ff94537SFabien Parent		pinctrl-names = "default";
386ff94537SFabien Parent		pinctrl-0 = <&gpio_keys>;
396ff94537SFabien Parent
406ff94537SFabien Parent		key-volume-up {
416ff94537SFabien Parent			gpios = <&pio 24 GPIO_ACTIVE_LOW>;
426ff94537SFabien Parent			label = "volume_up";
436ff94537SFabien Parent			linux,code = <KEY_VOLUMEUP>;
446ff94537SFabien Parent			wakeup-source;
456ff94537SFabien Parent			debounce-interval = <15>;
466ff94537SFabien Parent		};
476ff94537SFabien Parent	};
486ff94537SFabien Parent
496ff94537SFabien Parent	memory@40000000 {
506ff94537SFabien Parent		device_type = "memory";
516ff94537SFabien Parent		reg = <0 0x40000000 0 0xc0000000>;
526ff94537SFabien Parent	};
536ff94537SFabien Parent
546ff94537SFabien Parent	usb_otg_vbus: regulator-0 {
556ff94537SFabien Parent		compatible = "regulator-fixed";
566ff94537SFabien Parent		regulator-name = "otg_vbus";
576ff94537SFabien Parent		regulator-min-microvolt = <5000000>;
586ff94537SFabien Parent		regulator-max-microvolt = <5000000>;
596ff94537SFabien Parent		gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
606ff94537SFabien Parent		enable-active-high;
616ff94537SFabien Parent	};
626ff94537SFabien Parent
636ff94537SFabien Parent	reserved-memory {
646ff94537SFabien Parent		#address-cells = <2>;
656ff94537SFabien Parent		#size-cells = <2>;
666ff94537SFabien Parent		ranges;
676ff94537SFabien Parent
68*2d98d0d2SAlexandre Bailon		/* 192 KiB reserved for ARM Trusted Firmware (BL31) */
696ff94537SFabien Parent		bl31_secmon_reserved: secmon@43000000 {
706ff94537SFabien Parent			no-map;
71*2d98d0d2SAlexandre Bailon			reg = <0 0x43000000 0 0x30000>;
726ff94537SFabien Parent		};
736ff94537SFabien Parent
746ff94537SFabien Parent		/* 12 MiB reserved for OP-TEE (BL32)
756ff94537SFabien Parent		 * +-----------------------+ 0x43e0_0000
766ff94537SFabien Parent		 * |      SHMEM 2MiB       |
776ff94537SFabien Parent		 * +-----------------------+ 0x43c0_0000
786ff94537SFabien Parent		 * |        | TA_RAM  8MiB |
796ff94537SFabien Parent		 * + TZDRAM +--------------+ 0x4340_0000
806ff94537SFabien Parent		 * |        | TEE_RAM 2MiB |
816ff94537SFabien Parent		 * +-----------------------+ 0x4320_0000
826ff94537SFabien Parent		 */
836ff94537SFabien Parent		optee_reserved: optee@43200000 {
846ff94537SFabien Parent			no-map;
856ff94537SFabien Parent			reg = <0 0x43200000 0 0x00c00000>;
866ff94537SFabien Parent		};
876ff94537SFabien Parent	};
886ff94537SFabien Parent};
896ff94537SFabien Parent
90988eff65SAlexandre Mergnat&i2c0 {
91988eff65SAlexandre Mergnat	clock-frequency = <100000>;
92988eff65SAlexandre Mergnat	pinctrl-0 = <&i2c0_pins>;
93988eff65SAlexandre Mergnat	pinctrl-names = "default";
94988eff65SAlexandre Mergnat	status = "okay";
95988eff65SAlexandre Mergnat};
96988eff65SAlexandre Mergnat
976ff94537SFabien Parent&pio {
986ff94537SFabien Parent	gpio_keys: gpio-keys-pins {
996ff94537SFabien Parent		pins {
1006ff94537SFabien Parent			pinmux = <MT8365_PIN_24_KPCOL0__FUNC_KPCOL0>;
1016ff94537SFabien Parent			bias-pull-up;
1026ff94537SFabien Parent			input-enable;
1036ff94537SFabien Parent		};
1046ff94537SFabien Parent	};
1056ff94537SFabien Parent
106988eff65SAlexandre Mergnat	i2c0_pins: i2c0-pins {
107988eff65SAlexandre Mergnat		pins {
108988eff65SAlexandre Mergnat			pinmux = <MT8365_PIN_57_SDA0__FUNC_SDA0_0>,
109988eff65SAlexandre Mergnat				 <MT8365_PIN_58_SCL0__FUNC_SCL0_0>;
110988eff65SAlexandre Mergnat			bias-pull-up;
111988eff65SAlexandre Mergnat		};
112988eff65SAlexandre Mergnat	};
113988eff65SAlexandre Mergnat
1146ff94537SFabien Parent	uart0_pins: uart0-pins {
1156ff94537SFabien Parent		pins {
1166ff94537SFabien Parent			pinmux = <MT8365_PIN_35_URXD0__FUNC_URXD0>,
1176ff94537SFabien Parent				 <MT8365_PIN_36_UTXD0__FUNC_UTXD0>;
1186ff94537SFabien Parent		};
1196ff94537SFabien Parent	};
1206ff94537SFabien Parent
1216ff94537SFabien Parent	uart1_pins: uart1-pins {
1226ff94537SFabien Parent		pins {
1236ff94537SFabien Parent			pinmux = <MT8365_PIN_37_URXD1__FUNC_URXD1>,
1246ff94537SFabien Parent				 <MT8365_PIN_38_UTXD1__FUNC_UTXD1>;
1256ff94537SFabien Parent		};
1266ff94537SFabien Parent	};
1276ff94537SFabien Parent
1286ff94537SFabien Parent	uart2_pins: uart2-pins {
1296ff94537SFabien Parent		pins {
1306ff94537SFabien Parent			pinmux = <MT8365_PIN_39_URXD2__FUNC_URXD2>,
1316ff94537SFabien Parent				 <MT8365_PIN_40_UTXD2__FUNC_UTXD2>;
1326ff94537SFabien Parent		};
1336ff94537SFabien Parent	};
1346ff94537SFabien Parent
1356ff94537SFabien Parent	usb_pins: usb-pins {
1366ff94537SFabien Parent		id-pins {
1376ff94537SFabien Parent			pinmux = <MT8365_PIN_17_GPIO17__FUNC_GPIO17>;
1386ff94537SFabien Parent			input-enable;
1396ff94537SFabien Parent			bias-pull-up;
1406ff94537SFabien Parent		};
1416ff94537SFabien Parent
1426ff94537SFabien Parent		usb0-vbus-pins {
1436ff94537SFabien Parent			pinmux = <MT8365_PIN_16_GPIO16__FUNC_USB_DRVVBUS>;
1446ff94537SFabien Parent			output-high;
1456ff94537SFabien Parent		};
1466ff94537SFabien Parent
1476ff94537SFabien Parent		usb1-vbus-pins {
1486ff94537SFabien Parent			pinmux = <MT8365_PIN_18_GPIO18__FUNC_GPIO18>;
1496ff94537SFabien Parent			output-high;
1506ff94537SFabien Parent		};
1516ff94537SFabien Parent	};
1526ff94537SFabien Parent
1536ff94537SFabien Parent	pwm_pins: pwm-pins {
1546ff94537SFabien Parent		pins {
1556ff94537SFabien Parent			pinmux = <MT8365_PIN_19_DISP_PWM__FUNC_PWM_A>,
1566ff94537SFabien Parent				 <MT8365_PIN_116_I2S_BCK__FUNC_PWM_C>;
1576ff94537SFabien Parent		};
1586ff94537SFabien Parent	};
1596ff94537SFabien Parent};
1606ff94537SFabien Parent
1616ff94537SFabien Parent&pwm {
1626ff94537SFabien Parent	pinctrl-0 = <&pwm_pins>;
1636ff94537SFabien Parent	pinctrl-names = "default";
1646ff94537SFabien Parent	status = "okay";
1656ff94537SFabien Parent};
1666ff94537SFabien Parent
1676ff94537SFabien Parent&uart0 {
1686ff94537SFabien Parent	pinctrl-0 = <&uart0_pins>;
1696ff94537SFabien Parent	pinctrl-names = "default";
1706ff94537SFabien Parent	status = "okay";
1716ff94537SFabien Parent};
1726ff94537SFabien Parent
1736ff94537SFabien Parent&uart1 {
1746ff94537SFabien Parent	pinctrl-0 = <&uart1_pins>;
1756ff94537SFabien Parent	pinctrl-names = "default";
1766ff94537SFabien Parent	status = "okay";
1776ff94537SFabien Parent};
1786ff94537SFabien Parent
1796ff94537SFabien Parent&uart2 {
1806ff94537SFabien Parent	pinctrl-0 = <&uart2_pins>;
1816ff94537SFabien Parent	pinctrl-names = "default";
1826ff94537SFabien Parent	status = "okay";
1836ff94537SFabien Parent};
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