1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright (C) 2020 MediaTek Inc. 4 * Author: Seiya Wang <seiya.wang@mediatek.com> 5 */ 6/dts-v1/; 7#include "mt8192.dtsi" 8#include "mt6359.dtsi" 9#include <dt-bindings/gpio/gpio.h> 10 11/ { 12 aliases { 13 serial0 = &uart0; 14 }; 15 16 chosen { 17 stdout-path = "serial0:115200n8"; 18 }; 19 20 memory@40000000 { 21 device_type = "memory"; 22 reg = <0 0x40000000 0 0x80000000>; 23 }; 24 25 /* system wide LDO 1.8V power rail */ 26 pp1800_ldo_g: regulator-1v8-g { 27 compatible = "regulator-fixed"; 28 regulator-name = "pp1800_ldo_g"; 29 regulator-always-on; 30 regulator-boot-on; 31 regulator-min-microvolt = <1800000>; 32 regulator-max-microvolt = <1800000>; 33 vin-supply = <&pp3300_g>; 34 }; 35 36 /* system wide switching 3.3V power rail */ 37 pp3300_g: regulator-3v3-g { 38 compatible = "regulator-fixed"; 39 regulator-name = "pp3300_g"; 40 regulator-always-on; 41 regulator-boot-on; 42 regulator-min-microvolt = <3300000>; 43 regulator-max-microvolt = <3300000>; 44 vin-supply = <&ppvar_sys>; 45 }; 46 47 /* system wide LDO 3.3V power rail */ 48 pp3300_ldo_z: regulator-3v3-z { 49 compatible = "regulator-fixed"; 50 regulator-name = "pp3300_ldo_z"; 51 regulator-always-on; 52 regulator-boot-on; 53 regulator-min-microvolt = <3300000>; 54 regulator-max-microvolt = <3300000>; 55 vin-supply = <&ppvar_sys>; 56 }; 57 58 /* separately switched 3.3V power rail */ 59 pp3300_u: regulator-3v3-u { 60 compatible = "regulator-fixed"; 61 regulator-name = "pp3300_u"; 62 regulator-always-on; 63 regulator-boot-on; 64 regulator-min-microvolt = <3300000>; 65 regulator-max-microvolt = <3300000>; 66 /* enable pin wired to GPIO controlled by EC */ 67 vin-supply = <&pp3300_g>; 68 }; 69 70 pp3300_wlan: regulator-3v3-wlan { 71 compatible = "regulator-fixed"; 72 regulator-name = "pp3300_wlan"; 73 regulator-always-on; 74 regulator-boot-on; 75 regulator-min-microvolt = <3300000>; 76 regulator-max-microvolt = <3300000>; 77 pinctrl-names = "default"; 78 pinctrl-0 = <&pp3300_wlan_pins>; 79 enable-active-high; 80 gpio = <&pio 143 GPIO_ACTIVE_HIGH>; 81 }; 82 83 /* system wide switching 5.0V power rail */ 84 pp5000_a: regulator-5v0-a { 85 compatible = "regulator-fixed"; 86 regulator-name = "pp5000_a"; 87 regulator-always-on; 88 regulator-boot-on; 89 regulator-min-microvolt = <5000000>; 90 regulator-max-microvolt = <5000000>; 91 vin-supply = <&ppvar_sys>; 92 }; 93 94 /* system wide semi-regulated power rail from battery or USB */ 95 ppvar_sys: regulator-var-sys { 96 compatible = "regulator-fixed"; 97 regulator-name = "ppvar_sys"; 98 regulator-always-on; 99 regulator-boot-on; 100 }; 101 102 reserved_memory: reserved-memory { 103 #address-cells = <2>; 104 #size-cells = <2>; 105 ranges; 106 107 wifi_restricted_dma_region: wifi@c0000000 { 108 compatible = "restricted-dma-pool"; 109 reg = <0 0xc0000000 0 0x4000000>; 110 }; 111 }; 112}; 113 114&i2c0 { 115 status = "okay"; 116 117 clock-frequency = <400000>; 118 pinctrl-names = "default"; 119 pinctrl-0 = <&i2c0_pins>; 120 121 touchscreen: touchscreen@10 { 122 reg = <0x10>; 123 interrupts-extended = <&pio 21 IRQ_TYPE_LEVEL_LOW>; 124 pinctrl-names = "default"; 125 pinctrl-0 = <&touchscreen_pins>; 126 }; 127}; 128 129&i2c1 { 130 status = "okay"; 131 132 clock-frequency = <400000>; 133 pinctrl-names = "default"; 134 pinctrl-0 = <&i2c1_pins>; 135}; 136 137&i2c2 { 138 status = "okay"; 139 140 clock-frequency = <400000>; 141 clock-stretch-ns = <12600>; 142 pinctrl-names = "default"; 143 pinctrl-0 = <&i2c2_pins>; 144 145 trackpad@15 { 146 compatible = "elan,ekth3000"; 147 reg = <0x15>; 148 interrupts-extended = <&pio 15 IRQ_TYPE_LEVEL_LOW>; 149 pinctrl-names = "default"; 150 pinctrl-0 = <&trackpad_pins>; 151 vcc-supply = <&pp3300_u>; 152 wakeup-source; 153 }; 154}; 155 156&i2c3 { 157 status = "okay"; 158 159 clock-frequency = <400000>; 160 pinctrl-names = "default"; 161 pinctrl-0 = <&i2c3_pins>; 162}; 163 164&i2c7 { 165 status = "okay"; 166 167 clock-frequency = <400000>; 168 pinctrl-names = "default"; 169 pinctrl-0 = <&i2c7_pins>; 170}; 171 172/* for CORE */ 173&mt6359_vgpu11_buck_reg { 174 regulator-always-on; 175}; 176 177&mt6359_vgpu11_sshub_buck_reg { 178 regulator-always-on; 179 regulator-min-microvolt = <575000>; 180 regulator-max-microvolt = <575000>; 181}; 182 183&mt6359_vrf12_ldo_reg { 184 regulator-always-on; 185}; 186 187&mt6359_vufs_ldo_reg { 188 regulator-always-on; 189}; 190 191&mt6359codec { 192 mediatek,dmic-mode = <1>; /* one-wire */ 193 mediatek,mic-type-0 = <2>; /* DMIC */ 194 mediatek,mic-type-2 = <2>; /* DMIC */ 195}; 196 197&pcie { 198 pinctrl-names = "default"; 199 pinctrl-0 = <&pcie_pins>; 200 201 pcie0: pcie@0,0 { 202 device_type = "pci"; 203 reg = <0x0000 0 0 0 0>; 204 num-lanes = <1>; 205 bus-range = <0x1 0x1>; 206 207 #address-cells = <3>; 208 #size-cells = <2>; 209 ranges; 210 211 wifi: wifi@0,0 { 212 reg = <0x10000 0 0 0 0x100000>, 213 <0x10000 0 0x100000 0 0x100000>; 214 memory-region = <&wifi_restricted_dma_region>; 215 }; 216 }; 217}; 218 219&pio { 220 /* 220 lines */ 221 gpio-line-names = "I2S_DP_LRCK", 222 "IS_DP_BCLK", 223 "I2S_DP_MCLK", 224 "I2S_DP_DATAOUT", 225 "SAR0_INT_ODL", 226 "EC_AP_INT_ODL", 227 "EDPBRDG_INT_ODL", 228 "DPBRDG_INT_ODL", 229 "DPBRDG_PWREN", 230 "DPBRDG_RST_ODL", 231 "I2S_HP_MCLK", 232 "I2S_HP_BCK", 233 "I2S_HP_LRCK", 234 "I2S_HP_DATAIN", 235 /* 236 * AP_FLASH_WP_L is crossystem ABI. Schematics 237 * call it AP_FLASH_WP_ODL. 238 */ 239 "AP_FLASH_WP_L", 240 "TRACKPAD_INT_ODL", 241 "EC_AP_HPD_OD", 242 "SD_CD_ODL", 243 "HP_INT_ODL_ALC", 244 "EN_PP1000_DPBRDG", 245 "AP_GPIO20", 246 "TOUCH_INT_L_1V8", 247 "UART_BT_WAKE_ODL", 248 "AP_GPIO23", 249 "AP_SPI_FLASH_CS_L", 250 "AP_SPI_FLASH_CLK", 251 "EN_PP3300_DPBRDG_DX", 252 "AP_SPI_FLASH_MOSI", 253 "AP_SPI_FLASH_MISO", 254 "I2S_HP_DATAOUT", 255 "AP_GPIO30", 256 "I2S_SPKR_MCLK", 257 "I2S_SPKR_BCLK", 258 "I2S_SPKR_LRCK", 259 "I2S_SPKR_DATAIN", 260 "I2S_SPKR_DATAOUT", 261 "AP_SPI_H1_TPM_CLK", 262 "AP_SPI_H1_TPM_CS_L", 263 "AP_SPI_H1_TPM_MISO", 264 "AP_SPI_H1_TPM_MOSI", 265 "BL_PWM", 266 "EDPBRDG_PWREN", 267 "EDPBRDG_RST_ODL", 268 "EN_PP3300_HUB", 269 "HUB_RST_L", 270 "", 271 "", 272 "", 273 "", 274 "", 275 "", 276 "SD_CLK", 277 "SD_CMD", 278 "SD_DATA3", 279 "SD_DATA0", 280 "SD_DATA2", 281 "SD_DATA1", 282 "", 283 "", 284 "", 285 "", 286 "", 287 "", 288 "PCIE_WAKE_ODL", 289 "PCIE_RST_L", 290 "PCIE_CLKREQ_ODL", 291 "", 292 "", 293 "", 294 "", 295 "", 296 "", 297 "", 298 "", 299 "", 300 "", 301 "", 302 "", 303 "", 304 "", 305 "", 306 "", 307 "", 308 "", 309 "", 310 "", 311 "", 312 "", 313 "", 314 "SPMI_SCL", 315 "SPMI_SDA", 316 "AP_GOOD", 317 "UART_DBG_TX_AP_RX", 318 "UART_AP_TX_DBG_RX", 319 "UART_AP_TX_BT_RX", 320 "UART_BT_TX_AP_RX", 321 "MIPI_DPI_D0_R", 322 "MIPI_DPI_D1_R", 323 "MIPI_DPI_D2_R", 324 "MIPI_DPI_D3_R", 325 "MIPI_DPI_D4_R", 326 "MIPI_DPI_D5_R", 327 "MIPI_DPI_D6_R", 328 "MIPI_DPI_D7_R", 329 "MIPI_DPI_D8_R", 330 "MIPI_DPI_D9_R", 331 "MIPI_DPI_D10_R", 332 "", 333 "", 334 "MIPI_DPI_DE_R", 335 "MIPI_DPI_D11_R", 336 "MIPI_DPI_VSYNC_R", 337 "MIPI_DPI_CLK_R", 338 "MIPI_DPI_HSYNC_R", 339 "PCM_BT_DATAIN", 340 "PCM_BT_SYNC", 341 "PCM_BT_DATAOUT", 342 "PCM_BT_CLK", 343 "AP_I2C_AUDIO_SCL", 344 "AP_I2C_AUDIO_SDA", 345 "SCP_I2C_SCL", 346 "SCP_I2C_SDA", 347 "AP_I2C_WLAN_SCL", 348 "AP_I2C_WLAN_SDA", 349 "AP_I2C_DPBRDG_SCL", 350 "AP_I2C_DPBRDG_SDA", 351 "EN_PP1800_DPBRDG_DX", 352 "EN_PP3300_EDP_DX", 353 "EN_PP1800_EDPBRDG_DX", 354 "EN_PP1000_EDPBRDG", 355 "SCP_JTAG0_TDO", 356 "SCP_JTAG0_TDI", 357 "SCP_JTAG0_TMS", 358 "SCP_JTAG0_TCK", 359 "SCP_JTAG0_TRSTN", 360 "EN_PP3000_VMC_PMU", 361 "EN_PP3300_DISPLAY_DX", 362 "TOUCH_RST_L_1V8", 363 "TOUCH_REPORT_DISABLE", 364 "", 365 "", 366 "AP_I2C_TRACKPAD_SCL_1V8", 367 "AP_I2C_TRACKPAD_SDA_1V8", 368 "EN_PP3300_WLAN", 369 "BT_KILL_L", 370 "WIFI_KILL_L", 371 "SET_VMC_VOLT_AT_1V8", 372 "EN_SPK", 373 "AP_WARM_RST_REQ", 374 "", 375 "", 376 "EN_PP3000_SD_S3", 377 "AP_EDP_BKLTEN", 378 "", 379 "", 380 "", 381 "AP_SPI_EC_CLK", 382 "AP_SPI_EC_CS_L", 383 "AP_SPI_EC_MISO", 384 "AP_SPI_EC_MOSI", 385 "AP_I2C_EDPBRDG_SCL", 386 "AP_I2C_EDPBRDG_SDA", 387 "MT6315_PROC_INT", 388 "MT6315_GPU_INT", 389 "UART_SERVO_TX_SCP_RX", 390 "UART_SCP_TX_SERVO_RX", 391 "BT_RTS_AP_CTS", 392 "AP_RTS_BT_CTS", 393 "UART_AP_WAKE_BT_ODL", 394 "WLAN_ALERT_ODL", 395 "EC_IN_RW_ODL", 396 "H1_AP_INT_ODL", 397 "", 398 "", 399 "", 400 "", 401 "", 402 "", 403 "", 404 "", 405 "", 406 "", 407 "", 408 "MSDC0_CMD", 409 "MSDC0_DAT0", 410 "MSDC0_DAT2", 411 "MSDC0_DAT4", 412 "MSDC0_DAT6", 413 "MSDC0_DAT1", 414 "MSDC0_DAT5", 415 "MSDC0_DAT7", 416 "MSDC0_DSL", 417 "MSDC0_CLK", 418 "MSDC0_DAT3", 419 "MSDC0_RST_L", 420 "SCP_VREQ_VAO", 421 "AUD_DAT_MOSI2", 422 "AUD_NLE_MOSI1", 423 "AUD_NLE_MOSI0", 424 "AUD_DAT_MISO2", 425 "AP_I2C_SAR_SDA", 426 "AP_I2C_SAR_SCL", 427 "AP_I2C_PWR_SCL", 428 "AP_I2C_PWR_SDA", 429 "AP_I2C_TS_SCL_1V8", 430 "AP_I2C_TS_SDA_1V8", 431 "SRCLKENA0", 432 "SRCLKENA1", 433 "AP_EC_WATCHDOG_L", 434 "PWRAP_SPI0_MI", 435 "PWRAP_SPI0_CSN", 436 "PWRAP_SPI0_MO", 437 "PWRAP_SPI0_CK", 438 "AP_RTC_CLK32K", 439 "AUD_CLK_MOSI", 440 "AUD_SYNC_MOSI", 441 "AUD_DAT_MOSI0", 442 "AUD_DAT_MOSI1", 443 "AUD_DAT_MISO0", 444 "AUD_DAT_MISO1"; 445 446 cr50_int: cr50-irq-default-pins { 447 pins-gsc-ap-int-odl { 448 pinmux = <PINMUX_GPIO171__FUNC_GPIO171>; 449 input-enable; 450 }; 451 }; 452 453 cros_ec_int: cros-ec-irq-default-pins { 454 pins-ec-ap-int-odl { 455 pinmux = <PINMUX_GPIO5__FUNC_GPIO5>; 456 input-enable; 457 bias-pull-up; 458 }; 459 }; 460 461 i2c0_pins: i2c0-default-pins { 462 pins-bus { 463 pinmux = <PINMUX_GPIO204__FUNC_SCL0>, 464 <PINMUX_GPIO205__FUNC_SDA0>; 465 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 466 drive-strength-microamp = <1000>; 467 }; 468 }; 469 470 i2c1_pins: i2c1-default-pins { 471 pins-bus { 472 pinmux = <PINMUX_GPIO118__FUNC_SCL1>, 473 <PINMUX_GPIO119__FUNC_SDA1>; 474 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 475 drive-strength-microamp = <1000>; 476 }; 477 }; 478 479 i2c2_pins: i2c2-default-pins { 480 pins-bus { 481 pinmux = <PINMUX_GPIO141__FUNC_SCL2>, 482 <PINMUX_GPIO142__FUNC_SDA2>; 483 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 484 }; 485 }; 486 487 i2c3_pins: i2c3-default-pins { 488 pins-bus { 489 pinmux = <PINMUX_GPIO160__FUNC_SCL3>, 490 <PINMUX_GPIO161__FUNC_SDA3>; 491 bias-disable; 492 drive-strength-microamp = <1000>; 493 }; 494 }; 495 496 i2c7_pins: i2c7-default-pins { 497 pins-bus { 498 pinmux = <PINMUX_GPIO124__FUNC_SCL7>, 499 <PINMUX_GPIO125__FUNC_SDA7>; 500 bias-disable; 501 drive-strength-microamp = <1000>; 502 }; 503 }; 504 505 pcie_pins: pcie-default-pins { 506 pins-pcie-wake { 507 pinmux = <PINMUX_GPIO63__FUNC_PCIE_WAKE_N>; 508 bias-pull-up; 509 }; 510 511 pins-pcie-pereset { 512 pinmux = <PINMUX_GPIO64__FUNC_PCIE_PERESET_N>; 513 }; 514 515 pins-pcie-clkreq { 516 pinmux = <PINMUX_GPIO65__FUNC_PCIE_CLKREQ_N>; 517 bias-pull-up; 518 }; 519 520 pins-wifi-kill { 521 pinmux = <PINMUX_GPIO145__FUNC_GPIO145>; /* WIFI_KILL_L */ 522 output-high; 523 }; 524 }; 525 526 pp3300_wlan_pins: pp3300-wlan-pins { 527 pins-pcie-en-pp3300-wlan { 528 pinmux = <PINMUX_GPIO143__FUNC_GPIO143>; 529 output-high; 530 }; 531 }; 532 533 spi1_pins: spi1-default-pins { 534 pins-cs-mosi-clk { 535 pinmux = <PINMUX_GPIO157__FUNC_SPI1_A_CSB>, 536 <PINMUX_GPIO159__FUNC_SPI1_A_MO>, 537 <PINMUX_GPIO156__FUNC_SPI1_A_CLK>; 538 bias-disable; 539 }; 540 541 pins-miso { 542 pinmux = <PINMUX_GPIO158__FUNC_SPI1_A_MI>; 543 bias-pull-down; 544 }; 545 }; 546 547 spi5_pins: spi5-default-pins { 548 pins-bus { 549 pinmux = <PINMUX_GPIO38__FUNC_SPI5_A_MI>, 550 <PINMUX_GPIO37__FUNC_GPIO37>, 551 <PINMUX_GPIO39__FUNC_SPI5_A_MO>, 552 <PINMUX_GPIO36__FUNC_SPI5_A_CLK>; 553 bias-disable; 554 }; 555 }; 556 557 trackpad_pins: trackpad-default-pins { 558 pins-int-n { 559 pinmux = <PINMUX_GPIO15__FUNC_GPIO15>; 560 input-enable; 561 bias-pull-up = <MTK_PUPD_SET_R1R0_11>; 562 }; 563 }; 564 565 touchscreen_pins: touchscreen-default-pins { 566 pins-irq { 567 pinmux = <PINMUX_GPIO21__FUNC_GPIO21>; 568 input-enable; 569 bias-pull-up; 570 }; 571 572 pins-reset { 573 pinmux = <PINMUX_GPIO137__FUNC_GPIO137>; 574 output-high; 575 }; 576 577 pins-report-sw { 578 pinmux = <PINMUX_GPIO138__FUNC_GPIO138>; 579 output-low; 580 }; 581 }; 582}; 583 584&pmic { 585 interrupts-extended = <&pio 214 IRQ_TYPE_LEVEL_HIGH>; 586}; 587 588&spi1 { 589 status = "okay"; 590 591 mediatek,pad-select = <0>; 592 pinctrl-names = "default"; 593 pinctrl-0 = <&spi1_pins>; 594 595 cros_ec: ec@0 { 596 compatible = "google,cros-ec-spi"; 597 reg = <0>; 598 interrupts-extended = <&pio 5 IRQ_TYPE_LEVEL_LOW>; 599 spi-max-frequency = <3000000>; 600 pinctrl-names = "default"; 601 pinctrl-0 = <&cros_ec_int>; 602 603 #address-cells = <1>; 604 #size-cells = <0>; 605 606 base_detection: cbas { 607 compatible = "google,cros-cbas"; 608 }; 609 610 cros_ec_pwm: pwm { 611 compatible = "google,cros-ec-pwm"; 612 #pwm-cells = <1>; 613 614 status = "disabled"; 615 }; 616 617 i2c_tunnel: i2c-tunnel { 618 compatible = "google,cros-ec-i2c-tunnel"; 619 google,remote-bus = <0>; 620 #address-cells = <1>; 621 #size-cells = <0>; 622 }; 623 624 mt6360_ldo3_reg: regulator@0 { 625 compatible = "google,cros-ec-regulator"; 626 reg = <0>; 627 regulator-min-microvolt = <1800000>; 628 regulator-max-microvolt = <3300000>; 629 }; 630 631 mt6360_ldo5_reg: regulator@1 { 632 compatible = "google,cros-ec-regulator"; 633 reg = <1>; 634 regulator-min-microvolt = <3300000>; 635 regulator-max-microvolt = <3300000>; 636 }; 637 638 typec { 639 compatible = "google,cros-ec-typec"; 640 #address-cells = <1>; 641 #size-cells = <0>; 642 643 usb_c0: connector@0 { 644 compatible = "usb-c-connector"; 645 reg = <0>; 646 label = "left"; 647 power-role = "dual"; 648 data-role = "host"; 649 try-power-role = "source"; 650 }; 651 652 usb_c1: connector@1 { 653 compatible = "usb-c-connector"; 654 reg = <1>; 655 label = "right"; 656 power-role = "dual"; 657 data-role = "host"; 658 try-power-role = "source"; 659 }; 660 }; 661 }; 662}; 663 664&spi5 { 665 status = "okay"; 666 667 cs-gpios = <&pio 37 GPIO_ACTIVE_LOW>; 668 mediatek,pad-select = <0>; 669 pinctrl-names = "default"; 670 pinctrl-0 = <&spi5_pins>; 671 672 cr50@0 { 673 compatible = "google,cr50"; 674 reg = <0>; 675 interrupts-extended = <&pio 171 IRQ_TYPE_EDGE_RISING>; 676 spi-max-frequency = <1000000>; 677 pinctrl-names = "default"; 678 pinctrl-0 = <&cr50_int>; 679 }; 680}; 681 682&uart0 { 683 status = "okay"; 684}; 685 686&xhci { 687 status = "okay"; 688 689 wakeup-source; 690 vusb33-supply = <&pp3300_g>; 691 vbus-supply = <&pp5000_a>; 692}; 693 694#include <arm/cros-ec-keyboard.dtsi> 695#include <arm/cros-ec-sbs.dtsi> 696