1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (C) 2020 MediaTek Inc.
4 * Author: Seiya Wang <seiya.wang@mediatek.com>
5 */
6/dts-v1/;
7#include "mt8192.dtsi"
8
9/ {
10	aliases {
11		serial0 = &uart0;
12	};
13
14	chosen {
15		stdout-path = "serial0:115200n8";
16	};
17
18	memory@40000000 {
19		device_type = "memory";
20		reg = <0 0x40000000 0 0x80000000>;
21	};
22};
23
24&pio {
25	/* 220 lines */
26	gpio-line-names = "I2S_DP_LRCK",
27			  "IS_DP_BCLK",
28			  "I2S_DP_MCLK",
29			  "I2S_DP_DATAOUT",
30			  "SAR0_INT_ODL",
31			  "EC_AP_INT_ODL",
32			  "EDPBRDG_INT_ODL",
33			  "DPBRDG_INT_ODL",
34			  "DPBRDG_PWREN",
35			  "DPBRDG_RST_ODL",
36			  "I2S_HP_MCLK",
37			  "I2S_HP_BCK",
38			  "I2S_HP_LRCK",
39			  "I2S_HP_DATAIN",
40			  /*
41			   * AP_FLASH_WP_L is crossystem ABI. Schematics
42			   * call it AP_FLASH_WP_ODL.
43			   */
44			  "AP_FLASH_WP_L",
45			  "TRACKPAD_INT_ODL",
46			  "EC_AP_HPD_OD",
47			  "SD_CD_ODL",
48			  "HP_INT_ODL_ALC",
49			  "EN_PP1000_DPBRDG",
50			  "AP_GPIO20",
51			  "TOUCH_INT_L_1V8",
52			  "UART_BT_WAKE_ODL",
53			  "AP_GPIO23",
54			  "AP_SPI_FLASH_CS_L",
55			  "AP_SPI_FLASH_CLK",
56			  "EN_PP3300_DPBRDG_DX",
57			  "AP_SPI_FLASH_MOSI",
58			  "AP_SPI_FLASH_MISO",
59			  "I2S_HP_DATAOUT",
60			  "AP_GPIO30",
61			  "I2S_SPKR_MCLK",
62			  "I2S_SPKR_BCLK",
63			  "I2S_SPKR_LRCK",
64			  "I2S_SPKR_DATAIN",
65			  "I2S_SPKR_DATAOUT",
66			  "AP_SPI_H1_TPM_CLK",
67			  "AP_SPI_H1_TPM_CS_L",
68			  "AP_SPI_H1_TPM_MISO",
69			  "AP_SPI_H1_TPM_MOSI",
70			  "BL_PWM",
71			  "EDPBRDG_PWREN",
72			  "EDPBRDG_RST_ODL",
73			  "EN_PP3300_HUB",
74			  "HUB_RST_L",
75			  "",
76			  "",
77			  "",
78			  "",
79			  "",
80			  "",
81			  "SD_CLK",
82			  "SD_CMD",
83			  "SD_DATA3",
84			  "SD_DATA0",
85			  "SD_DATA2",
86			  "SD_DATA1",
87			  "",
88			  "",
89			  "",
90			  "",
91			  "",
92			  "",
93			  "PCIE_WAKE_ODL",
94			  "PCIE_RST_L",
95			  "PCIE_CLKREQ_ODL",
96			  "",
97			  "",
98			  "",
99			  "",
100			  "",
101			  "",
102			  "",
103			  "",
104			  "",
105			  "",
106			  "",
107			  "",
108			  "",
109			  "",
110			  "",
111			  "",
112			  "",
113			  "",
114			  "",
115			  "",
116			  "",
117			  "",
118			  "",
119			  "SPMI_SCL",
120			  "SPMI_SDA",
121			  "AP_GOOD",
122			  "UART_DBG_TX_AP_RX",
123			  "UART_AP_TX_DBG_RX",
124			  "UART_AP_TX_BT_RX",
125			  "UART_BT_TX_AP_RX",
126			  "MIPI_DPI_D0_R",
127			  "MIPI_DPI_D1_R",
128			  "MIPI_DPI_D2_R",
129			  "MIPI_DPI_D3_R",
130			  "MIPI_DPI_D4_R",
131			  "MIPI_DPI_D5_R",
132			  "MIPI_DPI_D6_R",
133			  "MIPI_DPI_D7_R",
134			  "MIPI_DPI_D8_R",
135			  "MIPI_DPI_D9_R",
136			  "MIPI_DPI_D10_R",
137			  "",
138			  "",
139			  "MIPI_DPI_DE_R",
140			  "MIPI_DPI_D11_R",
141			  "MIPI_DPI_VSYNC_R",
142			  "MIPI_DPI_CLK_R",
143			  "MIPI_DPI_HSYNC_R",
144			  "PCM_BT_DATAIN",
145			  "PCM_BT_SYNC",
146			  "PCM_BT_DATAOUT",
147			  "PCM_BT_CLK",
148			  "AP_I2C_AUDIO_SCL",
149			  "AP_I2C_AUDIO_SDA",
150			  "SCP_I2C_SCL",
151			  "SCP_I2C_SDA",
152			  "AP_I2C_WLAN_SCL",
153			  "AP_I2C_WLAN_SDA",
154			  "AP_I2C_DPBRDG_SCL",
155			  "AP_I2C_DPBRDG_SDA",
156			  "EN_PP1800_DPBRDG_DX",
157			  "EN_PP3300_EDP_DX",
158			  "EN_PP1800_EDPBRDG_DX",
159			  "EN_PP1000_EDPBRDG",
160			  "SCP_JTAG0_TDO",
161			  "SCP_JTAG0_TDI",
162			  "SCP_JTAG0_TMS",
163			  "SCP_JTAG0_TCK",
164			  "SCP_JTAG0_TRSTN",
165			  "EN_PP3000_VMC_PMU",
166			  "EN_PP3300_DISPLAY_DX",
167			  "TOUCH_RST_L_1V8",
168			  "TOUCH_REPORT_DISABLE",
169			  "",
170			  "",
171			  "AP_I2C_TRACKPAD_SCL_1V8",
172			  "AP_I2C_TRACKPAD_SDA_1V8",
173			  "EN_PP3300_WLAN",
174			  "BT_KILL_L",
175			  "WIFI_KILL_L",
176			  "SET_VMC_VOLT_AT_1V8",
177			  "EN_SPK",
178			  "AP_WARM_RST_REQ",
179			  "",
180			  "",
181			  "EN_PP3000_SD_S3",
182			  "AP_EDP_BKLTEN",
183			  "",
184			  "",
185			  "",
186			  "AP_SPI_EC_CLK",
187			  "AP_SPI_EC_CS_L",
188			  "AP_SPI_EC_MISO",
189			  "AP_SPI_EC_MOSI",
190			  "AP_I2C_EDPBRDG_SCL",
191			  "AP_I2C_EDPBRDG_SDA",
192			  "MT6315_PROC_INT",
193			  "MT6315_GPU_INT",
194			  "UART_SERVO_TX_SCP_RX",
195			  "UART_SCP_TX_SERVO_RX",
196			  "BT_RTS_AP_CTS",
197			  "AP_RTS_BT_CTS",
198			  "UART_AP_WAKE_BT_ODL",
199			  "WLAN_ALERT_ODL",
200			  "EC_IN_RW_ODL",
201			  "H1_AP_INT_ODL",
202			  "",
203			  "",
204			  "",
205			  "",
206			  "",
207			  "",
208			  "",
209			  "",
210			  "",
211			  "",
212			  "",
213			  "MSDC0_CMD",
214			  "MSDC0_DAT0",
215			  "MSDC0_DAT2",
216			  "MSDC0_DAT4",
217			  "MSDC0_DAT6",
218			  "MSDC0_DAT1",
219			  "MSDC0_DAT5",
220			  "MSDC0_DAT7",
221			  "MSDC0_DSL",
222			  "MSDC0_CLK",
223			  "MSDC0_DAT3",
224			  "MSDC0_RST_L",
225			  "SCP_VREQ_VAO",
226			  "AUD_DAT_MOSI2",
227			  "AUD_NLE_MOSI1",
228			  "AUD_NLE_MOSI0",
229			  "AUD_DAT_MISO2",
230			  "AP_I2C_SAR_SDA",
231			  "AP_I2C_SAR_SCL",
232			  "AP_I2C_PWR_SCL",
233			  "AP_I2C_PWR_SDA",
234			  "AP_I2C_TS_SCL_1V8",
235			  "AP_I2C_TS_SDA_1V8",
236			  "SRCLKENA0",
237			  "SRCLKENA1",
238			  "AP_EC_WATCHDOG_L",
239			  "PWRAP_SPI0_MI",
240			  "PWRAP_SPI0_CSN",
241			  "PWRAP_SPI0_MO",
242			  "PWRAP_SPI0_CK",
243			  "AP_RTC_CLK32K",
244			  "AUD_CLK_MOSI",
245			  "AUD_SYNC_MOSI",
246			  "AUD_DAT_MOSI0",
247			  "AUD_DAT_MOSI1",
248			  "AUD_DAT_MISO0",
249			  "AUD_DAT_MISO1";
250};
251
252&uart0 {
253	status = "okay";
254};
255