1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2021 BayLibre, SAS. 4 * Author: Fabien Parent <fparent@baylibre.com> 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/input/input.h> 11#include "mt8183.dtsi" 12#include "mt6358.dtsi" 13 14/ { 15 model = "Pumpkin MT8183"; 16 compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183"; 17 18 aliases { 19 serial0 = &uart0; 20 }; 21 22 memory@40000000 { 23 device_type = "memory"; 24 reg = <0 0x40000000 0 0x80000000>; 25 }; 26 27 chosen { 28 stdout-path = "serial0:921600n8"; 29 }; 30 31 reserved-memory { 32 #address-cells = <2>; 33 #size-cells = <2>; 34 ranges; 35 36 scp_mem_reserved: scp_mem_region@50000000 { 37 compatible = "shared-dma-pool"; 38 reg = <0 0x50000000 0 0x2900000>; 39 no-map; 40 }; 41 }; 42 43 leds { 44 compatible = "gpio-leds"; 45 46 led-red { 47 label = "red"; 48 gpios = <&pio 155 GPIO_ACTIVE_HIGH>; 49 default-state = "off"; 50 }; 51 52 led-green { 53 label = "green"; 54 gpios = <&pio 156 GPIO_ACTIVE_HIGH>; 55 default-state = "off"; 56 }; 57 }; 58 59 thermistor { 60 compatible = "murata,ncp03wf104"; 61 pullup-uv = <1800000>; 62 pullup-ohm = <390000>; 63 pulldown-ohm = <0>; 64 io-channels = <&auxadc 0>; 65 }; 66}; 67 68&auxadc { 69 status = "okay"; 70}; 71 72&gpu { 73 mali-supply = <&mt6358_vgpu_reg>; 74}; 75 76&i2c0 { 77 pinctrl-names = "default"; 78 pinctrl-0 = <&i2c_pins_0>; 79 status = "okay"; 80 clock-frequency = <100000>; 81}; 82 83&i2c1 { 84 pinctrl-names = "default"; 85 pinctrl-0 = <&i2c_pins_1>; 86 status = "okay"; 87 clock-frequency = <100000>; 88}; 89 90&i2c2 { 91 pinctrl-names = "default"; 92 pinctrl-0 = <&i2c_pins_2>; 93 status = "okay"; 94 clock-frequency = <100000>; 95}; 96 97&i2c3 { 98 pinctrl-names = "default"; 99 pinctrl-0 = <&i2c_pins_3>; 100 status = "okay"; 101 clock-frequency = <100000>; 102}; 103 104&i2c4 { 105 pinctrl-names = "default"; 106 pinctrl-0 = <&i2c_pins_4>; 107 status = "okay"; 108 clock-frequency = <100000>; 109}; 110 111&i2c5 { 112 pinctrl-names = "default"; 113 pinctrl-0 = <&i2c_pins_5>; 114 status = "okay"; 115 clock-frequency = <100000>; 116}; 117 118&i2c6 { 119 pinctrl-names = "default"; 120 pinctrl-0 = <&i2c6_pins>; 121 status = "okay"; 122 clock-frequency = <100000>; 123}; 124 125&keyboard { 126 pinctrl-names = "default"; 127 pinctrl-0 = <&keyboard_pins>; 128 status = "okay"; 129 linux,keymap = <MATRIX_KEY(0x00, 0x00, KEY_VOLUMEDOWN) 130 MATRIX_KEY(0x01, 0x00, KEY_VOLUMEUP)>; 131 keypad,num-rows = <2>; 132 keypad,num-columns = <1>; 133 debounce-delay-ms = <32>; 134 mediatek,keys-per-group = <2>; 135}; 136 137&mmc0 { 138 status = "okay"; 139 pinctrl-names = "default", "state_uhs"; 140 pinctrl-0 = <&mmc0_pins_default>; 141 pinctrl-1 = <&mmc0_pins_uhs>; 142 bus-width = <8>; 143 max-frequency = <200000000>; 144 cap-mmc-highspeed; 145 mmc-hs200-1_8v; 146 mmc-hs400-1_8v; 147 cap-mmc-hw-reset; 148 no-sdio; 149 no-sd; 150 hs400-ds-delay = <0x12814>; 151 vmmc-supply = <&mt6358_vemc_reg>; 152 vqmmc-supply = <&mt6358_vio18_reg>; 153 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>; 154 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>; 155 non-removable; 156}; 157 158&mmc1 { 159 status = "okay"; 160 pinctrl-names = "default", "state_uhs"; 161 pinctrl-0 = <&mmc1_pins_default>; 162 pinctrl-1 = <&mmc1_pins_uhs>; 163 bus-width = <4>; 164 max-frequency = <200000000>; 165 cap-sd-highspeed; 166 sd-uhs-sdr50; 167 sd-uhs-sdr104; 168 cap-sdio-irq; 169 no-mmc; 170 no-sd; 171 vmmc-supply = <&mt6358_vmch_reg>; 172 vqmmc-supply = <&mt6358_vmc_reg>; 173 keep-power-in-suspend; 174 wakeup-source; 175 non-removable; 176}; 177 178&mt6358_vgpu_reg { 179 regulator-coupled-with = <&mt6358_vsram_gpu_reg>; 180 regulator-coupled-max-spread = <100000>; 181}; 182 183&mt6358_vsram_gpu_reg { 184 regulator-coupled-with = <&mt6358_vgpu_reg>; 185 regulator-coupled-max-spread = <100000>; 186}; 187 188&pio { 189 i2c_pins_0: i2c0 { 190 pins_i2c{ 191 pinmux = <PINMUX_GPIO82__FUNC_SDA0>, 192 <PINMUX_GPIO83__FUNC_SCL0>; 193 mediatek,pull-up-adv = <3>; 194 mediatek,drive-strength-adv = <00>; 195 }; 196 }; 197 198 i2c_pins_1: i2c1 { 199 pins_i2c{ 200 pinmux = <PINMUX_GPIO81__FUNC_SDA1>, 201 <PINMUX_GPIO84__FUNC_SCL1>; 202 mediatek,pull-up-adv = <3>; 203 mediatek,drive-strength-adv = <00>; 204 }; 205 }; 206 207 i2c_pins_2: i2c2 { 208 pins_i2c{ 209 pinmux = <PINMUX_GPIO103__FUNC_SCL2>, 210 <PINMUX_GPIO104__FUNC_SDA2>; 211 mediatek,pull-up-adv = <3>; 212 mediatek,drive-strength-adv = <00>; 213 }; 214 }; 215 216 i2c_pins_3: i2c3 { 217 pins_i2c{ 218 pinmux = <PINMUX_GPIO50__FUNC_SCL3>, 219 <PINMUX_GPIO51__FUNC_SDA3>; 220 mediatek,pull-up-adv = <3>; 221 mediatek,drive-strength-adv = <00>; 222 }; 223 }; 224 225 i2c_pins_4: i2c4 { 226 pins_i2c{ 227 pinmux = <PINMUX_GPIO105__FUNC_SCL4>, 228 <PINMUX_GPIO106__FUNC_SDA4>; 229 mediatek,pull-up-adv = <3>; 230 mediatek,drive-strength-adv = <00>; 231 }; 232 }; 233 234 i2c_pins_5: i2c5 { 235 pins_i2c{ 236 pinmux = <PINMUX_GPIO48__FUNC_SCL5>, 237 <PINMUX_GPIO49__FUNC_SDA5>; 238 mediatek,pull-up-adv = <3>; 239 mediatek,drive-strength-adv = <00>; 240 }; 241 }; 242 243 i2c6_pins: i2c6 { 244 pins_cmd_dat { 245 pinmux = <PINMUX_GPIO113__FUNC_SCL6>, 246 <PINMUX_GPIO114__FUNC_SDA6>; 247 mediatek,pull-up-adv = <3>; 248 }; 249 }; 250 251 keyboard_pins: keyboard { 252 pins_keyboard { 253 pinmux = <PINMUX_GPIO91__FUNC_KPROW1>, 254 <PINMUX_GPIO92__FUNC_KPROW0>, 255 <PINMUX_GPIO93__FUNC_KPCOL0>; 256 }; 257 }; 258 259 mmc0_pins_default: mmc0-pins-default { 260 pins_cmd_dat { 261 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>, 262 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>, 263 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>, 264 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>, 265 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>, 266 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>, 267 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>, 268 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>, 269 <PINMUX_GPIO122__FUNC_MSDC0_CMD>; 270 input-enable; 271 drive-strength = <MTK_DRIVE_14mA>; 272 mediatek,pull-up-adv = <01>; 273 }; 274 275 pins_clk { 276 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>; 277 drive-strength = <MTK_DRIVE_14mA>; 278 mediatek,pull-down-adv = <10>; 279 }; 280 281 pins_rst { 282 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>; 283 drive-strength = <MTK_DRIVE_14mA>; 284 mediatek,pull-down-adv = <01>; 285 }; 286 }; 287 288 mmc0_pins_uhs: mmc0-pins-uhs { 289 pins_cmd_dat { 290 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>, 291 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>, 292 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>, 293 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>, 294 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>, 295 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>, 296 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>, 297 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>, 298 <PINMUX_GPIO122__FUNC_MSDC0_CMD>; 299 input-enable; 300 drive-strength = <MTK_DRIVE_14mA>; 301 mediatek,pull-up-adv = <01>; 302 }; 303 304 pins_clk { 305 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>; 306 drive-strength = <MTK_DRIVE_14mA>; 307 mediatek,pull-down-adv = <10>; 308 }; 309 310 pins_ds { 311 pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>; 312 drive-strength = <MTK_DRIVE_14mA>; 313 mediatek,pull-down-adv = <10>; 314 }; 315 316 pins_rst { 317 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>; 318 drive-strength = <MTK_DRIVE_14mA>; 319 mediatek,pull-up-adv = <01>; 320 }; 321 }; 322 323 mmc1_pins_default: mmc1-pins-default { 324 pins_cmd_dat { 325 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>, 326 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>, 327 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>, 328 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>, 329 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>; 330 input-enable; 331 mediatek,pull-up-adv = <10>; 332 }; 333 334 pins_clk { 335 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>; 336 input-enable; 337 mediatek,pull-down-adv = <10>; 338 }; 339 340 pins_pmu { 341 pinmux = <PINMUX_GPIO178__FUNC_GPIO178>; 342 output-high; 343 }; 344 }; 345 346 mmc1_pins_uhs: mmc1-pins-uhs { 347 pins_cmd_dat { 348 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>, 349 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>, 350 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>, 351 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>, 352 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>; 353 drive-strength = <MTK_DRIVE_6mA>; 354 input-enable; 355 mediatek,pull-up-adv = <10>; 356 }; 357 358 pins_clk { 359 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>; 360 drive-strength = <MTK_DRIVE_8mA>; 361 mediatek,pull-down-adv = <10>; 362 input-enable; 363 }; 364 }; 365}; 366 367&mfg { 368 domain-supply = <&mt6358_vgpu_reg>; 369}; 370 371&cpu0 { 372 proc-supply = <&mt6358_vproc12_reg>; 373}; 374 375&cpu1 { 376 proc-supply = <&mt6358_vproc12_reg>; 377}; 378 379&cpu2 { 380 proc-supply = <&mt6358_vproc12_reg>; 381}; 382 383&cpu3 { 384 proc-supply = <&mt6358_vproc12_reg>; 385}; 386 387&cpu4 { 388 proc-supply = <&mt6358_vproc11_reg>; 389}; 390 391&cpu5 { 392 proc-supply = <&mt6358_vproc11_reg>; 393}; 394 395&cpu6 { 396 proc-supply = <&mt6358_vproc11_reg>; 397}; 398 399&cpu7 { 400 proc-supply = <&mt6358_vproc11_reg>; 401}; 402 403&uart0 { 404 status = "okay"; 405}; 406 407&scp { 408 status = "okay"; 409}; 410 411&dsi0 { 412 status = "disabled"; 413}; 414