1*19b6403fSFabien Parent// SPDX-License-Identifier: GPL-2.0 2*19b6403fSFabien Parent/* 3*19b6403fSFabien Parent * Copyright (c) 2021 BayLibre, SAS. 4*19b6403fSFabien Parent * Author: Fabien Parent <fparent@baylibre.com> 5*19b6403fSFabien Parent */ 6*19b6403fSFabien Parent 7*19b6403fSFabien Parent/dts-v1/; 8*19b6403fSFabien Parent 9*19b6403fSFabien Parent#include <dt-bindings/gpio/gpio.h> 10*19b6403fSFabien Parent#include "mt8183.dtsi" 11*19b6403fSFabien Parent#include "mt6358.dtsi" 12*19b6403fSFabien Parent 13*19b6403fSFabien Parent/ { 14*19b6403fSFabien Parent model = "Pumpkin MT8183"; 15*19b6403fSFabien Parent compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183"; 16*19b6403fSFabien Parent 17*19b6403fSFabien Parent aliases { 18*19b6403fSFabien Parent serial0 = &uart0; 19*19b6403fSFabien Parent }; 20*19b6403fSFabien Parent 21*19b6403fSFabien Parent memory@40000000 { 22*19b6403fSFabien Parent device_type = "memory"; 23*19b6403fSFabien Parent reg = <0 0x40000000 0 0x80000000>; 24*19b6403fSFabien Parent }; 25*19b6403fSFabien Parent 26*19b6403fSFabien Parent chosen { 27*19b6403fSFabien Parent stdout-path = "serial0:921600n8"; 28*19b6403fSFabien Parent }; 29*19b6403fSFabien Parent 30*19b6403fSFabien Parent reserved-memory { 31*19b6403fSFabien Parent #address-cells = <2>; 32*19b6403fSFabien Parent #size-cells = <2>; 33*19b6403fSFabien Parent ranges; 34*19b6403fSFabien Parent 35*19b6403fSFabien Parent scp_mem_reserved: scp_mem_region { 36*19b6403fSFabien Parent compatible = "shared-dma-pool"; 37*19b6403fSFabien Parent reg = <0 0x50000000 0 0x2900000>; 38*19b6403fSFabien Parent no-map; 39*19b6403fSFabien Parent }; 40*19b6403fSFabien Parent }; 41*19b6403fSFabien Parent 42*19b6403fSFabien Parent leds { 43*19b6403fSFabien Parent compatible = "gpio-leds"; 44*19b6403fSFabien Parent 45*19b6403fSFabien Parent led-red { 46*19b6403fSFabien Parent label = "red"; 47*19b6403fSFabien Parent gpios = <&pio 155 GPIO_ACTIVE_HIGH>; 48*19b6403fSFabien Parent default-state = "off"; 49*19b6403fSFabien Parent }; 50*19b6403fSFabien Parent 51*19b6403fSFabien Parent led-green { 52*19b6403fSFabien Parent label = "green"; 53*19b6403fSFabien Parent gpios = <&pio 156 GPIO_ACTIVE_HIGH>; 54*19b6403fSFabien Parent default-state = "off"; 55*19b6403fSFabien Parent }; 56*19b6403fSFabien Parent }; 57*19b6403fSFabien Parent 58*19b6403fSFabien Parent ntc@0 { 59*19b6403fSFabien Parent compatible = "murata,ncp03wf104"; 60*19b6403fSFabien Parent pullup-uv = <1800000>; 61*19b6403fSFabien Parent pullup-ohm = <390000>; 62*19b6403fSFabien Parent pulldown-ohm = <0>; 63*19b6403fSFabien Parent io-channels = <&auxadc 0>; 64*19b6403fSFabien Parent }; 65*19b6403fSFabien Parent}; 66*19b6403fSFabien Parent 67*19b6403fSFabien Parent&auxadc { 68*19b6403fSFabien Parent status = "okay"; 69*19b6403fSFabien Parent}; 70*19b6403fSFabien Parent 71*19b6403fSFabien Parent&i2c0 { 72*19b6403fSFabien Parent pinctrl-names = "default"; 73*19b6403fSFabien Parent pinctrl-0 = <&i2c_pins_0>; 74*19b6403fSFabien Parent status = "okay"; 75*19b6403fSFabien Parent clock-frequency = <100000>; 76*19b6403fSFabien Parent}; 77*19b6403fSFabien Parent 78*19b6403fSFabien Parent&i2c1 { 79*19b6403fSFabien Parent pinctrl-names = "default"; 80*19b6403fSFabien Parent pinctrl-0 = <&i2c_pins_1>; 81*19b6403fSFabien Parent status = "okay"; 82*19b6403fSFabien Parent clock-frequency = <100000>; 83*19b6403fSFabien Parent}; 84*19b6403fSFabien Parent 85*19b6403fSFabien Parent&i2c2 { 86*19b6403fSFabien Parent pinctrl-names = "default"; 87*19b6403fSFabien Parent pinctrl-0 = <&i2c_pins_2>; 88*19b6403fSFabien Parent status = "okay"; 89*19b6403fSFabien Parent clock-frequency = <100000>; 90*19b6403fSFabien Parent}; 91*19b6403fSFabien Parent 92*19b6403fSFabien Parent&i2c3 { 93*19b6403fSFabien Parent pinctrl-names = "default"; 94*19b6403fSFabien Parent pinctrl-0 = <&i2c_pins_3>; 95*19b6403fSFabien Parent status = "okay"; 96*19b6403fSFabien Parent clock-frequency = <100000>; 97*19b6403fSFabien Parent}; 98*19b6403fSFabien Parent 99*19b6403fSFabien Parent&i2c4 { 100*19b6403fSFabien Parent pinctrl-names = "default"; 101*19b6403fSFabien Parent pinctrl-0 = <&i2c_pins_4>; 102*19b6403fSFabien Parent status = "okay"; 103*19b6403fSFabien Parent clock-frequency = <100000>; 104*19b6403fSFabien Parent}; 105*19b6403fSFabien Parent 106*19b6403fSFabien Parent&i2c5 { 107*19b6403fSFabien Parent pinctrl-names = "default"; 108*19b6403fSFabien Parent pinctrl-0 = <&i2c_pins_5>; 109*19b6403fSFabien Parent status = "okay"; 110*19b6403fSFabien Parent clock-frequency = <100000>; 111*19b6403fSFabien Parent}; 112*19b6403fSFabien Parent 113*19b6403fSFabien Parent&i2c6 { 114*19b6403fSFabien Parent pinctrl-names = "default"; 115*19b6403fSFabien Parent pinctrl-0 = <&i2c6_pins>; 116*19b6403fSFabien Parent status = "okay"; 117*19b6403fSFabien Parent clock-frequency = <100000>; 118*19b6403fSFabien Parent}; 119*19b6403fSFabien Parent 120*19b6403fSFabien Parent&mmc0 { 121*19b6403fSFabien Parent status = "okay"; 122*19b6403fSFabien Parent pinctrl-names = "default", "state_uhs"; 123*19b6403fSFabien Parent pinctrl-0 = <&mmc0_pins_default>; 124*19b6403fSFabien Parent pinctrl-1 = <&mmc0_pins_uhs>; 125*19b6403fSFabien Parent bus-width = <8>; 126*19b6403fSFabien Parent max-frequency = <200000000>; 127*19b6403fSFabien Parent cap-mmc-highspeed; 128*19b6403fSFabien Parent mmc-hs200-1_8v; 129*19b6403fSFabien Parent mmc-hs400-1_8v; 130*19b6403fSFabien Parent cap-mmc-hw-reset; 131*19b6403fSFabien Parent no-sdio; 132*19b6403fSFabien Parent no-sd; 133*19b6403fSFabien Parent hs400-ds-delay = <0x12814>; 134*19b6403fSFabien Parent vmmc-supply = <&mt6358_vemc_reg>; 135*19b6403fSFabien Parent vqmmc-supply = <&mt6358_vio18_reg>; 136*19b6403fSFabien Parent assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>; 137*19b6403fSFabien Parent assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>; 138*19b6403fSFabien Parent non-removable; 139*19b6403fSFabien Parent}; 140*19b6403fSFabien Parent 141*19b6403fSFabien Parent&mmc1 { 142*19b6403fSFabien Parent status = "okay"; 143*19b6403fSFabien Parent pinctrl-names = "default", "state_uhs"; 144*19b6403fSFabien Parent pinctrl-0 = <&mmc1_pins_default>; 145*19b6403fSFabien Parent pinctrl-1 = <&mmc1_pins_uhs>; 146*19b6403fSFabien Parent bus-width = <4>; 147*19b6403fSFabien Parent max-frequency = <200000000>; 148*19b6403fSFabien Parent cap-sd-highspeed; 149*19b6403fSFabien Parent sd-uhs-sdr50; 150*19b6403fSFabien Parent sd-uhs-sdr104; 151*19b6403fSFabien Parent cap-sdio-irq; 152*19b6403fSFabien Parent no-mmc; 153*19b6403fSFabien Parent no-sd; 154*19b6403fSFabien Parent vmmc-supply = <&mt6358_vmch_reg>; 155*19b6403fSFabien Parent vqmmc-supply = <&mt6358_vmc_reg>; 156*19b6403fSFabien Parent keep-power-in-suspend; 157*19b6403fSFabien Parent enable-sdio-wakeup; 158*19b6403fSFabien Parent non-removable; 159*19b6403fSFabien Parent}; 160*19b6403fSFabien Parent 161*19b6403fSFabien Parent&pio { 162*19b6403fSFabien Parent i2c_pins_0: i2c0 { 163*19b6403fSFabien Parent pins_i2c{ 164*19b6403fSFabien Parent pinmux = <PINMUX_GPIO82__FUNC_SDA0>, 165*19b6403fSFabien Parent <PINMUX_GPIO83__FUNC_SCL0>; 166*19b6403fSFabien Parent mediatek,pull-up-adv = <3>; 167*19b6403fSFabien Parent mediatek,drive-strength-adv = <00>; 168*19b6403fSFabien Parent }; 169*19b6403fSFabien Parent }; 170*19b6403fSFabien Parent 171*19b6403fSFabien Parent i2c_pins_1: i2c1 { 172*19b6403fSFabien Parent pins_i2c{ 173*19b6403fSFabien Parent pinmux = <PINMUX_GPIO81__FUNC_SDA1>, 174*19b6403fSFabien Parent <PINMUX_GPIO84__FUNC_SCL1>; 175*19b6403fSFabien Parent mediatek,pull-up-adv = <3>; 176*19b6403fSFabien Parent mediatek,drive-strength-adv = <00>; 177*19b6403fSFabien Parent }; 178*19b6403fSFabien Parent }; 179*19b6403fSFabien Parent 180*19b6403fSFabien Parent i2c_pins_2: i2c2 { 181*19b6403fSFabien Parent pins_i2c{ 182*19b6403fSFabien Parent pinmux = <PINMUX_GPIO103__FUNC_SCL2>, 183*19b6403fSFabien Parent <PINMUX_GPIO104__FUNC_SDA2>; 184*19b6403fSFabien Parent mediatek,pull-up-adv = <3>; 185*19b6403fSFabien Parent mediatek,drive-strength-adv = <00>; 186*19b6403fSFabien Parent }; 187*19b6403fSFabien Parent }; 188*19b6403fSFabien Parent 189*19b6403fSFabien Parent i2c_pins_3: i2c3 { 190*19b6403fSFabien Parent pins_i2c{ 191*19b6403fSFabien Parent pinmux = <PINMUX_GPIO50__FUNC_SCL3>, 192*19b6403fSFabien Parent <PINMUX_GPIO51__FUNC_SDA3>; 193*19b6403fSFabien Parent mediatek,pull-up-adv = <3>; 194*19b6403fSFabien Parent mediatek,drive-strength-adv = <00>; 195*19b6403fSFabien Parent }; 196*19b6403fSFabien Parent }; 197*19b6403fSFabien Parent 198*19b6403fSFabien Parent i2c_pins_4: i2c4 { 199*19b6403fSFabien Parent pins_i2c{ 200*19b6403fSFabien Parent pinmux = <PINMUX_GPIO105__FUNC_SCL4>, 201*19b6403fSFabien Parent <PINMUX_GPIO106__FUNC_SDA4>; 202*19b6403fSFabien Parent mediatek,pull-up-adv = <3>; 203*19b6403fSFabien Parent mediatek,drive-strength-adv = <00>; 204*19b6403fSFabien Parent }; 205*19b6403fSFabien Parent }; 206*19b6403fSFabien Parent 207*19b6403fSFabien Parent i2c_pins_5: i2c5 { 208*19b6403fSFabien Parent pins_i2c{ 209*19b6403fSFabien Parent pinmux = <PINMUX_GPIO48__FUNC_SCL5>, 210*19b6403fSFabien Parent <PINMUX_GPIO49__FUNC_SDA5>; 211*19b6403fSFabien Parent mediatek,pull-up-adv = <3>; 212*19b6403fSFabien Parent mediatek,drive-strength-adv = <00>; 213*19b6403fSFabien Parent }; 214*19b6403fSFabien Parent }; 215*19b6403fSFabien Parent 216*19b6403fSFabien Parent i2c6_pins: i2c6 { 217*19b6403fSFabien Parent pins_cmd_dat { 218*19b6403fSFabien Parent pinmux = <PINMUX_GPIO113__FUNC_SCL6>, 219*19b6403fSFabien Parent <PINMUX_GPIO114__FUNC_SDA6>; 220*19b6403fSFabien Parent mediatek,pull-up-adv = <3>; 221*19b6403fSFabien Parent }; 222*19b6403fSFabien Parent }; 223*19b6403fSFabien Parent 224*19b6403fSFabien Parent mmc0_pins_default: mmc0-pins-default { 225*19b6403fSFabien Parent pins_cmd_dat { 226*19b6403fSFabien Parent pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>, 227*19b6403fSFabien Parent <PINMUX_GPIO128__FUNC_MSDC0_DAT1>, 228*19b6403fSFabien Parent <PINMUX_GPIO125__FUNC_MSDC0_DAT2>, 229*19b6403fSFabien Parent <PINMUX_GPIO132__FUNC_MSDC0_DAT3>, 230*19b6403fSFabien Parent <PINMUX_GPIO126__FUNC_MSDC0_DAT4>, 231*19b6403fSFabien Parent <PINMUX_GPIO129__FUNC_MSDC0_DAT5>, 232*19b6403fSFabien Parent <PINMUX_GPIO127__FUNC_MSDC0_DAT6>, 233*19b6403fSFabien Parent <PINMUX_GPIO130__FUNC_MSDC0_DAT7>, 234*19b6403fSFabien Parent <PINMUX_GPIO122__FUNC_MSDC0_CMD>; 235*19b6403fSFabien Parent input-enable; 236*19b6403fSFabien Parent drive-strength = <MTK_DRIVE_14mA>; 237*19b6403fSFabien Parent mediatek,pull-up-adv = <01>; 238*19b6403fSFabien Parent }; 239*19b6403fSFabien Parent 240*19b6403fSFabien Parent pins_clk { 241*19b6403fSFabien Parent pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>; 242*19b6403fSFabien Parent drive-strength = <MTK_DRIVE_14mA>; 243*19b6403fSFabien Parent mediatek,pull-down-adv = <10>; 244*19b6403fSFabien Parent }; 245*19b6403fSFabien Parent 246*19b6403fSFabien Parent pins_rst { 247*19b6403fSFabien Parent pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>; 248*19b6403fSFabien Parent drive-strength = <MTK_DRIVE_14mA>; 249*19b6403fSFabien Parent mediatek,pull-down-adv = <01>; 250*19b6403fSFabien Parent }; 251*19b6403fSFabien Parent }; 252*19b6403fSFabien Parent 253*19b6403fSFabien Parent mmc0_pins_uhs: mmc0-pins-uhs { 254*19b6403fSFabien Parent pins_cmd_dat { 255*19b6403fSFabien Parent pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>, 256*19b6403fSFabien Parent <PINMUX_GPIO128__FUNC_MSDC0_DAT1>, 257*19b6403fSFabien Parent <PINMUX_GPIO125__FUNC_MSDC0_DAT2>, 258*19b6403fSFabien Parent <PINMUX_GPIO132__FUNC_MSDC0_DAT3>, 259*19b6403fSFabien Parent <PINMUX_GPIO126__FUNC_MSDC0_DAT4>, 260*19b6403fSFabien Parent <PINMUX_GPIO129__FUNC_MSDC0_DAT5>, 261*19b6403fSFabien Parent <PINMUX_GPIO127__FUNC_MSDC0_DAT6>, 262*19b6403fSFabien Parent <PINMUX_GPIO130__FUNC_MSDC0_DAT7>, 263*19b6403fSFabien Parent <PINMUX_GPIO122__FUNC_MSDC0_CMD>; 264*19b6403fSFabien Parent input-enable; 265*19b6403fSFabien Parent drive-strength = <MTK_DRIVE_14mA>; 266*19b6403fSFabien Parent mediatek,pull-up-adv = <01>; 267*19b6403fSFabien Parent }; 268*19b6403fSFabien Parent 269*19b6403fSFabien Parent pins_clk { 270*19b6403fSFabien Parent pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>; 271*19b6403fSFabien Parent drive-strength = <MTK_DRIVE_14mA>; 272*19b6403fSFabien Parent mediatek,pull-down-adv = <10>; 273*19b6403fSFabien Parent }; 274*19b6403fSFabien Parent 275*19b6403fSFabien Parent pins_ds { 276*19b6403fSFabien Parent pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>; 277*19b6403fSFabien Parent drive-strength = <MTK_DRIVE_14mA>; 278*19b6403fSFabien Parent mediatek,pull-down-adv = <10>; 279*19b6403fSFabien Parent }; 280*19b6403fSFabien Parent 281*19b6403fSFabien Parent pins_rst { 282*19b6403fSFabien Parent pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>; 283*19b6403fSFabien Parent drive-strength = <MTK_DRIVE_14mA>; 284*19b6403fSFabien Parent mediatek,pull-up-adv = <01>; 285*19b6403fSFabien Parent }; 286*19b6403fSFabien Parent }; 287*19b6403fSFabien Parent 288*19b6403fSFabien Parent mmc1_pins_default: mmc1-pins-default { 289*19b6403fSFabien Parent pins_cmd_dat { 290*19b6403fSFabien Parent pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>, 291*19b6403fSFabien Parent <PINMUX_GPIO32__FUNC_MSDC1_DAT0>, 292*19b6403fSFabien Parent <PINMUX_GPIO34__FUNC_MSDC1_DAT1>, 293*19b6403fSFabien Parent <PINMUX_GPIO33__FUNC_MSDC1_DAT2>, 294*19b6403fSFabien Parent <PINMUX_GPIO30__FUNC_MSDC1_DAT3>; 295*19b6403fSFabien Parent input-enable; 296*19b6403fSFabien Parent mediatek,pull-up-adv = <10>; 297*19b6403fSFabien Parent }; 298*19b6403fSFabien Parent 299*19b6403fSFabien Parent pins_clk { 300*19b6403fSFabien Parent pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>; 301*19b6403fSFabien Parent input-enable; 302*19b6403fSFabien Parent mediatek,pull-down-adv = <10>; 303*19b6403fSFabien Parent }; 304*19b6403fSFabien Parent 305*19b6403fSFabien Parent pins_pmu { 306*19b6403fSFabien Parent pinmux = <PINMUX_GPIO178__FUNC_GPIO178>; 307*19b6403fSFabien Parent output-high; 308*19b6403fSFabien Parent }; 309*19b6403fSFabien Parent }; 310*19b6403fSFabien Parent 311*19b6403fSFabien Parent mmc1_pins_uhs: mmc1-pins-uhs { 312*19b6403fSFabien Parent pins_cmd_dat { 313*19b6403fSFabien Parent pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>, 314*19b6403fSFabien Parent <PINMUX_GPIO32__FUNC_MSDC1_DAT0>, 315*19b6403fSFabien Parent <PINMUX_GPIO34__FUNC_MSDC1_DAT1>, 316*19b6403fSFabien Parent <PINMUX_GPIO33__FUNC_MSDC1_DAT2>, 317*19b6403fSFabien Parent <PINMUX_GPIO30__FUNC_MSDC1_DAT3>; 318*19b6403fSFabien Parent drive-strength = <MTK_DRIVE_6mA>; 319*19b6403fSFabien Parent input-enable; 320*19b6403fSFabien Parent mediatek,pull-up-adv = <10>; 321*19b6403fSFabien Parent }; 322*19b6403fSFabien Parent 323*19b6403fSFabien Parent pins_clk { 324*19b6403fSFabien Parent pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>; 325*19b6403fSFabien Parent drive-strength = <MTK_DRIVE_8mA>; 326*19b6403fSFabien Parent mediatek,pull-down-adv = <10>; 327*19b6403fSFabien Parent input-enable; 328*19b6403fSFabien Parent }; 329*19b6403fSFabien Parent }; 330*19b6403fSFabien Parent}; 331*19b6403fSFabien Parent 332*19b6403fSFabien Parent&mfg { 333*19b6403fSFabien Parent domain-supply = <&mt6358_vgpu_reg>; 334*19b6403fSFabien Parent}; 335*19b6403fSFabien Parent 336*19b6403fSFabien Parent&cpu0 { 337*19b6403fSFabien Parent proc-supply = <&mt6358_vproc12_reg>; 338*19b6403fSFabien Parent}; 339*19b6403fSFabien Parent 340*19b6403fSFabien Parent&cpu1 { 341*19b6403fSFabien Parent proc-supply = <&mt6358_vproc12_reg>; 342*19b6403fSFabien Parent}; 343*19b6403fSFabien Parent 344*19b6403fSFabien Parent&cpu2 { 345*19b6403fSFabien Parent proc-supply = <&mt6358_vproc12_reg>; 346*19b6403fSFabien Parent}; 347*19b6403fSFabien Parent 348*19b6403fSFabien Parent&cpu3 { 349*19b6403fSFabien Parent proc-supply = <&mt6358_vproc12_reg>; 350*19b6403fSFabien Parent}; 351*19b6403fSFabien Parent 352*19b6403fSFabien Parent&cpu4 { 353*19b6403fSFabien Parent proc-supply = <&mt6358_vproc11_reg>; 354*19b6403fSFabien Parent}; 355*19b6403fSFabien Parent 356*19b6403fSFabien Parent&cpu5 { 357*19b6403fSFabien Parent proc-supply = <&mt6358_vproc11_reg>; 358*19b6403fSFabien Parent}; 359*19b6403fSFabien Parent 360*19b6403fSFabien Parent&cpu6 { 361*19b6403fSFabien Parent proc-supply = <&mt6358_vproc11_reg>; 362*19b6403fSFabien Parent}; 363*19b6403fSFabien Parent 364*19b6403fSFabien Parent&cpu7 { 365*19b6403fSFabien Parent proc-supply = <&mt6358_vproc11_reg>; 366*19b6403fSFabien Parent}; 367*19b6403fSFabien Parent 368*19b6403fSFabien Parent&uart0 { 369*19b6403fSFabien Parent status = "okay"; 370*19b6403fSFabien Parent}; 371*19b6403fSFabien Parent 372*19b6403fSFabien Parent&scp { 373*19b6403fSFabien Parent status = "okay"; 374*19b6403fSFabien Parent}; 375*19b6403fSFabien Parent 376*19b6403fSFabien Parent&dsi0 { 377*19b6403fSFabien Parent status = "disabled"; 378*19b6403fSFabien Parent}; 379