1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright 2016 MediaTek Inc.
4 */
5
6#include <dt-bindings/input/input.h>
7#include <dt-bindings/input/linux-event-codes.h>
8#include <dt-bindings/regulator/dlg,da9211-regulator.h>
9#include <dt-bindings/gpio/gpio.h>
10#include "mt8173.dtsi"
11
12/ {
13	aliases {
14		mmc0 = &mmc0;
15		mmc1 = &mmc1;
16		mmc2 = &mmc3;
17	};
18
19	memory@40000000 {
20		device_type = "memory";
21		reg = <0 0x40000000 0 0x80000000>;
22	};
23
24	backlight: backlight {
25		compatible = "pwm-backlight";
26		pwms = <&pwm0 0 1000000>;
27		power-supply = <&bl_fixed_reg>;
28		enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
29
30		pinctrl-names = "default";
31		pinctrl-0 = <&panel_backlight_en_pins>;
32		status = "okay";
33	};
34
35	bl_fixed_reg: fixedregulator2 {
36		compatible = "regulator-fixed";
37		regulator-name = "bl_fixed";
38		regulator-min-microvolt = <1800000>;
39		regulator-max-microvolt = <1800000>;
40		startup-delay-us = <1000>;
41		enable-active-high;
42		gpio = <&pio 32 GPIO_ACTIVE_HIGH>;
43		pinctrl-names = "default";
44		pinctrl-0 = <&bl_fixed_pins>;
45	};
46
47	chosen {
48		stdout-path = "serial0:115200n8";
49	};
50
51	gpio_keys: gpio-keys {
52		compatible = "gpio-keys";
53		pinctrl-names = "default";
54		pinctrl-0 = <&gpio_keys_pins>;
55
56		switch-lid {
57			label = "Lid";
58			gpios = <&pio 69 GPIO_ACTIVE_LOW>;
59			linux,code = <SW_LID>;
60			linux,input-type = <EV_SW>;
61			gpio-key,wakeup;
62		};
63
64		switch-power {
65			label = "Power";
66			gpios = <&pio 14 GPIO_ACTIVE_HIGH>;
67			linux,code = <KEY_POWER>;
68			debounce-interval = <30>;
69			gpio-key,wakeup;
70		};
71
72		switch-tablet-mode {
73			label = "Tablet_mode";
74			gpios = <&pio 121 GPIO_ACTIVE_HIGH>;
75			linux,code = <SW_TABLET_MODE>;
76			linux,input-type = <EV_SW>;
77			gpio-key,wakeup;
78		};
79
80		switch-volume-down {
81			label = "Volume_down";
82			gpios = <&pio 123 GPIO_ACTIVE_LOW>;
83			linux,code = <KEY_VOLUMEDOWN>;
84		};
85
86		switch-volume-up {
87			label = "Volume_up";
88			gpios = <&pio 124 GPIO_ACTIVE_LOW>;
89			linux,code = <KEY_VOLUMEUP>;
90		};
91	};
92
93	panel_fixed_3v3: regulator1 {
94		compatible = "regulator-fixed";
95		regulator-name = "PANEL_3V3";
96		regulator-min-microvolt = <3300000>;
97		regulator-max-microvolt = <3300000>;
98		enable-active-high;
99		gpio = <&pio 41 GPIO_ACTIVE_HIGH>;
100		pinctrl-names = "default";
101		pinctrl-0 = <&panel_fixed_pins>;
102	};
103
104	ps8640_fixed_1v2: regulator2 {
105		compatible = "regulator-fixed";
106		regulator-name = "PS8640_1V2";
107		regulator-min-microvolt = <1200000>;
108		regulator-max-microvolt = <1200000>;
109		regulator-enable-ramp-delay = <2000>;
110		enable-active-high;
111		regulator-boot-on;
112		gpio = <&pio 30 GPIO_ACTIVE_HIGH>;
113		pinctrl-names = "default";
114		pinctrl-0 = <&ps8640_fixed_pins>;
115	};
116
117	sdio_fixed_3v3: fixedregulator0 {
118		compatible = "regulator-fixed";
119		regulator-name = "3V3";
120		regulator-min-microvolt = <3300000>;
121		regulator-max-microvolt = <3300000>;
122		gpio = <&pio 85 GPIO_ACTIVE_HIGH>;
123		pinctrl-names = "default";
124		pinctrl-0 = <&sdio_fixed_3v3_pins>;
125	};
126
127	sound: sound {
128		compatible = "mediatek,mt8173-rt5650";
129		mediatek,audio-codec = <&rt5650 &hdmi0>;
130		mediatek,platform = <&afe>;
131		pinctrl-names = "default";
132		pinctrl-0 = <&aud_i2s2>;
133
134		mediatek,mclk = <1>;
135		codec-capture {
136			sound-dai = <&rt5650 1>;
137		};
138	};
139
140	hdmicon: connector {
141		compatible = "hdmi-connector";
142		label = "hdmi";
143		type = "a";
144		ddc-i2c-bus = <&hdmiddc0>;
145
146		port {
147			hdmi_connector_in: endpoint {
148				remote-endpoint = <&hdmi0_out>;
149			};
150		};
151	};
152};
153
154&mfg_async {
155	domain-supply = <&da9211_vgpu_reg>;
156};
157
158&cec {
159	status = "okay";
160};
161
162&cpu0 {
163	proc-supply = <&mt6397_vpca15_reg>;
164};
165
166&cpu1 {
167	proc-supply = <&mt6397_vpca15_reg>;
168};
169
170&cpu2 {
171	proc-supply = <&da9211_vcpu_reg>;
172	sram-supply = <&mt6397_vsramca7_reg>;
173};
174
175&cpu3 {
176	proc-supply = <&da9211_vcpu_reg>;
177	sram-supply = <&mt6397_vsramca7_reg>;
178};
179
180&cpu_thermal {
181	sustainable-power = <4500>; /* milliwatts */
182	trips {
183		threshold: trip-point0 {
184			temperature = <60000>;
185		};
186
187		target: trip-point1 {
188			temperature = <65000>;
189		};
190	};
191};
192
193&dsi0 {
194	status = "okay";
195	ports {
196		port {
197			dsi0_out: endpoint {
198				remote-endpoint = <&ps8640_in>;
199			};
200		};
201	};
202};
203
204&dpi0 {
205	status = "okay";
206};
207
208&hdmi0 {
209	status = "okay";
210	ports {
211		port@1 {
212			reg = <1>;
213
214			hdmi0_out: endpoint {
215				remote-endpoint = <&hdmi_connector_in>;
216			};
217		};
218	};
219};
220
221&hdmi_phy {
222	status = "okay";
223	mediatek,ibias = <0xc>;
224};
225
226&i2c0 {
227	status = "okay";
228
229	rt5650: audio-codec@1a {
230		compatible = "realtek,rt5650";
231		reg = <0x1a>;
232		avdd-supply = <&mt6397_vgp1_reg>;
233		cpvdd-supply = <&mt6397_vcama_reg>;
234		interrupt-parent = <&pio>;
235		interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
236		pinctrl-names = "default";
237		pinctrl-0 = <&rt5650_irq>;
238		#sound-dai-cells = <1>;
239		realtek,dmic1-data-pin = <2>;
240		realtek,jd-mode = <2>;
241	};
242
243	ps8640: edp-bridge@8 {
244		compatible = "parade,ps8640";
245		reg = <0x8>;
246		powerdown-gpios = <&pio 127 GPIO_ACTIVE_LOW>;
247		reset-gpios = <&pio 115 GPIO_ACTIVE_LOW>;
248		pinctrl-names = "default";
249		pinctrl-0 = <&ps8640_pins>;
250		vdd12-supply = <&ps8640_fixed_1v2>;
251		vdd33-supply = <&mt6397_vgp2_reg>;
252
253		ports {
254			#address-cells = <1>;
255			#size-cells = <0>;
256
257			port@0 {
258				reg = <0>;
259
260				ps8640_in: endpoint {
261					remote-endpoint = <&dsi0_out>;
262				};
263			};
264
265			port@1 {
266				reg = <1>;
267
268				ps8640_out: endpoint {
269					remote-endpoint = <&panel_in>;
270				};
271			};
272		};
273
274		aux-bus {
275			panel: panel {
276				compatible = "lg,lp120up1";
277				power-supply = <&panel_fixed_3v3>;
278				backlight = <&backlight>;
279
280				port {
281					panel_in: endpoint {
282						remote-endpoint = <&ps8640_out>;
283					};
284				};
285			};
286		};
287	};
288};
289
290&i2c1 {
291	clock-frequency = <1500000>;
292	status = "okay";
293
294	da9211: da9211@68 {
295		compatible = "dlg,da9211";
296		reg = <0x68>;
297		interrupt-parent = <&pio>;
298		interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
299
300		regulators {
301			da9211_vcpu_reg: BUCKA {
302				regulator-name = "VBUCKA";
303				regulator-min-microvolt = < 700000>;
304				regulator-max-microvolt = <1310000>;
305				regulator-min-microamp = <2000000>;
306				regulator-max-microamp = <4400000>;
307				regulator-ramp-delay = <10000>;
308				regulator-always-on;
309				regulator-allowed-modes = <DA9211_BUCK_MODE_SYNC
310							   DA9211_BUCK_MODE_AUTO>;
311			};
312
313			da9211_vgpu_reg: BUCKB {
314				regulator-name = "VBUCKB";
315				regulator-min-microvolt = < 700000>;
316				regulator-max-microvolt = <1310000>;
317				regulator-min-microamp = <2000000>;
318				regulator-max-microamp = <3000000>;
319				regulator-ramp-delay = <10000>;
320			};
321		};
322	};
323};
324
325&i2c2 {
326	status = "okay";
327
328	tpm: tpm@20 {
329		compatible = "infineon,slb9645tt";
330		reg = <0x20>;
331		powered-while-suspended;
332	};
333};
334
335&i2c3 {
336	clock-frequency = <400000>;
337	status = "okay";
338
339	touchscreen: touchscreen@10 {
340		compatible = "elan,ekth3500";
341		reg = <0x10>;
342		interrupt-parent = <&pio>;
343		interrupts = <88 IRQ_TYPE_LEVEL_LOW>;
344	};
345};
346
347&i2c4 {
348	clock-frequency = <400000>;
349	status = "okay";
350	pinctrl-names = "default";
351	pinctrl-0 = <&trackpad_irq>;
352
353	trackpad: trackpad@15 {
354		compatible = "elan,ekth3000";
355		interrupt-parent = <&pio>;
356		interrupts = <117 IRQ_TYPE_LEVEL_LOW>;
357		reg = <0x15>;
358		vcc-supply = <&mt6397_vgp6_reg>;
359		wakeup-source;
360	};
361};
362
363&mipi_tx0 {
364	status = "okay";
365};
366
367&mmc0 {
368	status = "okay";
369	pinctrl-names = "default", "state_uhs";
370	pinctrl-0 = <&mmc0_pins_default>;
371	pinctrl-1 = <&mmc0_pins_uhs>;
372	bus-width = <8>;
373	max-frequency = <200000000>;
374	cap-mmc-highspeed;
375	mmc-hs200-1_8v;
376	mmc-hs400-1_8v;
377	cap-mmc-hw-reset;
378	hs400-ds-delay = <0x14015>;
379	mediatek,hs200-cmd-int-delay = <30>;
380	mediatek,hs400-cmd-int-delay = <14>;
381	mediatek,hs400-cmd-resp-sel-rising;
382	vmmc-supply = <&mt6397_vemc_3v3_reg>;
383	vqmmc-supply = <&mt6397_vio18_reg>;
384	assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
385	assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
386	non-removable;
387};
388
389&mmc1 {
390	status = "okay";
391	pinctrl-names = "default", "state_uhs";
392	pinctrl-0 = <&mmc1_pins_default>;
393	pinctrl-1 = <&mmc1_pins_uhs>;
394	bus-width = <4>;
395	max-frequency = <200000000>;
396	cap-sd-highspeed;
397	sd-uhs-sdr50;
398	sd-uhs-sdr104;
399	cd-gpios = <&pio 1 GPIO_ACTIVE_LOW>;
400	vmmc-supply = <&mt6397_vmch_reg>;
401	vqmmc-supply = <&mt6397_vmc_reg>;
402};
403
404&mmc3 {
405	status = "okay";
406	pinctrl-names = "default", "state_uhs";
407	pinctrl-0 = <&mmc3_pins_default>;
408	pinctrl-1 = <&mmc3_pins_uhs>;
409	bus-width = <4>;
410	max-frequency = <200000000>;
411	cap-sd-highspeed;
412	sd-uhs-sdr50;
413	sd-uhs-sdr104;
414	keep-power-in-suspend;
415	wakeup-source;
416	cap-sdio-irq;
417	vmmc-supply = <&sdio_fixed_3v3>;
418	vqmmc-supply = <&mt6397_vgp3_reg>;
419	non-removable;
420	cap-power-off-card;
421
422	#address-cells = <1>;
423	#size-cells = <0>;
424
425	btmrvl: btmrvl@2 {
426		compatible = "marvell,sd8897-bt";
427		reg = <2>;
428		interrupt-parent = <&pio>;
429		interrupts = <119 IRQ_TYPE_LEVEL_LOW>;
430		marvell,wakeup-pin = /bits/ 16 <0x0d>;
431		marvell,wakeup-gap-ms = /bits/ 16 <0x64>;
432	};
433
434	mwifiex: mwifiex@1 {
435		compatible = "marvell,sd8897";
436		reg = <1>;
437		interrupt-parent = <&pio>;
438		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
439		marvell,wakeup-pin = <3>;
440	};
441};
442
443&nor_flash {
444	status = "okay";
445	pinctrl-names = "default";
446	pinctrl-0 = <&nor_gpio1_pins>;
447
448	flash@0 {
449		compatible = "jedec,spi-nor";
450		reg = <0>;
451		spi-max-frequency = <50000000>;
452	};
453};
454
455&pio {
456	gpio-line-names = "EC_INT_1V8",
457			  "SD_CD_L",
458			  "ALC5514_IRQ",
459			  "ALC5650_IRQ",
460			  /*
461			   * AP_FLASH_WP_L is crossystem ABI. Schematics
462			   * call it SFWP_B.
463			   */
464			  "AP_FLASH_WP_L",
465			  "SFIN",
466			  "SFCS0",
467			  "SFHOLD",
468			  "SFOUT",
469			  "SFCK",
470			  "WRAP_EVENT_S_EINT10",
471			  "PMU_INT",
472			  "I2S2_WS_ALC5650",
473			  "I2S2_BCK_ALC5650",
474			  "PWR_BTN_1V8",
475			  "DA9212_IRQ",
476			  "IDDIG",
477			  "WATCHDOG",
478			  "CEC",
479			  "HDMISCK",
480			  "HDMISD",
481			  "HTPLG",
482			  "MSDC3_DAT0",
483			  "MSDC3_DAT1",
484			  "MSDC3_DAT2",
485			  "MSDC3_DAT3",
486			  "MSDC3_CLK",
487			  "MSDC3_CMD",
488			  "USB_C0_OC_FLAGB",
489			  "USBA_OC1_L",
490			  "PS8640_1V2_ENABLE",
491			  "THERM_ALERT_N",
492			  "PANEL_LCD_POWER_EN",
493			  "ANX7688_CHIP_PD_C",
494			  "EC_IN_RW_1V8",
495			  "ANX7688_1V_EN_C",
496			  "USB_DP_HPD_C",
497			  "TPM_DAVINT_N",
498			  "MARVELL8897_IRQ",
499			  "EN_USB_A0_PWR",
500			  "USBA_A0_OC_L",
501			  "EN_PP3300_DX_EDP",
502			  "",
503			  "SOC_I2C2_1V8_SDA_400K",
504			  "SOC_I2C2_1V8_SCL_400K",
505			  "SOC_I2C0_1V8_SDA_400K",
506			  "SOC_I2C0_1V8_SCL_400K",
507			  "EMMC_ID1",
508			  "EMMC_ID0",
509			  "MEM_CONFIG3",
510			  "EMMC_ID2",
511			  "MEM_CONFIG1",
512			  "MEM_CONFIG2",
513			  "BRD_ID2",
514			  "MEM_CONFIG0",
515			  "BRD_ID0",
516			  "BRD_ID1",
517			  "EMMC_DAT0",
518			  "EMMC_DAT1",
519			  "EMMC_DAT2",
520			  "EMMC_DAT3",
521			  "EMMC_DAT4",
522			  "EMMC_DAT5",
523			  "EMMC_DAT6",
524			  "EMMC_DAT7",
525			  "EMMC_CLK",
526			  "EMMC_CMD",
527			  "EMMC_RCLK",
528			  "PLT_RST_L",
529			  "LID_OPEN_1V8_L",
530			  "AUDIO_SPI_MISO_R",
531			  "",
532			  "AC_OK_1V8",
533			  "SD_DATA0",
534			  "SD_DATA1",
535			  "SD_DATA2",
536			  "SD_DATA3",
537			  "SD_CLK",
538			  "SD_CMD",
539			  "PWRAP_SPI0_MI",
540			  "PWRAP_SPI0_MO",
541			  "PWRAP_SPI0_CK",
542			  "PWRAP_SPI0_CSN",
543			  "",
544			  "",
545			  "WIFI_PDN",
546			  "RTC32K_1V8",
547			  "DISP_PWM0",
548			  "TOUCHSCREEN_INT_L",
549			  "",
550			  "SRCLKENA0",
551			  "SRCLKENA1",
552			  "PS8640_MODE_CONF",
553			  "TOUCHSCREEN_RESET_R",
554			  "PLATFORM_PROCHOT_L",
555			  "PANEL_POWER_EN",
556			  "REC_MODE_L",
557			  "EC_FW_UPDATE_L",
558			  "ACCEL2_INT_L",
559			  "HDMI_DP_INT",
560			  "ACCELGYRO3_INT_L",
561			  "ACCELGYRO4_INT_L",
562			  "SPI_EC_CLK",
563			  "SPI_EC_MI",
564			  "SPI_EC_MO",
565			  "SPI_EC_CSN",
566			  "SOC_I2C3_1V8_SDA_400K",
567			  "SOC_I2C3_1V8_SCL_400K",
568			  "",
569			  "",
570			  "",
571			  "",
572			  "",
573			  "",
574			  "",
575			  "PS8640_SYSRSTN_1V8",
576			  "APIN_MAX98090_DOUT2",
577			  "TP_INT_1V8_L_R",
578			  "RST_USB_HUB_R",
579			  "BT_WAKE_L",
580			  "ACCEL1_INT_L",
581			  "TABLET_MODE_L",
582			  "",
583			  "V_UP_IN_L_R",
584			  "V_DOWN_IN_L_R",
585			  "SOC_I2C1_1V8_SDA_1M",
586			  "SOC_I2C1_1V8_SCL_1M",
587			  "PS8640_PDN_1V8",
588			  "MAX98090_LRCLK",
589			  "MAX98090_BCLK",
590			  "MAX98090_MCLK",
591			  "APOUT_MAX98090_DIN",
592			  "APIN_MAX98090_DOUT",
593			  "SOC_I2C4_1V8_SDA_400K",
594			  "SOC_I2C4_1V8_SCL_400K";
595
596	aud_i2s2: aud_i2s2 {
597		pins1 {
598			pinmux = <MT8173_PIN_128_I2S0_LRCK__FUNC_I2S1_WS>,
599				 <MT8173_PIN_129_I2S0_BCK__FUNC_I2S1_BCK>,
600				 <MT8173_PIN_130_I2S0_MCK__FUNC_I2S1_MCK>,
601				 <MT8173_PIN_131_I2S0_DATA0__FUNC_I2S1_DO_1>,
602				 <MT8173_PIN_12_EINT12__FUNC_I2S2_WS>,
603				 <MT8173_PIN_13_EINT13__FUNC_I2S2_BCK>,
604				 <MT8173_PIN_132_I2S0_DATA1__FUNC_I2S2_DI_2>;
605			bias-pull-down;
606		};
607	};
608
609	bl_fixed_pins: bl_fixed_pins {
610		pins1 {
611			pinmux = <MT8173_PIN_32_UTXD2__FUNC_GPIO32>;
612			output-low;
613		};
614	};
615
616	bt_wake_pins: bt_wake_pins {
617		pins1 {
618			pinmux = <MT8173_PIN_119_KPROW0__FUNC_GPIO119>;
619			bias-pull-up;
620		};
621	};
622
623	disp_pwm0_pins: disp_pwm0_pins {
624		pins1 {
625			pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
626			output-low;
627		};
628	};
629
630	gpio_keys_pins: gpio_keys_pins {
631		volume_pins {
632			pinmux = <MT8173_PIN_123_KPCOL1__FUNC_GPIO123>,
633				 <MT8173_PIN_124_KPCOL2__FUNC_GPIO124>;
634			bias-pull-up;
635		};
636
637		tablet_mode_pins {
638			pinmux = <MT8173_PIN_121_KPROW2__FUNC_GPIO121>;
639			bias-pull-up;
640		};
641	};
642
643	hdmi_mux_pins: hdmi_mux_pins {
644		pins1 {
645			pinmux = <MT8173_PIN_36_DAISYNC__FUNC_GPIO36>;
646		};
647	};
648
649	i2c1_pins_a: i2c1 {
650		da9211_pins {
651			pinmux = <MT8173_PIN_15_EINT15__FUNC_GPIO15>;
652			bias-pull-up;
653		};
654	};
655
656	mmc0_pins_default: mmc0default {
657		pins_cmd_dat {
658			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
659				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
660				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
661				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
662				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
663				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
664				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
665				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
666				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
667			bias-pull-up;
668		};
669
670		pins_clk {
671			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
672			bias-pull-down;
673		};
674
675		pins_rst {
676			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
677			bias-pull-up;
678		};
679	};
680
681	mmc1_pins_default: mmc1default {
682		pins_cmd_dat {
683			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
684				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
685				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
686				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
687				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
688			input-enable;
689			drive-strength = <MTK_DRIVE_4mA>;
690			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
691		};
692
693		pins_clk {
694			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
695			bias-pull-down;
696			drive-strength = <MTK_DRIVE_4mA>;
697		};
698
699		pins_insert {
700			pinmux = <MT8173_PIN_1_EINT1__FUNC_GPIO1>;
701			bias-pull-up;
702		};
703	};
704
705	mmc3_pins_default: mmc3default {
706		pins_dat {
707			pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
708				 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
709				 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
710				 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
711			input-enable;
712			drive-strength = <MTK_DRIVE_8mA>;
713			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
714		};
715
716		pins_cmd {
717			pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
718			input-enable;
719			drive-strength = <MTK_DRIVE_8mA>;
720			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
721		};
722
723		pins_clk {
724			pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
725			bias-pull-down;
726			drive-strength = <MTK_DRIVE_8mA>;
727		};
728	};
729
730	mmc0_pins_uhs: mmc0 {
731		pins_cmd_dat {
732			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
733				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
734				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
735				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
736				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
737				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
738				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
739				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
740				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
741			input-enable;
742			drive-strength = <MTK_DRIVE_6mA>;
743			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
744		};
745
746		pins_clk {
747			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
748			drive-strength = <MTK_DRIVE_6mA>;
749			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
750		};
751
752		pins_ds {
753			pinmux = <MT8173_PIN_67_MSDC0_DSL__FUNC_MSDC0_DSL>;
754			drive-strength = <MTK_DRIVE_10mA>;
755			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
756		};
757
758		pins_rst {
759			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
760			bias-pull-up;
761		};
762	};
763
764	mmc1_pins_uhs: mmc1 {
765		pins_cmd_dat {
766			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
767				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
768				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
769				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
770				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
771			input-enable;
772			drive-strength = <MTK_DRIVE_6mA>;
773			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
774		};
775
776		pins_clk {
777			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
778			drive-strength = <MTK_DRIVE_8mA>;
779			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
780		};
781	};
782
783	mmc3_pins_uhs: mmc3 {
784		pins_dat {
785			pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
786				 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
787				 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
788				 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
789			input-enable;
790			drive-strength = <MTK_DRIVE_8mA>;
791			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
792		};
793
794		pins_cmd {
795			pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
796			input-enable;
797			drive-strength = <MTK_DRIVE_8mA>;
798			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
799		};
800
801		pins_clk {
802			pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
803			drive-strength = <MTK_DRIVE_8mA>;
804			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
805		};
806	};
807
808	nor_gpio1_pins: nor {
809		pins1 {
810			pinmux = <MT8173_PIN_6_EINT6__FUNC_SFCS0>,
811				 <MT8173_PIN_7_EINT7__FUNC_SFHOLD>,
812				 <MT8173_PIN_8_EINT8__FUNC_SFIN>;
813			input-enable;
814			drive-strength = <MTK_DRIVE_4mA>;
815			bias-pull-up;
816		};
817
818		pins2 {
819			pinmux = <MT8173_PIN_5_EINT5__FUNC_SFOUT>;
820			drive-strength = <MTK_DRIVE_4mA>;
821			bias-pull-up;
822		};
823
824		pins_clk {
825			pinmux = <MT8173_PIN_9_EINT9__FUNC_SFCK>;
826			input-enable;
827			drive-strength = <MTK_DRIVE_4mA>;
828			bias-pull-up;
829		};
830	};
831
832	panel_backlight_en_pins: panel_backlight_en_pins {
833		pins1 {
834			pinmux = <MT8173_PIN_95_PCM_TX__FUNC_GPIO95>;
835		};
836	};
837
838	panel_fixed_pins: panel_fixed_pins {
839		pins1 {
840			pinmux = <MT8173_PIN_41_CMMCLK__FUNC_GPIO41>;
841		};
842	};
843
844	ps8640_pins: ps8640_pins {
845		pins1 {
846			pinmux = <MT8173_PIN_92_PCM_CLK__FUNC_GPIO92>,
847				 <MT8173_PIN_115_URTS0__FUNC_GPIO115>,
848				 <MT8173_PIN_127_LCM_RST__FUNC_GPIO127>;
849		};
850	};
851
852	ps8640_fixed_pins: ps8640_fixed_pins {
853		pins1 {
854			pinmux = <MT8173_PIN_30_URTS2__FUNC_GPIO30>;
855		};
856	};
857
858	rt5650_irq: rt5650_irq {
859		pins1 {
860			pinmux = <MT8173_PIN_3_EINT3__FUNC_GPIO3>;
861			bias-pull-down;
862		};
863	};
864
865	sdio_fixed_3v3_pins: sdio_fixed_3v3_pins {
866		pins1 {
867			pinmux = <MT8173_PIN_85_AUD_DAT_MOSI__FUNC_GPIO85>;
868			output-low;
869		};
870	};
871
872	spi_pins_a: spi1 {
873		pins1 {
874			pinmux = <MT8173_PIN_0_EINT0__FUNC_GPIO0>;
875			bias-pull-up;
876		};
877
878		pins_spi {
879			pinmux = <MT8173_PIN_102_MSDC2_DAT2__FUNC_SPI_CK_1_>,
880				 <MT8173_PIN_103_MSDC2_DAT3__FUNC_SPI_MI_1_>,
881				 <MT8173_PIN_104_MSDC2_CLK__FUNC_SPI_MO_1_>,
882				 <MT8173_PIN_105_MSDC2_CMD__FUNC_SPI_CS_1_>;
883			bias-disable;
884		};
885	};
886
887	trackpad_irq: trackpad_irq {
888		pins1 {
889			pinmux = <MT8173_PIN_117_URXD3__FUNC_GPIO117>;
890			input-enable;
891			bias-pull-up;
892		};
893	};
894
895	usb_pins: usb {
896		pins1 {
897			pinmux = <MT8173_PIN_101_MSDC2_DAT1__FUNC_GPIO101>;
898			output-high;
899			bias-disable;
900		};
901	};
902
903	wifi_wake_pins: wifi_wake_pins {
904		pins1 {
905			pinmux = <MT8173_PIN_38_CONN_RST__FUNC_GPIO38>;
906			bias-pull-up;
907		};
908	};
909};
910
911&pwm0 {
912	pinctrl-names = "default";
913	pinctrl-0 = <&disp_pwm0_pins>;
914	status = "okay";
915};
916
917&pwrap {
918	pmic: pmic {
919		compatible = "mediatek,mt6397";
920		#address-cells = <1>;
921		#size-cells = <1>;
922		interrupt-parent = <&pio>;
923		interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
924		interrupt-controller;
925		#interrupt-cells = <2>;
926
927		clock: mt6397clock {
928			compatible = "mediatek,mt6397-clk";
929			#clock-cells = <1>;
930		};
931
932		pio6397: pinctrl {
933			compatible = "mediatek,mt6397-pinctrl";
934			gpio-controller;
935			#gpio-cells = <2>;
936		};
937
938		regulator: mt6397regulator {
939			compatible = "mediatek,mt6397-regulator";
940
941			mt6397_vpca15_reg: buck_vpca15 {
942				regulator-compatible = "buck_vpca15";
943				regulator-name = "vpca15";
944				regulator-min-microvolt = < 700000>;
945				regulator-max-microvolt = <1350000>;
946				regulator-ramp-delay = <12500>;
947				regulator-always-on;
948				regulator-allowed-modes = <0 1>;
949			};
950
951			mt6397_vpca7_reg: buck_vpca7 {
952				regulator-compatible = "buck_vpca7";
953				regulator-name = "vpca7";
954				regulator-min-microvolt = < 700000>;
955				regulator-max-microvolt = <1350000>;
956				regulator-ramp-delay = <12500>;
957				regulator-enable-ramp-delay = <115>;
958				regulator-always-on;
959			};
960
961			mt6397_vsramca15_reg: buck_vsramca15 {
962				regulator-compatible = "buck_vsramca15";
963				regulator-name = "vsramca15";
964				regulator-min-microvolt = < 700000>;
965				regulator-max-microvolt = <1350000>;
966				regulator-ramp-delay = <12500>;
967				regulator-always-on;
968			};
969
970			mt6397_vsramca7_reg: buck_vsramca7 {
971				regulator-compatible = "buck_vsramca7";
972				regulator-name = "vsramca7";
973				regulator-min-microvolt = < 700000>;
974				regulator-max-microvolt = <1350000>;
975				regulator-ramp-delay = <12500>;
976				regulator-always-on;
977			};
978
979			mt6397_vcore_reg: buck_vcore {
980				regulator-compatible = "buck_vcore";
981				regulator-name = "vcore";
982				regulator-min-microvolt = < 700000>;
983				regulator-max-microvolt = <1350000>;
984				regulator-ramp-delay = <12500>;
985				regulator-always-on;
986			};
987
988			mt6397_vgpu_reg: buck_vgpu {
989				regulator-compatible = "buck_vgpu";
990				regulator-name = "vgpu";
991				regulator-min-microvolt = < 700000>;
992				regulator-max-microvolt = <1350000>;
993				regulator-ramp-delay = <12500>;
994				regulator-enable-ramp-delay = <115>;
995			};
996
997			mt6397_vdrm_reg: buck_vdrm {
998				regulator-compatible = "buck_vdrm";
999				regulator-name = "vdrm";
1000				regulator-min-microvolt = <1200000>;
1001				regulator-max-microvolt = <1400000>;
1002				regulator-ramp-delay = <12500>;
1003				regulator-always-on;
1004			};
1005
1006			mt6397_vio18_reg: buck_vio18 {
1007				regulator-compatible = "buck_vio18";
1008				regulator-name = "vio18";
1009				regulator-min-microvolt = <1620000>;
1010				regulator-max-microvolt = <1980000>;
1011				regulator-ramp-delay = <12500>;
1012				regulator-always-on;
1013			};
1014
1015			mt6397_vtcxo_reg: ldo_vtcxo {
1016				regulator-compatible = "ldo_vtcxo";
1017				regulator-name = "vtcxo";
1018				regulator-always-on;
1019			};
1020
1021			mt6397_va28_reg: ldo_va28 {
1022				regulator-compatible = "ldo_va28";
1023				regulator-name = "va28";
1024			};
1025
1026			mt6397_vcama_reg: ldo_vcama {
1027				regulator-compatible = "ldo_vcama";
1028				regulator-name = "vcama";
1029				regulator-min-microvolt = <1800000>;
1030				regulator-max-microvolt = <1800000>;
1031				regulator-enable-ramp-delay = <218>;
1032			};
1033
1034			mt6397_vio28_reg: ldo_vio28 {
1035				regulator-compatible = "ldo_vio28";
1036				regulator-name = "vio28";
1037				regulator-always-on;
1038			};
1039
1040			mt6397_vusb_reg: ldo_vusb {
1041				regulator-compatible = "ldo_vusb";
1042				regulator-name = "vusb";
1043			};
1044
1045			mt6397_vmc_reg: ldo_vmc {
1046				regulator-compatible = "ldo_vmc";
1047				regulator-name = "vmc";
1048				regulator-min-microvolt = <1800000>;
1049				regulator-max-microvolt = <3300000>;
1050				regulator-enable-ramp-delay = <218>;
1051			};
1052
1053			mt6397_vmch_reg: ldo_vmch {
1054				regulator-compatible = "ldo_vmch";
1055				regulator-name = "vmch";
1056				regulator-min-microvolt = <3000000>;
1057				regulator-max-microvolt = <3300000>;
1058				regulator-enable-ramp-delay = <218>;
1059			};
1060
1061			mt6397_vemc_3v3_reg: ldo_vemc3v3 {
1062				regulator-compatible = "ldo_vemc3v3";
1063				regulator-name = "vemc_3v3";
1064				regulator-min-microvolt = <3000000>;
1065				regulator-max-microvolt = <3300000>;
1066				regulator-enable-ramp-delay = <218>;
1067			};
1068
1069			mt6397_vgp1_reg: ldo_vgp1 {
1070				regulator-compatible = "ldo_vgp1";
1071				regulator-name = "vcamd";
1072				regulator-min-microvolt = <1800000>;
1073				regulator-max-microvolt = <1800000>;
1074				regulator-enable-ramp-delay = <240>;
1075			};
1076
1077			mt6397_vgp2_reg: ldo_vgp2 {
1078				regulator-compatible = "ldo_vgp2";
1079				regulator-name = "vcamio";
1080				regulator-min-microvolt = <3300000>;
1081				regulator-max-microvolt = <3300000>;
1082				regulator-enable-ramp-delay = <218>;
1083			};
1084
1085			mt6397_vgp3_reg: ldo_vgp3 {
1086				regulator-compatible = "ldo_vgp3";
1087				regulator-name = "vcamaf";
1088				regulator-min-microvolt = <1800000>;
1089				regulator-max-microvolt = <1800000>;
1090				regulator-enable-ramp-delay = <218>;
1091			};
1092
1093			mt6397_vgp4_reg: ldo_vgp4 {
1094				regulator-compatible = "ldo_vgp4";
1095				regulator-name = "vgp4";
1096				regulator-min-microvolt = <1200000>;
1097				regulator-max-microvolt = <3300000>;
1098				regulator-enable-ramp-delay = <218>;
1099			};
1100
1101			mt6397_vgp5_reg: ldo_vgp5 {
1102				regulator-compatible = "ldo_vgp5";
1103				regulator-name = "vgp5";
1104				regulator-min-microvolt = <1200000>;
1105				regulator-max-microvolt = <3000000>;
1106				regulator-enable-ramp-delay = <218>;
1107			};
1108
1109			mt6397_vgp6_reg: ldo_vgp6 {
1110				regulator-compatible = "ldo_vgp6";
1111				regulator-name = "vgp6";
1112				regulator-min-microvolt = <3300000>;
1113				regulator-max-microvolt = <3300000>;
1114				regulator-enable-ramp-delay = <218>;
1115				regulator-always-on;
1116			};
1117
1118			mt6397_vibr_reg: ldo_vibr {
1119				regulator-compatible = "ldo_vibr";
1120				regulator-name = "vibr";
1121				regulator-min-microvolt = <1300000>;
1122				regulator-max-microvolt = <3300000>;
1123				regulator-enable-ramp-delay = <218>;
1124			};
1125		};
1126
1127		rtc: mt6397rtc {
1128			compatible = "mediatek,mt6397-rtc";
1129		};
1130
1131		syscfg_pctl_pmic: syscfg_pctl_pmic@c000 {
1132			compatible = "mediatek,mt6397-pctl-pmic-syscfg",
1133				     "syscon";
1134			reg = <0 0x0000c000 0 0x0108>;
1135		};
1136	};
1137};
1138
1139&spi {
1140	pinctrl-names = "default";
1141	pinctrl-0 = <&spi_pins_a>;
1142	mediatek,pad-select = <1>;
1143	status = "okay";
1144	/* clients */
1145	cros_ec: ec@0 {
1146		compatible = "google,cros-ec-spi";
1147		reg = <0x0>;
1148		spi-max-frequency = <12000000>;
1149		interrupt-parent = <&pio>;
1150		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
1151		google,cros-ec-spi-msg-delay = <500>;
1152
1153		i2c_tunnel: i2c-tunnel0 {
1154			compatible = "google,cros-ec-i2c-tunnel";
1155			google,remote-bus = <0>;
1156			#address-cells = <1>;
1157			#size-cells = <0>;
1158
1159			battery: sbs-battery@b {
1160				compatible = "sbs,sbs-battery";
1161				reg = <0xb>;
1162				sbs,i2c-retry-count = <2>;
1163				sbs,poll-retry-count = <1>;
1164			};
1165		};
1166	};
1167};
1168
1169&ssusb {
1170	dr_mode = "host";
1171	wakeup-source;
1172	vusb33-supply = <&mt6397_vusb_reg>;
1173	status = "okay";
1174};
1175
1176&thermal {
1177	bank0-supply = <&mt6397_vpca15_reg>;
1178	bank1-supply = <&da9211_vcpu_reg>;
1179};
1180
1181&uart0 {
1182	status = "okay";
1183};
1184
1185&usb_host {
1186	pinctrl-names = "default";
1187	pinctrl-0 = <&usb_pins>;
1188	vusb33-supply = <&mt6397_vusb_reg>;
1189	status = "okay";
1190};
1191
1192#include <arm/cros-ec-keyboard.dtsi>
1193