1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright 2016 MediaTek Inc.
4 */
5
6#include <dt-bindings/input/input.h>
7#include <dt-bindings/input/linux-event-codes.h>
8#include <dt-bindings/regulator/dlg,da9211-regulator.h>
9#include <dt-bindings/gpio/gpio.h>
10#include "mt8173.dtsi"
11
12/ {
13	aliases {
14		mmc0 = &mmc0;
15		mmc1 = &mmc1;
16		mmc2 = &mmc3;
17	};
18
19	memory@40000000 {
20		device_type = "memory";
21		reg = <0 0x40000000 0 0x80000000>;
22	};
23
24	backlight: backlight {
25		compatible = "pwm-backlight";
26		pwms = <&pwm0 0 1000000>;
27		power-supply = <&bl_fixed_reg>;
28		enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
29
30		status = "okay";
31	};
32
33	bl_fixed_reg: fixedregulator2 {
34		compatible = "regulator-fixed";
35		regulator-name = "bl_fixed";
36		regulator-min-microvolt = <1800000>;
37		regulator-max-microvolt = <1800000>;
38		startup-delay-us = <1000>;
39		enable-active-high;
40		gpio = <&pio 32 GPIO_ACTIVE_HIGH>;
41		pinctrl-names = "default";
42		pinctrl-0 = <&bl_fixed_pins>;
43	};
44
45	chosen {
46		stdout-path = "serial0:115200n8";
47	};
48
49	gpio_keys: gpio-keys {
50		compatible = "gpio-keys";
51		pinctrl-names = "default";
52		pinctrl-0 = <&gpio_keys_pins>;
53
54		lid {
55			label = "Lid";
56			gpios = <&pio 69 GPIO_ACTIVE_LOW>;
57			linux,code = <SW_LID>;
58			linux,input-type = <EV_SW>;
59			gpio-key,wakeup;
60		};
61
62		power {
63			label = "Power";
64			gpios = <&pio 14 GPIO_ACTIVE_HIGH>;
65			linux,code = <KEY_POWER>;
66			debounce-interval = <30>;
67			gpio-key,wakeup;
68		};
69
70		tablet_mode {
71			label = "Tablet_mode";
72			gpios = <&pio 121 GPIO_ACTIVE_HIGH>;
73			linux,code = <SW_TABLET_MODE>;
74			linux,input-type = <EV_SW>;
75			gpio-key,wakeup;
76		};
77
78		volume_down {
79			label = "Volume_down";
80			gpios = <&pio 123 GPIO_ACTIVE_LOW>;
81			linux,code = <KEY_VOLUMEDOWN>;
82		};
83
84		volume_up {
85			label = "Volume_up";
86			gpios = <&pio 124 GPIO_ACTIVE_LOW>;
87			linux,code = <KEY_VOLUMEUP>;
88		};
89	};
90
91	panel: panel {
92		compatible = "lg,lp120up1";
93		power-supply = <&panel_fixed_3v3>;
94		backlight = <&backlight>;
95
96		port {
97			panel_in: endpoint {
98				remote-endpoint = <&ps8640_out>;
99			};
100		};
101	};
102
103	panel_fixed_3v3: regulator1 {
104		compatible = "regulator-fixed";
105		regulator-name = "PANEL_3V3";
106		regulator-min-microvolt = <3300000>;
107		regulator-max-microvolt = <3300000>;
108		enable-active-high;
109		gpio = <&pio 41 GPIO_ACTIVE_HIGH>;
110		pinctrl-names = "default";
111		pinctrl-0 = <&panel_fixed_pins>;
112	};
113
114	ps8640_fixed_1v2: regulator2 {
115		compatible = "regulator-fixed";
116		regulator-name = "PS8640_1V2";
117		regulator-min-microvolt = <1200000>;
118		regulator-max-microvolt = <1200000>;
119		regulator-enable-ramp-delay = <2000>;
120		enable-active-high;
121		regulator-boot-on;
122		gpio = <&pio 30 GPIO_ACTIVE_HIGH>;
123		pinctrl-names = "default";
124		pinctrl-0 = <&ps8640_fixed_pins>;
125	};
126
127	sdio_fixed_3v3: fixedregulator0 {
128		compatible = "regulator-fixed";
129		regulator-name = "3V3";
130		regulator-min-microvolt = <3300000>;
131		regulator-max-microvolt = <3300000>;
132		gpio = <&pio 85 GPIO_ACTIVE_HIGH>;
133		pinctrl-names = "default";
134		pinctrl-0 = <&sdio_fixed_3v3_pins>;
135	};
136
137	sound: sound {
138		compatible = "mediatek,mt8173-rt5650";
139		mediatek,audio-codec = <&rt5650 &hdmi0>;
140		mediatek,platform = <&afe>;
141		pinctrl-names = "default";
142		pinctrl-0 = <&aud_i2s2>;
143
144		mediatek,mclk = <1>;
145		codec-capture {
146			sound-dai = <&rt5650 1>;
147		};
148	};
149
150	hdmicon: connector {
151		compatible = "hdmi-connector";
152		label = "hdmi";
153		type = "a";
154		ddc-i2c-bus = <&hdmiddc0>;
155
156		port {
157			hdmi_connector_in: endpoint {
158				remote-endpoint = <&hdmi0_out>;
159			};
160		};
161	};
162};
163
164&mfg_async {
165	domain-supply = <&da9211_vgpu_reg>;
166};
167
168&cec {
169	status = "okay";
170};
171
172&cpu0 {
173	proc-supply = <&mt6397_vpca15_reg>;
174};
175
176&cpu1 {
177	proc-supply = <&mt6397_vpca15_reg>;
178};
179
180&cpu2 {
181	proc-supply = <&da9211_vcpu_reg>;
182	sram-supply = <&mt6397_vsramca7_reg>;
183};
184
185&cpu3 {
186	proc-supply = <&da9211_vcpu_reg>;
187	sram-supply = <&mt6397_vsramca7_reg>;
188};
189
190&cpu_thermal {
191	sustainable-power = <4500>; /* milliwatts */
192	trips {
193		threshold: trip-point0 {
194			temperature = <60000>;
195		};
196
197		target: trip-point1 {
198			temperature = <65000>;
199		};
200	};
201};
202
203&dsi0 {
204	status = "okay";
205	ports {
206		port {
207			dsi0_out: endpoint {
208				remote-endpoint = <&ps8640_in>;
209			};
210		};
211	};
212};
213
214&dpi0 {
215	status = "okay";
216};
217
218&hdmi0 {
219	status = "okay";
220	ports {
221		port@1 {
222			reg = <1>;
223
224			hdmi0_out: endpoint {
225				remote-endpoint = <&hdmi_connector_in>;
226			};
227		};
228	};
229};
230
231&hdmi_phy {
232	status = "okay";
233	mediatek,ibias = <0xc>;
234};
235
236&i2c0 {
237	status = "okay";
238
239	rt5650: audio-codec@1a {
240		compatible = "realtek,rt5650";
241		reg = <0x1a>;
242		avdd-supply = <&mt6397_vgp1_reg>;
243		cpvdd-supply = <&mt6397_vcama_reg>;
244		interrupt-parent = <&pio>;
245		interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
246		pinctrl-names = "default";
247		pinctrl-0 = <&rt5650_irq>;
248		#sound-dai-cells = <1>;
249		realtek,dmic1-data-pin = <2>;
250		realtek,jd-mode = <2>;
251	};
252
253	ps8640: edp-bridge@8 {
254		compatible = "parade,ps8640";
255		reg = <0x8>;
256		powerdown-gpios = <&pio 127 GPIO_ACTIVE_LOW>;
257		reset-gpios = <&pio 115 GPIO_ACTIVE_LOW>;
258		pinctrl-names = "default";
259		pinctrl-0 = <&ps8640_pins>;
260		vdd12-supply = <&ps8640_fixed_1v2>;
261		vdd33-supply = <&mt6397_vgp2_reg>;
262
263		ports {
264			#address-cells = <1>;
265			#size-cells = <0>;
266
267			port@0 {
268				reg = <0>;
269
270				ps8640_in: endpoint {
271					remote-endpoint = <&dsi0_out>;
272				};
273			};
274
275			port@1 {
276				reg = <1>;
277
278				ps8640_out: endpoint {
279					remote-endpoint = <&panel_in>;
280				};
281			};
282		};
283	};
284};
285
286&i2c1 {
287	clock-frequency = <1500000>;
288	status = "okay";
289
290	da9211: da9211@68 {
291		compatible = "dlg,da9211";
292		reg = <0x68>;
293		interrupt-parent = <&pio>;
294		interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
295
296		regulators {
297			da9211_vcpu_reg: BUCKA {
298				regulator-name = "VBUCKA";
299				regulator-min-microvolt = < 700000>;
300				regulator-max-microvolt = <1310000>;
301				regulator-min-microamp  = <2000000>;
302				regulator-max-microamp  = <4400000>;
303				regulator-ramp-delay = <10000>;
304				regulator-always-on;
305				regulator-allowed-modes = <DA9211_BUCK_MODE_SYNC
306							   DA9211_BUCK_MODE_AUTO>;
307			};
308
309			da9211_vgpu_reg: BUCKB {
310				regulator-name = "VBUCKB";
311				regulator-min-microvolt = < 700000>;
312				regulator-max-microvolt = <1310000>;
313				regulator-min-microamp  = <2000000>;
314				regulator-max-microamp  = <3000000>;
315				regulator-ramp-delay = <10000>;
316			};
317		};
318	};
319};
320
321&i2c2 {
322	status = "okay";
323
324	tpm: tpm@20 {
325		compatible = "infineon,slb9645tt";
326		reg = <0x20>;
327		powered-while-suspended;
328	};
329};
330
331&i2c3 {
332	clock-frequency = <400000>;
333	status = "okay";
334
335	touchscreen: touchscreen@10 {
336		compatible = "elan,ekth3500";
337		reg = <0x10>;
338		interrupt-parent = <&pio>;
339		interrupts = <88 IRQ_TYPE_LEVEL_LOW>;
340	};
341};
342
343&i2c4 {
344	clock-frequency = <400000>;
345	status = "okay";
346	pinctrl-names = "default";
347	pinctrl-0 = <&trackpad_irq>;
348
349	trackpad: trackpad@15 {
350		compatible = "elan,ekth3000";
351		interrupt-parent = <&pio>;
352		interrupts = <117 IRQ_TYPE_LEVEL_LOW>;
353		reg = <0x15>;
354		vcc-supply = <&mt6397_vgp6_reg>;
355		wakeup-source;
356	};
357};
358
359&mipi_tx0 {
360	status = "okay";
361};
362
363&mmc0 {
364	status = "okay";
365	pinctrl-names = "default", "state_uhs";
366	pinctrl-0 = <&mmc0_pins_default>;
367	pinctrl-1 = <&mmc0_pins_uhs>;
368	bus-width = <8>;
369	max-frequency = <200000000>;
370	cap-mmc-highspeed;
371	mmc-hs200-1_8v;
372	mmc-hs400-1_8v;
373	cap-mmc-hw-reset;
374	hs400-ds-delay = <0x14015>;
375	mediatek,hs200-cmd-int-delay=<30>;
376	mediatek,hs400-cmd-int-delay=<14>;
377	mediatek,hs400-cmd-resp-sel-rising;
378	vmmc-supply = <&mt6397_vemc_3v3_reg>;
379	vqmmc-supply = <&mt6397_vio18_reg>;
380	assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
381	assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
382	non-removable;
383};
384
385&mmc1 {
386	status = "okay";
387	pinctrl-names = "default", "state_uhs";
388	pinctrl-0 = <&mmc1_pins_default>;
389	pinctrl-1 = <&mmc1_pins_uhs>;
390	bus-width = <4>;
391	max-frequency = <200000000>;
392	cap-sd-highspeed;
393	sd-uhs-sdr50;
394	sd-uhs-sdr104;
395	cd-gpios = <&pio 1 GPIO_ACTIVE_LOW>;
396	vmmc-supply = <&mt6397_vmch_reg>;
397	vqmmc-supply = <&mt6397_vmc_reg>;
398};
399
400&mmc3 {
401	status = "okay";
402	pinctrl-names = "default", "state_uhs";
403	pinctrl-0 = <&mmc3_pins_default>;
404	pinctrl-1 = <&mmc3_pins_uhs>;
405	bus-width = <4>;
406	max-frequency = <200000000>;
407	cap-sd-highspeed;
408	sd-uhs-sdr50;
409	sd-uhs-sdr104;
410	keep-power-in-suspend;
411	enable-sdio-wakeup;
412	cap-sdio-irq;
413	vmmc-supply = <&sdio_fixed_3v3>;
414	vqmmc-supply = <&mt6397_vgp3_reg>;
415	non-removable;
416	cap-power-off-card;
417
418	#address-cells = <1>;
419	#size-cells = <0>;
420
421	btmrvl: btmrvl@2 {
422		compatible = "marvell,sd8897-bt";
423		reg = <2>;
424		interrupt-parent = <&pio>;
425		interrupts = <119 IRQ_TYPE_LEVEL_LOW>;
426		marvell,wakeup-pin = /bits/ 16 <0x0d>;
427		marvell,wakeup-gap-ms = /bits/ 16 <0x64>;
428	};
429
430	mwifiex: mwifiex@1 {
431		compatible = "marvell,sd8897";
432		reg = <1>;
433		interrupt-parent = <&pio>;
434		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
435		marvell,wakeup-pin = <3>;
436	};
437};
438
439&nor_flash {
440	status = "okay";
441	pinctrl-names = "default";
442	pinctrl-0 = <&nor_gpio1_pins>;
443
444	flash@0 {
445		compatible = "jedec,spi-nor";
446		reg = <0>;
447		spi-max-frequency = <50000000>;
448	};
449};
450
451&pio {
452	gpio-line-names = "EC_INT_1V8",
453			  "SD_CD_L",
454			  "ALC5514_IRQ",
455			  "ALC5650_IRQ",
456			  /*
457			   * AP_FLASH_WP_L is crossystem ABI. Schematics
458			   * call it SFWP_B.
459			   */
460			  "AP_FLASH_WP_L",
461			  "SFIN",
462			  "SFCS0",
463			  "SFHOLD",
464			  "SFOUT",
465			  "SFCK",
466			  "WRAP_EVENT_S_EINT10",
467			  "PMU_INT",
468			  "I2S2_WS_ALC5650",
469			  "I2S2_BCK_ALC5650",
470			  "PWR_BTN_1V8",
471			  "DA9212_IRQ",
472			  "IDDIG",
473			  "WATCHDOG",
474			  "CEC",
475			  "HDMISCK",
476			  "HDMISD",
477			  "HTPLG",
478			  "MSDC3_DAT0",
479			  "MSDC3_DAT1",
480			  "MSDC3_DAT2",
481			  "MSDC3_DAT3",
482			  "MSDC3_CLK",
483			  "MSDC3_CMD",
484			  "USB_C0_OC_FLAGB",
485			  "USBA_OC1_L",
486			  "PS8640_1V2_ENABLE",
487			  "THERM_ALERT_N",
488			  "PANEL_LCD_POWER_EN",
489			  "ANX7688_CHIP_PD_C",
490			  "EC_IN_RW_1V8",
491			  "ANX7688_1V_EN_C",
492			  "USB_DP_HPD_C",
493			  "TPM_DAVINT_N",
494			  "MARVELL8897_IRQ",
495			  "EN_USB_A0_PWR",
496			  "USBA_A0_OC_L",
497			  "EN_PP3300_DX_EDP",
498			  "",
499			  "SOC_I2C2_1V8_SDA_400K",
500			  "SOC_I2C2_1V8_SCL_400K",
501			  "SOC_I2C0_1V8_SDA_400K",
502			  "SOC_I2C0_1V8_SCL_400K",
503			  "EMMC_ID1",
504			  "EMMC_ID0",
505			  "MEM_CONFIG3",
506			  "EMMC_ID2",
507			  "MEM_CONFIG1",
508			  "MEM_CONFIG2",
509			  "BRD_ID2",
510			  "MEM_CONFIG0",
511			  "BRD_ID0",
512			  "BRD_ID1",
513			  "EMMC_DAT0",
514			  "EMMC_DAT1",
515			  "EMMC_DAT2",
516			  "EMMC_DAT3",
517			  "EMMC_DAT4",
518			  "EMMC_DAT5",
519			  "EMMC_DAT6",
520			  "EMMC_DAT7",
521			  "EMMC_CLK",
522			  "EMMC_CMD",
523			  "EMMC_RCLK",
524			  "PLT_RST_L",
525			  "LID_OPEN_1V8_L",
526			  "AUDIO_SPI_MISO_R",
527			  "",
528			  "AC_OK_1V8",
529			  "SD_DATA0",
530			  "SD_DATA1",
531			  "SD_DATA2",
532			  "SD_DATA3",
533			  "SD_CLK",
534			  "SD_CMD",
535			  "PWRAP_SPI0_MI",
536			  "PWRAP_SPI0_MO",
537			  "PWRAP_SPI0_CK",
538			  "PWRAP_SPI0_CSN",
539			  "",
540			  "",
541			  "WIFI_PDN",
542			  "RTC32K_1V8",
543			  "DISP_PWM0",
544			  "TOUCHSCREEN_INT_L",
545			  "",
546			  "SRCLKENA0",
547			  "SRCLKENA1",
548			  "PS8640_MODE_CONF",
549			  "TOUCHSCREEN_RESET_R",
550			  "PLATFORM_PROCHOT_L",
551			  "PANEL_POWER_EN",
552			  "REC_MODE_L",
553			  "EC_FW_UPDATE_L",
554			  "ACCEL2_INT_L",
555			  "HDMI_DP_INT",
556			  "ACCELGYRO3_INT_L",
557			  "ACCELGYRO4_INT_L",
558			  "SPI_EC_CLK",
559			  "SPI_EC_MI",
560			  "SPI_EC_MO",
561			  "SPI_EC_CSN",
562			  "SOC_I2C3_1V8_SDA_400K",
563			  "SOC_I2C3_1V8_SCL_400K",
564			  "",
565			  "",
566			  "",
567			  "",
568			  "",
569			  "",
570			  "",
571			  "PS8640_SYSRSTN_1V8",
572			  "APIN_MAX98090_DOUT2",
573			  "TP_INT_1V8_L_R",
574			  "RST_USB_HUB_R",
575			  "BT_WAKE_L",
576			  "ACCEL1_INT_L",
577			  "TABLET_MODE_L",
578			  "",
579			  "V_UP_IN_L_R",
580			  "V_DOWN_IN_L_R",
581			  "SOC_I2C1_1V8_SDA_1M",
582			  "SOC_I2C1_1V8_SCL_1M",
583			  "PS8640_PDN_1V8",
584			  "MAX98090_LRCLK",
585			  "MAX98090_BCLK",
586			  "MAX98090_MCLK",
587			  "APOUT_MAX98090_DIN",
588			  "APIN_MAX98090_DOUT",
589			  "SOC_I2C4_1V8_SDA_400K",
590			  "SOC_I2C4_1V8_SCL_400K";
591
592	aud_i2s2: aud_i2s2 {
593		pins1 {
594			pinmux = <MT8173_PIN_128_I2S0_LRCK__FUNC_I2S1_WS>,
595				 <MT8173_PIN_129_I2S0_BCK__FUNC_I2S1_BCK>,
596				 <MT8173_PIN_130_I2S0_MCK__FUNC_I2S1_MCK>,
597				 <MT8173_PIN_131_I2S0_DATA0__FUNC_I2S1_DO_1>,
598				 <MT8173_PIN_12_EINT12__FUNC_I2S2_WS>,
599				 <MT8173_PIN_13_EINT13__FUNC_I2S2_BCK>,
600				 <MT8173_PIN_132_I2S0_DATA1__FUNC_I2S2_DI_2>;
601			bias-pull-down;
602		};
603	};
604
605	bl_fixed_pins: bl_fixed_pins {
606		pins1 {
607			pinmux = <MT8173_PIN_32_UTXD2__FUNC_GPIO32>;
608			output-low;
609		};
610	};
611
612	bt_wake_pins: bt_wake_pins {
613		pins1 {
614			pinmux = <MT8173_PIN_119_KPROW0__FUNC_GPIO119>;
615			bias-pull-up;
616		};
617	};
618
619	disp_pwm0_pins: disp_pwm0_pins {
620		pins1 {
621			pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
622			output-low;
623		};
624	};
625
626	gpio_keys_pins: gpio_keys_pins {
627		volume_pins {
628			pinmux = <MT8173_PIN_123_KPCOL1__FUNC_GPIO123>,
629				 <MT8173_PIN_124_KPCOL2__FUNC_GPIO124>;
630			bias-pull-up;
631		};
632
633		tablet_mode_pins {
634			pinmux = <MT8173_PIN_121_KPROW2__FUNC_GPIO121>;
635			bias-pull-up;
636		};
637	};
638
639	hdmi_mux_pins: hdmi_mux_pins {
640		pins1 {
641			pinmux = <MT8173_PIN_36_DAISYNC__FUNC_GPIO36>;
642		};
643	};
644
645	i2c1_pins_a: i2c1 {
646		da9211_pins {
647			pinmux = <MT8173_PIN_15_EINT15__FUNC_GPIO15>;
648			bias-pull-up;
649		};
650	};
651
652	mmc0_pins_default: mmc0default {
653		pins_cmd_dat {
654			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
655				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
656				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
657				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
658				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
659				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
660				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
661				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
662				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
663			bias-pull-up;
664		};
665
666		pins_clk {
667			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
668			bias-pull-down;
669		};
670
671		pins_rst {
672			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
673			bias-pull-up;
674		};
675	};
676
677	mmc1_pins_default: mmc1default {
678		pins_cmd_dat {
679			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
680				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
681				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
682				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
683				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
684			input-enable;
685			drive-strength = <MTK_DRIVE_4mA>;
686			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
687		};
688
689		pins_clk {
690			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
691			bias-pull-down;
692			drive-strength = <MTK_DRIVE_4mA>;
693		};
694
695		pins_insert {
696			pinmux = <MT8173_PIN_1_EINT1__FUNC_GPIO1>;
697			bias-pull-up;
698		};
699	};
700
701	mmc3_pins_default: mmc3default {
702		pins_dat {
703			pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
704				 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
705				 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
706				 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
707			input-enable;
708			drive-strength = <MTK_DRIVE_8mA>;
709			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
710		};
711
712		pins_cmd {
713			pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
714			input-enable;
715			drive-strength = <MTK_DRIVE_8mA>;
716			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
717		};
718
719		pins_clk {
720			pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
721			bias-pull-down;
722			drive-strength = <MTK_DRIVE_8mA>;
723		};
724	};
725
726	mmc0_pins_uhs: mmc0 {
727		pins_cmd_dat {
728			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
729				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
730				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
731				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
732				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
733				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
734				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
735				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
736				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
737			input-enable;
738			drive-strength = <MTK_DRIVE_6mA>;
739			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
740		};
741
742		pins_clk {
743			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
744			drive-strength = <MTK_DRIVE_6mA>;
745			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
746		};
747
748		pins_ds {
749			pinmux = <MT8173_PIN_67_MSDC0_DSL__FUNC_MSDC0_DSL>;
750			drive-strength = <MTK_DRIVE_10mA>;
751			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
752		};
753
754		pins_rst {
755			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
756			bias-pull-up;
757		};
758	};
759
760	mmc1_pins_uhs: mmc1 {
761		pins_cmd_dat {
762			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
763				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
764				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
765				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
766				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
767			input-enable;
768			drive-strength = <MTK_DRIVE_6mA>;
769			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
770		};
771
772		pins_clk {
773			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
774			drive-strength = <MTK_DRIVE_8mA>;
775			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
776		};
777	};
778
779	mmc3_pins_uhs: mmc3 {
780		pins_dat {
781			pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
782				 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
783				 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
784				 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
785			input-enable;
786			drive-strength = <MTK_DRIVE_8mA>;
787			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
788		};
789
790		pins_cmd {
791			pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
792			input-enable;
793			drive-strength = <MTK_DRIVE_8mA>;
794			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
795		};
796
797		pins_clk {
798			pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
799			drive-strength = <MTK_DRIVE_8mA>;
800			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
801		};
802	};
803
804	nor_gpio1_pins: nor {
805		pins1 {
806			pinmux = <MT8173_PIN_6_EINT6__FUNC_SFCS0>,
807				 <MT8173_PIN_7_EINT7__FUNC_SFHOLD>,
808				 <MT8173_PIN_8_EINT8__FUNC_SFIN>;
809			input-enable;
810			drive-strength = <MTK_DRIVE_4mA>;
811			bias-pull-up;
812		};
813
814		pins2 {
815			pinmux = <MT8173_PIN_5_EINT5__FUNC_SFOUT>;
816			drive-strength = <MTK_DRIVE_4mA>;
817			bias-pull-up;
818		};
819
820		pins_clk {
821			pinmux = <MT8173_PIN_9_EINT9__FUNC_SFCK>;
822			input-enable;
823			drive-strength = <MTK_DRIVE_4mA>;
824			bias-pull-up;
825		};
826	};
827
828	panel_fixed_pins: panel_fixed_pins {
829		pins1 {
830			pinmux = <MT8173_PIN_41_CMMCLK__FUNC_GPIO41>;
831		};
832	};
833
834	ps8640_pins: ps8640_pins {
835		pins1 {
836			pinmux = <MT8173_PIN_92_PCM_CLK__FUNC_GPIO92>,
837				 <MT8173_PIN_115_URTS0__FUNC_GPIO115>,
838				 <MT8173_PIN_127_LCM_RST__FUNC_GPIO127>;
839		};
840	};
841
842	ps8640_fixed_pins: ps8640_fixed_pins {
843		pins1 {
844			pinmux = <MT8173_PIN_30_URTS2__FUNC_GPIO30>;
845		};
846	};
847
848	rt5650_irq: rt5650_irq {
849		pins1 {
850			pinmux = <MT8173_PIN_3_EINT3__FUNC_GPIO3>;
851			bias-pull-down;
852		};
853	};
854
855	sdio_fixed_3v3_pins: sdio_fixed_3v3_pins {
856		pins1 {
857			pinmux = <MT8173_PIN_85_AUD_DAT_MOSI__FUNC_GPIO85>;
858			output-low;
859		};
860	};
861
862	spi_pins_a: spi1 {
863		pins1 {
864			pinmux = <MT8173_PIN_0_EINT0__FUNC_GPIO0>;
865			bias-pull-up;
866		};
867
868		pins_spi {
869			pinmux = <MT8173_PIN_102_MSDC2_DAT2__FUNC_SPI_CK_1_>,
870				 <MT8173_PIN_103_MSDC2_DAT3__FUNC_SPI_MI_1_>,
871				 <MT8173_PIN_104_MSDC2_CLK__FUNC_SPI_MO_1_>,
872				 <MT8173_PIN_105_MSDC2_CMD__FUNC_SPI_CS_1_>;
873			bias-disable;
874		};
875	};
876
877	trackpad_irq: trackpad_irq {
878		pins1 {
879			pinmux = <MT8173_PIN_117_URXD3__FUNC_GPIO117>;
880			input-enable;
881			bias-pull-up;
882		};
883	};
884
885	usb_pins: usb {
886		pins1 {
887			pinmux = <MT8173_PIN_101_MSDC2_DAT1__FUNC_GPIO101>;
888			output-high;
889			bias-disable;
890		};
891	};
892
893	wifi_wake_pins: wifi_wake_pins {
894		pins1 {
895			pinmux = <MT8173_PIN_38_CONN_RST__FUNC_GPIO38>;
896			bias-pull-up;
897		};
898	};
899};
900
901&pwm0 {
902	pinctrl-names = "default";
903	pinctrl-0 = <&disp_pwm0_pins>;
904	status = "okay";
905};
906
907&pwrap {
908	pmic: mt6397 {
909		compatible = "mediatek,mt6397";
910		#address-cells = <1>;
911		#size-cells = <1>;
912		interrupt-parent = <&pio>;
913		interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
914		interrupt-controller;
915		#interrupt-cells = <2>;
916
917		clock: mt6397clock {
918			compatible = "mediatek,mt6397-clk";
919			#clock-cells = <1>;
920		};
921
922		pio6397: pinctrl {
923			compatible = "mediatek,mt6397-pinctrl";
924			pins-are-numbered;
925			gpio-controller;
926			#gpio-cells = <2>;
927		};
928
929		regulator: mt6397regulator {
930			compatible = "mediatek,mt6397-regulator";
931
932			mt6397_vpca15_reg: buck_vpca15 {
933				regulator-compatible = "buck_vpca15";
934				regulator-name = "vpca15";
935				regulator-min-microvolt = < 700000>;
936				regulator-max-microvolt = <1350000>;
937				regulator-ramp-delay = <12500>;
938				regulator-always-on;
939				regulator-allowed-modes = <0 1>;
940			};
941
942			mt6397_vpca7_reg: buck_vpca7 {
943				regulator-compatible = "buck_vpca7";
944				regulator-name = "vpca7";
945				regulator-min-microvolt = < 700000>;
946				regulator-max-microvolt = <1350000>;
947				regulator-ramp-delay = <12500>;
948				regulator-enable-ramp-delay = <115>;
949				regulator-always-on;
950			};
951
952			mt6397_vsramca15_reg: buck_vsramca15 {
953				regulator-compatible = "buck_vsramca15";
954				regulator-name = "vsramca15";
955				regulator-min-microvolt = < 700000>;
956				regulator-max-microvolt = <1350000>;
957				regulator-ramp-delay = <12500>;
958				regulator-always-on;
959			};
960
961			mt6397_vsramca7_reg: buck_vsramca7 {
962				regulator-compatible = "buck_vsramca7";
963				regulator-name = "vsramca7";
964				regulator-min-microvolt = < 700000>;
965				regulator-max-microvolt = <1350000>;
966				regulator-ramp-delay = <12500>;
967				regulator-always-on;
968			};
969
970			mt6397_vcore_reg: buck_vcore {
971				regulator-compatible = "buck_vcore";
972				regulator-name = "vcore";
973				regulator-min-microvolt = < 700000>;
974				regulator-max-microvolt = <1350000>;
975				regulator-ramp-delay = <12500>;
976				regulator-always-on;
977			};
978
979			mt6397_vgpu_reg: buck_vgpu {
980				regulator-compatible = "buck_vgpu";
981				regulator-name = "vgpu";
982				regulator-min-microvolt = < 700000>;
983				regulator-max-microvolt = <1350000>;
984				regulator-ramp-delay = <12500>;
985				regulator-enable-ramp-delay = <115>;
986			};
987
988			mt6397_vdrm_reg: buck_vdrm {
989				regulator-compatible = "buck_vdrm";
990				regulator-name = "vdrm";
991				regulator-min-microvolt = <1200000>;
992				regulator-max-microvolt = <1400000>;
993				regulator-ramp-delay = <12500>;
994				regulator-always-on;
995			};
996
997			mt6397_vio18_reg: buck_vio18 {
998				regulator-compatible = "buck_vio18";
999				regulator-name = "vio18";
1000				regulator-min-microvolt = <1620000>;
1001				regulator-max-microvolt = <1980000>;
1002				regulator-ramp-delay = <12500>;
1003				regulator-always-on;
1004			};
1005
1006			mt6397_vtcxo_reg: ldo_vtcxo {
1007				regulator-compatible = "ldo_vtcxo";
1008				regulator-name = "vtcxo";
1009				regulator-always-on;
1010			};
1011
1012			mt6397_va28_reg: ldo_va28 {
1013				regulator-compatible = "ldo_va28";
1014				regulator-name = "va28";
1015			};
1016
1017			mt6397_vcama_reg: ldo_vcama {
1018				regulator-compatible = "ldo_vcama";
1019				regulator-name = "vcama";
1020				regulator-min-microvolt = <1800000>;
1021				regulator-max-microvolt = <1800000>;
1022				regulator-enable-ramp-delay = <218>;
1023			};
1024
1025			mt6397_vio28_reg: ldo_vio28 {
1026				regulator-compatible = "ldo_vio28";
1027				regulator-name = "vio28";
1028				regulator-always-on;
1029			};
1030
1031			mt6397_vusb_reg: ldo_vusb {
1032				regulator-compatible = "ldo_vusb";
1033				regulator-name = "vusb";
1034			};
1035
1036			mt6397_vmc_reg: ldo_vmc {
1037				regulator-compatible = "ldo_vmc";
1038				regulator-name = "vmc";
1039				regulator-min-microvolt = <1800000>;
1040				regulator-max-microvolt = <3300000>;
1041				regulator-enable-ramp-delay = <218>;
1042			};
1043
1044			mt6397_vmch_reg: ldo_vmch {
1045				regulator-compatible = "ldo_vmch";
1046				regulator-name = "vmch";
1047				regulator-min-microvolt = <3000000>;
1048				regulator-max-microvolt = <3300000>;
1049				regulator-enable-ramp-delay = <218>;
1050			};
1051
1052			mt6397_vemc_3v3_reg: ldo_vemc3v3 {
1053				regulator-compatible = "ldo_vemc3v3";
1054				regulator-name = "vemc_3v3";
1055				regulator-min-microvolt = <3000000>;
1056				regulator-max-microvolt = <3300000>;
1057				regulator-enable-ramp-delay = <218>;
1058			};
1059
1060			mt6397_vgp1_reg: ldo_vgp1 {
1061				regulator-compatible = "ldo_vgp1";
1062				regulator-name = "vcamd";
1063				regulator-min-microvolt = <1800000>;
1064				regulator-max-microvolt = <1800000>;
1065				regulator-enable-ramp-delay = <240>;
1066			};
1067
1068			mt6397_vgp2_reg: ldo_vgp2 {
1069				regulator-compatible = "ldo_vgp2";
1070				regulator-name = "vcamio";
1071				regulator-min-microvolt = <3300000>;
1072				regulator-max-microvolt = <3300000>;
1073				regulator-enable-ramp-delay = <218>;
1074			};
1075
1076			mt6397_vgp3_reg: ldo_vgp3 {
1077				regulator-compatible = "ldo_vgp3";
1078				regulator-name = "vcamaf";
1079				regulator-min-microvolt = <1800000>;
1080				regulator-max-microvolt = <1800000>;
1081				regulator-enable-ramp-delay = <218>;
1082			};
1083
1084			mt6397_vgp4_reg: ldo_vgp4 {
1085				regulator-compatible = "ldo_vgp4";
1086				regulator-name = "vgp4";
1087				regulator-min-microvolt = <1200000>;
1088				regulator-max-microvolt = <3300000>;
1089				regulator-enable-ramp-delay = <218>;
1090			};
1091
1092			mt6397_vgp5_reg: ldo_vgp5 {
1093				regulator-compatible = "ldo_vgp5";
1094				regulator-name = "vgp5";
1095				regulator-min-microvolt = <1200000>;
1096				regulator-max-microvolt = <3000000>;
1097				regulator-enable-ramp-delay = <218>;
1098			};
1099
1100			mt6397_vgp6_reg: ldo_vgp6 {
1101				regulator-compatible = "ldo_vgp6";
1102				regulator-name = "vgp6";
1103				regulator-min-microvolt = <3300000>;
1104				regulator-max-microvolt = <3300000>;
1105				regulator-enable-ramp-delay = <218>;
1106				regulator-always-on;
1107			};
1108
1109			mt6397_vibr_reg: ldo_vibr {
1110				regulator-compatible = "ldo_vibr";
1111				regulator-name = "vibr";
1112				regulator-min-microvolt = <1300000>;
1113				regulator-max-microvolt = <3300000>;
1114				regulator-enable-ramp-delay = <218>;
1115			};
1116		};
1117
1118		rtc: mt6397rtc {
1119			compatible = "mediatek,mt6397-rtc";
1120		};
1121
1122		syscfg_pctl_pmic: syscfg_pctl_pmic@c000 {
1123			compatible = "mediatek,mt6397-pctl-pmic-syscfg",
1124				     "syscon";
1125			reg = <0 0x0000c000 0 0x0108>;
1126		};
1127	};
1128};
1129
1130&spi {
1131	pinctrl-names = "default";
1132	pinctrl-0 = <&spi_pins_a>;
1133	mediatek,pad-select = <1>;
1134	status = "okay";
1135	/* clients */
1136	cros_ec: ec@0 {
1137		compatible = "google,cros-ec-spi";
1138		reg = <0x0>;
1139		spi-max-frequency = <12000000>;
1140		interrupt-parent = <&pio>;
1141		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
1142		google,cros-ec-spi-msg-delay = <500>;
1143
1144		i2c_tunnel: i2c-tunnel0 {
1145			compatible = "google,cros-ec-i2c-tunnel";
1146			google,remote-bus = <0>;
1147			#address-cells = <1>;
1148			#size-cells = <0>;
1149
1150			battery: sbs-battery@b {
1151				compatible = "sbs,sbs-battery";
1152				reg = <0xb>;
1153				sbs,i2c-retry-count = <2>;
1154				sbs,poll-retry-count = <1>;
1155			};
1156		};
1157	};
1158};
1159
1160&ssusb {
1161	dr_mode = "host";
1162	wakeup-source;
1163	vusb33-supply = <&mt6397_vusb_reg>;
1164	status = "okay";
1165};
1166
1167&thermal {
1168	bank0-supply = <&mt6397_vpca15_reg>;
1169	bank1-supply = <&da9211_vcpu_reg>;
1170};
1171
1172&uart0 {
1173	status = "okay";
1174};
1175
1176&usb_host {
1177	pinctrl-names = "default";
1178	pinctrl-0 = <&usb_pins>;
1179	vusb33-supply = <&mt6397_vusb_reg>;
1180	status = "okay";
1181};
1182
1183#include <arm/cros-ec-keyboard.dtsi>
1184