1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright (C) 2021 MediaTek Inc. 4 * Author: Sam.Shih <sam.shih@mediatek.com> 5 */ 6 7/dts-v1/; 8#include "mt7986a.dtsi" 9 10/ { 11 model = "MediaTek MT7986a RFB"; 12 compatible = "mediatek,mt7986a-rfb"; 13 14 aliases { 15 serial0 = &uart0; 16 }; 17 18 chosen { 19 stdout-path = "serial0:115200n8"; 20 }; 21 22 memory@40000000 { 23 device_type = "memory"; 24 reg = <0 0x40000000 0 0x40000000>; 25 }; 26}; 27 28&crypto { 29 status = "okay"; 30}; 31 32ð { 33 status = "okay"; 34 35 gmac0: mac@0 { 36 compatible = "mediatek,eth-mac"; 37 reg = <0>; 38 phy-mode = "2500base-x"; 39 40 fixed-link { 41 speed = <2500>; 42 full-duplex; 43 pause; 44 }; 45 }; 46 47 mdio: mdio-bus { 48 #address-cells = <1>; 49 #size-cells = <0>; 50 }; 51}; 52 53&mdio { 54 switch: switch@0 { 55 compatible = "mediatek,mt7531"; 56 reg = <31>; 57 reset-gpios = <&pio 5 0>; 58 }; 59}; 60 61&pio { 62 uart1_pins: uart1-pins { 63 mux { 64 function = "uart"; 65 groups = "uart1"; 66 }; 67 }; 68 69 uart2_pins: uart2-pins { 70 mux { 71 function = "uart"; 72 groups = "uart2"; 73 }; 74 }; 75 76 wf_2g_5g_pins: wf-2g-5g-pins { 77 mux { 78 function = "wifi"; 79 groups = "wf_2g", "wf_5g"; 80 }; 81 conf { 82 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", 83 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", 84 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", 85 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", 86 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", 87 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", 88 "WF1_TOP_CLK", "WF1_TOP_DATA"; 89 drive-strength = <4>; 90 }; 91 }; 92 93 wf_dbdc_pins: wf-dbdc-pins { 94 mux { 95 function = "wifi"; 96 groups = "wf_dbdc"; 97 }; 98 conf { 99 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", 100 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", 101 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", 102 "WF0_TOP_CLK", "WF0_TOP_DATA"; 103 drive-strength = <4>; 104 }; 105 }; 106}; 107 108&switch { 109 ports { 110 #address-cells = <1>; 111 #size-cells = <0>; 112 113 port@0 { 114 reg = <0>; 115 label = "lan0"; 116 }; 117 118 port@1 { 119 reg = <1>; 120 label = "lan1"; 121 }; 122 123 port@2 { 124 reg = <2>; 125 label = "lan2"; 126 }; 127 128 port@3 { 129 reg = <3>; 130 label = "lan3"; 131 }; 132 133 port@4 { 134 reg = <4>; 135 label = "lan4"; 136 }; 137 138 port@6 { 139 reg = <6>; 140 label = "cpu"; 141 ethernet = <&gmac0>; 142 phy-mode = "2500base-x"; 143 144 fixed-link { 145 speed = <2500>; 146 full-duplex; 147 pause; 148 }; 149 }; 150 }; 151}; 152 153&uart0 { 154 status = "okay"; 155}; 156 157&uart1 { 158 pinctrl-names = "default"; 159 pinctrl-0 = <&uart1_pins>; 160 status = "okay"; 161}; 162 163&uart2 { 164 pinctrl-names = "default"; 165 pinctrl-0 = <&uart2_pins>; 166 status = "okay"; 167}; 168 169&wifi { 170 status = "okay"; 171 pinctrl-names = "default", "dbdc"; 172 pinctrl-0 = <&wf_2g_5g_pins>; 173 pinctrl-1 = <&wf_dbdc_pins>; 174}; 175