1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright (C) 2021 MediaTek Inc. 4 * Author: Sam.Shih <sam.shih@mediatek.com> 5 */ 6 7/dts-v1/; 8#include "mt7986a.dtsi" 9 10/ { 11 model = "MediaTek MT7986a RFB"; 12 compatible = "mediatek,mt7986a-rfb"; 13 14 aliases { 15 serial0 = &uart0; 16 }; 17 18 chosen { 19 stdout-path = "serial0:115200n8"; 20 }; 21 22 memory@40000000 { 23 device_type = "memory"; 24 reg = <0 0x40000000 0 0x40000000>; 25 }; 26}; 27 28ð { 29 status = "okay"; 30 31 gmac0: mac@0 { 32 compatible = "mediatek,eth-mac"; 33 reg = <0>; 34 phy-mode = "2500base-x"; 35 36 fixed-link { 37 speed = <2500>; 38 full-duplex; 39 pause; 40 }; 41 }; 42 43 mdio: mdio-bus { 44 #address-cells = <1>; 45 #size-cells = <0>; 46 }; 47}; 48 49&mdio { 50 switch: switch@0 { 51 compatible = "mediatek,mt7531"; 52 reg = <31>; 53 reset-gpios = <&pio 5 0>; 54 }; 55}; 56 57&pio { 58 uart1_pins: uart1-pins { 59 mux { 60 function = "uart"; 61 groups = "uart1"; 62 }; 63 }; 64 65 uart2_pins: uart2-pins { 66 mux { 67 function = "uart"; 68 groups = "uart2"; 69 }; 70 }; 71 72 wf_2g_5g_pins: wf-2g-5g-pins { 73 mux { 74 function = "wifi"; 75 groups = "wf_2g", "wf_5g"; 76 }; 77 conf { 78 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", 79 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", 80 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", 81 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", 82 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", 83 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", 84 "WF1_TOP_CLK", "WF1_TOP_DATA"; 85 drive-strength = <4>; 86 }; 87 }; 88 89 wf_dbdc_pins: wf-dbdc-pins { 90 mux { 91 function = "wifi"; 92 groups = "wf_dbdc"; 93 }; 94 conf { 95 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", 96 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", 97 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", 98 "WF0_TOP_CLK", "WF0_TOP_DATA"; 99 drive-strength = <4>; 100 }; 101 }; 102}; 103 104&switch { 105 ports { 106 #address-cells = <1>; 107 #size-cells = <0>; 108 109 port@0 { 110 reg = <0>; 111 label = "lan0"; 112 }; 113 114 port@1 { 115 reg = <1>; 116 label = "lan1"; 117 }; 118 119 port@2 { 120 reg = <2>; 121 label = "lan2"; 122 }; 123 124 port@3 { 125 reg = <3>; 126 label = "lan3"; 127 }; 128 129 port@4 { 130 reg = <4>; 131 label = "lan4"; 132 }; 133 134 port@6 { 135 reg = <6>; 136 label = "cpu"; 137 ethernet = <&gmac0>; 138 phy-mode = "2500base-x"; 139 140 fixed-link { 141 speed = <2500>; 142 full-duplex; 143 pause; 144 }; 145 }; 146 }; 147}; 148 149&uart0 { 150 status = "okay"; 151}; 152 153&uart1 { 154 pinctrl-names = "default"; 155 pinctrl-0 = <&uart1_pins>; 156 status = "okay"; 157}; 158 159&uart2 { 160 pinctrl-names = "default"; 161 pinctrl-0 = <&uart2_pins>; 162 status = "okay"; 163}; 164 165&wifi { 166 status = "okay"; 167 pinctrl-names = "default", "dbdc"; 168 pinctrl-0 = <&wf_2g_5g_pins>; 169 pinctrl-1 = <&wf_dbdc_pins>; 170}; 171