1/* 2 * Copyright (c) 2017 MediaTek Inc. 3 * Author: Ming Huang <ming.huang@mediatek.com> 4 * Sean Wang <sean.wang@mediatek.com> 5 * 6 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 */ 8 9/dts-v1/; 10#include <dt-bindings/input/input.h> 11 12#include "mt7622.dtsi" 13 14/ { 15 model = "MediaTek MT7622 RFB1 board"; 16 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622"; 17 18 chosen { 19 bootargs = "console=ttyS0,115200n1"; 20 }; 21 22 gpio-keys { 23 compatible = "gpio-keys-polled"; 24 poll-interval = <100>; 25 26 factory { 27 label = "factory"; 28 linux,code = <BTN_0>; 29 gpios = <&pio 0 0>; 30 }; 31 32 wps { 33 label = "wps"; 34 linux,code = <KEY_WPS_BUTTON>; 35 gpios = <&pio 102 0>; 36 }; 37 }; 38 39 memory { 40 reg = <0 0x40000000 0 0x3F000000>; 41 }; 42}; 43 44&pio { 45 /* eMMC is shared pin with parallel NAND */ 46 emmc_pins_default: emmc-pins-default { 47 mux { 48 function = "emmc", "emmc_rst"; 49 groups = "emmc"; 50 }; 51 }; 52 53 emmc_pins_uhs: emmc-pins-uhs { 54 mux { 55 function = "emmc"; 56 groups = "emmc"; 57 }; 58 }; 59 60 eth_pins: eth-pins { 61 mux { 62 function = "eth"; 63 groups = "mdc_mdio", "rgmii_via_gmac2"; 64 }; 65 }; 66 67 i2c1_pins: i2c1-pins { 68 mux { 69 function = "i2c"; 70 groups = "i2c1_0"; 71 }; 72 }; 73 74 i2c2_pins: i2c2-pins { 75 mux { 76 function = "i2c"; 77 groups = "i2c2_0"; 78 }; 79 }; 80 81 i2s1_pins: i2s1-pins { 82 mux { 83 function = "i2s"; 84 groups = "i2s_out_bclk_ws_mclk", 85 "i2s1_in_data", 86 "i2s1_out_data"; 87 }; 88 }; 89 90 irrx_pins: irrx-pins { 91 mux { 92 function = "ir"; 93 groups = "ir_1_rx"; 94 }; 95 }; 96 97 irtx_pins: irtx-pins { 98 mux { 99 function = "ir"; 100 groups = "ir_1_tx"; 101 }; 102 }; 103 104 /* Parallel nand is shared pin with eMMC */ 105 parallel_nand_pins: parallel-nand-pins { 106 mux { 107 function = "flash"; 108 groups = "par_nand"; 109 }; 110 }; 111 112 pcie0_pins: pcie0-pins { 113 mux { 114 function = "pcie"; 115 groups = "pcie0_pad_perst", 116 "pcie0_1_waken", 117 "pcie0_1_clkreq"; 118 }; 119 }; 120 121 pcie1_pins: pcie1-pins { 122 mux { 123 function = "pcie"; 124 groups = "pcie1_pad_perst", 125 "pcie1_0_waken", 126 "pcie1_0_clkreq"; 127 }; 128 }; 129 130 pmic_bus_pins: pmic-bus-pins { 131 mux { 132 function = "pmic"; 133 groups = "pmic_bus"; 134 }; 135 }; 136 137 pwm7_pins: pwm1-2-pins { 138 mux { 139 function = "pwm"; 140 groups = "pwm_ch7_2"; 141 }; 142 }; 143 144 wled_pins: wled-pins { 145 mux { 146 function = "led"; 147 groups = "wled"; 148 }; 149 }; 150 151 sd0_pins_default: sd0-pins-default { 152 mux { 153 function = "sd"; 154 groups = "sd_0"; 155 }; 156 }; 157 158 sd0_pins_uhs: sd0-pins-uhs { 159 mux { 160 function = "sd"; 161 groups = "sd_0"; 162 }; 163 }; 164 165 /* Serial NAND is shared pin with SPI-NOR */ 166 serial_nand_pins: serial-nand-pins { 167 mux { 168 function = "flash"; 169 groups = "snfi"; 170 }; 171 }; 172 173 spic0_pins: spic0-pins { 174 mux { 175 function = "spi"; 176 groups = "spic0_0"; 177 }; 178 }; 179 180 spic1_pins: spic1-pins { 181 mux { 182 function = "spi"; 183 groups = "spic1_0"; 184 }; 185 }; 186 187 /* SPI-NOR is shared pin with serial NAND */ 188 spi_nor_pins: spi-nor-pins { 189 mux { 190 function = "flash"; 191 groups = "spi_nor"; 192 }; 193 }; 194 195 /* serial NAND is shared pin with SPI-NOR */ 196 serial_nand_pins: serial-nand-pins { 197 mux { 198 function = "flash"; 199 groups = "snfi"; 200 }; 201 }; 202 203 uart0_pins: uart0-pins { 204 mux { 205 function = "uart"; 206 groups = "uart0_0_tx_rx" ; 207 }; 208 }; 209 210 uart2_pins: uart2-pins { 211 mux { 212 function = "uart"; 213 groups = "uart2_1_tx_rx" ; 214 }; 215 }; 216 217 watchdog_pins: watchdog-pins { 218 mux { 219 function = "watchdog"; 220 groups = "watchdog"; 221 }; 222 }; 223}; 224 225&uart0 { 226 status = "okay"; 227}; 228