1bdf2cbb2Syt.shen@mediatek.com/* 2bdf2cbb2Syt.shen@mediatek.com * Copyright (c) 2017 MediaTek Inc. 3bdf2cbb2Syt.shen@mediatek.com * Author: YT Shen <yt.shen@mediatek.com> 4bdf2cbb2Syt.shen@mediatek.com * 5bdf2cbb2Syt.shen@mediatek.com * SPDX-License-Identifier: (GPL-2.0 OR MIT) 6bdf2cbb2Syt.shen@mediatek.com */ 7bdf2cbb2Syt.shen@mediatek.com 8bdf2cbb2Syt.shen@mediatek.com/dts-v1/; 91724f4ccSChunfeng Yun#include <dt-bindings/gpio/gpio.h> 10bdf2cbb2Syt.shen@mediatek.com#include "mt2712e.dtsi" 11bdf2cbb2Syt.shen@mediatek.com 12bdf2cbb2Syt.shen@mediatek.com/ { 13bdf2cbb2Syt.shen@mediatek.com model = "MediaTek MT2712 evaluation board"; 14bdf2cbb2Syt.shen@mediatek.com compatible = "mediatek,mt2712-evb", "mediatek,mt2712"; 15bdf2cbb2Syt.shen@mediatek.com 16bdf2cbb2Syt.shen@mediatek.com aliases { 17bdf2cbb2Syt.shen@mediatek.com serial0 = &uart0; 18bdf2cbb2Syt.shen@mediatek.com }; 19bdf2cbb2Syt.shen@mediatek.com 20bdf2cbb2Syt.shen@mediatek.com memory@40000000 { 21bdf2cbb2Syt.shen@mediatek.com device_type = "memory"; 22bdf2cbb2Syt.shen@mediatek.com reg = <0 0x40000000 0 0x80000000>; 23bdf2cbb2Syt.shen@mediatek.com }; 24bdf2cbb2Syt.shen@mediatek.com 25bdf2cbb2Syt.shen@mediatek.com chosen { 26bdf2cbb2Syt.shen@mediatek.com stdout-path = "serial0:921600n8"; 27bdf2cbb2Syt.shen@mediatek.com }; 28f75dd8bdSAndrew-sh Cheng 29f75dd8bdSAndrew-sh Cheng cpus_fixed_vproc0: fixedregulator@0 { 30f75dd8bdSAndrew-sh Cheng compatible = "regulator-fixed"; 31f75dd8bdSAndrew-sh Cheng regulator-name = "vproc_buck0"; 32f75dd8bdSAndrew-sh Cheng regulator-min-microvolt = <1000000>; 33f75dd8bdSAndrew-sh Cheng regulator-max-microvolt = <1000000>; 34f75dd8bdSAndrew-sh Cheng }; 35f75dd8bdSAndrew-sh Cheng 36f75dd8bdSAndrew-sh Cheng cpus_fixed_vproc1: fixedregulator@1 { 37f75dd8bdSAndrew-sh Cheng compatible = "regulator-fixed"; 38f75dd8bdSAndrew-sh Cheng regulator-name = "vproc_buck1"; 39f75dd8bdSAndrew-sh Cheng regulator-min-microvolt = <1000000>; 40f75dd8bdSAndrew-sh Cheng regulator-max-microvolt = <1000000>; 41f75dd8bdSAndrew-sh Cheng }; 42f75dd8bdSAndrew-sh Cheng 431724f4ccSChunfeng Yun extcon_usb: extcon_iddig { 441724f4ccSChunfeng Yun compatible = "linux,extcon-usb-gpio"; 451724f4ccSChunfeng Yun id-gpio = <&pio 12 GPIO_ACTIVE_HIGH>; 461724f4ccSChunfeng Yun }; 471724f4ccSChunfeng Yun 481724f4ccSChunfeng Yun extcon_usb1: extcon_iddig1 { 491724f4ccSChunfeng Yun compatible = "linux,extcon-usb-gpio"; 501724f4ccSChunfeng Yun id-gpio = <&pio 14 GPIO_ACTIVE_HIGH>; 511724f4ccSChunfeng Yun }; 521724f4ccSChunfeng Yun 531724f4ccSChunfeng Yun usb_p0_vbus: regulator@2 { 541724f4ccSChunfeng Yun compatible = "regulator-fixed"; 551724f4ccSChunfeng Yun regulator-name = "p0_vbus"; 561724f4ccSChunfeng Yun regulator-min-microvolt = <5000000>; 571724f4ccSChunfeng Yun regulator-max-microvolt = <5000000>; 581724f4ccSChunfeng Yun gpio = <&pio 13 GPIO_ACTIVE_HIGH>; 591724f4ccSChunfeng Yun enable-active-high; 601724f4ccSChunfeng Yun }; 611724f4ccSChunfeng Yun 621724f4ccSChunfeng Yun usb_p1_vbus: regulator@3 { 631724f4ccSChunfeng Yun compatible = "regulator-fixed"; 641724f4ccSChunfeng Yun regulator-name = "p1_vbus"; 651724f4ccSChunfeng Yun regulator-min-microvolt = <5000000>; 661724f4ccSChunfeng Yun regulator-max-microvolt = <5000000>; 671724f4ccSChunfeng Yun gpio = <&pio 15 GPIO_ACTIVE_HIGH>; 681724f4ccSChunfeng Yun enable-active-high; 691724f4ccSChunfeng Yun }; 701724f4ccSChunfeng Yun 711724f4ccSChunfeng Yun usb_p2_vbus: regulator@4 { 721724f4ccSChunfeng Yun compatible = "regulator-fixed"; 731724f4ccSChunfeng Yun regulator-name = "p2_vbus"; 741724f4ccSChunfeng Yun regulator-min-microvolt = <5000000>; 751724f4ccSChunfeng Yun regulator-max-microvolt = <5000000>; 761724f4ccSChunfeng Yun gpio = <&pio 16 GPIO_ACTIVE_HIGH>; 771724f4ccSChunfeng Yun enable-active-high; 781724f4ccSChunfeng Yun }; 791724f4ccSChunfeng Yun 801724f4ccSChunfeng Yun usb_p3_vbus: regulator@5 { 811724f4ccSChunfeng Yun compatible = "regulator-fixed"; 821724f4ccSChunfeng Yun regulator-name = "p3_vbus"; 831724f4ccSChunfeng Yun regulator-min-microvolt = <5000000>; 841724f4ccSChunfeng Yun regulator-max-microvolt = <5000000>; 851724f4ccSChunfeng Yun gpio = <&pio 17 GPIO_ACTIVE_HIGH>; 861724f4ccSChunfeng Yun enable-active-high; 871724f4ccSChunfeng Yun regulator-always-on; 881724f4ccSChunfeng Yun }; 891724f4ccSChunfeng Yun 90f75dd8bdSAndrew-sh Cheng}; 91f75dd8bdSAndrew-sh Cheng 925f599552SZhiyong Tao&auxadc { 935f599552SZhiyong Tao status = "okay"; 945f599552SZhiyong Tao}; 955f599552SZhiyong Tao 96f75dd8bdSAndrew-sh Cheng&cpu0 { 97f75dd8bdSAndrew-sh Cheng proc-supply = <&cpus_fixed_vproc0>; 98f75dd8bdSAndrew-sh Cheng}; 99f75dd8bdSAndrew-sh Cheng 100f75dd8bdSAndrew-sh Cheng&cpu1 { 101f75dd8bdSAndrew-sh Cheng proc-supply = <&cpus_fixed_vproc0>; 102f75dd8bdSAndrew-sh Cheng}; 103f75dd8bdSAndrew-sh Cheng 104f75dd8bdSAndrew-sh Cheng&cpu2 { 105f75dd8bdSAndrew-sh Cheng proc-supply = <&cpus_fixed_vproc1>; 106bdf2cbb2Syt.shen@mediatek.com}; 107bdf2cbb2Syt.shen@mediatek.com 108e9cabfd0SBiao Huangð { 109e9cabfd0SBiao Huang phy-mode ="rgmii-rxid"; 110e9cabfd0SBiao Huang phy-handle = <ðernet_phy0>; 111e9cabfd0SBiao Huang mediatek,tx-delay-ps = <1530>; 112e9cabfd0SBiao Huang snps,reset-gpio = <&pio 87 GPIO_ACTIVE_LOW>; 113*79e11778SBiao Huang snps,reset-delays-us = <0 10000 10000>; 114e9cabfd0SBiao Huang pinctrl-names = "default", "sleep"; 115e9cabfd0SBiao Huang pinctrl-0 = <ð_default>; 116e9cabfd0SBiao Huang pinctrl-1 = <ð_sleep>; 117e9cabfd0SBiao Huang status = "okay"; 118e9cabfd0SBiao Huang 119e9cabfd0SBiao Huang mdio { 120e9cabfd0SBiao Huang compatible = "snps,dwmac-mdio"; 121e9cabfd0SBiao Huang #address-cells = <1>; 122e9cabfd0SBiao Huang #size-cells = <0>; 123e9cabfd0SBiao Huang ethernet_phy0: ethernet-phy@5 { 124e9cabfd0SBiao Huang compatible = "ethernet-phy-id0243.0d90"; 125e9cabfd0SBiao Huang reg = <0x5>; 126e9cabfd0SBiao Huang }; 127e9cabfd0SBiao Huang }; 128e9cabfd0SBiao Huang}; 129e9cabfd0SBiao Huang 1301724f4ccSChunfeng Yun&pio { 131e9cabfd0SBiao Huang eth_default: eth_default { 132e9cabfd0SBiao Huang tx_pins { 133e9cabfd0SBiao Huang pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GBE_TXD3>, 134e9cabfd0SBiao Huang <MT2712_PIN_72_GBE_TXD2__FUNC_GBE_TXD2>, 135e9cabfd0SBiao Huang <MT2712_PIN_73_GBE_TXD1__FUNC_GBE_TXD1>, 136e9cabfd0SBiao Huang <MT2712_PIN_74_GBE_TXD0__FUNC_GBE_TXD0>, 137e9cabfd0SBiao Huang <MT2712_PIN_75_GBE_TXC__FUNC_GBE_TXC>, 138e9cabfd0SBiao Huang <MT2712_PIN_76_GBE_TXEN__FUNC_GBE_TXEN>; 139e9cabfd0SBiao Huang drive-strength = <MTK_DRIVE_8mA>; 140e9cabfd0SBiao Huang }; 141e9cabfd0SBiao Huang rx_pins { 142e9cabfd0SBiao Huang pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GBE_RXD3>, 143e9cabfd0SBiao Huang <MT2712_PIN_79_GBE_RXD2__FUNC_GBE_RXD2>, 144e9cabfd0SBiao Huang <MT2712_PIN_80_GBE_RXD1__FUNC_GBE_RXD1>, 145e9cabfd0SBiao Huang <MT2712_PIN_81_GBE_RXD0__FUNC_GBE_RXD0>, 146e9cabfd0SBiao Huang <MT2712_PIN_82_GBE_RXDV__FUNC_GBE_RXDV>, 147e9cabfd0SBiao Huang <MT2712_PIN_84_GBE_RXC__FUNC_GBE_RXC>; 148e9cabfd0SBiao Huang input-enable; 149e9cabfd0SBiao Huang }; 150e9cabfd0SBiao Huang mdio_pins { 151e9cabfd0SBiao Huang pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GBE_MDC>, 152e9cabfd0SBiao Huang <MT2712_PIN_86_GBE_MDIO__FUNC_GBE_MDIO>; 153e9cabfd0SBiao Huang drive-strength = <MTK_DRIVE_8mA>; 154e9cabfd0SBiao Huang input-enable; 155e9cabfd0SBiao Huang }; 156e9cabfd0SBiao Huang }; 157e9cabfd0SBiao Huang 158e9cabfd0SBiao Huang eth_sleep: eth_sleep { 159e9cabfd0SBiao Huang tx_pins { 160e9cabfd0SBiao Huang pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GPIO71>, 161e9cabfd0SBiao Huang <MT2712_PIN_72_GBE_TXD2__FUNC_GPIO72>, 162e9cabfd0SBiao Huang <MT2712_PIN_73_GBE_TXD1__FUNC_GPIO73>, 163e9cabfd0SBiao Huang <MT2712_PIN_74_GBE_TXD0__FUNC_GPIO74>, 164e9cabfd0SBiao Huang <MT2712_PIN_75_GBE_TXC__FUNC_GPIO75>, 165e9cabfd0SBiao Huang <MT2712_PIN_76_GBE_TXEN__FUNC_GPIO76>; 166e9cabfd0SBiao Huang }; 167e9cabfd0SBiao Huang rx_pins { 168e9cabfd0SBiao Huang pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GPIO78>, 169e9cabfd0SBiao Huang <MT2712_PIN_79_GBE_RXD2__FUNC_GPIO79>, 170e9cabfd0SBiao Huang <MT2712_PIN_80_GBE_RXD1__FUNC_GPIO80>, 171e9cabfd0SBiao Huang <MT2712_PIN_81_GBE_RXD0__FUNC_GPIO81>, 172e9cabfd0SBiao Huang <MT2712_PIN_82_GBE_RXDV__FUNC_GPIO82>, 173e9cabfd0SBiao Huang <MT2712_PIN_84_GBE_RXC__FUNC_GPIO84>; 174e9cabfd0SBiao Huang input-disable; 175e9cabfd0SBiao Huang }; 176e9cabfd0SBiao Huang mdio_pins { 177e9cabfd0SBiao Huang pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GPIO85>, 178e9cabfd0SBiao Huang <MT2712_PIN_86_GBE_MDIO__FUNC_GPIO86>; 179e9cabfd0SBiao Huang input-disable; 180e9cabfd0SBiao Huang bias-disable; 181e9cabfd0SBiao Huang }; 182e9cabfd0SBiao Huang }; 183e9cabfd0SBiao Huang 1841724f4ccSChunfeng Yun usb0_id_pins_float: usb0_iddig { 1851724f4ccSChunfeng Yun pins_iddig { 1861724f4ccSChunfeng Yun pinmux = <MT2712_PIN_12_IDDIG_P0__FUNC_IDDIG_A>; 1871724f4ccSChunfeng Yun bias-pull-up; 1881724f4ccSChunfeng Yun }; 1891724f4ccSChunfeng Yun }; 1901724f4ccSChunfeng Yun 1911724f4ccSChunfeng Yun usb1_id_pins_float: usb1_iddig { 1921724f4ccSChunfeng Yun pins_iddig { 1931724f4ccSChunfeng Yun pinmux = <MT2712_PIN_14_IDDIG_P1__FUNC_IDDIG_B>; 1941724f4ccSChunfeng Yun bias-pull-up; 1951724f4ccSChunfeng Yun }; 1961724f4ccSChunfeng Yun }; 1971724f4ccSChunfeng Yun}; 1981724f4ccSChunfeng Yun 1991724f4ccSChunfeng Yun&ssusb { 2001724f4ccSChunfeng Yun vbus-supply = <&usb_p0_vbus>; 2011724f4ccSChunfeng Yun extcon = <&extcon_usb>; 2021724f4ccSChunfeng Yun dr_mode = "otg"; 2031724f4ccSChunfeng Yun wakeup-source; 2041724f4ccSChunfeng Yun mediatek,u3p-dis-msk = <0x1>; 2051724f4ccSChunfeng Yun //enable-manual-drd; 2061724f4ccSChunfeng Yun //maximum-speed = "full-speed"; 2071724f4ccSChunfeng Yun pinctrl-names = "default"; 2081724f4ccSChunfeng Yun pinctrl-0 = <&usb0_id_pins_float>; 2091724f4ccSChunfeng Yun status = "okay"; 2101724f4ccSChunfeng Yun}; 2111724f4ccSChunfeng Yun 2121724f4ccSChunfeng Yun&ssusb1 { 2131724f4ccSChunfeng Yun vbus-supply = <&usb_p1_vbus>; 2141724f4ccSChunfeng Yun extcon = <&extcon_usb1>; 2151724f4ccSChunfeng Yun dr_mode = "otg"; 2161724f4ccSChunfeng Yun //mediatek,u3p-dis-msk = <0x1>; 2171724f4ccSChunfeng Yun enable-manual-drd; 2181724f4ccSChunfeng Yun wakeup-source; 2191724f4ccSChunfeng Yun //maximum-speed = "full-speed"; 2201724f4ccSChunfeng Yun pinctrl-names = "default"; 2211724f4ccSChunfeng Yun pinctrl-0 = <&usb1_id_pins_float>; 2221724f4ccSChunfeng Yun status = "okay"; 2231724f4ccSChunfeng Yun}; 2241724f4ccSChunfeng Yun 225bdf2cbb2Syt.shen@mediatek.com&uart0 { 226bdf2cbb2Syt.shen@mediatek.com status = "okay"; 227bdf2cbb2Syt.shen@mediatek.com}; 228bdf2cbb2Syt.shen@mediatek.com 2291724f4ccSChunfeng Yun&usb_host0 { 2301724f4ccSChunfeng Yun vbus-supply = <&usb_p2_vbus>; 2311724f4ccSChunfeng Yun status = "okay"; 2321724f4ccSChunfeng Yun}; 2331724f4ccSChunfeng Yun 2341724f4ccSChunfeng Yun&usb_host1 { 2351724f4ccSChunfeng Yun status = "okay"; 2361724f4ccSChunfeng Yun}; 237